PCI: save and restore L1-SS registers
saves and restores L1 PM-SS registers during suspend and resume
this makes sure consistency of L1SS states across suspend/resume
cycle
Bug
200161255
Change-Id: I68b25e9433d0f08e4fadbe4547db7fb811f59462
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/923504
(cherry picked from commit
39530fa01a94d0f57f5fbb0febc56ac33f8e0024)
Reviewed-on: http://git-master/r/
1165055
(cherry picked from commit
7db113ba07654ce0494b96fd2eb8bf2c3dd02407)
Reviewed-on: http://git-master/r/
1172628
(cherry picked from commit
7348b2855df4c29c964b33db08d1687ed6c0d216)
Reviewed-on: http://git-master/r/
1178426
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>