mmc: tegra: Update pad control register settings

mmc: tegra: Update pad control register settings

- Updated Schmitt Trigger (E_SCHMT) settings for
SDMMC1 and SDMMC3 devices. The E_SCHMT value should
be 1'b0 at 3.3V and 1'b1 at 1.8V operation.

- Updated spare register and IO trim control register
settings for all SDMMC controllers

Bug 1505960

Change-Id: If818bbc9a438ec80ca2d228c12a8db0d538c3425
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/453998
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>