gpu: nvgpu: gk20a: check ctx valid bit

[sojka/nv-tegra/linux-3.10.git] / drivers / gpu / nvgpu / gk20a / gr_gk20a.c

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 491f55bff50a38de5772010257cca477864ef10d..e195b433f58f42d8d0827ed9d7a15ba35af85263 100644 (file)
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -5055,6 +5055,7 @@ static int gk20a_gr_handle_notify_pending(struct gk20a *g,
 
 /* Used by sw interrupt thread to translate current ctx to chid.
  * For performance, we don't want to go through 128 channels every time.
+ * curr_ctx should be the value read from gr_fecs_current_ctx_r().
  * A small tlb is used here to cache translation */
 static int gk20a_gr_get_chid_from_ctx(struct gk20a *g, u32 curr_ctx)
 {
@@ -5063,6 +5064,13 @@ static int gk20a_gr_get_chid_from_ctx(struct gk20a *g, u32 curr_ctx)
        u32 chid = -1;
        u32 i;
 
+       /* when contexts are unloaded from GR, the valid bit is reset
+        * but the instance pointer information remains intact. So the
+        * valid bit must be checked to be absolutely certain that a
+        * valid context is currently resident. */
+       if (!gr_fecs_current_ctx_valid_v(curr_ctx))
+               return -1;
+
        spin_lock(&gr->ch_tlb_lock);
 
        /* check cache first */