2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 * Ring initialization rules:
25 * 1. Each segment is initialized to zero, except for link TRBs.
26 * 2. Ring cycle state = 0. This represents Producer Cycle State (PCS) or
27 * Consumer Cycle State (CCS), depending on ring function.
28 * 3. Enqueue pointer = dequeue pointer = address of first TRB in the segment.
30 * Ring behavior rules:
31 * 1. A ring is empty if enqueue == dequeue. This means there will always be at
32 * least one free TRB in the ring. This is useful if you want to turn that
33 * into a link TRB and expand the ring.
34 * 2. When incrementing an enqueue or dequeue pointer, if the next TRB is a
35 * link TRB, then load the pointer with the address in the link TRB. If the
36 * link TRB had its toggle bit set, you may need to update the ring cycle
37 * state (see cycle bit rules). You may have to do this multiple times
38 * until you reach a non-link TRB.
39 * 3. A ring is full if enqueue++ (for the definition of increment above)
40 * equals the dequeue pointer.
43 * 1. When a consumer increments a dequeue pointer and encounters a toggle bit
44 * in a link TRB, it must toggle the ring cycle state.
45 * 2. When a producer increments an enqueue pointer and encounters a toggle bit
46 * in a link TRB, it must toggle the ring cycle state.
49 * 1. Check if ring is full before you enqueue.
50 * 2. Write the ring cycle state to the cycle bit in the TRB you're enqueuing.
51 * Update enqueue pointer between each write (which may update the ring
53 * 3. Notify consumer. If SW is producer, it rings the doorbell for command
54 * and endpoint rings. If HC is the producer for the event ring,
55 * and it generates an interrupt according to interrupt modulation rules.
58 * 1. Check if TRB belongs to you. If the cycle bit == your ring cycle state,
59 * the TRB is owned by the consumer.
60 * 2. Update dequeue pointer (which may update the ring cycle state) and
61 * continue processing TRBs until you reach a TRB which is not owned by you.
62 * 3. Notify the producer. SW is the consumer for the event ring, and it
63 * updates event ring dequeue pointer. HC is the consumer for the command and
64 * endpoint rings; it generates events on the event ring for these.
67 #include <linux/scatterlist.h>
68 #include <linux/slab.h>
69 #include <linux/usb/phy.h>
72 static int handle_cmd_in_cmd_wait_list(struct xhci_hcd *xhci,
73 struct xhci_virt_device *virt_dev,
74 struct xhci_event_cmd *event);
77 * Returns zero if the TRB isn't in this segment, otherwise it returns the DMA
80 dma_addr_t xhci_trb_virt_to_dma(struct xhci_segment *seg,
83 unsigned long segment_offset;
85 if (!seg || !trb || trb < seg->trbs)
88 segment_offset = trb - seg->trbs;
89 if (segment_offset >= TRBS_PER_SEGMENT)
91 return seg->dma + (segment_offset * sizeof(*trb));
94 /* Does this link TRB point to the first segment in a ring,
95 * or was the previous TRB the last TRB on the last segment in the ERST?
97 static bool last_trb_on_last_seg(struct xhci_hcd *xhci, struct xhci_ring *ring,
98 struct xhci_segment *seg, union xhci_trb *trb)
100 if (ring == xhci->event_ring)
101 return (trb == &seg->trbs[TRBS_PER_SEGMENT]) &&
102 (seg->next == xhci->event_ring->first_seg);
104 return le32_to_cpu(trb->link.control) & LINK_TOGGLE;
107 /* Is this TRB a link TRB or was the last TRB the last TRB in this event ring
108 * segment? I.e. would the updated event TRB pointer step off the end of the
111 static int last_trb(struct xhci_hcd *xhci, struct xhci_ring *ring,
112 struct xhci_segment *seg, union xhci_trb *trb)
114 if (ring == xhci->event_ring)
115 return trb == &seg->trbs[TRBS_PER_SEGMENT];
117 return TRB_TYPE_LINK_LE32(trb->link.control);
120 static int enqueue_is_link_trb(struct xhci_ring *ring)
122 struct xhci_link_trb *link = &ring->enqueue->link;
123 return TRB_TYPE_LINK_LE32(link->control);
126 union xhci_trb *xhci_find_next_enqueue(struct xhci_ring *ring)
128 /* Enqueue pointer can be left pointing to the link TRB,
129 * we must handle that
131 if (TRB_TYPE_LINK_LE32(ring->enqueue->link.control))
132 return ring->enq_seg->next->trbs;
133 return ring->enqueue;
136 /* Updates trb to point to the next TRB in the ring, and updates seg if the next
137 * TRB is in a new segment. This does not skip over link TRBs, and it does not
138 * effect the ring dequeue or enqueue pointers.
140 static void next_trb(struct xhci_hcd *xhci,
141 struct xhci_ring *ring,
142 struct xhci_segment **seg,
143 union xhci_trb **trb)
145 if (last_trb(xhci, ring, *seg, *trb)) {
147 *trb = ((*seg)->trbs);
154 * See Cycle bit rules. SW is the consumer for the event ring only.
155 * Don't make a ring full of link TRBs. That would be dumb and this would loop.
157 static void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring)
159 unsigned long long addr;
164 * If this is not event ring, and the dequeue pointer
165 * is not on a link TRB, there is one more usable TRB
167 if (ring->type != TYPE_EVENT &&
168 !last_trb(xhci, ring, ring->deq_seg, ring->dequeue))
169 ring->num_trbs_free++;
173 * Update the dequeue pointer further if that was a link TRB or
174 * we're at the end of an event ring segment (which doesn't have
177 if (last_trb(xhci, ring, ring->deq_seg, ring->dequeue)) {
178 if (ring->type == TYPE_EVENT &&
179 last_trb_on_last_seg(xhci, ring,
180 ring->deq_seg, ring->dequeue)) {
181 ring->cycle_state = (ring->cycle_state ? 0 : 1);
183 ring->deq_seg = ring->deq_seg->next;
184 ring->dequeue = ring->deq_seg->trbs;
188 } while (last_trb(xhci, ring, ring->deq_seg, ring->dequeue));
190 addr = (unsigned long long) xhci_trb_virt_to_dma(ring->deq_seg, ring->dequeue);
194 * See Cycle bit rules. SW is the consumer for the event ring only.
195 * Don't make a ring full of link TRBs. That would be dumb and this would loop.
197 * If we've just enqueued a TRB that is in the middle of a TD (meaning the
198 * chain bit is set), then set the chain bit in all the following link TRBs.
199 * If we've enqueued the last TRB in a TD, make sure the following link TRBs
200 * have their chain bit cleared (so that each Link TRB is a separate TD).
202 * Section 6.4.4.1 of the 0.95 spec says link TRBs cannot have the chain bit
203 * set, but other sections talk about dealing with the chain bit set. This was
204 * fixed in the 0.96 specification errata, but we have to assume that all 0.95
205 * xHCI hardware can't handle the chain bit being cleared on a link TRB.
207 * @more_trbs_coming: Will you enqueue more TRBs before calling
208 * prepare_transfer()?
210 static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring,
211 bool more_trbs_coming)
214 union xhci_trb *next;
215 unsigned long long addr;
217 chain = le32_to_cpu(ring->enqueue->generic.field[3]) & TRB_CHAIN;
218 /* If this is not event ring, there is one less usable TRB */
219 if (ring->type != TYPE_EVENT &&
220 !last_trb(xhci, ring, ring->enq_seg, ring->enqueue))
221 ring->num_trbs_free--;
222 next = ++(ring->enqueue);
225 /* Update the dequeue pointer further if that was a link TRB or we're at
226 * the end of an event ring segment (which doesn't have link TRBS)
228 while (last_trb(xhci, ring, ring->enq_seg, next)) {
229 if (ring->type != TYPE_EVENT) {
231 * If the caller doesn't plan on enqueueing more
232 * TDs before ringing the doorbell, then we
233 * don't want to give the link TRB to the
234 * hardware just yet. We'll give the link TRB
235 * back in prepare_ring() just before we enqueue
236 * the TD at the top of the ring.
238 if (!chain && !more_trbs_coming)
241 /* If we're not dealing with 0.95 hardware or
242 * isoc rings on AMD 0.96 host,
243 * carry over the chain bit of the previous TRB
244 * (which may mean the chain bit is cleared).
246 if (!(ring->type == TYPE_ISOC &&
247 (xhci->quirks & XHCI_AMD_0x96_HOST))
248 && !xhci_link_trb_quirk(xhci)) {
249 next->link.control &=
250 cpu_to_le32(~TRB_CHAIN);
251 next->link.control |=
254 /* Give this link TRB to the hardware */
256 next->link.control ^= cpu_to_le32(TRB_CYCLE);
258 /* Toggle the cycle bit after the last ring segment. */
259 if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) {
260 ring->cycle_state = (ring->cycle_state ? 0 : 1);
263 ring->enq_seg = ring->enq_seg->next;
264 ring->enqueue = ring->enq_seg->trbs;
265 next = ring->enqueue;
267 addr = (unsigned long long) xhci_trb_virt_to_dma(ring->enq_seg, ring->enqueue);
271 * Check to see if there's room to enqueue num_trbs on the ring and make sure
272 * enqueue pointer will not advance into dequeue segment. See rules above.
274 static inline int room_on_ring(struct xhci_hcd *xhci, struct xhci_ring *ring,
275 unsigned int num_trbs)
277 int num_trbs_in_deq_seg;
279 if (ring->num_trbs_free < num_trbs)
282 if (ring->type != TYPE_COMMAND && ring->type != TYPE_EVENT) {
283 num_trbs_in_deq_seg = ring->dequeue - ring->deq_seg->trbs;
284 if (ring->num_trbs_free < num_trbs + num_trbs_in_deq_seg)
291 /* Ring the host controller doorbell after placing a command on the ring */
292 void xhci_ring_cmd_db(struct xhci_hcd *xhci)
294 if (!(xhci->cmd_ring_state & CMD_RING_STATE_RUNNING))
297 xhci_dbg(xhci, "// Ding dong!\n");
298 xhci_writel(xhci, DB_VALUE_HOST, &xhci->dba->doorbell[0]);
299 /* Flush PCI posted writes */
300 xhci_readl(xhci, &xhci->dba->doorbell[0]);
303 static int xhci_abort_cmd_ring(struct xhci_hcd *xhci)
308 xhci_dbg(xhci, "Abort command ring\n");
310 if (!(xhci->cmd_ring_state & CMD_RING_STATE_RUNNING)) {
311 xhci_dbg(xhci, "The command ring isn't running, "
312 "Have the command ring been stopped?\n");
316 temp_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
317 if (!(temp_64 & CMD_RING_RUNNING)) {
318 xhci_dbg(xhci, "Command ring had been stopped\n");
321 xhci->cmd_ring_state = CMD_RING_STATE_ABORTED;
322 xhci_write_64(xhci, temp_64 | CMD_RING_ABORT,
323 &xhci->op_regs->cmd_ring);
325 /* Section 4.6.1.2 of xHCI 1.0 spec says software should
326 * time the completion od all xHCI commands, including
327 * the Command Abort operation. If software doesn't see
328 * CRR negated in a timely manner (e.g. longer than 5
329 * seconds), then it should assume that the there are
330 * larger problems with the xHC and assert HCRST.
332 ret = xhci_handshake(xhci, &xhci->op_regs->cmd_ring,
333 CMD_RING_RUNNING, 0, 5 * 1000 * 1000);
335 xhci_err(xhci, "Stopped the command ring failed, "
336 "maybe the host is dead\n");
337 xhci->xhc_state |= XHCI_STATE_DYING;
346 static int xhci_queue_cd(struct xhci_hcd *xhci,
347 struct xhci_command *command,
348 union xhci_trb *cmd_trb)
351 cd = kzalloc(sizeof(struct xhci_cd), GFP_ATOMIC);
354 INIT_LIST_HEAD(&cd->cancel_cmd_list);
356 cd->command = command;
357 cd->cmd_trb = cmd_trb;
358 list_add_tail(&cd->cancel_cmd_list, &xhci->cancel_cmd_list);
364 * Cancel the command which has issue.
366 * Some commands may hang due to waiting for acknowledgement from
367 * usb device. It is outside of the xHC's ability to control and
368 * will cause the command ring is blocked. When it occurs software
369 * should intervene to recover the command ring.
370 * See Section 4.6.1.1 and 4.6.1.2
372 int xhci_cancel_cmd(struct xhci_hcd *xhci, struct xhci_command *command,
373 union xhci_trb *cmd_trb)
378 spin_lock_irqsave(&xhci->lock, flags);
380 if (xhci->xhc_state & XHCI_STATE_DYING) {
381 xhci_warn(xhci, "Abort the command ring,"
382 " but the xHCI is dead.\n");
387 /* queue the cmd desriptor to cancel_cmd_list */
388 retval = xhci_queue_cd(xhci, command, cmd_trb);
390 xhci_warn(xhci, "Queuing command descriptor failed.\n");
394 /* abort command ring */
395 retval = xhci_abort_cmd_ring(xhci);
397 xhci_err(xhci, "Abort command ring failed\n");
398 if (unlikely(retval == -ESHUTDOWN)) {
399 spin_unlock_irqrestore(&xhci->lock, flags);
400 usb_hc_died(xhci_to_hcd(xhci)->primary_hcd);
401 xhci_dbg(xhci, "xHCI host controller is dead.\n");
402 if (xhci_to_hcd(xhci)->driver &&
403 xhci_to_hcd(xhci)->driver->hcd_reinit)
404 xhci_to_hcd(xhci)->driver->hcd_reinit(
411 spin_unlock_irqrestore(&xhci->lock, flags);
415 void xhci_ring_ep_doorbell(struct xhci_hcd *xhci,
416 unsigned int slot_id,
417 unsigned int ep_index,
418 unsigned int stream_id)
420 __le32 __iomem *db_addr = &xhci->dba->doorbell[slot_id];
421 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
422 unsigned int ep_state = ep->ep_state;
424 /* Don't ring the doorbell for this endpoint if there are pending
425 * cancellations because we don't want to interrupt processing.
426 * We don't want to restart any stream rings if there's a set dequeue
427 * pointer command pending because the device can choose to start any
428 * stream once the endpoint is on the HW schedule.
429 * FIXME - check all the stream rings for pending cancellations.
431 if ((ep_state & EP_HALT_PENDING) || (ep_state & SET_DEQ_PENDING) ||
432 (ep_state & EP_HALTED))
434 xhci_writel(xhci, DB_VALUE(ep_index, stream_id), db_addr);
435 /* The CPU has better things to do at this point than wait for a
436 * write-posting flush. It'll get there soon enough.
440 /* Ring the doorbell for any rings with pending URBs */
441 static void ring_doorbell_for_active_rings(struct xhci_hcd *xhci,
442 unsigned int slot_id,
443 unsigned int ep_index)
445 unsigned int stream_id;
446 struct xhci_virt_ep *ep;
448 ep = &xhci->devs[slot_id]->eps[ep_index];
450 /* A ring has pending URBs if its TD list is not empty */
451 if (!(ep->ep_state & EP_HAS_STREAMS)) {
452 if (ep->ring && !(list_empty(&ep->ring->td_list)))
453 xhci_ring_ep_doorbell(xhci, slot_id, ep_index, 0);
457 for (stream_id = 1; stream_id < ep->stream_info->num_streams;
459 struct xhci_stream_info *stream_info = ep->stream_info;
460 if (!list_empty(&stream_info->stream_rings[stream_id]->td_list))
461 xhci_ring_ep_doorbell(xhci, slot_id, ep_index,
467 * Find the segment that trb is in. Start searching in start_seg.
468 * If we must move past a segment that has a link TRB with a toggle cycle state
469 * bit set, then we will toggle the value pointed at by cycle_state.
471 static struct xhci_segment *find_trb_seg(
472 struct xhci_segment *start_seg,
473 union xhci_trb *trb, int *cycle_state)
475 struct xhci_segment *cur_seg = start_seg;
476 struct xhci_generic_trb *generic_trb;
478 while (cur_seg->trbs > trb ||
479 &cur_seg->trbs[TRBS_PER_SEGMENT - 1] < trb) {
480 generic_trb = &cur_seg->trbs[TRBS_PER_SEGMENT - 1].generic;
481 if (generic_trb->field[3] & cpu_to_le32(LINK_TOGGLE))
483 cur_seg = cur_seg->next;
484 if (cur_seg == start_seg)
485 /* Looped over the entire list. Oops! */
492 static struct xhci_ring *xhci_triad_to_transfer_ring(struct xhci_hcd *xhci,
493 unsigned int slot_id, unsigned int ep_index,
494 unsigned int stream_id)
496 struct xhci_virt_ep *ep;
498 ep = &xhci->devs[slot_id]->eps[ep_index];
499 /* Common case: no streams */
500 if (!(ep->ep_state & EP_HAS_STREAMS))
503 if (stream_id == 0) {
505 "WARN: Slot ID %u, ep index %u has streams, "
506 "but URB has no stream ID.\n",
511 if (stream_id < ep->stream_info->num_streams)
512 return ep->stream_info->stream_rings[stream_id];
515 "WARN: Slot ID %u, ep index %u has "
516 "stream IDs 1 to %u allocated, "
517 "but stream ID %u is requested.\n",
519 ep->stream_info->num_streams - 1,
524 /* Get the right ring for the given URB.
525 * If the endpoint supports streams, boundary check the URB's stream ID.
526 * If the endpoint doesn't support streams, return the singular endpoint ring.
528 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
531 return xhci_triad_to_transfer_ring(xhci, urb->dev->slot_id,
532 xhci_get_endpoint_index(&urb->ep->desc), urb->stream_id);
536 * Move the xHC's endpoint ring dequeue pointer past cur_td.
537 * Record the new state of the xHC's endpoint ring dequeue segment,
538 * dequeue pointer, and new consumer cycle state in state.
539 * Update our internal representation of the ring's dequeue pointer.
541 * We do this in three jumps:
542 * - First we update our new ring state to be the same as when the xHC stopped.
543 * - Then we traverse the ring to find the segment that contains
544 * the last TRB in the TD. We toggle the xHC's new cycle state when we pass
545 * any link TRBs with the toggle cycle bit set.
546 * - Finally we move the dequeue state one TRB further, toggling the cycle bit
547 * if we've moved it past a link TRB with the toggle cycle bit set.
549 * Some of the uses of xhci_generic_trb are grotty, but if they're done
550 * with correct __le32 accesses they should work fine. Only users of this are
553 void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
554 unsigned int slot_id, unsigned int ep_index,
555 unsigned int stream_id, struct xhci_td *cur_td,
556 struct xhci_dequeue_state *state)
558 struct xhci_virt_device *dev = xhci->devs[slot_id];
559 struct xhci_ring *ep_ring;
560 struct xhci_generic_trb *trb;
561 struct xhci_ep_ctx *ep_ctx;
564 ep_ring = xhci_triad_to_transfer_ring(xhci, slot_id,
565 ep_index, stream_id);
567 xhci_warn(xhci, "WARN can't find new dequeue state "
568 "for invalid stream ID %u.\n",
572 state->new_cycle_state = 0;
573 xhci_dbg(xhci, "Finding segment containing stopped TRB.\n");
574 state->new_deq_seg = find_trb_seg(cur_td->start_seg,
575 dev->eps[ep_index].stopped_trb,
576 &state->new_cycle_state);
577 if (!state->new_deq_seg) {
582 /* Dig out the cycle state saved by the xHC during the stop ep cmd */
583 xhci_dbg(xhci, "Finding endpoint context\n");
584 ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
585 state->new_cycle_state = 0x1 & le64_to_cpu(ep_ctx->deq);
587 state->new_deq_ptr = cur_td->last_trb;
588 xhci_dbg(xhci, "Finding segment containing last TRB in TD.\n");
589 state->new_deq_seg = find_trb_seg(state->new_deq_seg,
591 &state->new_cycle_state);
592 if (!state->new_deq_seg) {
597 trb = &state->new_deq_ptr->generic;
598 if (TRB_TYPE_LINK_LE32(trb->field[3]) &&
599 (trb->field[3] & cpu_to_le32(LINK_TOGGLE)))
600 state->new_cycle_state ^= 0x1;
601 next_trb(xhci, ep_ring, &state->new_deq_seg, &state->new_deq_ptr);
604 * If there is only one segment in a ring, find_trb_seg()'s while loop
605 * will not run, and it will return before it has a chance to see if it
606 * needs to toggle the cycle bit. It can't tell if the stalled transfer
607 * ended just before the link TRB on a one-segment ring, or if the TD
608 * wrapped around the top of the ring, because it doesn't have the TD in
609 * question. Look for the one-segment case where stalled TRB's address
610 * is greater than the new dequeue pointer address.
612 if (ep_ring->first_seg == ep_ring->first_seg->next &&
613 state->new_deq_ptr < dev->eps[ep_index].stopped_trb)
614 state->new_cycle_state ^= 0x1;
615 xhci_dbg(xhci, "Cycle state = 0x%x\n", state->new_cycle_state);
617 /* Don't update the ring cycle state for the producer (us). */
618 xhci_dbg(xhci, "New dequeue segment = %p (virtual)\n",
620 addr = xhci_trb_virt_to_dma(state->new_deq_seg, state->new_deq_ptr);
621 xhci_dbg(xhci, "New dequeue pointer = 0x%llx (DMA)\n",
622 (unsigned long long) addr);
625 /* flip_cycle means flip the cycle bit of all but the first and last TRB.
626 * (The last TRB actually points to the ring enqueue pointer, which is not part
627 * of this TD.) This is used to remove partially enqueued isoc TDs from a ring.
629 static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
630 struct xhci_td *cur_td, bool flip_cycle)
632 struct xhci_segment *cur_seg;
633 union xhci_trb *cur_trb;
635 for (cur_seg = cur_td->start_seg, cur_trb = cur_td->first_trb;
637 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
638 if (TRB_TYPE_LINK_LE32(cur_trb->generic.field[3])) {
639 /* Unchain any chained Link TRBs, but
640 * leave the pointers intact.
642 cur_trb->generic.field[3] &= cpu_to_le32(~TRB_CHAIN);
643 /* Flip the cycle bit (link TRBs can't be the first
647 cur_trb->generic.field[3] ^=
648 cpu_to_le32(TRB_CYCLE);
649 xhci_dbg(xhci, "Cancel (unchain) link TRB\n");
650 xhci_dbg(xhci, "Address = %p (0x%llx dma); "
651 "in seg %p (0x%llx dma)\n",
653 (unsigned long long)xhci_trb_virt_to_dma(cur_seg, cur_trb),
655 (unsigned long long)cur_seg->dma);
657 cur_trb->generic.field[0] = 0;
658 cur_trb->generic.field[1] = 0;
659 cur_trb->generic.field[2] = 0;
660 /* Preserve only the cycle bit of this TRB */
661 cur_trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
662 /* Flip the cycle bit except on the first or last TRB */
663 if (flip_cycle && cur_trb != cur_td->first_trb &&
664 cur_trb != cur_td->last_trb)
665 cur_trb->generic.field[3] ^=
666 cpu_to_le32(TRB_CYCLE);
667 cur_trb->generic.field[3] |= cpu_to_le32(
668 TRB_TYPE(TRB_TR_NOOP));
669 xhci_dbg(xhci, "TRB to noop at offset 0x%llx\n",
671 xhci_trb_virt_to_dma(cur_seg, cur_trb));
673 if (cur_trb == cur_td->last_trb)
678 static int queue_set_tr_deq(struct xhci_hcd *xhci, int slot_id,
679 unsigned int ep_index, unsigned int stream_id,
680 struct xhci_segment *deq_seg,
681 union xhci_trb *deq_ptr, u32 cycle_state);
683 void xhci_queue_new_dequeue_state(struct xhci_hcd *xhci,
684 unsigned int slot_id, unsigned int ep_index,
685 unsigned int stream_id,
686 struct xhci_dequeue_state *deq_state)
688 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
690 xhci_dbg(xhci, "Set TR Deq Ptr cmd, new deq seg = %p (0x%llx dma), "
691 "new deq ptr = %p (0x%llx dma), new cycle = %u\n",
692 deq_state->new_deq_seg,
693 (unsigned long long)deq_state->new_deq_seg->dma,
694 deq_state->new_deq_ptr,
695 (unsigned long long)xhci_trb_virt_to_dma(deq_state->new_deq_seg, deq_state->new_deq_ptr),
696 deq_state->new_cycle_state);
697 queue_set_tr_deq(xhci, slot_id, ep_index, stream_id,
698 deq_state->new_deq_seg,
699 deq_state->new_deq_ptr,
700 (u32) deq_state->new_cycle_state);
701 /* Stop the TD queueing code from ringing the doorbell until
702 * this command completes. The HC won't set the dequeue pointer
703 * if the ring is running, and ringing the doorbell starts the
706 ep->ep_state |= SET_DEQ_PENDING;
709 static void xhci_stop_watchdog_timer_in_irq(struct xhci_hcd *xhci,
710 struct xhci_virt_ep *ep)
712 ep->ep_state &= ~EP_HALT_PENDING;
713 /* Can't del_timer_sync in interrupt, so we attempt to cancel. If the
714 * timer is running on another CPU, we don't decrement stop_cmds_pending
715 * (since we didn't successfully stop the watchdog timer).
717 if (del_timer(&ep->stop_cmd_timer))
718 ep->stop_cmds_pending--;
721 /* Must be called with xhci->lock held in interrupt context */
722 static void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci,
723 struct xhci_td *cur_td, int status, char *adjective)
727 struct urb_priv *urb_priv;
730 urb_priv = urb->hcpriv;
732 hcd = bus_to_hcd(urb->dev->bus);
734 /* Only giveback urb when this is the last td in urb */
735 if (urb_priv->td_cnt == urb_priv->length) {
736 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
737 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
738 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
739 if (xhci->quirks & XHCI_AMD_PLL_FIX)
740 usb_amd_quirk_pll_enable();
743 usb_hcd_unlink_urb_from_ep(hcd, urb);
745 spin_unlock(&xhci->lock);
746 usb_hcd_giveback_urb(hcd, urb, status);
747 xhci_urb_free_priv(xhci, urb_priv);
748 spin_lock(&xhci->lock);
753 * When we get a command completion for a Stop Endpoint Command, we need to
754 * unlink any cancelled TDs from the ring. There are two ways to do that:
756 * 1. If the HW was in the middle of processing the TD that needs to be
757 * cancelled, then we must move the ring's dequeue pointer past the last TRB
758 * in the TD with a Set Dequeue Pointer Command.
759 * 2. Otherwise, we turn all the TRBs in the TD into No-op TRBs (with the chain
760 * bit cleared) so that the HW will skip over them.
762 static void handle_stopped_endpoint(struct xhci_hcd *xhci,
763 union xhci_trb *trb, struct xhci_event_cmd *event)
765 unsigned int slot_id;
766 unsigned int ep_index;
767 struct xhci_virt_device *virt_dev;
768 struct xhci_ring *ep_ring;
769 struct xhci_virt_ep *ep;
770 struct list_head *entry;
771 struct xhci_td *cur_td = NULL;
772 struct xhci_td *last_unlinked_td;
774 struct xhci_dequeue_state deq_state;
776 if (unlikely(TRB_TO_SUSPEND_PORT(
777 le32_to_cpu(xhci->cmd_ring->dequeue->generic.field[3])))) {
778 slot_id = TRB_TO_SLOT_ID(
779 le32_to_cpu(xhci->cmd_ring->dequeue->generic.field[3]));
780 virt_dev = xhci->devs[slot_id];
782 handle_cmd_in_cmd_wait_list(xhci, virt_dev,
785 xhci_warn(xhci, "Stop endpoint command "
786 "completion for disabled slot %u\n",
791 memset(&deq_state, 0, sizeof(deq_state));
792 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(trb->generic.field[3]));
793 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
794 ep = &xhci->devs[slot_id]->eps[ep_index];
796 if (list_empty(&ep->cancelled_td_list)) {
797 xhci_stop_watchdog_timer_in_irq(xhci, ep);
798 ep->stopped_td = NULL;
799 ep->stopped_trb = NULL;
800 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
804 /* Fix up the ep ring first, so HW stops executing cancelled TDs.
805 * We have the xHCI lock, so nothing can modify this list until we drop
806 * it. We're also in the event handler, so we can't get re-interrupted
807 * if another Stop Endpoint command completes
809 list_for_each(entry, &ep->cancelled_td_list) {
810 cur_td = list_entry(entry, struct xhci_td, cancelled_td_list);
811 xhci_dbg(xhci, "Removing canceled TD starting at 0x%llx (dma).\n",
812 (unsigned long long)xhci_trb_virt_to_dma(
813 cur_td->start_seg, cur_td->first_trb));
814 ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb);
816 /* This shouldn't happen unless a driver is mucking
817 * with the stream ID after submission. This will
818 * leave the TD on the hardware ring, and the hardware
819 * will try to execute it, and may access a buffer
820 * that has already been freed. In the best case, the
821 * hardware will execute it, and the event handler will
822 * ignore the completion event for that TD, since it was
823 * removed from the td_list for that endpoint. In
824 * short, don't muck with the stream ID after
827 xhci_warn(xhci, "WARN Cancelled URB %p "
828 "has invalid stream ID %u.\n",
830 cur_td->urb->stream_id);
831 goto remove_finished_td;
834 * If we stopped on the TD we need to cancel, then we have to
835 * move the xHC endpoint ring dequeue pointer past this TD.
837 if (cur_td == ep->stopped_td)
838 xhci_find_new_dequeue_state(xhci, slot_id, ep_index,
839 cur_td->urb->stream_id,
842 td_to_noop(xhci, ep_ring, cur_td, false);
845 * The event handler won't see a completion for this TD anymore,
846 * so remove it from the endpoint ring's TD list. Keep it in
847 * the cancelled TD list for URB completion later.
849 list_del_init(&cur_td->td_list);
851 last_unlinked_td = cur_td;
852 xhci_stop_watchdog_timer_in_irq(xhci, ep);
854 /* If necessary, queue a Set Transfer Ring Dequeue Pointer command */
855 if (deq_state.new_deq_ptr && deq_state.new_deq_seg) {
856 xhci_queue_new_dequeue_state(xhci,
858 ep->stopped_td->urb->stream_id,
860 xhci_ring_cmd_db(xhci);
862 /* Otherwise ring the doorbell(s) to restart queued transfers */
863 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
866 /* Clear stopped_td and stopped_trb if endpoint is not halted */
867 if (!(ep->ep_state & EP_HALTED)) {
868 ep->stopped_td = NULL;
869 ep->stopped_trb = NULL;
873 * Drop the lock and complete the URBs in the cancelled TD list.
874 * New TDs to be cancelled might be added to the end of the list before
875 * we can complete all the URBs for the TDs we already unlinked.
876 * So stop when we've completed the URB for the last TD we unlinked.
879 cur_td = list_entry(ep->cancelled_td_list.next,
880 struct xhci_td, cancelled_td_list);
881 list_del_init(&cur_td->cancelled_td_list);
883 /* Clean up the cancelled URB */
884 /* Doesn't matter what we pass for status, since the core will
885 * just overwrite it (because the URB has been unlinked).
887 xhci_giveback_urb_in_irq(xhci, cur_td, 0, "cancelled");
889 /* Stop processing the cancelled list if the watchdog timer is
892 if (xhci->xhc_state & XHCI_STATE_DYING)
894 } while (cur_td != last_unlinked_td);
896 /* Return to the event handler with xhci->lock re-acquired */
899 /* Watchdog timer function for when a stop endpoint command fails to complete.
900 * In this case, we assume the host controller is broken or dying or dead. The
901 * host may still be completing some other events, so we have to be careful to
902 * let the event ring handler and the URB dequeueing/enqueueing functions know
903 * through xhci->state.
905 * The timer may also fire if the host takes a very long time to respond to the
906 * command, and the stop endpoint command completion handler cannot delete the
907 * timer before the timer function is called. Another endpoint cancellation may
908 * sneak in before the timer function can grab the lock, and that may queue
909 * another stop endpoint command and add the timer back. So we cannot use a
910 * simple flag to say whether there is a pending stop endpoint command for a
911 * particular endpoint.
913 * Instead we use a combination of that flag and a counter for the number of
914 * pending stop endpoint commands. If the timer is the tail end of the last
915 * stop endpoint command, and the endpoint's command is still pending, we assume
918 void xhci_stop_endpoint_command_watchdog(unsigned long arg)
920 struct xhci_hcd *xhci;
921 struct xhci_virt_ep *ep;
922 struct xhci_virt_ep *temp_ep;
923 struct xhci_ring *ring;
924 struct xhci_td *cur_td;
928 ep = (struct xhci_virt_ep *) arg;
931 spin_lock_irqsave(&xhci->lock, flags);
933 ep->stop_cmds_pending--;
934 if (xhci->xhc_state & XHCI_STATE_DYING) {
935 xhci_dbg(xhci, "Stop EP timer ran, but another timer marked "
936 "xHCI as DYING, exiting.\n");
937 spin_unlock_irqrestore(&xhci->lock, flags);
940 if (!(ep->stop_cmds_pending == 0 && (ep->ep_state & EP_HALT_PENDING))) {
941 xhci_dbg(xhci, "Stop EP timer ran, but no command pending, "
943 spin_unlock_irqrestore(&xhci->lock, flags);
947 xhci_warn(xhci, "xHCI host not responding to stop endpoint command.\n");
948 xhci_warn(xhci, "Assuming host is dying, halting host.\n");
949 /* Oops, HC is dead or dying or at least not responding to the stop
952 xhci->xhc_state |= XHCI_STATE_DYING;
953 /* Disable interrupts from the host controller and start halting it */
955 spin_unlock_irqrestore(&xhci->lock, flags);
957 ret = xhci_halt(xhci);
959 spin_lock_irqsave(&xhci->lock, flags);
961 /* This is bad; the host is not responding to commands and it's
962 * not allowing itself to be halted. At least interrupts are
963 * disabled. If we call usb_hc_died(), it will attempt to
964 * disconnect all device drivers under this host. Those
965 * disconnect() methods will wait for all URBs to be unlinked,
966 * so we must complete them.
968 xhci_warn(xhci, "Non-responsive xHCI host is not halting.\n");
969 xhci_warn(xhci, "Completing active URBs anyway.\n");
970 /* We could turn all TDs on the rings to no-ops. This won't
971 * help if the host has cached part of the ring, and is slow if
972 * we want to preserve the cycle bit. Skip it and hope the host
973 * doesn't touch the memory.
976 for (i = 0; i < MAX_HC_SLOTS; i++) {
979 for (j = 0; j < 31; j++) {
980 temp_ep = &xhci->devs[i]->eps[j];
981 ring = temp_ep->ring;
984 xhci_dbg(xhci, "Killing URBs for slot ID %u, "
985 "ep index %u\n", i, j);
986 while (!list_empty(&ring->td_list)) {
987 cur_td = list_first_entry(&ring->td_list,
990 list_del_init(&cur_td->td_list);
991 if (!list_empty(&cur_td->cancelled_td_list))
992 list_del_init(&cur_td->cancelled_td_list);
993 xhci_giveback_urb_in_irq(xhci, cur_td,
994 -ESHUTDOWN, "killed");
996 while (!list_empty(&temp_ep->cancelled_td_list)) {
997 cur_td = list_first_entry(
998 &temp_ep->cancelled_td_list,
1001 list_del_init(&cur_td->cancelled_td_list);
1002 xhci_giveback_urb_in_irq(xhci, cur_td,
1003 -ESHUTDOWN, "killed");
1007 spin_unlock_irqrestore(&xhci->lock, flags);
1008 xhci_dbg(xhci, "Calling usb_hc_died()\n");
1009 usb_hc_died(xhci_to_hcd(xhci)->primary_hcd);
1010 xhci_dbg(xhci, "xHCI host controller is dead.\n");
1011 if (xhci_to_hcd(xhci)->driver && xhci_to_hcd(xhci)->driver->hcd_reinit)
1012 xhci_to_hcd(xhci)->driver->hcd_reinit(xhci_to_hcd(xhci));
1016 static void update_ring_for_set_deq_completion(struct xhci_hcd *xhci,
1017 struct xhci_virt_device *dev,
1018 struct xhci_ring *ep_ring,
1019 unsigned int ep_index)
1021 union xhci_trb *dequeue_temp;
1022 int num_trbs_free_temp;
1023 bool revert = false;
1025 num_trbs_free_temp = ep_ring->num_trbs_free;
1026 dequeue_temp = ep_ring->dequeue;
1028 /* If we get two back-to-back stalls, and the first stalled transfer
1029 * ends just before a link TRB, the dequeue pointer will be left on
1030 * the link TRB by the code in the while loop. So we have to update
1031 * the dequeue pointer one segment further, or we'll jump off
1032 * the segment into la-la-land.
1034 if (last_trb(xhci, ep_ring, ep_ring->deq_seg, ep_ring->dequeue)) {
1035 ep_ring->deq_seg = ep_ring->deq_seg->next;
1036 ep_ring->dequeue = ep_ring->deq_seg->trbs;
1039 while (ep_ring->dequeue != dev->eps[ep_index].queued_deq_ptr) {
1040 /* We have more usable TRBs */
1041 ep_ring->num_trbs_free++;
1043 if (last_trb(xhci, ep_ring, ep_ring->deq_seg,
1044 ep_ring->dequeue)) {
1045 if (ep_ring->dequeue ==
1046 dev->eps[ep_index].queued_deq_ptr)
1048 ep_ring->deq_seg = ep_ring->deq_seg->next;
1049 ep_ring->dequeue = ep_ring->deq_seg->trbs;
1051 if (ep_ring->dequeue == dequeue_temp) {
1058 xhci_dbg(xhci, "Unable to find new dequeue pointer\n");
1059 ep_ring->num_trbs_free = num_trbs_free_temp;
1064 * When we get a completion for a Set Transfer Ring Dequeue Pointer command,
1065 * we need to clear the set deq pending flag in the endpoint ring state, so that
1066 * the TD queueing code can ring the doorbell again. We also need to ring the
1067 * endpoint doorbell to restart the ring, but only if there aren't more
1068 * cancellations pending.
1070 static void handle_set_deq_completion(struct xhci_hcd *xhci,
1071 struct xhci_event_cmd *event,
1072 union xhci_trb *trb)
1074 unsigned int slot_id;
1075 unsigned int ep_index;
1076 unsigned int stream_id;
1077 struct xhci_ring *ep_ring;
1078 struct xhci_virt_device *dev;
1079 struct xhci_ep_ctx *ep_ctx;
1080 struct xhci_slot_ctx *slot_ctx;
1082 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(trb->generic.field[3]));
1083 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
1084 stream_id = TRB_TO_STREAM_ID(le32_to_cpu(trb->generic.field[2]));
1085 dev = xhci->devs[slot_id];
1087 ep_ring = xhci_stream_id_to_ring(dev, ep_index, stream_id);
1089 xhci_warn(xhci, "WARN Set TR deq ptr command for "
1090 "freed stream ID %u\n",
1092 /* XXX: Harmless??? */
1093 dev->eps[ep_index].ep_state &= ~SET_DEQ_PENDING;
1097 ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
1098 slot_ctx = xhci_get_slot_ctx(xhci, dev->out_ctx);
1100 if (GET_COMP_CODE(le32_to_cpu(event->status)) != COMP_SUCCESS) {
1101 unsigned int ep_state;
1102 unsigned int slot_state;
1104 switch (GET_COMP_CODE(le32_to_cpu(event->status))) {
1106 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd invalid because "
1107 "of stream ID configuration\n");
1109 case COMP_CTX_STATE:
1110 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due "
1111 "to incorrect slot or ep state.\n");
1112 ep_state = le32_to_cpu(ep_ctx->ep_info);
1113 ep_state &= EP_STATE_MASK;
1114 slot_state = le32_to_cpu(slot_ctx->dev_state);
1115 slot_state = GET_SLOT_STATE(slot_state);
1116 xhci_dbg(xhci, "Slot state = %u, EP state = %u\n",
1117 slot_state, ep_state);
1120 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed because "
1121 "slot %u was not enabled.\n", slot_id);
1124 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd with unknown "
1125 "completion code of %u.\n",
1126 GET_COMP_CODE(le32_to_cpu(event->status)));
1129 /* OK what do we do now? The endpoint state is hosed, and we
1130 * should never get to this point if the synchronization between
1131 * queueing, and endpoint state are correct. This might happen
1132 * if the device gets disconnected after we've finished
1133 * cancelling URBs, which might not be an error...
1136 xhci_dbg(xhci, "Successful Set TR Deq Ptr cmd, deq = @%08llx\n",
1137 le64_to_cpu(ep_ctx->deq));
1138 if (xhci_trb_virt_to_dma(dev->eps[ep_index].queued_deq_seg,
1139 dev->eps[ep_index].queued_deq_ptr) ==
1140 (le64_to_cpu(ep_ctx->deq) & ~(EP_CTX_CYCLE_MASK))) {
1141 /* Update the ring's dequeue segment and dequeue pointer
1142 * to reflect the new position.
1144 update_ring_for_set_deq_completion(xhci, dev,
1147 xhci_warn(xhci, "Mismatch between completed Set TR Deq "
1148 "Ptr command & xHCI internal state.\n");
1149 xhci_warn(xhci, "ep deq seg = %p, deq ptr = %p\n",
1150 dev->eps[ep_index].queued_deq_seg,
1151 dev->eps[ep_index].queued_deq_ptr);
1155 dev->eps[ep_index].ep_state &= ~SET_DEQ_PENDING;
1156 dev->eps[ep_index].queued_deq_seg = NULL;
1157 dev->eps[ep_index].queued_deq_ptr = NULL;
1158 /* Restart any rings with pending URBs */
1159 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1162 static void handle_reset_ep_completion(struct xhci_hcd *xhci,
1163 struct xhci_event_cmd *event,
1164 union xhci_trb *trb)
1167 unsigned int ep_index;
1169 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(trb->generic.field[3]));
1170 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
1171 /* This command will only fail if the endpoint wasn't halted,
1172 * but we don't care.
1174 xhci_dbg(xhci, "Ignoring reset ep completion code of %u\n",
1175 GET_COMP_CODE(le32_to_cpu(event->status)));
1177 /* HW with the reset endpoint quirk needs to have a configure endpoint
1178 * command complete before the endpoint can be used. Queue that here
1179 * because the HW can't handle two commands being queued in a row.
1181 if (xhci->quirks & XHCI_RESET_EP_QUIRK) {
1182 xhci_dbg(xhci, "Queueing configure endpoint command\n");
1183 xhci_queue_configure_endpoint(xhci,
1184 xhci->devs[slot_id]->in_ctx->dma, slot_id,
1186 xhci_ring_cmd_db(xhci);
1188 /* Clear our internal halted state */
1189 xhci->devs[slot_id]->eps[ep_index].ep_state &= ~EP_HALTED;
1191 /* ring doorbell for the endpoint under soft-retry */
1192 if (TRB_TSP | le32_to_cpu(trb->generic.field[3])) {
1193 xhci_dbg(xhci, "Ring doorbell for slot_id %d ep_index 0x%x\n",
1195 xhci_ring_ep_doorbell(xhci, slot_id, ep_index, 0);
1200 /* Complete the command and detele it from the devcie's command queue.
1202 static void xhci_complete_cmd_in_cmd_wait_list(struct xhci_hcd *xhci,
1203 struct xhci_command *command, u32 status)
1205 command->status = status;
1206 list_del(&command->cmd_list);
1207 if (command->completion)
1208 complete(command->completion);
1210 xhci_free_command(xhci, command);
1214 /* Check to see if a command in the device's command queue matches this one.
1215 * Signal the completion or free the command, and return 1. Return 0 if the
1216 * completed command isn't at the head of the command list.
1218 static int handle_cmd_in_cmd_wait_list(struct xhci_hcd *xhci,
1219 struct xhci_virt_device *virt_dev,
1220 struct xhci_event_cmd *event)
1222 struct xhci_command *command;
1224 if (list_empty(&virt_dev->cmd_list))
1227 command = list_entry(virt_dev->cmd_list.next,
1228 struct xhci_command, cmd_list);
1229 if (xhci->cmd_ring->dequeue != command->command_trb)
1232 xhci_complete_cmd_in_cmd_wait_list(xhci, command,
1233 GET_COMP_CODE(le32_to_cpu(event->status)));
1238 * Finding the command trb need to be cancelled and modifying it to
1239 * NO OP command. And if the command is in device's command wait
1240 * list, finishing and freeing it.
1242 * If we can't find the command trb, we think it had already been
1245 static void xhci_cmd_to_noop(struct xhci_hcd *xhci, struct xhci_cd *cur_cd)
1247 struct xhci_segment *cur_seg;
1248 union xhci_trb *cmd_trb;
1249 u32 cycle_state = 0;
1251 if (xhci->cmd_ring->dequeue == xhci->cmd_ring->enqueue)
1254 /* find the current segment of command ring */
1255 cur_seg = find_trb_seg(xhci->cmd_ring->first_seg,
1256 xhci->cmd_ring->dequeue, &cycle_state);
1259 xhci_warn(xhci, "Command ring mismatch, dequeue = %p %llx (dma)\n",
1260 xhci->cmd_ring->dequeue,
1261 (unsigned long long)
1262 xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
1263 xhci->cmd_ring->dequeue));
1264 xhci_debug_ring(xhci, xhci->cmd_ring);
1265 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
1269 /* find the command trb matched by cd from command ring */
1270 for (cmd_trb = xhci->cmd_ring->dequeue;
1271 cmd_trb != xhci->cmd_ring->enqueue;
1272 next_trb(xhci, xhci->cmd_ring, &cur_seg, &cmd_trb)) {
1273 /* If the trb is link trb, continue */
1274 if (TRB_TYPE_LINK_LE32(cmd_trb->generic.field[3]))
1277 if (cur_cd->cmd_trb == cmd_trb) {
1279 /* If the command in device's command list, we should
1280 * finish it and free the command structure.
1282 if (cur_cd->command)
1283 xhci_complete_cmd_in_cmd_wait_list(xhci,
1284 cur_cd->command, COMP_CMD_STOP);
1286 /* get cycle state from the origin command trb */
1287 cycle_state = le32_to_cpu(cmd_trb->generic.field[3])
1290 /* modify the command trb to NO OP command */
1291 cmd_trb->generic.field[0] = 0;
1292 cmd_trb->generic.field[1] = 0;
1293 cmd_trb->generic.field[2] = 0;
1294 cmd_trb->generic.field[3] = cpu_to_le32(
1295 TRB_TYPE(TRB_CMD_NOOP) | cycle_state);
1301 static void xhci_cancel_cmd_in_cd_list(struct xhci_hcd *xhci)
1303 struct xhci_cd *cur_cd, *next_cd;
1305 if (list_empty(&xhci->cancel_cmd_list))
1308 list_for_each_entry_safe(cur_cd, next_cd,
1309 &xhci->cancel_cmd_list, cancel_cmd_list) {
1310 xhci_cmd_to_noop(xhci, cur_cd);
1311 list_del(&cur_cd->cancel_cmd_list);
1317 * traversing the cancel_cmd_list. If the command descriptor according
1318 * to cmd_trb is found, the function free it and return 1, otherwise
1321 static int xhci_search_cmd_trb_in_cd_list(struct xhci_hcd *xhci,
1322 union xhci_trb *cmd_trb)
1324 struct xhci_cd *cur_cd, *next_cd;
1326 if (list_empty(&xhci->cancel_cmd_list))
1329 list_for_each_entry_safe(cur_cd, next_cd,
1330 &xhci->cancel_cmd_list, cancel_cmd_list) {
1331 if (cur_cd->cmd_trb == cmd_trb) {
1332 if (cur_cd->command)
1333 xhci_complete_cmd_in_cmd_wait_list(xhci,
1334 cur_cd->command, COMP_CMD_STOP);
1335 list_del(&cur_cd->cancel_cmd_list);
1345 * If the cmd_trb_comp_code is COMP_CMD_ABORT, we just check whether the
1346 * trb pointed by the command ring dequeue pointer is the trb we want to
1347 * cancel or not. And if the cmd_trb_comp_code is COMP_CMD_STOP, we will
1348 * traverse the cancel_cmd_list to trun the all of the commands according
1349 * to command descriptor to NO-OP trb.
1351 static int handle_stopped_cmd_ring(struct xhci_hcd *xhci,
1352 int cmd_trb_comp_code)
1354 int cur_trb_is_good = 0;
1356 /* Searching the cmd trb pointed by the command ring dequeue
1357 * pointer in command descriptor list. If it is found, free it.
1359 cur_trb_is_good = xhci_search_cmd_trb_in_cd_list(xhci,
1360 xhci->cmd_ring->dequeue);
1362 if (cmd_trb_comp_code == COMP_CMD_ABORT)
1363 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
1364 else if (cmd_trb_comp_code == COMP_CMD_STOP) {
1365 /* traversing the cancel_cmd_list and canceling
1366 * the command according to command descriptor
1368 xhci_cancel_cmd_in_cd_list(xhci);
1370 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
1372 * ring command ring doorbell again to restart the
1375 if (xhci->cmd_ring->dequeue != xhci->cmd_ring->enqueue)
1376 xhci_ring_cmd_db(xhci);
1378 return cur_trb_is_good;
1381 static void handle_cmd_completion(struct xhci_hcd *xhci,
1382 struct xhci_event_cmd *event)
1384 int slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1386 dma_addr_t cmd_dequeue_dma;
1387 struct xhci_input_control_ctx *ctrl_ctx;
1388 struct xhci_virt_device *virt_dev;
1389 unsigned int ep_index;
1390 struct xhci_ring *ep_ring;
1391 unsigned int ep_state;
1393 cmd_dma = le64_to_cpu(event->cmd_trb);
1394 cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
1395 xhci->cmd_ring->dequeue);
1396 /* Is the command ring deq ptr out of sync with the deq seg ptr? */
1397 if (cmd_dequeue_dma == 0) {
1398 xhci->error_bitmask |= 1 << 4;
1401 /* Does the DMA address match our internal dequeue pointer address? */
1402 if (cmd_dma != (u64) cmd_dequeue_dma) {
1403 xhci->error_bitmask |= 1 << 5;
1407 if ((GET_COMP_CODE(le32_to_cpu(event->status)) == COMP_CMD_ABORT) ||
1408 (GET_COMP_CODE(le32_to_cpu(event->status)) == COMP_CMD_STOP)) {
1409 /* If the return value is 0, we think the trb pointed by
1410 * command ring dequeue pointer is a good trb. The good
1411 * trb means we don't want to cancel the trb, but it have
1412 * been stopped by host. So we should handle it normally.
1413 * Otherwise, driver should invoke inc_deq() and return.
1415 if (handle_stopped_cmd_ring(xhci,
1416 GET_COMP_CODE(le32_to_cpu(event->status)))) {
1417 inc_deq(xhci, xhci->cmd_ring);
1420 /* There is no command to handle if we get a stop event when the
1421 * command ring is empty, event->cmd_trb points to the next
1424 if (xhci->cmd_ring->dequeue == xhci->cmd_ring->enqueue)
1428 /* return if command ring is empty */
1429 if (xhci->cmd_ring->dequeue == xhci->cmd_ring->enqueue)
1432 switch (le32_to_cpu(xhci->cmd_ring->dequeue->generic.field[3])
1433 & TRB_TYPE_BITMASK) {
1434 case TRB_TYPE(TRB_ENABLE_SLOT):
1435 if (GET_COMP_CODE(le32_to_cpu(event->status)) == COMP_SUCCESS)
1436 xhci->slot_id = slot_id;
1439 complete(&xhci->addr_dev);
1441 case TRB_TYPE(TRB_DISABLE_SLOT):
1442 if (xhci->devs[slot_id]) {
1443 if (xhci->quirks & XHCI_EP_LIMIT_QUIRK)
1444 /* Delete default control endpoint resources */
1445 xhci_free_device_endpoint_resources(xhci,
1446 xhci->devs[slot_id], true);
1447 xhci_free_virt_device(xhci, slot_id);
1450 case TRB_TYPE(TRB_CONFIG_EP):
1451 virt_dev = xhci->devs[slot_id];
1452 if (handle_cmd_in_cmd_wait_list(xhci, virt_dev, event))
1455 * Configure endpoint commands can come from the USB core
1456 * configuration or alt setting changes, or because the HW
1457 * needed an extra configure endpoint command after a reset
1458 * endpoint command or streams were being configured.
1459 * If the command was for a halted endpoint, the xHCI driver
1460 * is not waiting on the configure endpoint command.
1462 ctrl_ctx = xhci_get_input_control_ctx(xhci,
1464 /* Input ctx add_flags are the endpoint index plus one */
1465 ep_index = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags)) - 1;
1466 /* A usb_set_interface() call directly after clearing a halted
1467 * condition may race on this quirky hardware. Not worth
1468 * worrying about, since this is prototype hardware. Not sure
1469 * if this will work for streams, but streams support was
1470 * untested on this prototype.
1472 if (xhci->quirks & XHCI_RESET_EP_QUIRK &&
1473 ep_index != (unsigned int) -1 &&
1474 le32_to_cpu(ctrl_ctx->add_flags) - SLOT_FLAG ==
1475 le32_to_cpu(ctrl_ctx->drop_flags)) {
1476 ep_ring = xhci->devs[slot_id]->eps[ep_index].ring;
1477 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1478 if (!(ep_state & EP_HALTED))
1479 goto bandwidth_change;
1480 xhci_dbg(xhci, "Completed config ep cmd - "
1481 "last ep index = %d, state = %d\n",
1482 ep_index, ep_state);
1483 /* Clear internal halted state and restart ring(s) */
1484 xhci->devs[slot_id]->eps[ep_index].ep_state &=
1486 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1490 xhci_dbg(xhci, "Completed config ep cmd\n");
1491 xhci->devs[slot_id]->cmd_status =
1492 GET_COMP_CODE(le32_to_cpu(event->status));
1493 complete(&xhci->devs[slot_id]->cmd_completion);
1495 case TRB_TYPE(TRB_EVAL_CONTEXT):
1496 virt_dev = xhci->devs[slot_id];
1497 if (handle_cmd_in_cmd_wait_list(xhci, virt_dev, event))
1499 xhci->devs[slot_id]->cmd_status = GET_COMP_CODE(le32_to_cpu(event->status));
1500 complete(&xhci->devs[slot_id]->cmd_completion);
1502 case TRB_TYPE(TRB_ADDR_DEV):
1503 xhci->devs[slot_id]->cmd_status = GET_COMP_CODE(le32_to_cpu(event->status));
1504 complete(&xhci->addr_dev);
1506 case TRB_TYPE(TRB_STOP_RING):
1507 handle_stopped_endpoint(xhci, xhci->cmd_ring->dequeue, event);
1509 case TRB_TYPE(TRB_SET_DEQ):
1510 handle_set_deq_completion(xhci, event, xhci->cmd_ring->dequeue);
1512 case TRB_TYPE(TRB_CMD_NOOP):
1514 case TRB_TYPE(TRB_RESET_EP):
1515 handle_reset_ep_completion(xhci, event, xhci->cmd_ring->dequeue);
1517 case TRB_TYPE(TRB_RESET_DEV):
1518 xhci_dbg(xhci, "Completed reset device command.\n");
1519 slot_id = TRB_TO_SLOT_ID(
1520 le32_to_cpu(xhci->cmd_ring->dequeue->generic.field[3]));
1521 virt_dev = xhci->devs[slot_id];
1523 handle_cmd_in_cmd_wait_list(xhci, virt_dev, event);
1525 xhci_warn(xhci, "Reset device command completion "
1526 "for disabled slot %u\n", slot_id);
1528 case TRB_TYPE(TRB_NEC_GET_FW):
1529 if (!(xhci->quirks & XHCI_NEC_HOST)) {
1530 xhci->error_bitmask |= 1 << 6;
1533 xhci_dbg(xhci, "NEC firmware version %2x.%02x\n",
1534 NEC_FW_MAJOR(le32_to_cpu(event->status)),
1535 NEC_FW_MINOR(le32_to_cpu(event->status)));
1538 /* Skip over unknown commands on the event ring */
1539 xhci->error_bitmask |= 1 << 6;
1542 inc_deq(xhci, xhci->cmd_ring);
1545 static void handle_vendor_event(struct xhci_hcd *xhci,
1546 union xhci_trb *event)
1550 trb_type = TRB_FIELD_TO_TYPE(le32_to_cpu(event->generic.field[3]));
1551 xhci_dbg(xhci, "Vendor specific event TRB type = %u\n", trb_type);
1552 if (trb_type == TRB_NEC_CMD_COMP && (xhci->quirks & XHCI_NEC_HOST))
1553 handle_cmd_completion(xhci, &event->event_cmd);
1556 /* @port_id: the one-based port ID from the hardware (indexed from array of all
1557 * port registers -- USB 3.0 and USB 2.0).
1559 * Returns a zero-based port number, which is suitable for indexing into each of
1560 * the split roothubs' port arrays and bus state arrays.
1561 * Add one to it in order to call xhci_find_slot_id_by_port.
1563 static unsigned int find_faked_portnum_from_hw_portnum(struct usb_hcd *hcd,
1564 struct xhci_hcd *xhci, u32 port_id)
1567 unsigned int num_similar_speed_ports = 0;
1569 /* port_id from the hardware is 1-based, but port_array[], usb3_ports[],
1570 * and usb2_ports are 0-based indexes. Count the number of similar
1571 * speed ports, up to 1 port before this port.
1573 for (i = 0; i < (port_id - 1); i++) {
1574 u8 port_speed = xhci->port_array[i];
1577 * Skip ports that don't have known speeds, or have duplicate
1578 * Extended Capabilities port speed entries.
1580 if (port_speed == 0 || port_speed == DUPLICATE_ENTRY)
1584 * USB 3.0 ports are always under a USB 3.0 hub. USB 2.0 and
1585 * 1.1 ports are under the USB 2.0 hub. If the port speed
1586 * matches the device speed, it's a similar speed port.
1588 if ((port_speed == 0x03) == (hcd->speed == HCD_USB3))
1589 num_similar_speed_ports++;
1591 return num_similar_speed_ports;
1594 static void handle_device_notification(struct xhci_hcd *xhci,
1595 union xhci_trb *event)
1598 struct usb_device *udev;
1600 slot_id = TRB_TO_SLOT_ID(event->generic.field[3]);
1601 if (!xhci->devs[slot_id]) {
1602 xhci_warn(xhci, "Device Notification event for "
1603 "unused slot %u\n", slot_id);
1607 xhci_dbg(xhci, "Device Wake Notification event for slot ID %u\n",
1609 udev = xhci->devs[slot_id]->udev;
1610 if (udev && udev->parent)
1611 usb_wakeup_notification(udev->parent, udev->portnum);
1614 static void handle_port_status(struct xhci_hcd *xhci,
1615 union xhci_trb *event)
1617 struct usb_hcd *hcd;
1622 unsigned int faked_port_index;
1624 struct xhci_bus_state *bus_state;
1625 __le32 __iomem **port_array;
1626 bool bogus_port_status = false;
1627 struct usb_device *udev;
1629 /* Port status change events always have a successful completion code */
1630 if (GET_COMP_CODE(le32_to_cpu(event->generic.field[2])) != COMP_SUCCESS) {
1631 xhci_warn(xhci, "WARN: xHC returned failed port status event\n");
1632 xhci->error_bitmask |= 1 << 8;
1634 port_id = GET_PORT_ID(le32_to_cpu(event->generic.field[0]));
1635 xhci_dbg(xhci, "Port Status Change Event for port %d\n", port_id);
1637 max_ports = HCS_MAX_PORTS(xhci->hcs_params1);
1638 if ((port_id <= 0) || (port_id > max_ports)) {
1639 xhci_warn(xhci, "Invalid port id %d\n", port_id);
1640 inc_deq(xhci, xhci->event_ring);
1644 /* Figure out which usb_hcd this port is attached to:
1645 * is it a USB 3.0 port or a USB 2.0/1.1 port?
1647 major_revision = xhci->port_array[port_id - 1];
1649 /* Find the right roothub. */
1650 hcd = xhci_to_hcd(xhci);
1651 if ((major_revision == 0x03) != (hcd->speed == HCD_USB3))
1652 hcd = xhci->shared_hcd;
1654 if (major_revision == 0) {
1655 xhci_warn(xhci, "Event for port %u not in "
1656 "Extended Capabilities, ignoring.\n",
1658 bogus_port_status = true;
1661 if (major_revision == DUPLICATE_ENTRY) {
1662 xhci_warn(xhci, "Event for port %u duplicated in"
1663 "Extended Capabilities, ignoring.\n",
1665 bogus_port_status = true;
1670 * Hardware port IDs reported by a Port Status Change Event include USB
1671 * 3.0 and USB 2.0 ports. We want to check if the port has reported a
1672 * resume event, but we first need to translate the hardware port ID
1673 * into the index into the ports on the correct split roothub, and the
1674 * correct bus_state structure.
1676 bus_state = &xhci->bus_state[hcd_index(hcd)];
1677 if (hcd->speed == HCD_USB3)
1678 port_array = xhci->usb3_ports;
1680 port_array = xhci->usb2_ports;
1681 /* Find the faked port hub number */
1682 faked_port_index = find_faked_portnum_from_hw_portnum(hcd, xhci,
1685 temp = xhci_readl(xhci, port_array[faked_port_index]);
1686 if (hcd->state == HC_STATE_SUSPENDED) {
1687 xhci_dbg(xhci, "resume root hub\n");
1688 usb_hcd_resume_root_hub(hcd);
1691 if (hcd->speed == HCD_USB3 && (temp & PORT_PLS_MASK) == XDEV_INACTIVE)
1692 bus_state->port_remote_wakeup &= ~(1 << faked_port_index);
1694 if ((temp & PORT_PLC) && (temp & PORT_PLS_MASK) == XDEV_RESUME) {
1695 xhci_dbg(xhci, "port resume event for port %d\n", port_id);
1697 temp1 = xhci_readl(xhci, &xhci->op_regs->command);
1698 if (!(temp1 & CMD_RUN)) {
1699 xhci_warn(xhci, "xHC is not running.\n");
1703 if (DEV_SUPERSPEED(temp)) {
1704 xhci_dbg(xhci, "remote wake SS port %d\n", port_id);
1705 /* Set a flag to say the port signaled remote wakeup,
1706 * so we can tell the difference between the end of
1707 * device and host initiated resume.
1709 bus_state->port_remote_wakeup |= 1 << faked_port_index;
1710 xhci_test_and_clear_bit(xhci, port_array,
1711 faked_port_index, PORT_PLC);
1712 xhci_set_link_state(xhci, port_array, faked_port_index,
1714 /* Need to wait until the next link state change
1715 * indicates the device is actually in U0.
1717 bogus_port_status = true;
1720 xhci_dbg(xhci, "resume HS port %d\n", port_id);
1721 bus_state->resume_done[faked_port_index] = jiffies +
1722 msecs_to_jiffies(USB_RESUME_TIMEOUT);
1723 set_bit(faked_port_index, &bus_state->resuming_ports);
1724 mod_timer(&hcd->rh_timer,
1725 bus_state->resume_done[faked_port_index]);
1726 /* Do the rest in GetPortStatus */
1730 if ((temp & PORT_PLC) && (temp & PORT_PLS_MASK) == XDEV_U0 &&
1731 DEV_SUPERSPEED(temp)) {
1732 xhci_dbg(xhci, "resume SS port %d finished\n", port_id);
1733 /* We've just brought the device into U0 through either the
1734 * Resume state after a device remote wakeup, or through the
1735 * U3Exit state after a host-initiated resume. If it's a device
1736 * initiated remote wake, don't pass up the link state change,
1737 * so the roothub behavior is consistent with external
1738 * USB 3.0 hub behavior.
1740 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
1741 faked_port_index + 1);
1742 if (slot_id && xhci->devs[slot_id])
1743 xhci_ring_device(xhci, slot_id);
1744 if (bus_state->port_remote_wakeup & (1 << faked_port_index)) {
1745 bus_state->port_remote_wakeup &=
1746 ~(1 << faked_port_index);
1747 xhci_test_and_clear_bit(xhci, port_array,
1748 faked_port_index, PORT_PLC);
1749 usb_wakeup_notification(hcd->self.root_hub,
1750 faked_port_index + 1);
1751 bogus_port_status = true;
1756 if (hcd->speed != HCD_USB3)
1757 xhci_test_and_clear_bit(xhci, port_array, faked_port_index,
1760 /* notify the otg driver of B's connection logic to detect a connect
1761 * event of the B-device goes here
1763 xhci_dbg(xhci, "otg_port = %d, fake_port_index = %d, speed = %s\n",
1764 hcd->self.otg_port, faked_port_index,
1765 (hcd->speed == HCD_USB3) ? "SS" : "HS/FS/LS");
1767 /* check if the otg_port caused port status change */
1768 if (hcd->self.otg_port == (faked_port_index + 1) && (temp & PORT_CSC)) {
1769 enum usb_device_speed speed = USB_SPEED_UNKNOWN;
1771 xhci_dbg(xhci, "otgport caused portstatus 0x%x change\n", temp);
1773 if (DEV_LOWSPEED(temp))
1774 speed = USB_SPEED_LOW;
1775 else if (DEV_FULLSPEED(temp))
1776 speed = USB_SPEED_FULL;
1777 else if (DEV_HIGHSPEED(temp))
1778 speed = USB_SPEED_HIGH;
1779 else if (DEV_SUPERSPEED(temp))
1780 speed = USB_SPEED_SUPER;
1782 /* now check if the port status change is because of
1783 * connect or disconnect
1785 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
1786 faked_port_index + 1);
1787 udev = xhci->devs[slot_id]->udev;
1788 if (((temp & PORT_PLS_MASK) == XDEV_U0) ||
1789 ((temp & PORT_PLS_MASK) == XDEV_POLLING)) {
1791 usb_phy_notify_connect(hcd->phy, speed);
1792 } else if (((temp & PORT_PLS_MASK) == XDEV_U3) ||
1793 ((temp & PORT_PLS_MASK) == XDEV_RXDETECT)) {
1795 usb_phy_notify_disconnect(hcd->phy, speed);
1799 /* Update event ring dequeue pointer before dropping the lock */
1800 inc_deq(xhci, xhci->event_ring);
1802 /* Don't make the USB core poll the roothub if we got a bad port status
1803 * change event. Besides, at that point we can't tell which roothub
1804 * (USB 2.0 or USB 3.0) to kick.
1806 if (bogus_port_status)
1810 * xHCI port-status-change events occur when the "or" of all the
1811 * status-change bits in the portsc register changes from 0 to 1.
1812 * New status changes won't cause an event if any other change
1813 * bits are still set. When an event occurs, switch over to
1814 * polling to avoid losing status changes.
1816 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1817 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1818 spin_unlock(&xhci->lock);
1819 /* Pass this up to the core */
1820 usb_hcd_poll_rh_status(hcd);
1821 spin_lock(&xhci->lock);
1825 * This TD is defined by the TRBs starting at start_trb in start_seg and ending
1826 * at end_trb, which may be in another segment. If the suspect DMA address is a
1827 * TRB in this TD, this function returns that TRB's segment. Otherwise it
1830 struct xhci_segment *trb_in_td(struct xhci_segment *start_seg,
1831 union xhci_trb *start_trb,
1832 union xhci_trb *end_trb,
1833 dma_addr_t suspect_dma)
1835 dma_addr_t start_dma;
1836 dma_addr_t end_seg_dma;
1837 dma_addr_t end_trb_dma;
1838 struct xhci_segment *cur_seg;
1840 start_dma = xhci_trb_virt_to_dma(start_seg, start_trb);
1841 cur_seg = start_seg;
1846 /* We may get an event for a Link TRB in the middle of a TD */
1847 end_seg_dma = xhci_trb_virt_to_dma(cur_seg,
1848 &cur_seg->trbs[TRBS_PER_SEGMENT - 1]);
1849 /* If the end TRB isn't in this segment, this is set to 0 */
1850 end_trb_dma = xhci_trb_virt_to_dma(cur_seg, end_trb);
1852 if (end_trb_dma > 0) {
1853 /* The end TRB is in this segment, so suspect should be here */
1854 if (start_dma <= end_trb_dma) {
1855 if (suspect_dma >= start_dma && suspect_dma <= end_trb_dma)
1858 /* Case for one segment with
1859 * a TD wrapped around to the top
1861 if ((suspect_dma >= start_dma &&
1862 suspect_dma <= end_seg_dma) ||
1863 (suspect_dma >= cur_seg->dma &&
1864 suspect_dma <= end_trb_dma))
1869 /* Might still be somewhere in this segment */
1870 if (suspect_dma >= start_dma && suspect_dma <= end_seg_dma)
1873 cur_seg = cur_seg->next;
1874 start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]);
1875 } while (cur_seg != start_seg);
1880 static void xhci_cleanup_halted_endpoint(struct xhci_hcd *xhci,
1881 unsigned int slot_id, unsigned int ep_index,
1882 unsigned int stream_id,
1883 struct xhci_td *td, union xhci_trb *event_trb)
1885 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
1886 ep->ep_state |= EP_HALTED;
1887 ep->stopped_td = td;
1888 ep->stopped_trb = event_trb;
1889 ep->stopped_stream = stream_id;
1891 xhci_queue_reset_ep(xhci, slot_id, ep_index);
1892 xhci_cleanup_stalled_ring(xhci, td->urb->dev, ep_index);
1894 ep->stopped_td = NULL;
1895 ep->stopped_trb = NULL;
1896 ep->stopped_stream = 0;
1898 xhci_ring_cmd_db(xhci);
1901 /* Check if an error has halted the endpoint ring. The class driver will
1902 * cleanup the halt for a non-default control endpoint if we indicate a stall.
1903 * However, a babble and other errors also halt the endpoint ring, and the class
1904 * driver won't clear the halt in that case, so we need to issue a Set Transfer
1905 * Ring Dequeue Pointer command manually.
1907 static int xhci_requires_manual_halt_cleanup(struct xhci_hcd *xhci,
1908 struct xhci_ep_ctx *ep_ctx,
1909 unsigned int trb_comp_code)
1911 /* TRB completion codes that may require a manual halt cleanup */
1912 if (trb_comp_code == COMP_TX_ERR ||
1913 trb_comp_code == COMP_BABBLE ||
1914 trb_comp_code == COMP_SPLIT_ERR)
1915 /* The 0.96 spec says a babbling control endpoint
1916 * is not halted. The 0.96 spec says it is. Some HW
1917 * claims to be 0.95 compliant, but it halts the control
1918 * endpoint anyway. Check if a babble halted the
1921 if ((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1922 cpu_to_le32(EP_STATE_HALTED))
1928 int xhci_is_vendor_info_code(struct xhci_hcd *xhci, unsigned int trb_comp_code)
1930 if (trb_comp_code >= 224 && trb_comp_code <= 255) {
1931 /* Vendor defined "informational" completion code,
1932 * treat as not-an-error.
1934 xhci_dbg(xhci, "Vendor defined info completion code %u\n",
1936 xhci_dbg(xhci, "Treating code as success.\n");
1943 * Finish the td processing, remove the td from td list;
1944 * Return 1 if the urb can be given back.
1946 static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
1947 union xhci_trb *event_trb, struct xhci_transfer_event *event,
1948 struct xhci_virt_ep *ep, int *status, bool skip)
1950 struct xhci_virt_device *xdev;
1951 struct xhci_ring *ep_ring;
1952 unsigned int slot_id;
1954 struct urb *urb = NULL;
1955 struct xhci_ep_ctx *ep_ctx;
1957 struct urb_priv *urb_priv;
1960 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1961 xdev = xhci->devs[slot_id];
1962 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
1963 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
1964 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1965 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1970 if (trb_comp_code == COMP_STOP_INVAL ||
1971 trb_comp_code == COMP_STOP) {
1972 /* The Endpoint Stop Command completion will take care of any
1973 * stopped TDs. A stopped TD may be restarted, so don't update
1974 * the ring dequeue pointer or take this TD off any lists yet.
1976 ep->stopped_td = td;
1977 ep->stopped_trb = event_trb;
1980 if (trb_comp_code == COMP_STALL) {
1981 /* The transfer is completed from the driver's
1982 * perspective, but we need to issue a set dequeue
1983 * command for this stalled endpoint to move the dequeue
1984 * pointer past the TD. We can't do that here because
1985 * the halt condition must be cleared first. Let the
1986 * USB class driver clear the stall later.
1988 ep->stopped_td = td;
1989 ep->stopped_trb = event_trb;
1990 ep->stopped_stream = ep_ring->stream_id;
1991 } else if (xhci_requires_manual_halt_cleanup(xhci,
1992 ep_ctx, trb_comp_code)) {
1993 /* Other types of errors halt the endpoint, but the
1994 * class driver doesn't call usb_reset_endpoint() unless
1995 * the error is -EPIPE. Clear the halted status in the
1996 * xHCI hardware manually.
1998 xhci_cleanup_halted_endpoint(xhci,
1999 slot_id, ep_index, ep_ring->stream_id,
2002 /* Update ring dequeue pointer */
2003 while (ep_ring->dequeue != td->last_trb)
2004 inc_deq(xhci, ep_ring);
2005 inc_deq(xhci, ep_ring);
2009 /* Clean up the endpoint's TD list */
2011 urb_priv = urb->hcpriv;
2013 /* Do one last check of the actual transfer length.
2014 * If the host controller said we transferred more data than
2015 * the buffer length, urb->actual_length will be a very big
2016 * number (since it's unsigned). Play it safe and say we didn't
2017 * transfer anything.
2019 if (urb->actual_length > urb->transfer_buffer_length) {
2020 xhci_warn(xhci, "URB transfer length is wrong, "
2021 "xHC issue? req. len = %u, "
2023 urb->transfer_buffer_length,
2024 urb->actual_length);
2025 urb->actual_length = 0;
2026 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2027 *status = -EREMOTEIO;
2031 list_del_init(&td->td_list);
2032 /* Was this TD slated to be cancelled but completed anyway? */
2033 if (!list_empty(&td->cancelled_td_list))
2034 list_del_init(&td->cancelled_td_list);
2037 /* Giveback the urb when all the tds are completed */
2038 if (urb_priv->td_cnt == urb_priv->length) {
2040 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
2041 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
2042 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs
2044 if (xhci->quirks & XHCI_AMD_PLL_FIX)
2045 usb_amd_quirk_pll_enable();
2055 * Process control tds, update urb status and actual_length.
2057 static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
2058 union xhci_trb *event_trb, struct xhci_transfer_event *event,
2059 struct xhci_virt_ep *ep, int *status)
2061 struct xhci_virt_device *xdev;
2062 struct xhci_ring *ep_ring;
2063 unsigned int slot_id;
2065 struct xhci_ep_ctx *ep_ctx;
2068 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
2069 xdev = xhci->devs[slot_id];
2070 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
2071 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2072 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
2073 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2075 switch (trb_comp_code) {
2077 if (event_trb == ep_ring->dequeue) {
2078 xhci_warn(xhci, "WARN: Success on ctrl setup TRB "
2079 "without IOC set??\n");
2080 *status = -ESHUTDOWN;
2081 } else if (event_trb != td->last_trb) {
2082 xhci_warn(xhci, "WARN: Success on ctrl data TRB "
2083 "without IOC set??\n");
2084 *status = -ESHUTDOWN;
2090 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2091 *status = -EREMOTEIO;
2095 case COMP_STOP_INVAL:
2097 return finish_td(xhci, td, event_trb, event, ep, status, false);
2099 if (!xhci_requires_manual_halt_cleanup(xhci,
2100 ep_ctx, trb_comp_code))
2102 xhci_dbg(xhci, "TRB error code %u, "
2103 "halted endpoint index = %u\n",
2104 trb_comp_code, ep_index);
2105 /* else fall through */
2107 /* Did we transfer part of the data (middle) phase? */
2108 if (event_trb != ep_ring->dequeue &&
2109 event_trb != td->last_trb)
2110 td->urb->actual_length =
2111 td->urb->transfer_buffer_length -
2112 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2114 td->urb->actual_length = 0;
2116 xhci_cleanup_halted_endpoint(xhci,
2117 slot_id, ep_index, 0, td, event_trb);
2118 return finish_td(xhci, td, event_trb, event, ep, status, true);
2121 * Did we transfer any data, despite the errors that might have
2122 * happened? I.e. did we get past the setup stage?
2124 if (event_trb != ep_ring->dequeue) {
2125 /* The event was for the status stage */
2126 if (event_trb == td->last_trb) {
2127 if (td->urb_length_set) {
2128 /* Don't overwrite a previously set error code
2130 if ((*status == -EINPROGRESS || *status == 0) &&
2131 (td->urb->transfer_flags
2132 & URB_SHORT_NOT_OK))
2133 /* Did we already see a short data
2135 *status = -EREMOTEIO;
2137 td->urb->actual_length =
2138 td->urb->transfer_buffer_length;
2142 * Maybe the event was for the data stage? If so, update
2143 * already the actual_length of the URB and flag it as
2144 * set, so that it is not overwritten in the event for
2147 td->urb_length_set = true;
2148 td->urb->actual_length =
2149 td->urb->transfer_buffer_length -
2150 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2151 xhci_dbg(xhci, "Waiting for status "
2157 return finish_td(xhci, td, event_trb, event, ep, status, false);
2161 * Process isochronous tds, update urb packet status and actual_length.
2163 static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2164 union xhci_trb *event_trb, struct xhci_transfer_event *event,
2165 struct xhci_virt_ep *ep, int *status)
2167 struct xhci_ring *ep_ring;
2168 struct urb_priv *urb_priv;
2171 union xhci_trb *cur_trb;
2172 struct xhci_segment *cur_seg;
2173 struct usb_iso_packet_descriptor *frame;
2175 bool skip_td = false;
2177 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2178 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2179 urb_priv = td->urb->hcpriv;
2180 idx = urb_priv->td_cnt;
2181 frame = &td->urb->iso_frame_desc[idx];
2183 /* handle completion code */
2184 switch (trb_comp_code) {
2186 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0) {
2190 if ((xhci->quirks & XHCI_TRUST_TX_LENGTH))
2191 trb_comp_code = COMP_SHORT_TX;
2193 frame->status = td->urb->transfer_flags & URB_SHORT_NOT_OK ?
2197 frame->status = -ECOMM;
2200 case COMP_BUFF_OVER:
2202 frame->status = -EOVERFLOW;
2207 frame->status = -EPROTO;
2211 xhci->xhci_ereport.comp_tx_err++;
2212 frame->status = -EPROTO;
2213 if (event_trb != td->last_trb)
2218 case COMP_STOP_INVAL:
2225 if (trb_comp_code == COMP_SUCCESS || skip_td) {
2226 frame->actual_length = frame->length;
2227 td->urb->actual_length += frame->length;
2229 if (urb_priv->finishing_short_td &&
2230 (event_trb == td->last_trb)) {
2231 urb_priv->finishing_short_td = false;
2232 /* get event for last trb, can finish this short td */
2235 for (cur_trb = ep_ring->dequeue,
2236 cur_seg = ep_ring->deq_seg; cur_trb != event_trb;
2237 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
2238 if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
2239 !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3]))
2240 len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
2242 len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
2243 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2245 if (trb_comp_code != COMP_STOP_INVAL) {
2246 frame->actual_length = len;
2247 td->urb->actual_length += len;
2249 if ((trb_comp_code == COMP_SHORT_TX) &&
2250 (event_trb != td->last_trb)) {
2251 /* last trb has IOC, expect HC to send event for it */
2252 while (ep_ring->dequeue != td->last_trb)
2253 inc_deq(xhci, ep_ring);
2254 urb_priv->finishing_short_td = true;
2260 return finish_td(xhci, td, event_trb, event, ep, status, false);
2263 static int skip_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2264 struct xhci_transfer_event *event,
2265 struct xhci_virt_ep *ep, int *status)
2267 struct xhci_ring *ep_ring;
2268 struct urb_priv *urb_priv;
2269 struct usb_iso_packet_descriptor *frame;
2272 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2273 urb_priv = td->urb->hcpriv;
2274 idx = urb_priv->td_cnt;
2275 frame = &td->urb->iso_frame_desc[idx];
2277 /* The transfer is partly done. */
2278 frame->status = -EXDEV;
2280 /* calc actual length */
2281 frame->actual_length = 0;
2283 /* Update ring dequeue pointer */
2284 while (ep_ring->dequeue != td->last_trb)
2285 inc_deq(xhci, ep_ring);
2286 inc_deq(xhci, ep_ring);
2288 return finish_td(xhci, td, NULL, event, ep, status, true);
2292 * Process bulk and interrupt tds, update urb status and actual_length.
2294 static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td,
2295 union xhci_trb *event_trb, struct xhci_transfer_event *event,
2296 struct xhci_virt_ep *ep, int *status)
2298 struct xhci_ring *ep_ring;
2299 union xhci_trb *cur_trb;
2300 struct xhci_segment *cur_seg;
2303 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2304 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2306 switch (trb_comp_code) {
2308 /* Double check that the HW transferred everything. */
2309 if (event_trb != td->last_trb ||
2310 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) {
2311 xhci_warn(xhci, "WARN Successful completion "
2313 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2314 *status = -EREMOTEIO;
2317 if ((xhci->quirks & XHCI_TRUST_TX_LENGTH))
2318 trb_comp_code = COMP_SHORT_TX;
2324 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2325 *status = -EREMOTEIO;
2330 /* Others already handled above */
2333 if (trb_comp_code == COMP_SHORT_TX)
2334 xhci_dbg(xhci, "ep %#x - asked for %d bytes, "
2335 "%d bytes untransferred\n",
2336 td->urb->ep->desc.bEndpointAddress,
2337 td->urb->transfer_buffer_length,
2338 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
2339 /* Fast path - was this the last TRB in the TD for this URB? */
2340 if (event_trb == td->last_trb) {
2341 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) {
2342 td->urb->actual_length =
2343 td->urb->transfer_buffer_length -
2344 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2345 if (td->urb->transfer_buffer_length <
2346 td->urb->actual_length) {
2347 xhci_warn(xhci, "HC gave bad length "
2348 "of %d bytes left\n",
2349 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
2350 td->urb->actual_length = 0;
2351 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2352 *status = -EREMOTEIO;
2356 /* Don't overwrite a previously set error code */
2357 if (*status == -EINPROGRESS) {
2358 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2359 *status = -EREMOTEIO;
2364 td->urb->actual_length =
2365 td->urb->transfer_buffer_length;
2366 /* Ignore a short packet completion if the
2367 * untransferred length was zero.
2369 if (*status == -EREMOTEIO)
2373 /* Slow path - walk the list, starting from the dequeue
2374 * pointer, to get the actual length transferred.
2376 td->urb->actual_length = 0;
2377 for (cur_trb = ep_ring->dequeue, cur_seg = ep_ring->deq_seg;
2378 cur_trb != event_trb;
2379 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
2380 if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
2381 !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3]))
2382 td->urb->actual_length +=
2383 TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
2385 /* If the ring didn't stop on a Link or No-op TRB, add
2386 * in the actual bytes transferred from the Normal TRB
2388 if (trb_comp_code != COMP_STOP_INVAL)
2389 td->urb->actual_length +=
2390 TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
2391 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2394 return finish_td(xhci, td, event_trb, event, ep, status, false);
2397 static void xhci_endpoint_soft_retry(struct xhci_hcd *xhci, unsigned slot_id,
2398 unsigned dci, bool on)
2400 struct xhci_virt_device *xdev = xhci->devs[slot_id];
2401 struct usb_host_endpoint *ep;
2403 if (!xhci->shared_hcd || !xhci->shared_hcd->driver
2404 || !xhci->shared_hcd->driver->endpoint_soft_retry)
2407 if (xdev->udev->speed != USB_SPEED_SUPER)
2411 ep = xdev->udev->ep_in[(dci - 1)/2];
2413 ep = xdev->udev->ep_out[dci/2];
2418 xhci->shared_hcd->driver->endpoint_soft_retry(xhci->shared_hcd, ep, on);
2421 * If this function returns an error condition, it means it got a Transfer
2422 * event with a corrupted Slot ID, Endpoint ID, or TRB DMA address.
2423 * At this point, the host controller is probably hosed and should be reset.
2425 static int handle_tx_event(struct xhci_hcd *xhci,
2426 struct xhci_transfer_event *event)
2427 __releases(&xhci->lock)
2428 __acquires(&xhci->lock)
2430 struct xhci_virt_device *xdev;
2431 struct xhci_virt_ep *ep;
2432 struct xhci_ring *ep_ring;
2433 unsigned int slot_id;
2435 struct xhci_td *td = NULL;
2436 dma_addr_t event_dma;
2437 struct xhci_segment *event_seg;
2438 union xhci_trb *event_trb;
2439 struct urb *urb = NULL;
2440 int status = -EINPROGRESS;
2441 struct urb_priv *urb_priv;
2442 struct xhci_ep_ctx *ep_ctx;
2443 struct list_head *tmp;
2447 bool handling_skipped_tds = false;
2449 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
2450 xdev = xhci->devs[slot_id];
2452 xhci_err(xhci, "ERROR Transfer event pointed to bad slot\n");
2453 xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
2454 (unsigned long long) xhci_trb_virt_to_dma(
2455 xhci->event_ring->deq_seg,
2456 xhci->event_ring->dequeue),
2457 lower_32_bits(le64_to_cpu(event->buffer)),
2458 upper_32_bits(le64_to_cpu(event->buffer)),
2459 le32_to_cpu(event->transfer_len),
2460 le32_to_cpu(event->flags));
2461 xhci_dbg(xhci, "Event ring:\n");
2462 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
2466 /* Endpoint ID is 1 based, our index is zero based */
2467 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
2468 ep = &xdev->eps[ep_index];
2469 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2470 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
2472 (le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) ==
2473 EP_STATE_DISABLED) {
2474 xhci_err(xhci, "ERROR Transfer event for disabled endpoint "
2475 "or incorrect stream ring\n");
2476 xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
2477 (unsigned long long) xhci_trb_virt_to_dma(
2478 xhci->event_ring->deq_seg,
2479 xhci->event_ring->dequeue),
2480 lower_32_bits(le64_to_cpu(event->buffer)),
2481 upper_32_bits(le64_to_cpu(event->buffer)),
2482 le32_to_cpu(event->transfer_len),
2483 le32_to_cpu(event->flags));
2484 xhci_dbg(xhci, "Event ring:\n");
2485 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
2489 /* Count current td numbers if ep->skip is set */
2491 list_for_each(tmp, &ep_ring->td_list)
2495 event_dma = le64_to_cpu(event->buffer);
2496 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2497 /* Look for common error cases */
2498 switch (trb_comp_code) {
2499 /* Skip codes that require special handling depending on
2503 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0)
2504 goto check_soft_try;
2505 if (xhci->quirks & XHCI_TRUST_TX_LENGTH)
2506 trb_comp_code = COMP_SHORT_TX;
2508 xhci_warn_ratelimited(xhci,
2509 "WARN Successful completion on short TX: needs XHCI_TRUST_TX_LENGTH quirk?\n");
2512 if (ep_ring->soft_try) {
2513 xhci_dbg(xhci, "soft retry completed successfully\n");
2514 ep_ring->soft_try = false;
2515 xhci_endpoint_soft_retry(xhci,
2516 slot_id, ep_index + 1, false);
2521 xhci_dbg(xhci, "Stopped on Transfer TRB\n");
2523 case COMP_STOP_INVAL:
2524 xhci_dbg(xhci, "Stopped on No-op or Link TRB\n");
2527 xhci_dbg(xhci, "Stalled endpoint\n");
2528 ep->ep_state |= EP_HALTED;
2532 xhci_warn(xhci, "WARN: TRB error on endpoint\n");
2535 case COMP_SPLIT_ERR:
2536 xhci_dbg(xhci, "Transfer error on endpoint\n");
2540 xhci->xhci_ereport.comp_tx_err++;
2542 if (xdev->udev->speed == USB_SPEED_SUPER &&
2543 ep_ring->type != TYPE_ISOC) {
2544 if (!ep_ring->soft_try) {
2545 xhci_dbg(xhci, "SuperSpeed transfer error, do soft retry\n");
2546 ret = xhci_queue_soft_retry(xhci,
2549 xhci_endpoint_soft_retry(xhci,
2550 slot_id, ep_index + 1, true);
2551 xhci_ring_cmd_db(xhci);
2552 ep_ring->soft_try = true;
2556 xhci_dbg(xhci, "soft retry complete but transfer still failed\n");
2557 ep_ring->soft_try = false;
2559 xhci_endpoint_soft_retry(xhci,
2560 slot_id, ep_index + 1, false);
2563 xhci_dbg(xhci, "Transfer error on endpoint\n");
2567 xhci_dbg(xhci, "Babble error on endpoint\n");
2568 status = -EOVERFLOW;
2571 xhci_warn(xhci, "WARN: HC couldn't access mem fast enough\n");
2575 xhci_warn(xhci, "WARN: bandwidth overrun event on endpoint\n");
2577 case COMP_BUFF_OVER:
2578 xhci_warn(xhci, "WARN: buffer overrun event on endpoint\n");
2582 * When the Isoch ring is empty, the xHC will generate
2583 * a Ring Overrun Event for IN Isoch endpoint or Ring
2584 * Underrun Event for OUT Isoch endpoint.
2586 xhci_dbg(xhci, "underrun event on endpoint\n");
2587 if (!list_empty(&ep_ring->td_list))
2588 xhci_dbg(xhci, "Underrun Event for slot %d ep %d "
2589 "still with TDs queued?\n",
2590 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2594 xhci_dbg(xhci, "overrun event on endpoint\n");
2595 if (!list_empty(&ep_ring->td_list))
2596 xhci_dbg(xhci, "Overrun Event for slot %d ep %d "
2597 "still with TDs queued?\n",
2598 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2602 xhci_warn(xhci, "WARN: detect an incompatible device");
2605 case COMP_MISSED_INT:
2607 * When encounter missed service error, one or more isoc tds
2608 * may be missed by xHC.
2609 * Set skip flag of the ep_ring; Complete the missed tds as
2610 * short transfer when process the ep_ring next time.
2613 xhci_dbg(xhci, "Miss service interval error, set skip flag\n");
2617 xhci_dbg(xhci, "No Ping response error, Skip one Isoc TD\n");
2620 if (xhci_is_vendor_info_code(xhci, trb_comp_code)) {
2624 xhci_warn(xhci, "ERROR Unknown event condition, HC probably "
2630 /* This TRB should be in the TD at the head of this ring's
2633 if (list_empty(&ep_ring->td_list)) {
2635 * A stopped endpoint may generate an extra completion
2636 * event if the device was suspended. Don't print
2639 if (!(trb_comp_code == COMP_STOP ||
2640 trb_comp_code == COMP_STOP_INVAL)) {
2641 xhci_warn(xhci, "WARN Event TRB for slot %d ep %d with no TDs queued?\n",
2642 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2644 xhci_dbg(xhci, "Event TRB with TRB type ID %u\n",
2645 (le32_to_cpu(event->flags) &
2646 TRB_TYPE_BITMASK)>>10);
2647 xhci_print_trb_offsets(xhci, (union xhci_trb *) event);
2651 xhci_dbg(xhci, "td_list is empty while skip "
2652 "flag set. Clear skip flag.\n");
2658 /* We've skipped all the TDs on the ep ring when ep->skip set */
2659 if (ep->skip && td_num == 0) {
2661 xhci_dbg(xhci, "All tds on the ep_ring skipped. "
2662 "Clear skip flag.\n");
2667 td = list_entry(ep_ring->td_list.next, struct xhci_td, td_list);
2671 /* Is this a TRB in the currently executing TD? */
2672 event_seg = trb_in_td(ep_ring->deq_seg, ep_ring->dequeue,
2673 td->last_trb, event_dma);
2676 * Skip the Force Stopped Event. The event_trb(event_dma) of FSE
2677 * is not in the current TD pointed by ep_ring->dequeue because
2678 * that the hardware dequeue pointer still at the previous TRB
2679 * of the current TD. The previous TRB maybe a Link TD or the
2680 * last TRB of the previous TD. The command completion handle
2681 * will take care the rest.
2683 if (!event_seg && (trb_comp_code == COMP_STOP ||
2684 trb_comp_code == COMP_STOP_INVAL)) {
2691 !usb_endpoint_xfer_isoc(&td->urb->ep->desc)) {
2692 static bool printit = true;
2693 static unsigned long lastprint;
2694 /* Some host controllers give a spurious
2695 * successful event after a short transfer.
2698 if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) &&
2699 ep_ring->last_td_was_short) {
2700 ep_ring->last_td_was_short = false;
2704 /* HC is busted, give up! */
2706 time_is_before_jiffies(lastprint))
2710 xhci_err_ratelimited(xhci,
2711 "ERROR Transfer event TRB DMA ptr not "
2712 "part of current TD\n");
2714 lastprint = jiffies +
2715 msecs_to_jiffies(5000);
2720 ret = skip_isoc_td(xhci, td, event, ep, &status);
2723 if (trb_comp_code == COMP_SHORT_TX)
2724 ep_ring->last_td_was_short = true;
2726 ep_ring->last_td_was_short = false;
2729 xhci_dbg(xhci, "Found td. Clear skip flag.\n");
2733 event_trb = &event_seg->trbs[(event_dma - event_seg->dma) /
2734 sizeof(*event_trb)];
2736 * No-op TRB should not trigger interrupts.
2737 * If event_trb is a no-op TRB, it means the
2738 * corresponding TD has been cancelled. Just ignore
2741 if (TRB_TYPE_NOOP_LE32(event_trb->generic.field[3])) {
2743 "event_trb is a no-op TRB. Skip it\n");
2747 /* Now update the urb's actual_length and give back to
2750 if (usb_endpoint_xfer_control(&td->urb->ep->desc))
2751 ret = process_ctrl_td(xhci, td, event_trb, event, ep,
2753 else if (usb_endpoint_xfer_isoc(&td->urb->ep->desc))
2754 ret = process_isoc_td(xhci, td, event_trb, event, ep,
2757 ret = process_bulk_intr_td(xhci, td, event_trb, event,
2763 handling_skipped_tds = ep->skip &&
2764 trb_comp_code != COMP_MISSED_INT &&
2765 trb_comp_code != COMP_PING_ERR;
2768 * Do not update event ring dequeue pointer if we're in a loop
2769 * processing missed tds.
2771 if (!handling_skipped_tds)
2772 inc_deq(xhci, xhci->event_ring);
2776 urb_priv = urb->hcpriv;
2777 /* Leave the TD around for the reset endpoint function
2778 * to use(but only if it's not a control endpoint,
2779 * since we already queued the Set TR dequeue pointer
2780 * command for stalled control endpoints).
2782 if (usb_endpoint_xfer_control(&urb->ep->desc) ||
2783 (trb_comp_code != COMP_STALL &&
2784 trb_comp_code != COMP_BABBLE))
2785 xhci_urb_free_priv(xhci, urb_priv);
2789 usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
2790 if ((urb->actual_length != urb->transfer_buffer_length &&
2791 (urb->transfer_flags &
2792 URB_SHORT_NOT_OK)) ||
2794 !usb_endpoint_xfer_isoc(&urb->ep->desc)))
2795 xhci_dbg(xhci, "Giveback URB %p, len = %d, "
2796 "expected = %d, status = %d\n",
2797 urb, urb->actual_length,
2798 urb->transfer_buffer_length,
2800 spin_unlock(&xhci->lock);
2801 /* EHCI, UHCI, and OHCI always unconditionally set the
2802 * urb->status of an isochronous endpoint to 0.
2804 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
2806 usb_hcd_giveback_urb(bus_to_hcd(urb->dev->bus), urb, status);
2807 spin_lock(&xhci->lock);
2811 * If ep->skip is set, it means there are missed tds on the
2812 * endpoint ring need to take care of.
2813 * Process them as short transfer until reach the td pointed by
2816 } while (handling_skipped_tds);
2822 * This function handles all OS-owned events on the event ring. It may drop
2823 * xhci->lock between event processing (e.g. to pass up port status changes).
2824 * Returns >0 for "possibly more events to process" (caller should call again),
2825 * otherwise 0 if done. In future, <0 returns should indicate error code.
2827 static int xhci_handle_event(struct xhci_hcd *xhci)
2829 union xhci_trb *event;
2830 int update_ptrs = 1;
2833 if (!xhci->event_ring || !xhci->event_ring->dequeue) {
2834 xhci->error_bitmask |= 1 << 1;
2838 event = xhci->event_ring->dequeue;
2839 /* Does the HC or OS own the TRB? */
2840 if ((le32_to_cpu(event->event_cmd.flags) & TRB_CYCLE) !=
2841 xhci->event_ring->cycle_state) {
2842 xhci->error_bitmask |= 1 << 2;
2847 * Barrier between reading the TRB_CYCLE (valid) flag above and any
2848 * speculative reads of the event's flags/data below.
2851 /* FIXME: Handle more event types. */
2852 switch ((le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK)) {
2853 case TRB_TYPE(TRB_COMPLETION):
2854 handle_cmd_completion(xhci, &event->event_cmd);
2856 case TRB_TYPE(TRB_PORT_STATUS):
2857 handle_port_status(xhci, event);
2860 case TRB_TYPE(TRB_TRANSFER):
2861 ret = handle_tx_event(xhci, &event->trans_event);
2863 xhci->error_bitmask |= 1 << 9;
2867 case TRB_TYPE(TRB_DEV_NOTE):
2868 handle_device_notification(xhci, event);
2871 if ((le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK) >=
2873 handle_vendor_event(xhci, event);
2875 xhci->error_bitmask |= 1 << 3;
2877 /* Any of the above functions may drop and re-acquire the lock, so check
2878 * to make sure a watchdog timer didn't mark the host as non-responsive.
2880 if (xhci->xhc_state & XHCI_STATE_DYING) {
2881 xhci_dbg(xhci, "xHCI host dying, returning from "
2882 "event handler.\n");
2887 /* Update SW event ring dequeue pointer */
2888 inc_deq(xhci, xhci->event_ring);
2890 /* Are there more items on the event ring? Caller will call us again to
2897 * xHCI spec says we can get an interrupt, and if the HC has an error condition,
2898 * we might get bad data out of the event ring. Section 4.10.2.7 has a list of
2899 * indicators of an event TRB error, but we check the status *first* to be safe.
2901 irqreturn_t xhci_irq(struct usb_hcd *hcd)
2903 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2906 union xhci_trb *event_ring_deq;
2909 spin_lock(&xhci->lock);
2910 /* Check if the xHC generated the interrupt, or the irq is shared */
2911 status = xhci_readl(xhci, &xhci->op_regs->status);
2912 if (status == 0xffffffff)
2915 if (!(status & STS_EINT)) {
2916 spin_unlock(&xhci->lock);
2919 if (status & STS_FATAL) {
2920 xhci_warn(xhci, "WARNING: Host System Error\n");
2923 spin_unlock(&xhci->lock);
2928 * Clear the op reg interrupt status first,
2929 * so we can receive interrupts from other MSI-X interrupters.
2930 * Write 1 to clear the interrupt status.
2933 xhci_writel(xhci, status, &xhci->op_regs->status);
2934 /* FIXME when MSI-X is supported and there are multiple vectors */
2935 /* Clear the MSI-X event interrupt status */
2939 /* Acknowledge the PCI interrupt */
2940 irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
2941 irq_pending |= IMAN_IP;
2942 xhci_writel(xhci, irq_pending, &xhci->ir_set->irq_pending);
2945 if (xhci->xhc_state & XHCI_STATE_DYING) {
2946 xhci_dbg(xhci, "xHCI dying, ignoring interrupt. "
2947 "Shouldn't IRQs be disabled?\n");
2948 /* Clear the event handler busy flag (RW1C);
2949 * the event ring should be empty.
2951 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2952 xhci_write_64(xhci, temp_64 | ERST_EHB,
2953 &xhci->ir_set->erst_dequeue);
2954 spin_unlock(&xhci->lock);
2959 event_ring_deq = xhci->event_ring->dequeue;
2960 /* FIXME this should be a delayed service routine
2961 * that clears the EHB.
2963 while (xhci_handle_event(xhci) > 0) {}
2965 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2966 /* If necessary, update the HW's version of the event ring deq ptr. */
2967 if (event_ring_deq != xhci->event_ring->dequeue) {
2968 deq = xhci_trb_virt_to_dma(xhci->event_ring->deq_seg,
2969 xhci->event_ring->dequeue);
2971 xhci_warn(xhci, "WARN something wrong with SW event "
2972 "ring dequeue ptr.\n");
2973 /* Update HC event ring dequeue pointer */
2974 temp_64 &= ERST_PTR_MASK;
2975 temp_64 |= ((u64) deq & (u64) ~ERST_PTR_MASK);
2978 /* Clear the event handler busy flag (RW1C); event ring is empty. */
2979 temp_64 |= ERST_EHB;
2980 xhci_write_64(xhci, temp_64, &xhci->ir_set->erst_dequeue);
2982 spin_unlock(&xhci->lock);
2987 irqreturn_t xhci_msi_irq(int irq, struct usb_hcd *hcd)
2989 return xhci_irq(hcd);
2992 /**** Endpoint Ring Operations ****/
2995 * Generic function for queueing a TRB on a ring.
2996 * The caller must have checked to make sure there's room on the ring.
2998 * @more_trbs_coming: Will you enqueue more TRBs before calling
2999 * prepare_transfer()?
3001 static void queue_trb(struct xhci_hcd *xhci, struct xhci_ring *ring,
3002 bool more_trbs_coming,
3003 u32 field1, u32 field2, u32 field3, u32 field4)
3005 struct xhci_generic_trb *trb;
3007 trb = &ring->enqueue->generic;
3008 trb->field[0] = cpu_to_le32(field1);
3009 trb->field[1] = cpu_to_le32(field2);
3010 trb->field[2] = cpu_to_le32(field3);
3011 trb->field[3] = cpu_to_le32(field4);
3012 inc_enq(xhci, ring, more_trbs_coming);
3016 * Does various checks on the endpoint ring, and makes it ready to queue num_trbs.
3017 * FIXME allocate segments if the ring is full.
3019 static int prepare_ring(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
3020 u32 ep_state, unsigned int num_trbs, gfp_t mem_flags)
3022 unsigned int num_trbs_needed;
3024 /* Make sure the endpoint has been added to xHC schedule */
3026 case EP_STATE_DISABLED:
3028 * USB core changed config/interfaces without notifying us,
3029 * or hardware is reporting the wrong state.
3031 xhci_warn(xhci, "WARN urb submitted to disabled ep\n");
3033 case EP_STATE_ERROR:
3034 xhci_warn(xhci, "WARN waiting for error on ep to be cleared\n");
3035 /* FIXME event handling code for error needs to clear it */
3036 /* XXX not sure if this should be -ENOENT or not */
3038 case EP_STATE_HALTED:
3039 xhci_dbg(xhci, "WARN halted endpoint, queueing URB anyway.\n");
3040 case EP_STATE_STOPPED:
3041 case EP_STATE_RUNNING:
3044 xhci_err(xhci, "ERROR unknown endpoint state for ep\n");
3046 * FIXME issue Configure Endpoint command to try to get the HC
3047 * back into a known state.
3053 if (room_on_ring(xhci, ep_ring, num_trbs))
3056 if (ep_ring == xhci->cmd_ring) {
3057 xhci_err(xhci, "Do not support expand command ring\n");
3061 xhci_dbg(xhci, "ERROR no room on ep ring, "
3062 "try ring expansion\n");
3063 num_trbs_needed = num_trbs - ep_ring->num_trbs_free;
3064 if (xhci_ring_expansion(xhci, ep_ring, num_trbs_needed,
3066 xhci_err(xhci, "Ring expansion failed\n");
3071 if (enqueue_is_link_trb(ep_ring)) {
3072 struct xhci_ring *ring = ep_ring;
3073 union xhci_trb *next;
3075 next = ring->enqueue;
3077 while (last_trb(xhci, ring, ring->enq_seg, next)) {
3078 /* If we're not dealing with 0.95 hardware or isoc rings
3079 * on AMD 0.96 host, clear the chain bit.
3081 if (!xhci_link_trb_quirk(xhci) &&
3082 !(ring->type == TYPE_ISOC &&
3083 (xhci->quirks & XHCI_AMD_0x96_HOST)))
3084 next->link.control &= cpu_to_le32(~TRB_CHAIN);
3086 next->link.control |= cpu_to_le32(TRB_CHAIN);
3089 next->link.control ^= cpu_to_le32(TRB_CYCLE);
3091 /* Toggle the cycle bit after the last ring segment. */
3092 if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) {
3093 ring->cycle_state = (ring->cycle_state ? 0 : 1);
3095 ring->enq_seg = ring->enq_seg->next;
3096 ring->enqueue = ring->enq_seg->trbs;
3097 next = ring->enqueue;
3104 static int prepare_transfer(struct xhci_hcd *xhci,
3105 struct xhci_virt_device *xdev,
3106 unsigned int ep_index,
3107 unsigned int stream_id,
3108 unsigned int num_trbs,
3110 unsigned int td_index,
3114 struct urb_priv *urb_priv;
3116 struct xhci_ring *ep_ring;
3117 struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
3119 ep_ring = xhci_stream_id_to_ring(xdev, ep_index, stream_id);
3121 xhci_dbg(xhci, "Can't prepare ring for bad stream ID %u\n",
3126 ret = prepare_ring(xhci, ep_ring,
3127 le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK,
3128 num_trbs, mem_flags);
3132 urb_priv = urb->hcpriv;
3133 td = urb_priv->td[td_index];
3135 INIT_LIST_HEAD(&td->td_list);
3136 INIT_LIST_HEAD(&td->cancelled_td_list);
3138 if (td_index == 0) {
3139 ret = usb_hcd_link_urb_to_ep(bus_to_hcd(urb->dev->bus), urb);
3145 /* Add this TD to the tail of the endpoint ring's TD list */
3146 list_add_tail(&td->td_list, &ep_ring->td_list);
3147 td->start_seg = ep_ring->enq_seg;
3148 td->first_trb = ep_ring->enqueue;
3150 urb_priv->td[td_index] = td;
3155 static unsigned int count_sg_trbs_needed(struct xhci_hcd *xhci, struct urb *urb)
3157 int num_sgs, num_trbs, running_total, temp, i;
3158 struct scatterlist *sg;
3161 num_sgs = urb->num_mapped_sgs;
3162 temp = urb->transfer_buffer_length;
3165 for_each_sg(urb->sg, sg, num_sgs, i) {
3166 unsigned int len = sg_dma_len(sg);
3168 /* Scatter gather list entries may cross 64KB boundaries */
3169 running_total = TRB_MAX_BUFF_SIZE -
3170 (sg_dma_address(sg) & (TRB_MAX_BUFF_SIZE - 1));
3171 running_total &= TRB_MAX_BUFF_SIZE - 1;
3172 if (running_total != 0)
3175 /* How many more 64KB chunks to transfer, how many more TRBs? */
3176 while (running_total < sg_dma_len(sg) && running_total < temp) {
3178 running_total += TRB_MAX_BUFF_SIZE;
3180 len = min_t(int, len, temp);
3188 static void check_trb_math(struct urb *urb, int num_trbs, int running_total)
3191 dev_err(&urb->dev->dev, "%s - ep %#x - Miscalculated number of "
3192 "TRBs, %d left\n", __func__,
3193 urb->ep->desc.bEndpointAddress, num_trbs);
3194 if (running_total != urb->transfer_buffer_length)
3195 dev_err(&urb->dev->dev, "%s - ep %#x - Miscalculated tx length, "
3196 "queued %#x (%d), asked for %#x (%d)\n",
3198 urb->ep->desc.bEndpointAddress,
3199 running_total, running_total,
3200 urb->transfer_buffer_length,
3201 urb->transfer_buffer_length);
3204 static void giveback_first_trb(struct xhci_hcd *xhci, int slot_id,
3205 unsigned int ep_index, unsigned int stream_id, int start_cycle,
3206 struct xhci_generic_trb *start_trb)
3209 * Pass all the TRBs to the hardware at once and make sure this write
3214 start_trb->field[3] |= cpu_to_le32(start_cycle);
3216 start_trb->field[3] &= cpu_to_le32(~TRB_CYCLE);
3217 xhci_ring_ep_doorbell(xhci, slot_id, ep_index, stream_id);
3221 * xHCI uses normal TRBs for both bulk and interrupt. When the interrupt
3222 * endpoint is to be serviced, the xHC will consume (at most) one TD. A TD
3223 * (comprised of sg list entries) can take several service intervals to
3226 int xhci_queue_intr_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3227 struct urb *urb, int slot_id, unsigned int ep_index)
3229 struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci,
3230 xhci->devs[slot_id]->out_ctx, ep_index);
3234 xhci_interval = EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx->ep_info));
3235 ep_interval = urb->interval;
3236 /* Convert to microframes */
3237 if (urb->dev->speed == USB_SPEED_LOW ||
3238 urb->dev->speed == USB_SPEED_FULL)
3240 /* FIXME change this to a warning and a suggestion to use the new API
3241 * to set the polling interval (once the API is added).
3243 if (xhci_interval != ep_interval) {
3244 if (printk_ratelimit())
3245 dev_dbg(&urb->dev->dev, "Driver uses different interval"
3246 " (%d microframe%s) than xHCI "
3247 "(%d microframe%s)\n",
3249 ep_interval == 1 ? "" : "s",
3251 xhci_interval == 1 ? "" : "s");
3252 urb->interval = xhci_interval;
3253 /* Convert back to frames for LS/FS devices */
3254 if (urb->dev->speed == USB_SPEED_LOW ||
3255 urb->dev->speed == USB_SPEED_FULL)
3258 return xhci_queue_bulk_tx(xhci, mem_flags, urb, slot_id, ep_index);
3262 * The TD size is the number of bytes remaining in the TD (including this TRB),
3263 * right shifted by 10.
3264 * It must fit in bits 21:17, so it can't be bigger than 31.
3266 static u32 xhci_td_remainder(unsigned int remainder)
3268 u32 max = (1 << (21 - 17 + 1)) - 1;
3270 if ((remainder >> 10) >= max)
3273 return (remainder >> 10) << 17;
3277 * For xHCI 1.0 host controllers, TD size is the number of max packet sized
3278 * packets remaining in the TD (*not* including this TRB).
3280 * Total TD packet count = total_packet_count =
3281 * DIV_ROUND_UP(TD size in bytes / wMaxPacketSize)
3283 * Packets transferred up to and including this TRB = packets_transferred =
3284 * rounddown(total bytes transferred including this TRB / wMaxPacketSize)
3286 * TD size = total_packet_count - packets_transferred
3288 * It must fit in bits 21:17, so it can't be bigger than 31.
3289 * The last TRB in a TD must have the TD size set to zero.
3291 static u32 xhci_v1_0_td_remainder(int running_total, int trb_buff_len,
3292 unsigned int total_packet_count, struct urb *urb,
3293 unsigned int num_trbs_left)
3295 int packets_transferred;
3297 /* One TRB with a zero-length data packet. */
3298 if (num_trbs_left == 0 || (running_total == 0 && trb_buff_len == 0))
3301 /* All the TRB queueing functions don't count the current TRB in
3304 packets_transferred = (running_total + trb_buff_len) /
3305 GET_MAX_PACKET(usb_endpoint_maxp(&urb->ep->desc));
3307 if ((total_packet_count - packets_transferred) > 31)
3309 return (total_packet_count - packets_transferred) << 17;
3312 static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3313 struct urb *urb, int slot_id, unsigned int ep_index)
3315 struct xhci_ring *ep_ring;
3316 unsigned int num_trbs;
3317 struct urb_priv *urb_priv;
3319 struct scatterlist *sg;
3321 int trb_buff_len, this_sg_len, running_total, ret;
3322 unsigned int total_packet_count;
3323 bool zero_length_needed;
3327 bool more_trbs_coming;
3329 struct xhci_generic_trb *start_trb;
3332 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
3336 num_trbs = count_sg_trbs_needed(xhci, urb);
3337 num_sgs = urb->num_mapped_sgs;
3338 total_packet_count = DIV_ROUND_UP(urb->transfer_buffer_length,
3339 usb_endpoint_maxp(&urb->ep->desc));
3341 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3342 ep_index, urb->stream_id,
3343 num_trbs, urb, 0, mem_flags);
3347 urb_priv = urb->hcpriv;
3349 /* Deal with URB_ZERO_PACKET - need one more td/trb */
3350 zero_length_needed = urb->transfer_flags & URB_ZERO_PACKET &&
3351 urb_priv->length == 2;
3352 if (zero_length_needed) {
3354 xhci_dbg(xhci, "Creating zero length td.\n");
3355 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3356 ep_index, urb->stream_id,
3357 1, urb, 1, mem_flags);
3362 td = urb_priv->td[0];
3365 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3366 * until we've finished creating all the other TRBs. The ring's cycle
3367 * state may change as we enqueue the other TRBs, so save it too.
3369 start_trb = &ep_ring->enqueue->generic;
3370 start_cycle = ep_ring->cycle_state;
3374 * How much data is in the first TRB?
3376 * There are three forces at work for TRB buffer pointers and lengths:
3377 * 1. We don't want to walk off the end of this sg-list entry buffer.
3378 * 2. The transfer length that the driver requested may be smaller than
3379 * the amount of memory allocated for this scatter-gather list.
3380 * 3. TRBs buffers can't cross 64KB boundaries.
3383 addr = (u64) sg_dma_address(sg);
3384 this_sg_len = sg_dma_len(sg);
3385 trb_buff_len = TRB_MAX_BUFF_SIZE - (addr & (TRB_MAX_BUFF_SIZE - 1));
3386 trb_buff_len = min_t(int, trb_buff_len, this_sg_len);
3387 if (trb_buff_len > urb->transfer_buffer_length)
3388 trb_buff_len = urb->transfer_buffer_length;
3391 last_trb_num = zero_length_needed ? 2 : 1;
3392 /* Queue the first TRB, even if it's zero-length */
3395 u32 length_field = 0;
3398 /* Don't change the cycle bit of the first TRB until later */
3401 if (start_cycle == 0)
3404 field |= ep_ring->cycle_state;
3406 /* Chain all the TRBs together; clear the chain bit in the last
3407 * TRB to indicate it's the last TRB in the chain.
3409 if (num_trbs > last_trb_num) {
3411 } else if (num_trbs == last_trb_num) {
3412 td->last_trb = ep_ring->enqueue;
3414 } else if (zero_length_needed && num_trbs == 1) {
3416 urb_priv->td[1]->last_trb = ep_ring->enqueue;
3420 /* Only set interrupt on short packet for IN endpoints */
3421 if (usb_urb_dir_in(urb))
3424 if (TRB_MAX_BUFF_SIZE -
3425 (addr & (TRB_MAX_BUFF_SIZE - 1)) < trb_buff_len) {
3426 xhci_warn(xhci, "WARN: sg dma xfer crosses 64KB boundaries!\n");
3427 xhci_dbg(xhci, "Next boundary at %#x, end dma = %#x\n",
3428 (unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1),
3429 (unsigned int) addr + trb_buff_len);
3432 /* Set the TRB length, TD size, and interrupter fields. */
3433 if (xhci->hci_version < 0x100) {
3434 remainder = xhci_td_remainder(
3435 urb->transfer_buffer_length -
3438 remainder = xhci_v1_0_td_remainder(running_total,
3439 trb_buff_len, total_packet_count, urb,
3442 length_field = TRB_LEN(trb_buff_len) |
3447 more_trbs_coming = true;
3449 more_trbs_coming = false;
3450 queue_trb(xhci, ep_ring, more_trbs_coming,
3451 lower_32_bits(addr),
3452 upper_32_bits(addr),
3454 field | TRB_TYPE(TRB_NORMAL));
3456 running_total += trb_buff_len;
3458 /* Calculate length for next transfer --
3459 * Are we done queueing all the TRBs for this sg entry?
3461 this_sg_len -= trb_buff_len;
3462 if (this_sg_len == 0) {
3467 addr = (u64) sg_dma_address(sg);
3468 this_sg_len = sg_dma_len(sg);
3470 addr += trb_buff_len;
3473 trb_buff_len = TRB_MAX_BUFF_SIZE -
3474 (addr & (TRB_MAX_BUFF_SIZE - 1));
3475 trb_buff_len = min_t(int, trb_buff_len, this_sg_len);
3476 if (running_total + trb_buff_len > urb->transfer_buffer_length)
3478 urb->transfer_buffer_length - running_total;
3479 } while (num_trbs > 0);
3481 check_trb_math(urb, num_trbs, running_total);
3482 giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
3483 start_cycle, start_trb);
3487 /* This is very similar to what ehci-q.c qtd_fill() does */
3488 int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3489 struct urb *urb, int slot_id, unsigned int ep_index)
3491 struct xhci_ring *ep_ring;
3492 struct urb_priv *urb_priv;
3495 struct xhci_generic_trb *start_trb;
3498 bool more_trbs_coming;
3499 bool zero_length_needed;
3501 u32 field, length_field;
3503 int running_total, trb_buff_len, ret;
3504 unsigned int total_packet_count;
3508 return queue_bulk_sg_tx(xhci, mem_flags, urb, slot_id, ep_index);
3510 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
3515 /* How much data is (potentially) left before the 64KB boundary? */
3516 running_total = TRB_MAX_BUFF_SIZE -
3517 (urb->transfer_dma & (TRB_MAX_BUFF_SIZE - 1));
3518 running_total &= TRB_MAX_BUFF_SIZE - 1;
3520 /* If there's some data on this 64KB chunk, or we have to send a
3521 * zero-length transfer, we need at least one TRB
3523 if (running_total != 0 || urb->transfer_buffer_length == 0)
3525 /* How many more 64KB chunks to transfer, how many more TRBs? */
3526 while (running_total < urb->transfer_buffer_length) {
3528 running_total += TRB_MAX_BUFF_SIZE;
3531 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3532 ep_index, urb->stream_id,
3533 num_trbs, urb, 0, mem_flags);
3537 urb_priv = urb->hcpriv;
3539 /* Deal with URB_ZERO_PACKET - need one more td/trb */
3540 zero_length_needed = urb->transfer_flags & URB_ZERO_PACKET &&
3541 urb_priv->length == 2;
3542 if (zero_length_needed) {
3544 xhci_dbg(xhci, "Creating zero length td.\n");
3545 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3546 ep_index, urb->stream_id,
3547 1, urb, 1, mem_flags);
3552 td = urb_priv->td[0];
3555 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3556 * until we've finished creating all the other TRBs. The ring's cycle
3557 * state may change as we enqueue the other TRBs, so save it too.
3559 start_trb = &ep_ring->enqueue->generic;
3560 start_cycle = ep_ring->cycle_state;
3563 total_packet_count = DIV_ROUND_UP(urb->transfer_buffer_length,
3564 usb_endpoint_maxp(&urb->ep->desc));
3565 /* How much data is in the first TRB? */
3566 addr = (u64) urb->transfer_dma;
3567 trb_buff_len = TRB_MAX_BUFF_SIZE -
3568 (urb->transfer_dma & (TRB_MAX_BUFF_SIZE - 1));
3569 if (trb_buff_len > urb->transfer_buffer_length)
3570 trb_buff_len = urb->transfer_buffer_length;
3573 last_trb_num = zero_length_needed ? 2 : 1;
3574 /* Queue the first TRB, even if it's zero-length */
3579 /* Don't change the cycle bit of the first TRB until later */
3582 if (start_cycle == 0)
3585 field |= ep_ring->cycle_state;
3587 /* Chain all the TRBs together; clear the chain bit in the last
3588 * TRB to indicate it's the last TRB in the chain.
3590 if (num_trbs > last_trb_num) {
3592 } else if (num_trbs == last_trb_num) {
3593 td->last_trb = ep_ring->enqueue;
3595 } else if (zero_length_needed && num_trbs == 1) {
3597 urb_priv->td[1]->last_trb = ep_ring->enqueue;
3601 /* Only set interrupt on short packet for IN endpoints */
3602 if (usb_urb_dir_in(urb))
3605 /* Set the TRB length, TD size, and interrupter fields. */
3606 if (xhci->hci_version < 0x100) {
3607 remainder = xhci_td_remainder(
3608 urb->transfer_buffer_length -
3611 remainder = xhci_v1_0_td_remainder(running_total,
3612 trb_buff_len, total_packet_count, urb,
3615 length_field = TRB_LEN(trb_buff_len) |
3620 more_trbs_coming = true;
3622 more_trbs_coming = false;
3623 queue_trb(xhci, ep_ring, more_trbs_coming,
3624 lower_32_bits(addr),
3625 upper_32_bits(addr),
3627 field | TRB_TYPE(TRB_NORMAL));
3629 running_total += trb_buff_len;
3631 /* Calculate length for next transfer */
3632 addr += trb_buff_len;
3633 trb_buff_len = urb->transfer_buffer_length - running_total;
3634 if (trb_buff_len > TRB_MAX_BUFF_SIZE)
3635 trb_buff_len = TRB_MAX_BUFF_SIZE;
3636 } while (num_trbs > 0);
3638 check_trb_math(urb, num_trbs, running_total);
3639 giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
3640 start_cycle, start_trb);
3644 /* Caller must have locked xhci->lock */
3645 int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3646 struct urb *urb, int slot_id, unsigned int ep_index)
3648 struct xhci_ring *ep_ring;
3651 struct usb_ctrlrequest *setup;
3652 struct xhci_generic_trb *start_trb;
3654 u32 field, length_field;
3655 struct urb_priv *urb_priv;
3658 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
3663 * Need to copy setup packet into setup TRB, so we can't use the setup
3666 if (!urb->setup_packet)
3669 /* 1 TRB for setup, 1 for status */
3672 * Don't need to check if we need additional event data and normal TRBs,
3673 * since data in control transfers will never get bigger than 16MB
3674 * XXX: can we get a buffer that crosses 64KB boundaries?
3676 if (urb->transfer_buffer_length > 0)
3678 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3679 ep_index, urb->stream_id,
3680 num_trbs, urb, 0, mem_flags);
3684 urb_priv = urb->hcpriv;
3685 td = urb_priv->td[0];
3688 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3689 * until we've finished creating all the other TRBs. The ring's cycle
3690 * state may change as we enqueue the other TRBs, so save it too.
3692 start_trb = &ep_ring->enqueue->generic;
3693 start_cycle = ep_ring->cycle_state;
3695 /* Queue setup TRB - see section 6.4.1.2.1 */
3696 /* FIXME better way to translate setup_packet into two u32 fields? */
3697 setup = (struct usb_ctrlrequest *) urb->setup_packet;
3699 field |= TRB_IDT | TRB_TYPE(TRB_SETUP);
3700 if (start_cycle == 0)
3703 /* xHCI 1.0/1.1 6.4.1.2.1: Transfer Type field */
3704 if (xhci->hci_version >= 0x100) {
3705 if (urb->transfer_buffer_length > 0) {
3706 if (setup->bRequestType & USB_DIR_IN)
3707 field |= TRB_TX_TYPE(TRB_DATA_IN);
3709 field |= TRB_TX_TYPE(TRB_DATA_OUT);
3713 queue_trb(xhci, ep_ring, true,
3714 setup->bRequestType | setup->bRequest << 8 | le16_to_cpu(setup->wValue) << 16,
3715 le16_to_cpu(setup->wIndex) | le16_to_cpu(setup->wLength) << 16,
3716 TRB_LEN(8) | TRB_INTR_TARGET(0),
3717 /* Immediate data in pointer */
3720 /* If there's data, queue data TRBs */
3721 /* Only set interrupt on short packet for IN endpoints */
3722 if (usb_urb_dir_in(urb))
3723 field = TRB_ISP | TRB_TYPE(TRB_DATA);
3725 field = TRB_TYPE(TRB_DATA);
3727 length_field = TRB_LEN(urb->transfer_buffer_length) |
3728 xhci_td_remainder(urb->transfer_buffer_length) |
3730 if (urb->transfer_buffer_length > 0) {
3731 if (setup->bRequestType & USB_DIR_IN)
3732 field |= TRB_DIR_IN;
3733 queue_trb(xhci, ep_ring, true,
3734 lower_32_bits(urb->transfer_dma),
3735 upper_32_bits(urb->transfer_dma),
3737 field | ep_ring->cycle_state);
3740 /* Save the DMA address of the last TRB in the TD */
3741 td->last_trb = ep_ring->enqueue;
3743 /* Queue status TRB - see Table 7 and sections 4.11.2.2 and 6.4.1.2.3 */
3744 /* If the device sent data, the status stage is an OUT transfer */
3745 if (urb->transfer_buffer_length > 0 && setup->bRequestType & USB_DIR_IN)
3749 queue_trb(xhci, ep_ring, false,
3753 /* Event on completion */
3754 field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state);
3756 giveback_first_trb(xhci, slot_id, ep_index, 0,
3757 start_cycle, start_trb);
3761 static int count_isoc_trbs_needed(struct xhci_hcd *xhci,
3762 struct urb *urb, int i)
3767 addr = (u64) (urb->transfer_dma + urb->iso_frame_desc[i].offset);
3768 td_len = urb->iso_frame_desc[i].length;
3770 num_trbs = DIV_ROUND_UP(td_len + (addr & (TRB_MAX_BUFF_SIZE - 1)),
3779 * The transfer burst count field of the isochronous TRB defines the number of
3780 * bursts that are required to move all packets in this TD. Only SuperSpeed
3781 * devices can burst up to bMaxBurst number of packets per service interval.
3782 * This field is zero based, meaning a value of zero in the field means one
3783 * burst. Basically, for everything but SuperSpeed devices, this field will be
3784 * zero. Only xHCI 1.0 host controllers support this field.
3786 static unsigned int xhci_get_burst_count(struct xhci_hcd *xhci,
3787 struct usb_device *udev,
3788 struct urb *urb, unsigned int total_packet_count)
3790 unsigned int max_burst;
3792 if (xhci->hci_version < 0x100 || udev->speed != USB_SPEED_SUPER)
3795 max_burst = urb->ep->ss_ep_comp.bMaxBurst;
3796 return DIV_ROUND_UP(total_packet_count, max_burst + 1) - 1;
3800 * Returns the number of packets in the last "burst" of packets. This field is
3801 * valid for all speeds of devices. USB 2.0 devices can only do one "burst", so
3802 * the last burst packet count is equal to the total number of packets in the
3803 * TD. SuperSpeed endpoints can have up to 3 bursts. All but the last burst
3804 * must contain (bMaxBurst + 1) number of packets, but the last burst can
3805 * contain 1 to (bMaxBurst + 1) packets.
3807 static unsigned int xhci_get_last_burst_packet_count(struct xhci_hcd *xhci,
3808 struct usb_device *udev,
3809 struct urb *urb, unsigned int total_packet_count)
3811 unsigned int max_burst;
3812 unsigned int residue;
3814 if (xhci->hci_version < 0x100)
3817 switch (udev->speed) {
3818 case USB_SPEED_SUPER:
3819 /* bMaxBurst is zero based: 0 means 1 packet per burst */
3820 max_burst = urb->ep->ss_ep_comp.bMaxBurst;
3821 residue = total_packet_count % (max_burst + 1);
3822 /* If residue is zero, the last burst contains (max_burst + 1)
3823 * number of packets, but the TLBPC field is zero-based.
3829 if (total_packet_count == 0)
3831 return total_packet_count - 1;
3835 /* This is for isoc transfer */
3836 static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3837 struct urb *urb, int slot_id, unsigned int ep_index)
3839 struct xhci_ring *ep_ring;
3840 struct urb_priv *urb_priv;
3842 int num_tds, trbs_per_td;
3843 struct xhci_generic_trb *start_trb;
3846 u32 field, length_field;
3847 int running_total, trb_buff_len, td_len, td_remain_len, ret;
3848 u64 start_addr, addr;
3850 bool more_trbs_coming;
3852 ep_ring = xhci->devs[slot_id]->eps[ep_index].ring;
3854 num_tds = urb->number_of_packets;
3856 xhci_dbg(xhci, "Isoc URB with zero packets?\n");
3860 start_addr = (u64) urb->transfer_dma;
3861 start_trb = &ep_ring->enqueue->generic;
3862 start_cycle = ep_ring->cycle_state;
3864 urb_priv = urb->hcpriv;
3865 /* Queue the first TRB, even if it's zero-length */
3866 for (i = 0; i < num_tds; i++) {
3867 unsigned int total_packet_count;
3868 unsigned int burst_count;
3869 unsigned int residue;
3873 addr = start_addr + urb->iso_frame_desc[i].offset;
3874 td_len = urb->iso_frame_desc[i].length;
3875 td_remain_len = td_len;
3876 total_packet_count = DIV_ROUND_UP(td_len,
3878 usb_endpoint_maxp(&urb->ep->desc)));
3879 /* A zero-length transfer still involves at least one packet. */
3880 if (total_packet_count == 0)
3881 total_packet_count++;
3882 burst_count = xhci_get_burst_count(xhci, urb->dev, urb,
3883 total_packet_count);
3884 residue = xhci_get_last_burst_packet_count(xhci,
3885 urb->dev, urb, total_packet_count);
3887 trbs_per_td = count_isoc_trbs_needed(xhci, urb, i);
3889 ret = prepare_transfer(xhci, xhci->devs[slot_id], ep_index,
3890 urb->stream_id, trbs_per_td, urb, i, mem_flags);
3897 td = urb_priv->td[i];
3898 for (j = 0; j < trbs_per_td; j++) {
3903 field = TRB_TBC(burst_count) |
3905 /* Queue the isoc TRB */
3906 field |= TRB_TYPE(TRB_ISOC);
3907 /* Assume URB_ISO_ASAP is set */
3910 if (start_cycle == 0)
3913 field |= ep_ring->cycle_state;
3916 /* Queue other normal TRBs */
3917 field |= TRB_TYPE(TRB_NORMAL);
3918 field |= ep_ring->cycle_state;
3921 /* Only set interrupt on short packet for IN EPs */
3922 if (usb_urb_dir_in(urb))
3925 /* Chain all the TRBs together; clear the chain bit in
3926 * the last TRB to indicate it's the last TRB in the
3929 if (j < trbs_per_td - 1) {
3931 more_trbs_coming = true;
3933 td->last_trb = ep_ring->enqueue;
3935 if (xhci->hci_version == 0x100 &&
3938 /* Set BEI bit except for the last td */
3939 if (i < num_tds - 1)
3942 more_trbs_coming = false;
3945 /* Calculate TRB length */
3946 trb_buff_len = TRB_MAX_BUFF_SIZE -
3947 (addr & ((1 << TRB_MAX_BUFF_SHIFT) - 1));
3948 if (trb_buff_len > td_remain_len)
3949 trb_buff_len = td_remain_len;
3951 /* Set the TRB length, TD size, & interrupter fields. */
3952 if (xhci->hci_version < 0x100) {
3953 remainder = xhci_td_remainder(
3954 td_len - running_total);
3956 remainder = xhci_v1_0_td_remainder(
3957 running_total, trb_buff_len,
3958 total_packet_count, urb,
3959 (trbs_per_td - j - 1));
3961 length_field = TRB_LEN(trb_buff_len) |
3965 queue_trb(xhci, ep_ring, more_trbs_coming,
3966 lower_32_bits(addr),
3967 upper_32_bits(addr),
3970 running_total += trb_buff_len;
3972 addr += trb_buff_len;
3973 td_remain_len -= trb_buff_len;
3976 /* Check TD length */
3977 if (running_total != td_len) {
3978 xhci_err(xhci, "ISOC TD length unmatch\n");
3984 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
3985 if (xhci->quirks & XHCI_AMD_PLL_FIX)
3986 usb_amd_quirk_pll_disable();
3988 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs++;
3990 giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
3991 start_cycle, start_trb);
3994 /* Clean up a partially enqueued isoc transfer. */
3996 for (i--; i >= 0; i--)
3997 list_del_init(&urb_priv->td[i]->td_list);
3999 /* Use the first TD as a temporary variable to turn the TDs we've queued
4000 * into No-ops with a software-owned cycle bit. That way the hardware
4001 * won't accidentally start executing bogus TDs when we partially
4002 * overwrite them. td->first_trb and td->start_seg are already set.
4004 urb_priv->td[0]->last_trb = ep_ring->enqueue;
4005 /* Every TRB except the first & last will have its cycle bit flipped. */
4006 td_to_noop(xhci, ep_ring, urb_priv->td[0], true);
4008 /* Reset the ring enqueue back to the first TRB and its cycle bit. */
4009 ep_ring->enqueue = urb_priv->td[0]->first_trb;
4010 ep_ring->enq_seg = urb_priv->td[0]->start_seg;
4011 ep_ring->cycle_state = start_cycle;
4012 ep_ring->num_trbs_free = ep_ring->num_trbs_free_temp;
4013 usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
4018 * Check transfer ring to guarantee there is enough room for the urb.
4019 * Update ISO URB start_frame and interval.
4020 * Update interval as xhci_queue_intr_tx does. Just use xhci frame_index to
4021 * update the urb->start_frame by now.
4022 * Always assume URB_ISO_ASAP set, and NEVER use urb->start_frame as input.
4024 int xhci_queue_isoc_tx_prepare(struct xhci_hcd *xhci, gfp_t mem_flags,
4025 struct urb *urb, int slot_id, unsigned int ep_index)
4027 struct xhci_virt_device *xdev;
4028 struct xhci_ring *ep_ring;
4029 struct xhci_ep_ctx *ep_ctx;
4033 int num_tds, num_trbs, i;
4036 xdev = xhci->devs[slot_id];
4037 ep_ring = xdev->eps[ep_index].ring;
4038 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
4041 num_tds = urb->number_of_packets;
4042 for (i = 0; i < num_tds; i++)
4043 num_trbs += count_isoc_trbs_needed(xhci, urb, i);
4045 /* Check the ring to guarantee there is enough room for the whole urb.
4046 * Do not insert any td of the urb to the ring if the check failed.
4048 ret = prepare_ring(xhci, ep_ring, le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK,
4049 num_trbs, mem_flags);
4053 start_frame = xhci_readl(xhci, &xhci->run_regs->microframe_index);
4054 start_frame &= 0x3fff;
4056 urb->start_frame = start_frame;
4057 if (urb->dev->speed == USB_SPEED_LOW ||
4058 urb->dev->speed == USB_SPEED_FULL)
4059 urb->start_frame >>= 3;
4061 xhci_interval = EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx->ep_info));
4062 ep_interval = urb->interval;
4063 /* Convert to microframes */
4064 if (urb->dev->speed == USB_SPEED_LOW ||
4065 urb->dev->speed == USB_SPEED_FULL)
4067 /* FIXME change this to a warning and a suggestion to use the new API
4068 * to set the polling interval (once the API is added).
4070 if (xhci_interval != ep_interval) {
4071 if (printk_ratelimit())
4072 dev_dbg(&urb->dev->dev, "Driver uses different interval"
4073 " (%d microframe%s) than xHCI "
4074 "(%d microframe%s)\n",
4076 ep_interval == 1 ? "" : "s",
4078 xhci_interval == 1 ? "" : "s");
4079 urb->interval = xhci_interval;
4080 /* Convert back to frames for LS/FS devices */
4081 if (urb->dev->speed == USB_SPEED_LOW ||
4082 urb->dev->speed == USB_SPEED_FULL)
4085 ep_ring->num_trbs_free_temp = ep_ring->num_trbs_free;
4087 return xhci_queue_isoc_tx(xhci, mem_flags, urb, slot_id, ep_index);
4090 /**** Command Ring Operations ****/
4092 /* Generic function for queueing a command TRB on the command ring.
4093 * Check to make sure there's room on the command ring for one command TRB.
4094 * Also check that there's room reserved for commands that must not fail.
4095 * If this is a command that must not fail, meaning command_must_succeed = TRUE,
4096 * then only check for the number of reserved spots.
4097 * Don't decrement xhci->cmd_ring_reserved_trbs after we've queued the TRB
4098 * because the command event handler may want to resubmit a failed command.
4100 static int queue_command(struct xhci_hcd *xhci, u32 field1, u32 field2,
4101 u32 field3, u32 field4, bool command_must_succeed)
4103 int reserved_trbs = xhci->cmd_ring_reserved_trbs;
4106 if (!command_must_succeed)
4109 ret = prepare_ring(xhci, xhci->cmd_ring, EP_STATE_RUNNING,
4110 reserved_trbs, GFP_ATOMIC);
4112 xhci_err(xhci, "ERR: No room for command on command ring\n");
4113 if (command_must_succeed)
4114 xhci_err(xhci, "ERR: Reserved TRB counting for "
4115 "unfailable commands failed.\n");
4118 queue_trb(xhci, xhci->cmd_ring, false, field1, field2, field3,
4119 field4 | xhci->cmd_ring->cycle_state);
4123 /* Queue a slot enable or disable request on the command ring */
4124 int xhci_queue_slot_control(struct xhci_hcd *xhci, u32 trb_type, u32 slot_id)
4126 return queue_command(xhci, 0, 0, 0,
4127 TRB_TYPE(trb_type) | SLOT_ID_FOR_TRB(slot_id), false);
4130 /* Queue an address device command TRB */
4131 int xhci_queue_address_device(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr,
4134 return queue_command(xhci, lower_32_bits(in_ctx_ptr),
4135 upper_32_bits(in_ctx_ptr), 0,
4136 TRB_TYPE(TRB_ADDR_DEV) | SLOT_ID_FOR_TRB(slot_id),
4140 int xhci_queue_vendor_command(struct xhci_hcd *xhci,
4141 u32 field1, u32 field2, u32 field3, u32 field4)
4143 return queue_command(xhci, field1, field2, field3, field4, false);
4146 /* Queue a reset device command TRB */
4147 int xhci_queue_reset_device(struct xhci_hcd *xhci, u32 slot_id)
4149 return queue_command(xhci, 0, 0, 0,
4150 TRB_TYPE(TRB_RESET_DEV) | SLOT_ID_FOR_TRB(slot_id),
4154 /* Queue a configure endpoint command TRB */
4155 int xhci_queue_configure_endpoint(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr,
4156 u32 slot_id, bool command_must_succeed)
4158 return queue_command(xhci, lower_32_bits(in_ctx_ptr),
4159 upper_32_bits(in_ctx_ptr), 0,
4160 TRB_TYPE(TRB_CONFIG_EP) | SLOT_ID_FOR_TRB(slot_id),
4161 command_must_succeed);
4164 /* Queue an evaluate context command TRB */
4165 int xhci_queue_evaluate_context(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr,
4166 u32 slot_id, bool command_must_succeed)
4168 return queue_command(xhci, lower_32_bits(in_ctx_ptr),
4169 upper_32_bits(in_ctx_ptr), 0,
4170 TRB_TYPE(TRB_EVAL_CONTEXT) | SLOT_ID_FOR_TRB(slot_id),
4171 command_must_succeed);
4175 * Suspend is set to indicate "Stop Endpoint Command" is being issued to stop
4176 * activity on an endpoint that is about to be suspended.
4178 int xhci_queue_stop_endpoint(struct xhci_hcd *xhci, int slot_id,
4179 unsigned int ep_index, int suspend)
4181 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
4182 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
4183 u32 type = TRB_TYPE(TRB_STOP_RING);
4184 u32 trb_suspend = SUSPEND_PORT_FOR_TRB(suspend);
4186 return queue_command(xhci, 0, 0, 0,
4187 trb_slot_id | trb_ep_index | type | trb_suspend, false);
4190 /* Set Transfer Ring Dequeue Pointer command.
4191 * This should not be used for endpoints that have streams enabled.
4193 static int queue_set_tr_deq(struct xhci_hcd *xhci, int slot_id,
4194 unsigned int ep_index, unsigned int stream_id,
4195 struct xhci_segment *deq_seg,
4196 union xhci_trb *deq_ptr, u32 cycle_state)
4199 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
4200 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
4201 u32 trb_stream_id = STREAM_ID_FOR_TRB(stream_id);
4202 u32 type = TRB_TYPE(TRB_SET_DEQ);
4203 struct xhci_virt_ep *ep;
4205 addr = xhci_trb_virt_to_dma(deq_seg, deq_ptr);
4207 xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n");
4208 xhci_warn(xhci, "WARN deq seg = %p, deq pt = %p\n",
4212 ep = &xhci->devs[slot_id]->eps[ep_index];
4213 if ((ep->ep_state & SET_DEQ_PENDING)) {
4214 xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n");
4215 xhci_warn(xhci, "A Set TR Deq Ptr command is pending.\n");
4218 ep->queued_deq_seg = deq_seg;
4219 ep->queued_deq_ptr = deq_ptr;
4220 return queue_command(xhci, lower_32_bits(addr) | cycle_state,
4221 upper_32_bits(addr), trb_stream_id,
4222 trb_slot_id | trb_ep_index | type, false);
4225 int xhci_queue_reset_ep(struct xhci_hcd *xhci, int slot_id,
4226 unsigned int ep_index)
4228 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
4229 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
4230 u32 type = TRB_TYPE(TRB_RESET_EP);
4232 return queue_command(xhci, 0, 0, 0, trb_slot_id | trb_ep_index | type,
4236 int xhci_queue_soft_retry(struct xhci_hcd *xhci, int slot_id,
4237 unsigned int ep_index)
4239 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
4240 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
4241 u32 type = TRB_TYPE(TRB_RESET_EP) | TRB_TSP;
4243 return queue_command(xhci, 0, 0, 0, trb_slot_id | trb_ep_index | type,