2 * drivers/media/platform/tegra/camera/mc_common.h
4 * Tegra Media controller common APIs
6 * Copyright (c) 2012-2016, NVIDIA CORPORATION. All rights reserved.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
21 #ifndef __MC_COMMON_H__
22 #define __MC_COMMON_H__
24 #include <media/media-device.h>
25 #include <media/media-entity.h>
26 #include <media/v4l2-async.h>
27 #include <media/v4l2-ctrls.h>
28 #include <media/v4l2-device.h>
29 #include <media/v4l2-dev.h>
30 #include <media/videobuf2-core.h>
32 #include "camera/core.h"
35 #define MAX_FORMAT_NUM 64
36 #define MAX_SUBDEVICES 4
37 #define QUEUED_BUFFERS 4
41 enum channel_capture_state {
48 * struct tegra_channel_buffer - video channel buffer
49 * @buf: vb2 buffer base object
50 * @queue: buffer list entry in the channel queued buffers list
51 * @chan: channel that uses the buffer
52 * @addr: Tegra IOVA buffer address for VI output
54 struct tegra_channel_buffer {
55 struct vb2_buffer buf;
56 struct list_head queue;
57 struct tegra_channel *chan;
62 #define to_tegra_channel_buffer(vb) \
63 container_of(vb, struct tegra_channel_buffer, buf)
66 * struct tegra_vi_graph_entity - Entity in the video graph
67 * @list: list entry in a graph entities list
68 * @node: the entity's DT node
69 * @entity: media entity, from the corresponding V4L2 subdev
70 * @asd: subdev asynchronous registration information
71 * @subdev: V4L2 subdev
73 struct tegra_vi_graph_entity {
74 struct list_head list;
75 struct device_node *node;
76 struct media_entity *entity;
78 struct v4l2_async_subdev asd;
79 struct v4l2_subdev *subdev;
83 * struct tegra_channel - Tegra video channel
84 * @list: list entry in a composite device dmas list
85 * @video: V4L2 video device associated with the video channel
87 * @pad: media pad for the video device entity
88 * @pipe: pipeline belonging to the channel
90 * @vi: composite device DT node port number for the channel
92 * @kthread_capture: kernel thread task structure of this video channel
93 * @wait: wait queue structure for kernel thread
95 * @format: active V4L2 pixel format
96 * @fmtinfo: format information corresponding to the active @format
98 * @queue: vb2 buffers queue
99 * @alloc_ctx: allocation context for the vb2 @queue
100 * @sequence: V4L2 buffers sequence number
102 * @capture: list of queued buffers for capture
103 * @queued_lock: protects the buf_queued list
105 * @csi: CSI register bases
106 * @stride_align: channel buffer stride alignment, default is 64
107 * @width_align: image width alignment, default is 4
108 * @port: CSI port of this video channel
109 * @io_id: Tegra IO rail ID of this video channel
111 * @fmts_bitmap: a bitmap for formats supported
112 * @bypass: bypass flag for VI bypass mode
114 struct tegra_channel {
115 struct list_head list;
116 struct video_device video;
117 struct media_pad pad;
118 struct media_pipeline pipe;
119 struct mutex video_lock;
121 struct tegra_mc_vi *vi;
122 struct v4l2_subdev *subdev[MAX_SUBDEVICES];
123 struct v4l2_subdev *subdev_on_csi;
125 struct v4l2_ctrl_handler ctrl_handler;
126 struct v4l2_pix_format format;
127 const struct tegra_video_format *fmtinfo;
128 struct mutex stop_kthread_lock;
130 unsigned char port[TEGRA_CSI_BLOCKS];
131 unsigned int syncpt[TEGRA_CSI_BLOCKS];
132 unsigned int syncpoint_fifo[TEGRA_CSI_BLOCKS];
133 unsigned int buffer_offset[TEGRA_CSI_BLOCKS];
134 unsigned int buffer_state[QUEUED_BUFFERS];
135 struct vb2_buffer *buffers[QUEUED_BUFFERS];
136 unsigned int timeout;
137 unsigned int save_index;
138 unsigned int free_index;
139 unsigned int num_buffers;
140 unsigned int released_bufs;
142 struct task_struct *kthread_capture_start;
143 wait_queue_head_t start_wait;
144 struct vb2_queue queue;
146 struct list_head capture;
147 spinlock_t start_lock;
148 struct completion capture_comp;
150 void __iomem *csibase[TEGRA_CSI_BLOCKS];
151 unsigned int stride_align;
152 unsigned int width_align;
153 unsigned int valid_ports;
154 unsigned int total_ports;
155 unsigned int numlanes;
157 unsigned int num_subdevs;
158 unsigned int sequence;
159 unsigned int saved_ctx_bypass;
160 unsigned int saved_ctx_pgmode;
161 unsigned int gang_mode;
162 unsigned int gang_width;
163 unsigned int gang_height;
164 unsigned int gang_bytesperline;
165 unsigned int gang_sizeimage;
167 DECLARE_BITMAP(fmts_bitmap, MAX_FORMAT_NUM);
168 atomic_t power_on_refcnt;
172 enum channel_capture_state capture_state;
173 atomic_t is_streaming;
174 int requested_kbyteps;
175 unsigned long requested_hz;
179 #define to_tegra_channel(vdev) \
180 container_of(vdev, struct tegra_channel, video)
182 enum tegra_vi_pg_mode {
183 TEGRA_VI_PG_DISABLED = 0,
189 * struct tegra_mc_vi - NVIDIA Tegra Media controller structure
190 * @v4l2_dev: V4L2 device
191 * @media_dev: media device
192 * @dev: device struct
193 * @tegra_camera: tegra camera structure
194 * @nvhost_device_data: NvHost VI device information
196 * @notifier: V4L2 asynchronous subdevs notifier
197 * @entities: entities in the graph as a list of tegra_vi_graph_entity
198 * @num_subdevs: number of subdevs in the pipeline
200 * @channels: list of channels at the pipeline output and input
202 * @ctrl_handler: V4L2 control handler
203 * @pattern: test pattern generator V4L2 control
204 * @pg_mode: test pattern generator mode (disabled/direct/patch)
205 * @tpg_fmts_bitmap: a bitmap for formats in test pattern generator mode
207 * @has_sensors: a flag to indicate whether is a real sensor connecting
211 struct platform_device *ndev;
212 struct v4l2_device v4l2_dev;
213 struct media_device media_dev;
215 struct nvhost_device_data *ndata;
217 struct regulator *reg;
219 struct clk *parent_clk;
221 struct v4l2_async_notifier notifier;
222 struct list_head entities;
223 unsigned int num_channels;
224 unsigned int num_subdevs;
226 struct tegra_csi_device *csi;
227 struct tegra_channel *chans;
230 struct v4l2_ctrl_handler ctrl_handler;
231 struct v4l2_ctrl *pattern;
232 struct v4l2_ctrl *bypass;
233 enum tegra_vi_pg_mode pg_mode;
234 DECLARE_BITMAP(tpg_fmts_bitmap, MAX_FORMAT_NUM);
237 atomic_t power_on_refcnt;
238 atomic_t csi_power_on_refcnt;
239 struct mutex bw_update_lock;
240 unsigned long aggregated_kbyteps;
241 unsigned long max_requested_hz;
242 struct mutex mipical_lock;
243 unsigned int link_status;
244 unsigned int subdevs_bound;
247 int tegra_vi_get_port_info(struct tegra_channel *chan,
248 struct device_node *node, unsigned int index);
249 void tegra_vi_v4l2_cleanup(struct tegra_mc_vi *vi);
250 int tegra_vi_v4l2_init(struct tegra_mc_vi *vi);
251 int tegra_vi_tpg_graph_init(struct tegra_mc_vi *vi);
252 int tegra_vi_graph_init(struct tegra_mc_vi *vi);
253 void tegra_vi_graph_cleanup(struct tegra_mc_vi *vi);
254 int tegra_vi_channels_init(struct tegra_mc_vi *vi);
255 int tegra_vi_channels_cleanup(struct tegra_mc_vi *vi);
256 int tegra_channel_init_subdevices(struct tegra_channel *chan);
257 int tegra_vi_power_on(struct tegra_mc_vi *vi);
258 void tegra_vi_power_off(struct tegra_mc_vi *vi);
259 int tegra_clean_unlinked_channels(struct tegra_mc_vi *vi);
260 int tegra_vi_media_controller_init(struct tegra_mc_vi *mc_vi,
261 struct platform_device *pdev);
262 void tegra_vi_media_controller_cleanup(struct tegra_mc_vi *mc_vi);
263 void tegra_channel_ec_close(struct tegra_mc_vi *mc_vi);