--- /dev/null
+Index: rtems-051009/c/src/lib/libbsp/powerpc/ec555/include/bsp.h
+===================================================================
+--- rtems-051009.orig/c/src/lib/libbsp/powerpc/ec555/include/bsp.h
++++ rtems-051009/c/src/lib/libbsp/powerpc/ec555/include/bsp.h
+@@ -44,37 +44,6 @@ extern "C" {
+ #define BSP_CRYSTAL_HZ 4000000 /* crystal frequency, Hz */
+ #define BSP_CLOCK_HZ 40000000 /* CPU clock frequency, Hz
+
+-/*
+- * I/O definitions
+- *
+- * The SS555 board includes a CPLD to control on-board features and
+- * off-board devices.
+- */
+-typedef struct cpld_ {
+- uint8_t cs3a[32]; /* Chip select 3A */
+- uint8_t pad0[0x200000 - 0x000020];
+-
+- uint8_t cs3b[32]; /* Chip select 3B */
+- uint8_t pad2[0x400000 - 0x200020];
+-
+- uint8_t cs3c[32]; /* Chip select 3C */
+- uint8_t pad4[0x600000 - 0x400020];
+-
+- uint8_t cs3d[32]; /* Chip select 3D */
+- uint8_t pad6[0x800000 - 0x600020];
+-
+- uint8_t serial_ints; /* Enable/disable serial interrupts */
+- uint8_t serial_resets; /* Enable/disable serial resets */
+- uint8_t serial_ack; /* Acknowledge serial transfers */
+- uint8_t pad8[0xA00000 - 0x800003];
+-
+- uint8_t iflash_writess; /* Enable/disable internal-flash writes */
+- uint8_t nflash_writess; /* Enable/disable NAND-flash writes */
+- uint8_t padA[0xC00000 - 0xA00002];
+-} cpld_t;
+-
+-extern volatile cpld_t cpld; /* defined in linkcmds */
+-
+ /* miscellaneous stuff assumed to exist */
+
+ extern rtems_configuration_table BSP_Configuration;
+Index: rtems-051009/c/src/lib/libbsp/powerpc/ec555/startup/iss555.c
+===================================================================
+--- rtems-051009.orig/c/src/lib/libbsp/powerpc/ec555/startup/iss555.c
++++ rtems-051009/c/src/lib/libbsp/powerpc/ec555/startup/iss555.c
+@@ -96,6 +96,8 @@ void _InitSS555 (void)
+ */
+ extern char int_ram_top[]; /* top of internal ram */
+
++#if 0
++
+ usiu.memc[0]._or =
+ USIU_MEMC_OR_512K /* bank size */
+ | USIU_MEMC_OR_SCY(0) /* wait states in first beat of burst */
+@@ -127,6 +129,9 @@ void _InitSS555 (void)
+ | USIU_MEMC_BR_BI /* inhibit bursting */
+ | USIU_MEMC_BR_V; /* base register valid */
+
++
++#endif
++
+ /*
+ * Disable show cycles and serialization so that burst accesses will work
+ * properly. A different value, such as 0x0, may be more appropriate for
+Index: rtems-051009/c/src/lib/libbsp/powerpc/ec555/startup/linkcmds
+===================================================================
+--- rtems-051009.orig/c/src/lib/libbsp/powerpc/ec555/startup/linkcmds
++++ rtems-051009/c/src/lib/libbsp/powerpc/ec555/startup/linkcmds
+@@ -269,14 +269,6 @@ SECTIONS
+ sram = .;
+ }
+
+- /*
+- * SS555 external devices managed by on-board CPLD
+- */
+- .cpld 0xFF000000: /* SS555 external CPLD devices */
+- {
+- cpld = .;
+- }
+-
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
rtems-csb336-20051008-other.patch
rtems-csb336-20051008-uart.patch
rtems-m9328-pimx1-mapping-change.patch
-rtems-m9328-pimx1-baud-19200.patch
rtems-dosfs-fix1.patch
rtems-inttypes-wcs-disable-fix.patch
+rtems-m9328-pimx1-baud-19200.patch
rtems-clone-mrm332-to-mo376.patch
rtems-update-mrm332-to-mo376.patch
rtems-mo376-add-to-configs.patch
rtems-clone-ss555-to-ec555.patch
rtems-ec555-add-to-configs.patch
rtems-update-ss555-to-ec555.patch
+rtems-update-ss555-to-ec555-cpld-remove.patch