2 c/src/lib/libbsp/arm/csb336/console/uart.c | 42 +++++++++++++++++++++
3 c/src/lib/libcpu/arm/mc9328mxl/include/mc9328mxl.h | 41 ++++++++++++++++++++
4 2 files changed, 83 insertions(+)
6 Index: rtems-4.9.3/c/src/lib/libbsp/arm/csb336/console/uart.c
7 ===================================================================
8 --- rtems-4.9.3.orig/c/src/lib/libbsp/arm/csb336/console/uart.c 2009-11-29 01:11:05.632590072 +0100
9 +++ rtems-4.9.3/c/src/lib/libbsp/arm/csb336/console/uart.c 2009-11-29 01:55:20.304585047 +0100
11 /* Define this to use interrupt driver UART driver */
12 #define USE_INTERRUPTS 1
14 +/* Define this to use interrupt driver UART driver */
15 +#define WITH_IRDA_UART1TO3 1
17 +#ifdef WITH_IRDA_UART1TO3
18 +int bsp_uart1_switched_to_3 = 0;
19 +#endif /*WITH_IRDA_UART1TO3*/
21 /* How many serial ports? */
23 #define poll_write(c) imx_uart_poll_write_char(0, c)
25 imx_uart_data[minor].len = 0;
26 imx_uart_data[minor].idx = 0;
28 +#ifdef WITH_IRDA_UART1TO3
30 + if((MC9328MXL_GPIOC_SSR & (1<<9))==0)
31 + bsp_uart1_switched_to_3 = 1;
34 + if ((minor == 0) && bsp_uart1_switched_to_3) {
36 + rtems_interrupt_level flags;
38 + unsigned long iconfa2_clr;
39 + unsigned long ocr2_set;
40 + unsigned long ocr2_clr;
41 + unsigned long ddir_set;
42 + mask = (1<<31) | (1<<30); /* RxD and TxD */
44 + iconfa2_clr = (1<<31) | (1<<30);
47 + rtems_interrupt_disable(flags);
48 + MC9328MXL_GPIOC_ICONFA2 &=~ iconfa2_clr;
49 + MC9328MXL_GPIOC_OCR2 |= ocr2_set;
50 + MC9328MXL_GPIOC_OCR2 &=~ ocr2_clr;
51 + MC9328MXL_GPIOC_GIUS |= mask ; /* GIUS_C */
52 + MC9328MXL_GPIOC_DDIR |= ddir_set;
53 + MC9328MXL_PLL_GCCR |= MC9328MXL_PLL_GCCR_UART3_CLK_EN;
54 + rtems_interrupt_enable(flags);
55 +#if defined(USE_INTERRUPTS)
56 + imx_uart_tx_isr_data[minor].name = BSP_INT_UART3_TX;
57 + imx_uart_rx_isr_data[minor].name = BSP_INT_UART3_RX;
59 + imx_uart_data[minor].regs =
60 + (mc9328mxl_uart_regs_t *) MC9328MXL_UART3_BASE;
62 +#endif /*WITH_IRDA_UART1TO3*/
64 #if defined(USE_INTERRUPTS)
65 imx_uart_tx_isr_data[minor].name = BSP_INT_UART1_TX;
66 Index: rtems-4.9.3/c/src/lib/libcpu/arm/mc9328mxl/include/mc9328mxl.h
67 ===================================================================
68 --- rtems-4.9.3.orig/c/src/lib/libcpu/arm/mc9328mxl/include/mc9328mxl.h 2007-03-12 12:17:07.000000000 +0100
69 +++ rtems-4.9.3/c/src/lib/libcpu/arm/mc9328mxl/include/mc9328mxl.h 2009-11-29 01:55:20.324565870 +0100
71 #define MC9328MXL_LCDC_BASE 0x00205000
72 #define MC9328MXL_UART1_BASE 0x00206000
73 #define MC9328MXL_UART2_BASE 0x00207000
74 +#define MC9328MXL_UART3_BASE 0x0020A000
75 #define MC9328MXL_PWM_BASE 0x00208000
76 #define MC9328MXL_DMAC_BASE 0x00209000
77 #define MC9328MXL_USBD_BASE 0x00212000
79 #define MC9328MXL_UART2_MPR4 (*((volatile uint32_t *)((MC9328MXL_UART2_BASE) + 0xcc)))
80 #define MC9328MXL_UART2_TS (*((volatile uint32_t *)((MC9328MXL_UART2_BASE) + 0xd0)))
82 +#define MC9328MXL_UART3_RXD (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0x00)))
83 +#define MC9328MXL_UART3_TXD (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0x40)))
84 +#define MC9328MXL_UART3_CR1 (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0x80)))
85 +#define MC9328MXL_UART3_CR2 (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0x84)))
86 +#define MC9328MXL_UART3_CR3 (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0x88)))
87 +#define MC9328MXL_UART3_CR4 (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0x8c)))
88 +#define MC9328MXL_UART3_FCR (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0x90)))
89 +#define MC9328MXL_UART3_SR1 (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0x94)))
90 +#define MC9328MXL_UART3_SR2 (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0x98)))
91 +#define MC9328MXL_UART3_ESC (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0x9c)))
92 +#define MC9328MXL_UART3_TIM (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0xa0)))
93 +#define MC9328MXL_UART3_BIR (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0xa4)))
94 +#define MC9328MXL_UART3_BMR (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0xa8)))
95 +#define MC9328MXL_UART3_BRC (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0xac)))
96 +#define MC9328MXL_UART3_IPR1 (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0xb0)))
97 +#define MC9328MXL_UART3_IPR2 (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0xb4)))
98 +#define MC9328MXL_UART3_IPR3 (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0xb8)))
99 +#define MC9328MXL_UART3_IPR4 (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0xbc)))
100 +#define MC9328MXL_UART3_MPR1 (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0xc0)))
101 +#define MC9328MXL_UART3_MPR2 (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0xc4)))
102 +#define MC9328MXL_UART3_MPR3 (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0xc8)))
103 +#define MC9328MXL_UART3_MPR4 (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0xcc)))
104 +#define MC9328MXL_UART3_TS (*((volatile uint32_t *)((MC9328MXL_UART3_BASE) + 0xd0)))
107 volatile uint32_t rxd;
108 volatile uint32_t _res0[15];
110 #define MC9328MXL_PLL_SPCTL1 (*((volatile uint32_t *)((MC9328MXL_PLL_BASE) + 0x10)))
111 #define MC9328MXL_PLL_PCDR (*((volatile uint32_t *)((MC9328MXL_PLL_BASE) + 0x20)))
113 +#define MC9328MXL_PLL_RSR (*((volatile uint32_t *)((MC9328MXL_PLL_BASE) + 0x800)))
114 +#define MC9328MXL_PLL_SIDR (*((volatile uint32_t *)((MC9328MXL_PLL_BASE) + 0x804)))
115 +#define MC9328MXL_PLL_FMCR (*((volatile uint32_t *)((MC9328MXL_PLL_BASE) + 0x808)))
116 +#define MC9328MXL_PLL_GPCR (*((volatile uint32_t *)((MC9328MXL_PLL_BASE) + 0x80C)))
117 +#define MC9328MXL_PLL_GCCR (*((volatile uint32_t *)((MC9328MXL_PLL_BASE) + 0x810)))
119 #define MC9328MXL_PLL_CSCR_CLKOSEL_PERCLK1 (0 << 29)
120 #define MC9328MXL_PLL_CSCR_CLKOSEL_HCLK (1 << 29)
121 #define MC9328MXL_PLL_CSCR_CLKOSEL_CLK48M (2 << 29)
123 #define MC9328MXL_PLL_PCDR_PCLK3_MASK (0x007f0000)
124 #define MC9328MXL_PLL_PCDR_PCLK3_SHIFT (16)
126 +#define MC9328MXL_PLL_RSR_WDR (bit(1))
127 +#define MC9328MXL_PLL_RSR_EXR (bit(0))
129 +#define MC9328MXL_PLL_GCCR_UART3_CLK_EN (bit(6))
130 +#define MC9328MXL_PLL_GCCR_SSI2_CLK_EN (bit(5))
131 +#define MC9328MXL_PLL_GCCR_BROM_CLK_EN (bit(4))
132 +#define MC9328MXL_PLL_GCCR_DMA_CLK_EN (bit(3))
133 +#define MC9328MXL_PLL_GCCR_CSI_CLK_EN (bit(2))
134 +#define MC9328MXL_PLL_GCCR_MMA_CLK_EN (bit(1))
135 +#define MC9328MXL_PLL_GCCR_USBD_CLK_EN (bit(0))
137 #define MC9328MXL_PLL_SPCTL_PD_MASK (0x3c000000)
138 #define MC9328MXL_PLL_SPCTL_PD_SHIFT (26)