rtems-patches/rtems-arm-more-abort-info.patch

   1 Index: rtems-051009/cpukit/score/cpu/arm/cpu.c
   2 ===================================================================
   3 --- rtems-051009.orig/cpukit/score/cpu/arm/cpu.c
   4 +++ rtems-051009/cpukit/score/cpu/arm/cpu.c
   5 @@ -124,9 +124,9 @@ void _defaultExcHandler (CPU_Exception_f
   6  {
   7      printk("\n\r");
   8      printk("----------------------------------------------------------\n\r");
   9 -#if 0
  10 +#if 1
  11      printk("Exception 0x%x caught at PC 0x%x by thread %d\n",
  12 -           ctx->register_pc, ctx->register_lr - 4,
  13 +           ctx->register_ip, ctx->register_lr - 4,
  14             _Thread_Executing->Object.id);
  15  #endif
  16      printk("----------------------------------------------------------\n\r");
  17 @@ -221,6 +221,47 @@ void rtems_exception_init_mngt()
  18  #define SET_REG(r, ctx, v)   (((uint32_t   *)ctx)[r] = v)
  19  #define GET_OFFSET(insn)     (insn & 0xfff)
  20
  21 +char *_print_full_context_mode2txt[0x20]={
  22 +        [0x10]="user",  /* User */
  23 +       [0x11]="fiq",   /* FIQ - Fast Interrupt Request */
  24 +       [0x12]="irq",   /* IRQ - Interrupt Request */
  25 +       [0x13]="super", /* Supervisor */
  26 +       [0x17]="abort", /* Abort */
  27 +       [0x1b]="undef", /* Undefined */
  28 +       [0x1f]="system" /* System */
  29 +    };
  30 +
  31 +void _print_full_context(uint32_t spsr)
  32 +{
  33 +    char *mode;
  34 +    uint32_t prev_sp,prev_lr,cpsr,tmp;
  35 +    int i;
  36 +
  37 +    printk("active thread thread 0x%08x\n", _Thread_Executing->Object.id);
  38 +
  39 +    mode=_print_full_context_mode2txt[spsr&0x1f];
  40 +    if(!mode) mode="unknown";
  41 +
  42 +    asm volatile ("    MRS  %[cpsr], cpsr \n"
  43 +              "        ORR  %[tmp], %[spsr], #0xc0 \n"
  44 +              "        MSR  cpsr_c, %[tmp] \n"
  45 +              "        MOV  %[prev_sp], sp \n"
  46 +              "        MOV  %[prev_lr], lr \n"
  47 +              "        MSR  cpsr_c, %[cpsr] \n"
  48 +              : [prev_sp] "=&r" (prev_sp), [prev_lr] "=&r" (prev_lr),
  49 +               [cpsr] "=&r" (cpsr), [tmp] "=&r" (tmp)
  50 +              : [spsr] "r" (spsr)
  51 +             : "cc");
  52 +
  53 +    printk("Previous sp=0x%08x lr=0x%08x and actual cpsr=%08x\n", prev_sp, prev_lr, cpsr);
  54 +
  55 +    for(i=0;i<48;){
  56 +        printk(" 0x%08x",((uint32_t*)prev_sp)[i++]);
  57 +        if((i%6) == 0)
  58 +            printk("\n");
  59 +    }
  60 +
  61 +}
  62
  63  /* This function is supposed to figure out what caused the
  64   * data abort, do that, then return.
  65 @@ -229,8 +270,10 @@ void rtems_exception_init_mngt()
  66   */
  67
  68  void do_data_abort(uint32_t   insn, uint32_t   spsr,
  69 -                   CPU_Exception_frame *ctx)
  70 +                    Context_Control *ctx)
  71  {
  72 +    /* Clarify, which type is correct, CPU_Exception_frame or Context_Control */
  73 +
  74      uint8_t    decode;
  75      uint8_t    insn_type;
  76
  77 @@ -268,6 +311,7 @@ void do_data_abort(uint32_t   insn, uint
  78      case INSN_LDR:
  79          printk("\n\nINSN_LDR\n");
  80
  81 +#if 0
  82          rn = GET_RN(insn);
  83          rd = GET_RD(insn);
  84
  85 @@ -299,6 +343,8 @@ void do_data_abort(uint32_t   insn, uint
  86                  break;
  87              }
  88          }
  89 +#endif
  90 +
  91          break;
  92      case INSN_LDRB:
  93          printk("\n\nINSN_LDRB\n");
  94 @@ -311,6 +357,8 @@ void do_data_abort(uint32_t   insn, uint
  95      printk("data_abort at address 0x%x, instruction: 0x%x,   spsr = 0x%x\n",
  96             ctx->register_lr - 8, insn, spsr);
  97
  98 +    _print_full_context(spsr);
  99 +
 100      /* disable interrupts, wait forever */
 101      _CPU_ISR_Disable(tmp);
 102      while(1) {
 103 Index: rtems-051009/cpukit/score/cpu/arm/cpu_asm.S
 104 ===================================================================
 105 --- rtems-051009.orig/cpukit/score/cpu/arm/cpu_asm.S
 106 +++ rtems-051009/cpukit/score/cpu/arm/cpu_asm.S
 107 @@ -134,21 +134,31 @@ _go_back_2:
 108         ldr     lr,  [r13, #REG_LR]
 109         add     r13,r13,#SIZE_REGS
 110         subs    pc,r14,#4                       /* return */
 111 +
 112 +#define ABORT_REGS_OFFS 32-REG_R4
 113 +#define ABORT_SIZE_REGS SIZE_REGS+ABORT_REGS_OFFS
 114
 115         .globl _exc_data_abort
 116  _exc_data_abort:
 117 -       sub     sp, sp, #SIZE_REGS              /* reserve register frame */
 118 -       stmia   sp, {r0-r12}
 119 +       sub     sp, sp, #ABORT_SIZE_REGS        /* reserve register frame */
 120 +       stmia   sp, {r0-r11}
 121 +       add     sp, sp, #ABORT_REGS_OFFS        /* the Context_Control structure starts by CPSR, R4, ... */
 122 +
 123 +       str     ip, [sp, #REG_PC]               /* store R12 (ip) somewhere, oh hackery, hackery, hack */
 124         str     lr, [sp, #REG_LR]
 125 +
 126         mov     r1, lr
 127         ldr     r0, [r1, #-8]                   /* r0 = bad instruction */
 128         mrs     r1, spsr                        /* r1 = spsr */
 129 -       mov     r2, r13                         /* r2 = exception frame */
 130 +       mov     r2, r13                         /* r2 = exception frame of Context_Control type */
 131         bl      do_data_abort
 132
 133         ldr     lr, [sp, #REG_LR]
 134 -       ldmia   sp, {r0-r12}
 135 -       add     sp, sp, #SIZE_REGS
 136 +       ldr     ip, [sp, #REG_PC]               /* restore R12 (ip) */
 137 +
 138 +       sub     sp, sp, #ABORT_REGS_OFFS
 139 +       ldmia   sp, {r0-r11}
 140 +       add     sp, sp, #ABORT_SIZE_REGS
 141
 142         subs    pc, r14, #4                     /* return to the instruction */
 143                                                 /* _AFTER_ the aborted one */