From 5cdc272011e0d887d1297641a7f9bdcc6173b12d Mon Sep 17 00:00:00 2001 From: =?utf8?q?Jan=20Dvo=C5=99=C3=A1k?= Date: Mon, 19 Oct 2015 12:17:09 +0200 Subject: [PATCH] Removed the artificial constraints on the number of message buffers --- rpp/include/rpp/fr.h | 6 +++--- rpp/src/drv/fr_tms570.c | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/rpp/include/rpp/fr.h b/rpp/include/rpp/fr.h index afea18e..9c6157a 100644 --- a/rpp/include/rpp/fr.h +++ b/rpp/include/rpp/fr.h @@ -29,9 +29,9 @@ typedef enum { RPP_FR_ABORTED /**< Communication was aborted, controller is ready for reconfiguration and restart of the communication */ } rpp_fr_state_t; -#define RPP_FR_MAX_STATIC_BUF_CNT 32 /**< Maximum number of the buffers for static segment of the communication cycle */ -#define RPP_FR_MAX_DYNAMIC_BUF_CNT 32 /**< Maximum number of the buffers for dynamic segment of the communication cycle */ -#define RPP_FR_MAX_FIFO_BUF_DEPTH 32 /**< Maximal depth of the RX FIFO buffer */ +#define RPP_FR_MAX_STATIC_BUF_CNT 128 /**< Maximum number of the buffers for static segment of the communication cycle */ +#define RPP_FR_MAX_DYNAMIC_BUF_CNT 128 /**< Maximum number of the buffers for dynamic segment of the communication cycle */ +#define RPP_FR_MAX_FIFO_BUF_DEPTH 128 /**< Maximal depth of the RX FIFO buffer */ /* AUTOSAR-like API */ diff --git a/rpp/src/drv/fr_tms570.c b/rpp/src/drv/fr_tms570.c index df38339..334e31b 100644 --- a/rpp/src/drv/fr_tms570.c +++ b/rpp/src/drv/fr_tms570.c @@ -228,12 +228,12 @@ static void Fr_buffer_receive_data_header(uint32_t buf_num) // ensure no transfer in progress on shadow registers while (((frayREG->OBCR_UN.OBCR_UL) & 0x00008000) != 0) ; frayREG->OBCM_UN.OBCM_UL = (((read_buffer.rdss & 0x1) << 1) | (read_buffer.rhss & 0x1)); - frayREG->OBCR_UN.OBCR_UL = ((1 << 9) | (read_buffer.obrs & 0x3F)); //req=1, view=0 + frayREG->OBCR_UN.OBCR_UL = ((1 << 9) | (read_buffer.obrs & 0x7F)); //req=1, view=0 // wait for completion on shadow registers while (((frayREG->OBCR_UN.OBCR_UL) & 0x00008000) != 0) ; frayREG->OBCM_UN.OBCM_UL = (((read_buffer.rdss & 0x1) << 1) | (read_buffer.rhss & 0x1)); - frayREG->OBCR_UN.OBCR_UL = ((1 << 8) | (read_buffer.obrs & 0x3F)); //req=0, view=1 + frayREG->OBCR_UN.OBCR_UL = ((1 << 8) | (read_buffer.obrs & 0x7F)); //req=0, view=1 } /** @@ -246,7 +246,7 @@ inline void Fr_transmit_tx_LPdu(const bc *Fr_LSduPtr) // ensure nothing is pending while ((frayREG->IBCR_UN.IBCR_UL & 0x0008000) != 0) ; frayREG->IBCM_UN.IBCM_UL = ((Fr_LSduPtr->stxrh & 0x1) << 2) | ((Fr_LSduPtr->ldsh & 0x1) << 1) | (Fr_LSduPtr->lhsh & 0x1); - frayREG->IBCR_UN.IBCR_UL = (Fr_LSduPtr->ibrh & 0x3F); + frayREG->IBCR_UN.IBCR_UL = (Fr_LSduPtr->ibrh & 0x7F); // optimization possible for future by not gating like below // wait for completion on host registers while ((Fr_LSduPtr->ibsyh != 0) && ((frayREG->IBCR_UN.IBCR_UL & 0x00008000) != 0)) ; -- 2.39.2