From 0e38262df2b506d9168643ac5a2b76c9cc6d5825 Mon Sep 17 00:00:00 2001 From: Michal Sojka Date: Sat, 1 Aug 2015 16:50:44 +0200 Subject: [PATCH] Change target-specific pin and port definitions to match the new interface --- Makefile.var | 1 + rpp/include/drv/_rm48_hdk/digital_io_def.h | 76 ---- rpp/include/drv/_rm48_hdk/gio_def.h | 94 +++++ rpp/include/drv/_rm48_hdk/port_def.h | 27 ++ rpp/include/drv/_tms570_hdk/digital_io_def.h | 77 ---- rpp/include/drv/_tms570_hdk/gio_def.h | 94 +++++ rpp/include/drv/_tms570_hdk/port_def.h | 27 ++ .../drv/_tms570_hydctr/digital_io_def.h | 77 ---- rpp/include/drv/_tms570_hydctr/gio_def.h | 94 +++++ rpp/include/drv/_tms570_hydctr/port_def.h | 27 ++ rpp/include/drv/_tms570_rpp/digital_io_def.h | 85 ---- rpp/include/drv/_tms570_rpp/gio_def.h | 88 ++++ rpp/include/drv/_tms570_rpp/port_def.h | 38 ++ rpp/src/drv/_rm48_hdk/digital_io_def.c | 230 ----------- rpp/src/drv/_rm48_hdk/port_def.c | 75 ++++ rpp/src/drv/_tms570_hdk/digital_io_def.c | 230 ----------- rpp/src/drv/_tms570_hdk/port_def.c | 75 ++++ rpp/src/drv/_tms570_hydctr/digital_io_def.c | 229 ----------- rpp/src/drv/_tms570_hydctr/port_def.c | 75 ++++ rpp/src/drv/_tms570_rpp/digital_io_def.c | 386 ------------------ rpp/src/drv/_tms570_rpp/port_def.c | 164 ++++++++ 21 files changed, 879 insertions(+), 1390 deletions(-) delete mode 100644 rpp/include/drv/_rm48_hdk/digital_io_def.h create mode 100644 rpp/include/drv/_rm48_hdk/gio_def.h create mode 100644 rpp/include/drv/_rm48_hdk/port_def.h delete mode 100644 rpp/include/drv/_tms570_hdk/digital_io_def.h create mode 100644 rpp/include/drv/_tms570_hdk/gio_def.h create mode 100644 rpp/include/drv/_tms570_hdk/port_def.h delete mode 100644 rpp/include/drv/_tms570_hydctr/digital_io_def.h create mode 100644 rpp/include/drv/_tms570_hydctr/gio_def.h create mode 100644 rpp/include/drv/_tms570_hydctr/port_def.h delete mode 100644 rpp/include/drv/_tms570_rpp/digital_io_def.h create mode 100644 rpp/include/drv/_tms570_rpp/gio_def.h create mode 100644 rpp/include/drv/_tms570_rpp/port_def.h delete mode 100644 rpp/src/drv/_rm48_hdk/digital_io_def.c create mode 100644 rpp/src/drv/_rm48_hdk/port_def.c delete mode 100644 rpp/src/drv/_tms570_hdk/digital_io_def.c create mode 100644 rpp/src/drv/_tms570_hdk/port_def.c delete mode 100644 rpp/src/drv/_tms570_hydctr/digital_io_def.c create mode 100644 rpp/src/drv/_tms570_hydctr/port_def.c delete mode 100644 rpp/src/drv/_tms570_rpp/digital_io_def.c create mode 100644 rpp/src/drv/_tms570_rpp/port_def.c diff --git a/Makefile.var b/Makefile.var index 181edbe..d279cef 100644 --- a/Makefile.var +++ b/Makefile.var @@ -38,6 +38,7 @@ rpp_lib_SOURCES += \ rpp/src/rpp/gio.c \ rpp/src/rpp/sci.c \ rpp/src/drv/_$(TARGET)/adc.c \ + rpp/src/drv/_$(TARGET)/port_def.c \ rpp/src/drv/gio.c \ rpp/src/drv/gio_tab.c \ rpp/src/drv/sci.c \ diff --git a/rpp/include/drv/_rm48_hdk/digital_io_def.h b/rpp/include/drv/_rm48_hdk/digital_io_def.h deleted file mode 100644 index 5409fbc..0000000 --- a/rpp/include/drv/_rm48_hdk/digital_io_def.h +++ /dev/null @@ -1,76 +0,0 @@ -/** - * - * @file digital_io_def.h - * - * @copyright Copyright (C) 2012-2013 Czech Technical University in Prague - * - * @author Michal Horn - */ - -#ifndef TG_DIGITAL_IO_DEF_H_ -#define TG_DIGITAL_IO_DEF_H_ - -#define DIO_MAX_PIN_CNT 46 -#define DIO_MAX_PORT_CNT 5 - -/* Pin names */ -#define DIO_PIN_NAME_GIOA0 "GIOA0" -#define DIO_PIN_NAME_GIOA1 "GIOA1" -#define DIO_PIN_NAME_GIOA2 "GIOA2" -#define DIO_PIN_NAME_GIOA3 "GIOA3" -#define DIO_PIN_NAME_GIOA4 "GIOA4" -#define DIO_PIN_NAME_GIOA5 "GIOA5" -#define DIO_PIN_NAME_GIOA6 "GIOA6" -#define DIO_PIN_NAME_GIOA7 "GIOA7" - -#define DIO_PIN_NAME_GIOB0 "GIOB0" -#define DIO_PIN_NAME_GIOB1 "GIOB1" -#define DIO_PIN_NAME_GIOB2 "GIOB2" -#define DIO_PIN_NAME_GIOB3 "GIOB3" -#define DIO_PIN_NAME_GIOB4 "GIOB4" -#define DIO_PIN_NAME_GIOB5 "GIOB5" -#define DIO_PIN_NAME_GIOB6 "GIOB6" -#define DIO_PIN_NAME_GIOB7 "GIOB7" - -#define DIO_PIN_NAME_NHET1_0 "NHET10" -#define DIO_PIN_NAME_NHET1_1 "NHET11" -#define DIO_PIN_NAME_NHET1_2 "NHET12" -#define DIO_PIN_NAME_NHET1_3 "NHET13" -#define DIO_PIN_NAME_NHET1_4 "NHET14" -#define DIO_PIN_NAME_NHET1_5 "NHET15" -#define DIO_PIN_NAME_NHET1_6 "NHET16" -#define DIO_PIN_NAME_NHET1_7 "NHET17" -#define DIO_PIN_NAME_NHET1_8 "NHET18" -#define DIO_PIN_NAME_NHET1_9 "NHET19" -#define DIO_PIN_NAME_NHET1_10 "NHET110" -#define DIO_PIN_NAME_NHET1_11 "NHET111" -#define DIO_PIN_NAME_NHET1_12 "NHET112" -#define DIO_PIN_NAME_NHET1_13 "NHET113" -#define DIO_PIN_NAME_NHET1_14 "NHET114" -#define DIO_PIN_NAME_NHET1_15 "NHET115" -#define DIO_PIN_NAME_NHET1_16 "NHET116" -#define DIO_PIN_NAME_NHET1_17 "NHET117" -#define DIO_PIN_NAME_NHET1_18 "NHET118" -#define DIO_PIN_NAME_NHET1_19 "NHET119" -#define DIO_PIN_NAME_NHET1_20 "NHET120" -#define DIO_PIN_NAME_NHET1_21 "NHET121" -#define DIO_PIN_NAME_NHET1_22 "NHET122" -#define DIO_PIN_NAME_NHET1_23 "NHET123" -#define DIO_PIN_NAME_NHET1_24 "NHET124" -#define DIO_PIN_NAME_NHET1_25 "NHET125" -#define DIO_PIN_NAME_NHET1_26 "NHET126" -#define DIO_PIN_NAME_NHET1_27 "NHET127" -#define DIO_PIN_NAME_NHET1_28 "NHET128" -#define DIO_PIN_NAME_NHET1_29 "NHET129" -#define DIO_PIN_NAME_NHET1_30 "NHET130" -#define DIO_PIN_NAME_NHET1_31 "NHET131" -#define DIO_PIN_NAME_UNUSED "unused" - -#define DIO_PORT_CNT 4 -#define DIO_PORT_SHIFT 5 -/* Port names */ -#define DIO_PORT_NAME_GIOA "GIOA" -#define DIO_PORT_NAME_GIOB "GIOB" -#define DIO_PORT_NAME_NHET1 "NHET1" -#define DIO_PORT_NAME_ADC "ADC" -#endif /* TG_DIGITAL_IO_DEF_H_ */ diff --git a/rpp/include/drv/_rm48_hdk/gio_def.h b/rpp/include/drv/_rm48_hdk/gio_def.h new file mode 100644 index 0000000..33c000c --- /dev/null +++ b/rpp/include/drv/_rm48_hdk/gio_def.h @@ -0,0 +1,94 @@ +/* + * Copyright (C) 2015 Czech Technical University in Prague + * + * Authors: + * - Michal Sojka + * + * This document contains proprietary information belonging to Czech + * Technical University in Prague. Passing on and copying of this + * document, and communication of its contents is not permitted + * without prior written authorization. + * + */ + +#define GIO_PIN_CONF_GPIO_OUT_HI_PD_PEN_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_HIGH|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PU|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODON GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_ON +#define GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODON GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_ON +#define GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_OUT_LO_PU_PDIS_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PU|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_IN_HI_PU_PEN_ODON GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_HIGH|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PU|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_ON +#define GIO_PIN_CONF_GPIO_IN_HI_PU_PDIS_ODON GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_HIGH|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PU|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_ON +#define GIO_PIN_CONF_GPIO_IN_LO_PD_PDIS_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_IN_LO_PU_PDIS_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_OFF + + +/* Pin definition generators */ + +/* Name Port Pin Configuration */ +GIO_PIN_DEF_GEN(GIOA0, GIOA, 0, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA1, GIOA, 1, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA2, GIOA, 2, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA3, GIOA, 3, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA4, GIOA, 4, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA5, GIOA, 5, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA6, GIOA, 6, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA7, GIOA, 7, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) + +GIO_PIN_DEF_GEN(GIOB0, GIOB, 0, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB1, GIOB, 1, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB2, GIOB, 2, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB3, GIOB, 3, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB4, GIOB, 4, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB5, GIOB, 5, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB6, GIOB, 6, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB7, GIOB, 7, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) + +GIO_PIN_DEF_GEN(NHET10, HET1, 0, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET11, HET1, 1, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET12, HET1, 2, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET13, HET1, 3, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET14, HET1, 4, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET15, HET1, 5, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET16, HET1, 6, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET17, HET1, 7, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET18, HET1, 8, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET19, HET1, 9, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET110, HET1, 10, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET111, HET1, 11, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET112, HET1, 12, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET113, HET1, 13, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET114, HET1, 14, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET115, HET1, 15, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET116, HET1, 16, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET117, HET1, 17, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET118, HET1, 18, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET119, HET1, 19, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET120, HET1, 20, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET121, HET1, 21, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET122, HET1, 22, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET123, HET1, 23, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET124, HET1, 24, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET125, HET1, 25, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET126, HET1, 26, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET127, HET1, 27, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET128, HET1, 28, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET129, HET1, 29, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET130, HET1, 30, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET131, HET1, 31, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) + +#undef GIO_PIN_CONF_GPIO_OUT_HI_PD_PEN_ODOFF +#undef GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF +#undef GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF +#undef GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODON +#undef GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODON +#undef GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODOFF +#undef GIO_PIN_CONF_GPIO_OUT_LO_PU_PDIS_ODOFF +#undef GIO_PIN_CONF_GPIO_IN_HI_PU_PEN_ODON +#undef GIO_PIN_CONF_GPIO_IN_HI_PU_PDIS_ODON +#undef GIO_PIN_CONF_GPIO_IN_LO_PD_PDIS_ODOFF +#undef GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF +#undef GIO_PIN_CONF_GPIO_IN_LO_PU_PDIS_ODOFF + diff --git a/rpp/include/drv/_rm48_hdk/port_def.h b/rpp/include/drv/_rm48_hdk/port_def.h new file mode 100644 index 0000000..9e68879 --- /dev/null +++ b/rpp/include/drv/_rm48_hdk/port_def.h @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2015 Czech Technical University in Prague + * + * Authors: + * - Michal Sojka + * + * This document contains proprietary information belonging to Czech + * Technical University in Prague. Passing on and copying of this + * document, and communication of its contents is not permitted + * without prior written authorization. + * + */ + +#ifndef DRV_TGT_PORT_DEF_H +#define DRV_TGT_PORT_DEF_H + +/* Port names */ +enum port_id { + PORT_ID_GIOA, + PORT_ID_GIOB, + PORT_ID_NHET1, + PORT_ID_ADC, + + _PORT_COUNT, +}; + +#endif diff --git a/rpp/include/drv/_tms570_hdk/digital_io_def.h b/rpp/include/drv/_tms570_hdk/digital_io_def.h deleted file mode 100644 index 5b1a3e3..0000000 --- a/rpp/include/drv/_tms570_hdk/digital_io_def.h +++ /dev/null @@ -1,77 +0,0 @@ -/** - * - * @file digital_io_def.h - * - * @copyright Copyright (C) 2012-2013 Czech Technical University in Prague - * - * @author Michal Horn - */ - -#ifndef TG_DIGITAL_IO_DEF_H_ -#define TG_DIGITAL_IO_DEF_H_ - -#define DIO_MAX_PIN_CNT 46 -#define DIO_MAX_PORT_CNT 5 - -/* Pin names */ -#define DIO_PIN_NAME_GIOA0 "GIOA0" -#define DIO_PIN_NAME_GIOA1 "GIOA1" -#define DIO_PIN_NAME_GIOA2 "GIOA2" -#define DIO_PIN_NAME_GIOA3 "GIOA3" -#define DIO_PIN_NAME_GIOA4 "GIOA4" -#define DIO_PIN_NAME_GIOA5 "GIOA5" -#define DIO_PIN_NAME_GIOA6 "GIOA6" -#define DIO_PIN_NAME_GIOA7 "GIOA7" - -#define DIO_PIN_NAME_GIOB0 "GIOB0" -#define DIO_PIN_NAME_GIOB1 "GIOB1" -#define DIO_PIN_NAME_GIOB2 "GIOB2" -#define DIO_PIN_NAME_GIOB3 "GIOB3" -#define DIO_PIN_NAME_GIOB4 "GIOB4" -#define DIO_PIN_NAME_GIOB5 "GIOB5" -#define DIO_PIN_NAME_GIOB6 "GIOB6" -#define DIO_PIN_NAME_GIOB7 "GIOB7" - -#define DIO_PIN_NAME_NHET1_0 "NHET10" -#define DIO_PIN_NAME_NHET1_1 "NHET11" -#define DIO_PIN_NAME_NHET1_2 "NHET12" -#define DIO_PIN_NAME_NHET1_3 "NHET13" -#define DIO_PIN_NAME_NHET1_4 "NHET14" -#define DIO_PIN_NAME_NHET1_5 "NHET15" -#define DIO_PIN_NAME_NHET1_6 "NHET16" -#define DIO_PIN_NAME_NHET1_7 "NHET17" -#define DIO_PIN_NAME_NHET1_8 "NHET18" -#define DIO_PIN_NAME_NHET1_9 "NHET19" -#define DIO_PIN_NAME_NHET1_10 "NHET110" -#define DIO_PIN_NAME_NHET1_11 "NHET111" -#define DIO_PIN_NAME_NHET1_12 "NHET112" -#define DIO_PIN_NAME_NHET1_13 "NHET113" -#define DIO_PIN_NAME_NHET1_14 "NHET114" -#define DIO_PIN_NAME_NHET1_15 "NHET115" -#define DIO_PIN_NAME_NHET1_16 "NHET116" -#define DIO_PIN_NAME_NHET1_17 "NHET117" -#define DIO_PIN_NAME_NHET1_18 "NHET118" -#define DIO_PIN_NAME_NHET1_19 "NHET119" -#define DIO_PIN_NAME_NHET1_20 "NHET120" -#define DIO_PIN_NAME_NHET1_21 "NHET121" -#define DIO_PIN_NAME_NHET1_22 "NHET122" -#define DIO_PIN_NAME_NHET1_23 "NHET123" -#define DIO_PIN_NAME_NHET1_24 "NHET124" -#define DIO_PIN_NAME_NHET1_25 "NHET125" -#define DIO_PIN_NAME_NHET1_26 "NHET126" -#define DIO_PIN_NAME_NHET1_27 "NHET127" -#define DIO_PIN_NAME_NHET1_28 "NHET128" -#define DIO_PIN_NAME_NHET1_29 "NHET129" -#define DIO_PIN_NAME_NHET1_30 "NHET130" -#define DIO_PIN_NAME_NHET1_31 "NHET131" -#define DIO_PIN_NAME_UNUSED "unused" - -#define DIO_PORT_CNT 4 -#define DIO_PORT_SHIFT 5 -/* Port names */ -#define DIO_PORT_NAME_GIOA "GIOA" -#define DIO_PORT_NAME_GIOB "GIOB" -#define DIO_PORT_NAME_NHET1 "NHET1" -#define DIO_PORT_NAME_ADC "ADC" - -#endif /* TG_DIGITAL_IO_DEF_H_ */ diff --git a/rpp/include/drv/_tms570_hdk/gio_def.h b/rpp/include/drv/_tms570_hdk/gio_def.h new file mode 100644 index 0000000..33c000c --- /dev/null +++ b/rpp/include/drv/_tms570_hdk/gio_def.h @@ -0,0 +1,94 @@ +/* + * Copyright (C) 2015 Czech Technical University in Prague + * + * Authors: + * - Michal Sojka + * + * This document contains proprietary information belonging to Czech + * Technical University in Prague. Passing on and copying of this + * document, and communication of its contents is not permitted + * without prior written authorization. + * + */ + +#define GIO_PIN_CONF_GPIO_OUT_HI_PD_PEN_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_HIGH|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PU|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODON GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_ON +#define GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODON GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_ON +#define GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_OUT_LO_PU_PDIS_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PU|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_IN_HI_PU_PEN_ODON GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_HIGH|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PU|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_ON +#define GIO_PIN_CONF_GPIO_IN_HI_PU_PDIS_ODON GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_HIGH|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PU|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_ON +#define GIO_PIN_CONF_GPIO_IN_LO_PD_PDIS_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_IN_LO_PU_PDIS_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_OFF + + +/* Pin definition generators */ + +/* Name Port Pin Configuration */ +GIO_PIN_DEF_GEN(GIOA0, GIOA, 0, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA1, GIOA, 1, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA2, GIOA, 2, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA3, GIOA, 3, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA4, GIOA, 4, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA5, GIOA, 5, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA6, GIOA, 6, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA7, GIOA, 7, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) + +GIO_PIN_DEF_GEN(GIOB0, GIOB, 0, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB1, GIOB, 1, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB2, GIOB, 2, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB3, GIOB, 3, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB4, GIOB, 4, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB5, GIOB, 5, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB6, GIOB, 6, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB7, GIOB, 7, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) + +GIO_PIN_DEF_GEN(NHET10, HET1, 0, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET11, HET1, 1, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET12, HET1, 2, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET13, HET1, 3, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET14, HET1, 4, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET15, HET1, 5, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET16, HET1, 6, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET17, HET1, 7, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET18, HET1, 8, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET19, HET1, 9, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET110, HET1, 10, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET111, HET1, 11, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET112, HET1, 12, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET113, HET1, 13, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET114, HET1, 14, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET115, HET1, 15, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET116, HET1, 16, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET117, HET1, 17, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET118, HET1, 18, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET119, HET1, 19, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET120, HET1, 20, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET121, HET1, 21, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET122, HET1, 22, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET123, HET1, 23, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET124, HET1, 24, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET125, HET1, 25, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET126, HET1, 26, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET127, HET1, 27, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET128, HET1, 28, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET129, HET1, 29, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET130, HET1, 30, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET131, HET1, 31, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) + +#undef GIO_PIN_CONF_GPIO_OUT_HI_PD_PEN_ODOFF +#undef GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF +#undef GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF +#undef GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODON +#undef GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODON +#undef GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODOFF +#undef GIO_PIN_CONF_GPIO_OUT_LO_PU_PDIS_ODOFF +#undef GIO_PIN_CONF_GPIO_IN_HI_PU_PEN_ODON +#undef GIO_PIN_CONF_GPIO_IN_HI_PU_PDIS_ODON +#undef GIO_PIN_CONF_GPIO_IN_LO_PD_PDIS_ODOFF +#undef GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF +#undef GIO_PIN_CONF_GPIO_IN_LO_PU_PDIS_ODOFF + diff --git a/rpp/include/drv/_tms570_hdk/port_def.h b/rpp/include/drv/_tms570_hdk/port_def.h new file mode 100644 index 0000000..9e68879 --- /dev/null +++ b/rpp/include/drv/_tms570_hdk/port_def.h @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2015 Czech Technical University in Prague + * + * Authors: + * - Michal Sojka + * + * This document contains proprietary information belonging to Czech + * Technical University in Prague. Passing on and copying of this + * document, and communication of its contents is not permitted + * without prior written authorization. + * + */ + +#ifndef DRV_TGT_PORT_DEF_H +#define DRV_TGT_PORT_DEF_H + +/* Port names */ +enum port_id { + PORT_ID_GIOA, + PORT_ID_GIOB, + PORT_ID_NHET1, + PORT_ID_ADC, + + _PORT_COUNT, +}; + +#endif diff --git a/rpp/include/drv/_tms570_hydctr/digital_io_def.h b/rpp/include/drv/_tms570_hydctr/digital_io_def.h deleted file mode 100644 index 5b1a3e3..0000000 --- a/rpp/include/drv/_tms570_hydctr/digital_io_def.h +++ /dev/null @@ -1,77 +0,0 @@ -/** - * - * @file digital_io_def.h - * - * @copyright Copyright (C) 2012-2013 Czech Technical University in Prague - * - * @author Michal Horn - */ - -#ifndef TG_DIGITAL_IO_DEF_H_ -#define TG_DIGITAL_IO_DEF_H_ - -#define DIO_MAX_PIN_CNT 46 -#define DIO_MAX_PORT_CNT 5 - -/* Pin names */ -#define DIO_PIN_NAME_GIOA0 "GIOA0" -#define DIO_PIN_NAME_GIOA1 "GIOA1" -#define DIO_PIN_NAME_GIOA2 "GIOA2" -#define DIO_PIN_NAME_GIOA3 "GIOA3" -#define DIO_PIN_NAME_GIOA4 "GIOA4" -#define DIO_PIN_NAME_GIOA5 "GIOA5" -#define DIO_PIN_NAME_GIOA6 "GIOA6" -#define DIO_PIN_NAME_GIOA7 "GIOA7" - -#define DIO_PIN_NAME_GIOB0 "GIOB0" -#define DIO_PIN_NAME_GIOB1 "GIOB1" -#define DIO_PIN_NAME_GIOB2 "GIOB2" -#define DIO_PIN_NAME_GIOB3 "GIOB3" -#define DIO_PIN_NAME_GIOB4 "GIOB4" -#define DIO_PIN_NAME_GIOB5 "GIOB5" -#define DIO_PIN_NAME_GIOB6 "GIOB6" -#define DIO_PIN_NAME_GIOB7 "GIOB7" - -#define DIO_PIN_NAME_NHET1_0 "NHET10" -#define DIO_PIN_NAME_NHET1_1 "NHET11" -#define DIO_PIN_NAME_NHET1_2 "NHET12" -#define DIO_PIN_NAME_NHET1_3 "NHET13" -#define DIO_PIN_NAME_NHET1_4 "NHET14" -#define DIO_PIN_NAME_NHET1_5 "NHET15" -#define DIO_PIN_NAME_NHET1_6 "NHET16" -#define DIO_PIN_NAME_NHET1_7 "NHET17" -#define DIO_PIN_NAME_NHET1_8 "NHET18" -#define DIO_PIN_NAME_NHET1_9 "NHET19" -#define DIO_PIN_NAME_NHET1_10 "NHET110" -#define DIO_PIN_NAME_NHET1_11 "NHET111" -#define DIO_PIN_NAME_NHET1_12 "NHET112" -#define DIO_PIN_NAME_NHET1_13 "NHET113" -#define DIO_PIN_NAME_NHET1_14 "NHET114" -#define DIO_PIN_NAME_NHET1_15 "NHET115" -#define DIO_PIN_NAME_NHET1_16 "NHET116" -#define DIO_PIN_NAME_NHET1_17 "NHET117" -#define DIO_PIN_NAME_NHET1_18 "NHET118" -#define DIO_PIN_NAME_NHET1_19 "NHET119" -#define DIO_PIN_NAME_NHET1_20 "NHET120" -#define DIO_PIN_NAME_NHET1_21 "NHET121" -#define DIO_PIN_NAME_NHET1_22 "NHET122" -#define DIO_PIN_NAME_NHET1_23 "NHET123" -#define DIO_PIN_NAME_NHET1_24 "NHET124" -#define DIO_PIN_NAME_NHET1_25 "NHET125" -#define DIO_PIN_NAME_NHET1_26 "NHET126" -#define DIO_PIN_NAME_NHET1_27 "NHET127" -#define DIO_PIN_NAME_NHET1_28 "NHET128" -#define DIO_PIN_NAME_NHET1_29 "NHET129" -#define DIO_PIN_NAME_NHET1_30 "NHET130" -#define DIO_PIN_NAME_NHET1_31 "NHET131" -#define DIO_PIN_NAME_UNUSED "unused" - -#define DIO_PORT_CNT 4 -#define DIO_PORT_SHIFT 5 -/* Port names */ -#define DIO_PORT_NAME_GIOA "GIOA" -#define DIO_PORT_NAME_GIOB "GIOB" -#define DIO_PORT_NAME_NHET1 "NHET1" -#define DIO_PORT_NAME_ADC "ADC" - -#endif /* TG_DIGITAL_IO_DEF_H_ */ diff --git a/rpp/include/drv/_tms570_hydctr/gio_def.h b/rpp/include/drv/_tms570_hydctr/gio_def.h new file mode 100644 index 0000000..33c000c --- /dev/null +++ b/rpp/include/drv/_tms570_hydctr/gio_def.h @@ -0,0 +1,94 @@ +/* + * Copyright (C) 2015 Czech Technical University in Prague + * + * Authors: + * - Michal Sojka + * + * This document contains proprietary information belonging to Czech + * Technical University in Prague. Passing on and copying of this + * document, and communication of its contents is not permitted + * without prior written authorization. + * + */ + +#define GIO_PIN_CONF_GPIO_OUT_HI_PD_PEN_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_HIGH|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PU|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODON GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_ON +#define GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODON GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_ON +#define GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_OUT_LO_PU_PDIS_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PU|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_IN_HI_PU_PEN_ODON GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_HIGH|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PU|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_ON +#define GIO_PIN_CONF_GPIO_IN_HI_PU_PDIS_ODON GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_HIGH|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PU|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_ON +#define GIO_PIN_CONF_GPIO_IN_LO_PD_PDIS_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_IN_LO_PU_PDIS_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_OFF + + +/* Pin definition generators */ + +/* Name Port Pin Configuration */ +GIO_PIN_DEF_GEN(GIOA0, GIOA, 0, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA1, GIOA, 1, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA2, GIOA, 2, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA3, GIOA, 3, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA4, GIOA, 4, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA5, GIOA, 5, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA6, GIOA, 6, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOA7, GIOA, 7, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) + +GIO_PIN_DEF_GEN(GIOB0, GIOB, 0, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB1, GIOB, 1, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB2, GIOB, 2, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB3, GIOB, 3, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB4, GIOB, 4, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB5, GIOB, 5, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB6, GIOB, 6, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(GIOB7, GIOB, 7, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) + +GIO_PIN_DEF_GEN(NHET10, HET1, 0, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET11, HET1, 1, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET12, HET1, 2, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET13, HET1, 3, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET14, HET1, 4, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET15, HET1, 5, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET16, HET1, 6, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET17, HET1, 7, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET18, HET1, 8, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET19, HET1, 9, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET110, HET1, 10, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET111, HET1, 11, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET112, HET1, 12, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET113, HET1, 13, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET114, HET1, 14, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET115, HET1, 15, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET116, HET1, 16, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET117, HET1, 17, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET118, HET1, 18, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET119, HET1, 19, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET120, HET1, 20, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET121, HET1, 21, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET122, HET1, 22, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET123, HET1, 23, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET124, HET1, 24, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET125, HET1, 25, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET126, HET1, 26, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET127, HET1, 27, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET128, HET1, 28, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET129, HET1, 29, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET130, HET1, 30, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) +GIO_PIN_DEF_GEN(NHET131, HET1, 31, GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF) + +#undef GIO_PIN_CONF_GPIO_OUT_HI_PD_PEN_ODOFF +#undef GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF +#undef GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF +#undef GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODON +#undef GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODON +#undef GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODOFF +#undef GIO_PIN_CONF_GPIO_OUT_LO_PU_PDIS_ODOFF +#undef GIO_PIN_CONF_GPIO_IN_HI_PU_PEN_ODON +#undef GIO_PIN_CONF_GPIO_IN_HI_PU_PDIS_ODON +#undef GIO_PIN_CONF_GPIO_IN_LO_PD_PDIS_ODOFF +#undef GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF +#undef GIO_PIN_CONF_GPIO_IN_LO_PU_PDIS_ODOFF + diff --git a/rpp/include/drv/_tms570_hydctr/port_def.h b/rpp/include/drv/_tms570_hydctr/port_def.h new file mode 100644 index 0000000..9e68879 --- /dev/null +++ b/rpp/include/drv/_tms570_hydctr/port_def.h @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2015 Czech Technical University in Prague + * + * Authors: + * - Michal Sojka + * + * This document contains proprietary information belonging to Czech + * Technical University in Prague. Passing on and copying of this + * document, and communication of its contents is not permitted + * without prior written authorization. + * + */ + +#ifndef DRV_TGT_PORT_DEF_H +#define DRV_TGT_PORT_DEF_H + +/* Port names */ +enum port_id { + PORT_ID_GIOA, + PORT_ID_GIOB, + PORT_ID_NHET1, + PORT_ID_ADC, + + _PORT_COUNT, +}; + +#endif diff --git a/rpp/include/drv/_tms570_rpp/digital_io_def.h b/rpp/include/drv/_tms570_rpp/digital_io_def.h deleted file mode 100644 index 32e6dbd..0000000 --- a/rpp/include/drv/_tms570_rpp/digital_io_def.h +++ /dev/null @@ -1,85 +0,0 @@ -/** - * - * @file digital_io_def.h - * - * @copyright Copyright (C) 2012-2013 Czech Technical University in Prague - * - * @author Michal Horn - */ - -#ifndef TG_DIGITAL_IO_DEF_H_ -#define TG_DIGITAL_IO_DEF_H_ - -#define DIO_MAX_PIN_CNT 103 -#define DIO_MAX_PORT_CNT 5 -/* Pin names */ -#define DIO_PIN_NAME_DIN8 "DIN8" -#define DIO_PIN_NAME_DIN9 "DIN9" -#define DIO_PIN_NAME_DIN10 "DIN10" -#define DIO_PIN_NAME_DIN11 "DIN11" -#define DIO_PIN_NAME_DIN12 "DIN12" -#define DIO_PIN_NAME_DIN13 "DIN13" -#define DIO_PIN_NAME_DIN14 "DIN14" -#define DIO_PIN_NAME_DIN15 "DIN15" -#define DIO_PIN_NAME_DININT "DININT" -#define DIO_PIN_NAME_HOUT1IN "HOUT1IN" -#define DIO_PIN_NAME_HOUT2IN "HOUT2IN" -#define DIO_PIN_NAME_HOUT3IN "HOUT3IN" -#define DIO_PIN_NAME_HOUT4IN "HOUT4IN" -#define DIO_PIN_NAME_HOUT5IN "HOUT5IN" -#define DIO_PIN_NAME_HOUT6IN "HOUT6IN" -#define DIO_PIN_NAME_HOUT1DIAG "HOUT1DIAG" -#define DIO_PIN_NAME_HOUT2DIAG "HOUT2DIAG" -#define DIO_PIN_NAME_HOUT3DIAG "HOUT3DIAG" -#define DIO_PIN_NAME_HOUT4DIAG "HOUT4DIAG" -#define DIO_PIN_NAME_HOUT5DIAG "HOUT5DIAG" -#define DIO_PIN_NAME_HOUT6DIAG "HOUT6DIAG" -#define DIO_PIN_NAME_MOUT1IN "MOUT1IN" -#define DIO_PIN_NAME_MOUT2IN "MOUT2IN" -#define DIO_PIN_NAME_MOUT3IN "MOUT3IN" -#define DIO_PIN_NAME_MOUT4IN "MOUT4IN" -#define DIO_PIN_NAME_MOUT5IN "MOUT5IN" -#define DIO_PIN_NAME_MOUT6IN "MOUT6IN" -#define DIO_PIN_NAME_MOUT1EN "MOUT1EN" -#define DIO_PIN_NAME_MOUT2EN "MOUT2EN" -#define DIO_PIN_NAME_MOUT3EN "MOUT3EN" -#define DIO_PIN_NAME_MOUT4EN "MOUT4EN" -#define DIO_PIN_NAME_MOUT5EN "MOUT5EN" -#define DIO_PIN_NAME_MOUT6EN "MOUT6EN" -#define DIO_PIN_NAME_VBAT1EN "VBAT1EN" -#define DIO_PIN_NAME_VBAT2EN "VBAT2EN" -#define DIO_PIN_NAME_VBAT3EN "VBAT3EN" -#define DIO_PIN_NAME_VBATEN "VBATEN" -#define DIO_PIN_NAME_FANCTRL "FANCTRL" -#define DIO_PIN_NAME_ETHRST "ETHRST" -#define DIO_PIN_NAME_SPICSA "SPICSA" -#define DIO_PIN_NAME_SPICSB "SPICSB" -#define DIO_PIN_NAME_CANNSTB "CANNSTB" -#define DIO_PIN_NAME_CANEN "CANEN" -#define DIO_PIN_NAME_LIN2NSLP "LIN2NSLP" -#define DIO_PIN_NAME_LIN1NSLP "LIN1NSLP" -#define DIO_PIN_NAME_HBREN "HBREN" -#define DIO_PIN_NAME_HBRDIR "HBRDIR" -#define DIO_PIN_NAME_HBRPWM "HBRPWM" -#define DIO_PIN_NAME_UNUSED NULL - -#define DIO_PORT_CNT 15 -#define DIO_PORT_SHIFT 5 -/* Port names */ -#define DIO_PORT_NAME_DINMCU "DINMCU" -#define DIO_PORT_NAME_DINSPI "DINSPI" -#define DIO_PORT_NAME_HOUTDIAG "HOUTDIAG" -#define DIO_PORT_NAME_HOUTIN "HOUTIN" -#define DIO_PORT_NAME_HOUTIFBK "HOUTIFBK" -#define DIO_PORT_NAME_ADC "ADC" -#define DIO_PORT_NAME_LOUT "LOUT" -#define DIO_PORT_NAME_DAC1_2 "DAC12" -#define DIO_PORT_NAME_DAC3_4 "DAC34" -#define DIO_PORT_NAME_DACDREF "DACDREF" -#define DIO_PORT_NAME_HBR "HBR" -#define DIO_PORT_NAME_FRAY1 "FRAY1" -#define DIO_PORT_NAME_FRAY2 "FRAY2" -#define DIO_PORT_NAME_MOUTEN "MOUTEN" -#define DIO_PORT_NAME_MOUTIN "MOUTIN" - -#endif /* TG_DIGITAL_IO_DEF_H_ */ diff --git a/rpp/include/drv/_tms570_rpp/gio_def.h b/rpp/include/drv/_tms570_rpp/gio_def.h new file mode 100644 index 0000000..9837fda --- /dev/null +++ b/rpp/include/drv/_tms570_rpp/gio_def.h @@ -0,0 +1,88 @@ +/** + * + * @file digital_io_def.h + * + * @copyright Copyright (C) 2012-2015 Czech Technical University in Prague + * + * @author Michal Horn + * @author Michal Sojka + */ + +#define GIO_PIN_CONF_GPIO_OUT_HI_PD_PEN_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_HIGH|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PU|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODON GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_ON +#define GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODON GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_ON +#define GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_OUT_LO_PU_PDIS_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_OUT|GIO_PIN_CONF_MODE_PU|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_IN_HI_PU_PEN_ODON GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_HIGH|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PU|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_ON +#define GIO_PIN_CONF_GPIO_IN_HI_PU_PDIS_ODON GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_HIGH|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PU|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_ON +#define GIO_PIN_CONF_GPIO_IN_LO_PD_PDIS_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PEN|GIO_PIN_CONF_OD_OFF +#define GIO_PIN_CONF_GPIO_IN_LO_PU_PDIS_ODOFF GIO_PIN_CONF_FNC_GPIO|GIO_PIN_CONF_INIT_LOW|GIO_PIN_CONF_DIR_IN|GIO_PIN_CONF_MODE_PD|GIO_PIN_CONF_MODE_PDIS|GIO_PIN_CONF_OD_OFF + + +/* Pin definition generators */ + +/* Name Port Pin Configuration */ +GIO_PIN_DEF_GEN(FANCTRL, DMM, 0, GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(ETHRST, DMM, 1, GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(VBAT1EN, DMM, 2, GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODON) +GIO_PIN_DEF_GEN(VBAT2EN, DMM, 3, GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODON) +GIO_PIN_DEF_GEN(VBAT3EN, DMM, 4, GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODON) +GIO_PIN_DEF_GEN(VBATEN, DMM, 5, GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(SPICSA, DMM, 7, GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(SPICSB, DMM, 8, GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(MOUT1EN, DMM, 11, GIO_PIN_CONF_GPIO_IN_HI_PU_PDIS_ODON) +GIO_PIN_DEF_GEN(MOUT2EN, DMM, 12, GIO_PIN_CONF_GPIO_IN_HI_PU_PDIS_ODON) +GIO_PIN_DEF_GEN(CANNSTB, DMM, 13, GIO_PIN_CONF_GPIO_OUT_HI_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(CANEN, DMM, 15, GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(LIN2NSLP, DMM, 16, GIO_PIN_CONF_GPIO_OUT_HI_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(LIN1NSLP, DMM, 17, GIO_PIN_CONF_GPIO_OUT_HI_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(DININT, DMM, 18, GIO_PIN_CONF_GPIO_IN_LO_PD_PDIS_ODOFF) +GIO_PIN_DEF_GEN(DIN8, GIOA, 0, GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(DIN9, GIOA, 1, GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(DIN10, GIOA, 2, GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(DIN11, GIOA, 3, GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(DIN12, GIOA, 4, GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(DIN13, GIOA, 5, GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(DIN14, GIOA, 6, GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(DIN15, GIOA, 7, GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(MOUT6EN, GIOB, 0, GIO_PIN_CONF_GPIO_IN_HI_PU_PDIS_ODON) +GIO_PIN_DEF_GEN(MOUT5EN, GIOB, 1, GIO_PIN_CONF_GPIO_IN_HI_PU_PDIS_ODON) +GIO_PIN_DEF_GEN(MOUT6IN, GIOB, 2, GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODOFF) +GIO_PIN_DEF_GEN(MOUT5IN, GIOB, 3, GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODOFF) +GIO_PIN_DEF_GEN(MOUT4EN, GIOB, 4, GIO_PIN_CONF_GPIO_IN_HI_PU_PDIS_ODON) +GIO_PIN_DEF_GEN(MOUT3EN, GIOB, 5, GIO_PIN_CONF_GPIO_IN_HI_PU_PDIS_ODON) +GIO_PIN_DEF_GEN(MOUT4IN, GIOB, 6, GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODOFF) +GIO_PIN_DEF_GEN(MOUT3IN, GIOB, 7, GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODOFF) +GIO_PIN_DEF_GEN(HBREN, HET1, 1, GIO_PIN_CONF_GPIO_OUT_LO_PU_PDIS_ODOFF) +GIO_PIN_DEF_GEN(HBRDIR, HET1, 4, GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODON) +GIO_PIN_DEF_GEN(HBRPWM, HET1, 7, GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODON) +GIO_PIN_DEF_GEN(MOUT1IN, HET1, 9, GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODOFF) +GIO_PIN_DEF_GEN(MOUT2IN, HET1, 14, GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODOFF) +GIO_PIN_DEF_GEN(HOUT1IN, HET1, 16, GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(HOUT1DIAG, HET1, 17, GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(HOUT2IN, HET1, 18, GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(HOUT2DIAG, HET1, 19, GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(HOUT3IN, HET1, 20, GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(HOUT3DIAG, HET1, 21, GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(HOUT4IN, HET1, 22, GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(HOUT4DIAG, HET1, 23, GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(HOUT5IN, HET1, 25, GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(HOUT5DIAG, HET1, 27, GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(HOUT6IN, HET1, 29, GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF) +GIO_PIN_DEF_GEN(HOUT6DIAG, HET1, 31, GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF) + +#undef GIO_PIN_CONF_GPIO_OUT_HI_PD_PEN_ODOFF +#undef GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODOFF +#undef GIO_PIN_CONF_GPIO_OUT_LO_PU_PEN_ODOFF +#undef GIO_PIN_CONF_GPIO_OUT_LO_PD_PEN_ODON +#undef GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODON +#undef GIO_PIN_CONF_GPIO_OUT_LO_PD_PDIS_ODOFF +#undef GIO_PIN_CONF_GPIO_OUT_LO_PU_PDIS_ODOFF +#undef GIO_PIN_CONF_GPIO_IN_HI_PU_PEN_ODON +#undef GIO_PIN_CONF_GPIO_IN_HI_PU_PDIS_ODON +#undef GIO_PIN_CONF_GPIO_IN_LO_PD_PDIS_ODOFF +#undef GIO_PIN_CONF_GPIO_IN_LO_PD_PEN_ODOFF +#undef GIO_PIN_CONF_GPIO_IN_LO_PU_PDIS_ODOFF diff --git a/rpp/include/drv/_tms570_rpp/port_def.h b/rpp/include/drv/_tms570_rpp/port_def.h new file mode 100644 index 0000000..68973ee --- /dev/null +++ b/rpp/include/drv/_tms570_rpp/port_def.h @@ -0,0 +1,38 @@ +/* + * Copyright (C) 2015 Czech Technical University in Prague + * + * Authors: + * - Michal Sojka + * + * This document contains proprietary information belonging to Czech + * Technical University in Prague. Passing on and copying of this + * document, and communication of its contents is not permitted + * without prior written authorization. + * + */ + +#ifndef _TMS570_RPP_PORT_DEF_H +#define _TMS570_RPP_PORT_DEF_H + +/* Port names */ +enum port_id { + PORT_ID_DINMCU, + PORT_ID_DINSPI, + PORT_ID_HOUTDIAG, + PORT_ID_HOUTIN, + PORT_ID_HOUTIFBK, + PORT_ID_ADC, + PORT_ID_LOUT, + PORT_ID_DAC1_2, + PORT_ID_DAC3_4, + PORT_ID_DACDREF, + PORT_ID_HBR, + PORT_ID_FRAY1, + PORT_ID_FRAY2, + PORT_ID_MOUTEN, + PORT_ID_MOUTIN, + + _PORT_COUNT, +}; + +#endif diff --git a/rpp/src/drv/_rm48_hdk/digital_io_def.c b/rpp/src/drv/_rm48_hdk/digital_io_def.c deleted file mode 100644 index 17778be..0000000 --- a/rpp/src/drv/_rm48_hdk/digital_io_def.c +++ /dev/null @@ -1,230 +0,0 @@ -/* Copyright (C) 2012-2013 Czech Technical University in Prague - * - * Authors: - * - Michal Horn - * - * This document contains proprietary information belonging to Czech - * Technical University in Prague. Passing on and copying of this - * document, and communication of its contents is not permitted - * without prior written authorization. - * - * Abstract: - * This file contains gpio pins definitions - * - * On TMS570 MCU pins can operates as GIO on ports DMM, GIOA, GIOB, - * HET1 and HET2. Those pins, that are defined in this file, can be - * accessed directly as GPIO by hal_gpio_set_value and - * hal_gpio_get_value. Pin configuration can be modified by functions - * defined in hal_gpio_tms570 source and header files. - * - * NOTE: Although the configuration functions are implemented and - * should be ready to use, they were only slightly tested and are not - * used by the RPP software yet. - */ - -#include "drv/_rm48_hdk/digital_io_def.h" -#include "drv/digital_io.h" -#include "drv/spi.h" -#include "drv/_rm48_hdk/adc.h" - - -#define PORT_PIN(p,n,conf) (((p)< + * + * This document contains proprietary information belonging to Czech + * Technical University in Prague. Passing on and copying of this + * document, and communication of its contents is not permitted + * without prior written authorization. + * + */ + +#include "drv/port.h" +#include "drv/gio_names.h" +#include "drv/gio_tab.h" +#include "drv/adc.h" + +// Lists of pins assigned to the ports +static enum pin_name pins_gioa[] = { + PIN_GIOA0, PIN_GIOA1, PIN_GIOA2, PIN_GIOA3, + PIN_GIOA4, PIN_GIOA5, PIN_GIOA6, PIN_GIOA7 +}; +static enum pin_name pins_giob[] = { + PIN_GIOB0, PIN_GIOB1, PIN_GIOB2, PIN_GIOB3, + PIN_GIOB4, PIN_GIOB5, PIN_GIOB6, PIN_GIOB7 +}; +static enum pin_name pins_nhet1[] = { + PIN_NHET10, PIN_NHET11, PIN_NHET12, + PIN_NHET13, PIN_NHET14, PIN_NHET15, + PIN_NHET17, PIN_NHET18, PIN_NHET19, + PIN_NHET110, PIN_NHET111, PIN_NHET112, + PIN_NHET114, PIN_NHET115, PIN_NHET116, + PIN_NHET117, PIN_NHET118, PIN_NHET119, + PIN_NHET120, PIN_NHET121, PIN_NHET122, + PIN_NHET123, PIN_NHET124, PIN_NHET125, + PIN_NHET126, PIN_NHET127, PIN_NHET128, + PIN_NHET129, PIN_NHET130, PIN_NHET131 +}; + +// Port descriptors +const struct port_desc port_desc[] = { + [PORT_ID_GIOA] = { + .name = "GIOA", + .cfg = { .gioset = { .pins = pins_gioa } }, + .numchn = ARRAY_SIZE(pins_gioa), + .bpch = 1, + .get = port_gioset_get, + .set = port_gioset_set, + }, + [PORT_ID_GIOB] = { + .name = "GIOB", + .cfg = { .gioset = { .pins = pins_giob } }, + .numchn = ARRAY_SIZE(pins_giob), + .bpch = 1, + .get = port_gioset_get, + .set = port_gioset_set, + }, + [PORT_ID_NHET1] = { + .name = "NHET1", + .cfg = { .gioset = { .pins = pins_nhet1 } }, + .numchn = ARRAY_SIZE(pins_nhet1), + .bpch = 1, + .get = port_gioset_get, + .set = port_gioset_set, + }, + [PORT_ID_ADC] = { + .name = "ADC", + .cfg = { .adc = { .reg = adcREG1, .group = adcGROUP1, .sem = 1 } }, + .numchn = 16, + .bpch = 16, + .get = port_adc_get, + .set = NULL, + }, +}; diff --git a/rpp/src/drv/_tms570_hdk/digital_io_def.c b/rpp/src/drv/_tms570_hdk/digital_io_def.c deleted file mode 100644 index a995d7c..0000000 --- a/rpp/src/drv/_tms570_hdk/digital_io_def.c +++ /dev/null @@ -1,230 +0,0 @@ -/* Copyright (C) 2012-2013 Czech Technical University in Prague - * - * Authors: - * - Michal Horn - * - * This document contains proprietary information belonging to Czech - * Technical University in Prague. Passing on and copying of this - * document, and communication of its contents is not permitted - * without prior written authorization. - * - * Abstract: - * This file contains gpio pins definitions - * - * On TMS570 MCU pins can operates as GIO on ports DMM, GIOA, GIOB, - * HET1 and HET2. Those pins, that are defined in this file, can be - * accessed directly as GPIO by hal_gpio_set_value and - * hal_gpio_get_value. Pin configuration can be modified by functions - * defined in hal_gpio_tms570 source and header files. - * - * NOTE: Although the configuration functions are implemented and - * should be ready to use, they were only slightly tested and are not - * used by the RPP software yet. - */ - -#include "drv/_tms570_hdk/digital_io_def.h" -#include "drv/digital_io.h" -#include "drv/spi.h" -#include "drv/_tms570_hdk/adc.h" - - -#define PORT_PIN(p,n,conf) (((p)< + * + * This document contains proprietary information belonging to Czech + * Technical University in Prague. Passing on and copying of this + * document, and communication of its contents is not permitted + * without prior written authorization. + * + */ + +#include "drv/port.h" +#include "drv/gio_names.h" +#include "drv/gio_tab.h" +#include "drv/adc.h" + +// Lists of pins assigned to the ports +static enum pin_name pins_gioa[] = { + PIN_GIOA0, PIN_GIOA1, PIN_GIOA2, PIN_GIOA3, + PIN_GIOA4, PIN_GIOA5, PIN_GIOA6, PIN_GIOA7 +}; +static enum pin_name pins_giob[] = { + PIN_GIOB0, PIN_GIOB1, PIN_GIOB2, PIN_GIOB3, + PIN_GIOB4, PIN_GIOB5, PIN_GIOB6, PIN_GIOB7 +}; +static enum pin_name pins_nhet1[] = { + PIN_NHET10, PIN_NHET11, PIN_NHET12, + PIN_NHET13, PIN_NHET14, PIN_NHET15, + PIN_NHET17, PIN_NHET18, PIN_NHET19, + PIN_NHET110, PIN_NHET111, PIN_NHET112, + PIN_NHET114, PIN_NHET115, PIN_NHET116, + PIN_NHET117, PIN_NHET118, PIN_NHET119, + PIN_NHET120, PIN_NHET121, PIN_NHET122, + PIN_NHET123, PIN_NHET124, PIN_NHET125, + PIN_NHET126, PIN_NHET127, PIN_NHET128, + PIN_NHET129, PIN_NHET130, PIN_NHET131 +}; + +// Port descriptors +const struct port_desc port_desc[] = { + [PORT_ID_GIOA] = { + .name = "GIOA", + .cfg = { .gioset = { .pins = pins_gioa } }, + .numchn = ARRAY_SIZE(pins_gioa), + .bpch = 1, + .get = port_gioset_get, + .set = port_gioset_set, + }, + [PORT_ID_GIOB] = { + .name = "GIOB", + .cfg = { .gioset = { .pins = pins_giob } }, + .numchn = ARRAY_SIZE(pins_giob), + .bpch = 1, + .get = port_gioset_get, + .set = port_gioset_set, + }, + [PORT_ID_NHET1] = { + .name = "NHET1", + .cfg = { .gioset = { .pins = pins_nhet1 } }, + .numchn = ARRAY_SIZE(pins_nhet1), + .bpch = 1, + .get = port_gioset_get, + .set = port_gioset_set, + }, + [PORT_ID_ADC] = { + .name = "ADC", + .cfg = { .adc = { .reg = adcREG1, .group = adcGROUP1, .sem = 1 } }, + .numchn = 16, + .bpch = 16, + .get = port_adc_get, + .set = NULL, + }, +}; diff --git a/rpp/src/drv/_tms570_hydctr/digital_io_def.c b/rpp/src/drv/_tms570_hydctr/digital_io_def.c deleted file mode 100644 index 1a90b4f..0000000 --- a/rpp/src/drv/_tms570_hydctr/digital_io_def.c +++ /dev/null @@ -1,229 +0,0 @@ -/* Copyright (C) 2012-2013 Czech Technical University in Prague - * - * Authors: - * - Michal Horn - * - * This document contains proprietary information belonging to Czech - * Technical University in Prague. Passing on and copying of this - * document, and communication of its contents is not permitted - * without prior written authorization. - * - * Abstract: - * This file contains gpio pins definitions - * - * On TMS570 MCU pins can operates as GIO on ports DMM, GIOA, GIOB, - * HET1 and HET2. Those pins, that are defined in this file, can be - * accessed directly as GPIO by hal_gpio_set_value and - * hal_gpio_get_value. Pin configuration can be modified by functions - * defined in hal_gpio_tms570 source and header files. - * - * NOTE: Although the configuration functions are implemented and - * should be ready to use, they were only slightly tested and are not - * used by the RPP software yet. - */ - -#include "drv/_tms570_hydctr/digital_io_def.h" -#include "drv/digital_io.h" -#include "drv/spi.h" -#include "drv/_tms570_hydctr/adc.h" - - -#define PORT_PIN(p,n,conf) (((p)< + * + * This document contains proprietary information belonging to Czech + * Technical University in Prague. Passing on and copying of this + * document, and communication of its contents is not permitted + * without prior written authorization. + * + */ + +#include "drv/port.h" +#include "drv/gio_names.h" +#include "drv/gio_tab.h" +#include "drv/adc.h" + +// Lists of pins assigned to the ports +static enum pin_name pins_gioa[] = { + PIN_GIOA0, PIN_GIOA1, PIN_GIOA2, PIN_GIOA3, + PIN_GIOA4, PIN_GIOA5, PIN_GIOA6, PIN_GIOA7 +}; +static enum pin_name pins_giob[] = { + PIN_GIOB0, PIN_GIOB1, PIN_GIOB2, PIN_GIOB3, + PIN_GIOB4, PIN_GIOB5, PIN_GIOB6, PIN_GIOB7 +}; +static enum pin_name pins_nhet1[] = { + PIN_NHET10, PIN_NHET11, PIN_NHET12, + PIN_NHET13, PIN_NHET14, PIN_NHET15, + PIN_NHET17, PIN_NHET18, PIN_NHET19, + PIN_NHET110, PIN_NHET111, PIN_NHET112, + PIN_NHET114, PIN_NHET115, PIN_NHET116, + PIN_NHET117, PIN_NHET118, PIN_NHET119, + PIN_NHET120, PIN_NHET121, PIN_NHET122, + PIN_NHET123, PIN_NHET124, PIN_NHET125, + PIN_NHET126, PIN_NHET127, PIN_NHET128, + PIN_NHET129, PIN_NHET130, PIN_NHET131 +}; + +// Port descriptors +const struct port_desc port_desc[] = { + [PORT_ID_GIOA] = { + .name = "GIOA", + .cfg = { .gioset = { .pins = pins_gioa } }, + .numchn = ARRAY_SIZE(pins_gioa), + .bpch = 1, + .get = port_gioset_get, + .set = port_gioset_set, + }, + [PORT_ID_GIOB] = { + .name = "GIOB", + .cfg = { .gioset = { .pins = pins_giob } }, + .numchn = ARRAY_SIZE(pins_giob), + .bpch = 1, + .get = port_gioset_get, + .set = port_gioset_set, + }, + [PORT_ID_NHET1] = { + .name = "NHET1", + .cfg = { .gioset = { .pins = pins_nhet1 } }, + .numchn = ARRAY_SIZE(pins_nhet1), + .bpch = 1, + .get = port_gioset_get, + .set = port_gioset_set, + }, + [PORT_ID_ADC] = { + .name = "ADC", + .cfg = { .adc = { .reg = adcREG1, .group = adcGROUP1, .sem = 1 } }, + .numchn = 16, + .bpch = 16, + .get = port_adc_get, + .set = NULL, + }, +}; diff --git a/rpp/src/drv/_tms570_rpp/digital_io_def.c b/rpp/src/drv/_tms570_rpp/digital_io_def.c deleted file mode 100644 index 84524e8..0000000 --- a/rpp/src/drv/_tms570_rpp/digital_io_def.c +++ /dev/null @@ -1,386 +0,0 @@ -/* Copyright (C) 2012-2013 Czech Technical University in Prague - * - * Authors: - * - Michal Horn - * - * This document contains proprietary information belonging to Czech - * Technical University in Prague. Passing on and copying of this - * document, and communication of its contents is not permitted - * without prior written authorization. - * - * Abstract: - * This file contains gpio pins definitions - * - * On TMS570 MCU pins can operates as GIO on ports DMM, GIOA, GIOB, - * HET1 and HET2. Those pins, that are defined in this file, can be - * accessed directly as GPIO by hal_gpio_set_value and - * hal_gpio_get_value. Pin configuration can be modified by functions - * defined in hal_gpio_tms570 source and header files. - * - * NOTE: Although the configuration functions are implemented and - * should be ready to use, they were only slightly tested and are not - * used by the RPP software yet. - */ - -#include "drv/_tms570_rpp/digital_io_def.h" -#include "drv/digital_io.h" -#include "drv/spi.h" -#include "drv/_tms570_rpp/adc.h" - - -#define PORT_PIN(p,n,conf) (((p)< + * - Michal Sojka + * + * This document contains proprietary information belonging to Czech + * Technical University in Prague. Passing on and copying of this + * document, and communication of its contents is not permitted + * without prior written authorization. + * + */ + +#include "drv/port.h" +#include "drv/gio_names.h" +#include "drv/gio_tab.h" +#include "drv/spi.h" +#include "drv/spi_tms570.h" +#include "drv/adc.h" + +// Lists of pins assigned to the gio ports +static enum pin_name pins_dinmcu[] = { + PIN_DIN8, PIN_DIN9, PIN_DIN10, PIN_DIN11, + PIN_DIN12, PIN_DIN13, PIN_DIN14, PIN_DIN15 +}; +static enum pin_name pins_houtin[] = { + PIN_HOUT1IN, PIN_HOUT2IN, PIN_HOUT3IN, + PIN_HOUT4IN, PIN_HOUT5IN, PIN_HOUT6IN +}; +static enum pin_name pins_houtdiag[] = { + PIN_HOUT1DIAG, PIN_HOUT2DIAG, PIN_HOUT3DIAG, + PIN_HOUT4DIAG, PIN_HOUT5DIAG, PIN_HOUT6DIAG +}; +static enum pin_name pins_mouten[] = { + PIN_MOUT1EN, PIN_MOUT2EN, PIN_MOUT3EN, + PIN_MOUT4EN, PIN_MOUT5EN, PIN_MOUT6EN +}; +static enum pin_name pins_moutin[] = { + PIN_MOUT1IN, PIN_MOUT2IN, PIN_MOUT3IN, + PIN_MOUT4IN, PIN_MOUT5IN, PIN_MOUT6IN +}; + +const struct port_desc port_desc[] = { + [PORT_ID_DINMCU] = { + .name = "DINMCU", + .numchn = ARRAY_SIZE(pins_dinmcu), + .bpch = 1, + .get = port_gioset_get, + .set = NULL, + .cfg = { .gioset = { .pins = pins_dinmcu } }, + }, + [PORT_ID_DINSPI] = { + .name = "DINSPI", + .numchn = 1, + .bpch = 24, + .set = port_spi_set, + .cfg = { .spi = { .ifc = 1, .cs = 0 } }, + }, + [PORT_ID_HOUTDIAG] = { + .name = "HOUTDIAG", + .numchn = ARRAY_SIZE(pins_houtdiag), + .bpch = 1, + .get = port_gioset_get, + .set = NULL, + .cfg = { .gioset = { .pins = pins_houtdiag } }, + }, + [PORT_ID_HOUTIN] = { + .name = "HOUTIN", + .numchn = ARRAY_SIZE(pins_houtin), + .bpch = 1, + .get = port_gioset_get, + .set = port_gioset_set, + .cfg = { .gioset = { .pins = pins_houtin } }, + }, + [PORT_ID_HOUTIFBK] = { + .name = "HOUTIFBK", + .numchn = 6, + .bpch = 16, + .get = port_adc_get, + .set = NULL, + .cfg = { .adc = { .reg = adcREG2, .group = adcGROUP1, .sem = 0 } }, + }, + [PORT_ID_ADC] = { + .name = "ADC", + .numchn = 12, + .bpch = 16, + .get = port_adc_get, + .set = NULL, + .cfg = { .adc = { .reg = adcREG1, .group = adcGROUP1, .sem = 1 } }, + }, + [PORT_ID_LOUT] = { + .name = "LOUT", + .numchn = 1, + .bpch = 32, + .get = NULL, + .set = port_spi_set, + .cfg = { .spi = { .ifc = 1, .cs = 1 }, }, + }, + [PORT_ID_DAC1_2] = { + .name = "DAC12", + .numchn = 1, + .bpch = 16, + .get = NULL, + .set = port_spi_set, + .cfg = { .spi = { .ifc = 3, .cs = 0 }, }, + }, + [PORT_ID_DAC3_4] = { + .name = "DAC34", + .numchn = 1, + .bpch = 16, + .get = NULL, + .set = port_spi_set, + .cfg = { .spi = { .ifc = 3, .cs = 1 }, }, + }, + [PORT_ID_DACDREF] = { + .name = "DACDREF", /* Reference voltage for DIN */ + .numchn = 1, + .bpch = 16, + .get = NULL, + .set = port_spi_set, + .cfg = { .spi = { .ifc = 3, .cs = 2 }, }, + }, + [PORT_ID_HBR] = { + .name = "HBR", + .numchn = 1, + .bpch = 16, + .get = NULL, + .set = port_spi_set, + .cfg = { .spi = { .ifc = 4, .cs = 0 }, }, + }, + [PORT_ID_FRAY1] = { + .name = "FRAY1", + .numchn = 1, + .bpch = 16, + .get = NULL, + .set = port_spi_set, + .cfg = { .spi = { .ifc = 4, .cs = 1 }, }, + }, + [PORT_ID_FRAY2] = { + .name = "FRAY2", + .numchn = 1, + .bpch = 16, + .get = NULL, + .set = port_spi_set, + .cfg = { .spi = { .ifc = 4, .cs = 2 }, }, + }, + [PORT_ID_MOUTEN] = { + .name = "MOUTEN", + .numchn = ARRAY_SIZE(pins_mouten), + .bpch = 1, + .get = port_gioset_get, + .set = NULL, + .cfg = { .gioset = { .pins = pins_mouten } }, + }, + [PORT_ID_MOUTIN] = { + .name = "MOUTIN", + .numchn = ARRAY_SIZE(pins_moutin), + .bpch = 1, + .get = port_gioset_get, + .set = port_gioset_set, + .cfg = { .gioset = { .pins = pins_moutin } }, + } +}; -- 2.39.2