From: Michal Horn Date: Wed, 22 Jul 2015 10:43:45 +0000 (+0200) Subject: Remove the rest of the HAL layer X-Git-Tag: eaton-0.5.5~21 X-Git-Url: http://rtime.felk.cvut.cz/gitweb/pes-rpp/rpp-lib.git/commitdiff_plain/c46b9f237ddb6dc869ecf0fd443157dcc843956f Remove the rest of the HAL layer Move POM from HAL to SYS layer Move SPI translator to the test-sw application --- diff --git a/Makefile.var b/Makefile.var index f5bc3b7..525654e 100644 --- a/Makefile.var +++ b/Makefile.var @@ -153,10 +153,8 @@ rpp_lib_SOURCES_tms570_rpp = \ rpp/src/drv/hout.c \ rpp/src/drv/lout.c \ rpp/src/drv/mout.c \ - rpp/src/hal/pom_vect_remap.c \ rpp/src/drv/spi.c \ rpp/src/drv/spi_tms570.c \ - rpp/src/hal/spi_resp_transl.c \ rpp/src/rpp/dac.c \ rpp/src/rpp/din.c \ rpp/src/rpp/eth.c \ @@ -169,6 +167,7 @@ rpp_lib_SOURCES_tms570_rpp = \ rpp/src/rpp/mout.c \ rpp/src/rpp/sdc.c \ rpp/src/rpp/sdr.c \ + rpp/src/sys/pom_vect_remap.c \ rpp/src/sys/ti_drv_lin.c # Add target specific and conditional sources to the list of sources diff --git a/rpp/include/hal/spi_resp_transl.h b/rpp/include/hal/spi_resp_transl.h deleted file mode 100644 index c7cc410..0000000 --- a/rpp/include/hal/spi_resp_transl.h +++ /dev/null @@ -1,76 +0,0 @@ -/** - * - * @file spi_resp_transl.h - * - * @copyright Copyright (C) 2012-2013 Czech Technical University in Prague - * - * @author Michal Horn - */ - -#ifndef SPI_RESP_TRANSL_H_ -#define SPI_RESP_TRANSL_H_ - -//#include "hal_port_def.h" -//#include "cmdproc_utils.h" - -#define NUM_SPI_DEVICES 7 -#define DIN_NUM_GLOB_FD 24 -#define LOUT_NUM_GLOB_FD 28 -#define DAC_NUM_GLOB_FD 1 -#define FRAY_NUM_GLOB_FD 12 -#define HBR_NUM_STATREG_FD 14 -#define HBR_NUM_APPLREG1_FD 15 -#define HBR_NUM_APPLREG2_FD 13 -#define HBR_NUM_APPLREG3_FD 16 -#define HBR_NUM_DIADDR0_FD 10 -#define HBR_NUM_DIADDR1_FD 9 -#define HBR_NUM_DIADDR2_FD 9 -#define HBR_NUM_DIADDR3_FD 16 - -#define DIN_NUM_CMD_D 1 -#define LOUT_NUM_CMD_D 1 -#define DAC_NUM_CMD_D 1 -#define FRAY_NUM_CMD_D 1 -#define HBR_NUM_CMD_D 12 - -#define MAX_NUM_ROWS 32 - -/*masked fields macros*/ -//#define __val2mfld(mask,val) (((mask)&~((mask)<<1))*(val)&(mask)) -//#define __mfld2val(mask,val) (((val)&(mask))/((mask)&~((mask)<<1))) - - -typedef struct spitr_field_desc_st { - const char *field_name; - uint32_t mask; -} spitr_field_desc_t; - -typedef struct spitr_cmd_map_st { - uint32_t cmd_msk; - uint32_t command; - const spitr_field_desc_t *field_desc; - uint32_t num_fields; -} spitr_cmd_map_t; - -typedef struct spitr_name_map_st { - const char *spi_name; - const spitr_cmd_map_t *cmd_map; - uint32_t num_cmd; -} spitr_name_map_t; - -typedef struct spitr_reg_translate_table_row_st { - const char *field_name; - uint32_t value; -} spitr_reg_translate_table_row_t; - -typedef struct spitr_reg_translate_table_st { - spitr_reg_translate_table_row_t row[MAX_NUM_ROWS]; - uint32_t num_rows; -} spitr_reg_translate_table_t; - - -const spitr_cmd_map_t *get_spi_cmd_map(const char *spi_port_name, int len, uint32_t *num_cmdDesc); -const spitr_field_desc_t *get_spi_field_desc(const spitr_cmd_map_t *cmd_map, uint32_t num_cmd, uint32_t cmd, uint32_t *num_fdDesc); -int spitr_fill_tr_table(const spitr_field_desc_t *fd, uint32_t num_fields, uint32_t value, spitr_reg_translate_table_t *table); - -#endif /* SPI_RESP_TRANSL_H_ */ diff --git a/rpp/src/hal/.gitattributes b/rpp/src/hal/.gitattributes deleted file mode 100644 index 0e89bec..0000000 --- a/rpp/src/hal/.gitattributes +++ /dev/null @@ -1 +0,0 @@ -/pom_vect_remap.c eaton diff --git a/rpp/src/hal/spi_resp_transl.c b/rpp/src/hal/spi_resp_transl.c deleted file mode 100644 index 967025f..0000000 --- a/rpp/src/hal/spi_resp_transl.c +++ /dev/null @@ -1,358 +0,0 @@ -/* Copyright (C) 2012-2013, 2015 Czech Technical University in Prague - * - * Authors: - * - Michal Horn - * - * This document contains proprietary information belonging to Czech - * Technical University in Prague. Passing on and copying of this - * document, and communication of its contents is not permitted - * without prior written authorization. - * - * File : spi_resp_transl.c - * - * Abstract: - * This module provides the capability to translate pure SPI response into human readable form. - * - * Some SPI peripherals provides simple responses, but some others provide responses depending - * on previous command, they have obtained. - * - * So we have a structure, that maps SPI peripheral names (spi port names) to arrays of another - * structure, that maps spi commands to responses field descriptors. - * - * Command to response field map consists of a command mask, command, pointer to field - * descriptor and number of fields in field descriptor. - * - * Each fields descriptor maps field name to field mask, that specifies the meaning of each - * bit or group of bits in the response. - */ - -#include "drv/digital_io.h" -#include "drv/spi.h" -#include "hal/spi_resp_transl.h" - -// Field descriptors -static const spitr_field_desc_t din_glob_field_descs[DIN_NUM_GLOB_FD] = { - { .field_name = "Thermal flag\t", .mask = (1 << 23) }, - { .field_name = "INT flag\t", .mask = (1 << 22) }, - { .field_name = "SP0 - DIN0\t", .mask = (1 << 14) }, - { .field_name = "SP1 - DIN1\t", .mask = (1 << 15) }, - { .field_name = "SP2 - DIN2\t", .mask = (1 << 16) }, - { .field_name = "SP3 - DIN3\t", .mask = (1 << 17) }, - { .field_name = "SP4 - DIN4\t", .mask = (1 << 18) }, - { .field_name = "SP5 - DIN5\t", .mask = (1 << 19) }, - { .field_name = "SP6 - DIN6\t", .mask = (1 << 20) }, - { .field_name = "SP7 - DIN7\t", .mask = (1 << 21) }, - { .field_name = "SG0 - DIN8\t", .mask = (1 << 0) }, - { .field_name = "SG1 - DIN9\t", .mask = (1 << 1) }, - { .field_name = "SG2 - DIN10\t", .mask = (1 << 2) }, - { .field_name = "SG3 - DIN11\t", .mask = (1 << 3) }, - { .field_name = "SG4 - DIN12\t", .mask = (1 << 4) }, - { .field_name = "SG5 - DIN13\t", .mask = (1 << 5) }, - { .field_name = "SG6 - DIN14\t", .mask = (1 << 6) }, - { .field_name = "SG7 - DIN15\t", .mask = (1 << 7) }, - { .field_name = "SG8 - NA\t", .mask = (1 << 8) }, - { .field_name = "SG9 - NA\t", .mask = (1 << 9) }, - { .field_name = "SG10 - NA\t", .mask = (1 << 10) }, - { .field_name = "SG11 - NA\t", .mask = (1 << 11) }, - { .field_name = "SG12 - NA\t", .mask = (1 << 12) }, - { .field_name = "SG13 - NA\t", .mask = (1 << 13) } -}; - -static const spitr_field_desc_t lout_glob_field_descs[LOUT_NUM_GLOB_FD] = { - { .field_name = "U401 VS PS M", .mask = (1 << 24) }, - { .field_name = "U401 IN8 state", .mask = (1 << 27) }, - { .field_name = "U401 IN7 state", .mask = (1 << 28) }, - { .field_name = "U401 IN6 state", .mask = (1 << 29) }, - { .field_name = "U401 IN5 state", .mask = (1 << 30) }, - { .field_name = "U401 Driver 8 status", .mask = (uint32_t)(1 << 31) }, - { .field_name = "U401 Driver 7 status", .mask = (1 << 16) }, - { .field_name = "U401 Driver 6 status", .mask = (1 << 17) }, - { .field_name = "U401 Driver 5 status", .mask = (1 << 18) }, - { .field_name = "U401 Driver 4 status", .mask = (1 << 19) }, - { .field_name = "U401 Driver 3 status", .mask = (1 << 20) }, - { .field_name = "U401 Driver 2 status", .mask = (1 << 21) }, - { .field_name = "U401 Driver 1 status", .mask = (1 << 22) }, - { .field_name = "U401 Thermal warning", .mask = (1 << 23) }, - { .field_name = "U404 VS PS M", .mask = (1 << 8) }, - { .field_name = "U404 IN8 state", .mask = (1 << 11) }, - { .field_name = "U404 IN7 state", .mask = (1 << 12) }, - { .field_name = "U404 IN6 state", .mask = (1 << 13) }, - { .field_name = "U404 IN5 state", .mask = (1 << 14) }, - { .field_name = "U404 Driver 8 status", .mask = (1 << 15) }, - { .field_name = "U404 Driver 7 status", .mask = (1 << 0) }, - { .field_name = "U404 Driver 6 status", .mask = (1 << 1) }, - { .field_name = "U404 Driver 5 status", .mask = (1 << 2) }, - { .field_name = "U404 Driver 4 status", .mask = (1 << 3) }, - { .field_name = "U404 Driver 3 status", .mask = (1 << 4) }, - { .field_name = "U404 Driver 2 status", .mask = (1 << 5) }, - { .field_name = "U404 Driver 1 status", .mask = (1 << 6) }, - { .field_name = "U404 Thermal warning", .mask = (1 << 7) } -}; - -static const spitr_field_desc_t dac_glob_field_descs[DAC_NUM_GLOB_FD] = { - { .field_name = "Provides no informations", .mask = 0 } -}; - -static const spitr_field_desc_t fray_glob_field_descs[FRAY_NUM_GLOB_FD] = { - { .field_name = "Parity bit", .mask = (1 << 0) }, - { .field_name = "SPI error", .mask = (1 << 5) }, - { .field_name = "UVVIO", .mask = (1 << 6) }, - { .field_name = "UVVCC", .mask = (1 << 7) }, - { .field_name = "TXEN clamped", .mask = (1 << 8) }, - { .field_name = "Temp high", .mask = (1 << 9) }, - { .field_name = "Bus error", .mask = (1 << 10) }, - { .field_name = "Pwon", .mask = (1 << 11) }, - { .field_name = "BGE clamped", .mask = (1 << 12) }, - { .field_name = "Transmiter enabled", .mask = (1 << 13) }, - { .field_name = "Normal mode", .mask = (1 << 14) }, - { .field_name = "Bus wake", .mask = (1 << 15) } -}; - -static const spitr_field_desc_t hbr_statreg0_field_descs[HBR_NUM_STATREG_FD] = { - { .field_name = "GL_ER", .mask = (1 << 15) }, - { .field_name = "Frame Error", .mask = (1 << 14) }, - { .field_name = "STK_RESET_Q", .mask = (1 << 13) }, - { .field_name = "TSD", .mask = (1 << 12) }, - { .field_name = "TW", .mask = (1 << 11) }, - { .field_name = "UV", .mask = (1 << 10) }, - { .field_name = "OV", .mask = (1 << 9) }, - { .field_name = "WDTO", .mask = (1 << 8) }, - { .field_name = "DS_MON_3", .mask = (1 << 7) }, - { .field_name = "DS_MON_2", .mask = (1 << 6) }, - { .field_name = "DS_MON_1", .mask = (1 << 5) }, - { .field_name = "DS_MON_0", .mask = (1 << 4) }, - { .field_name = "OT_EXT", .mask = (1 << 1) }, - { .field_name = "CP_LOW", .mask = (1 << 0) } -}; - -static const spitr_field_desc_t hbr_applreg1_field_descs[HBR_NUM_APPLREG1_FD] = { - { .field_name = "GL_ER", .mask = (1 << 15) }, - { .field_name = "Frame Error", .mask = (1 << 14) }, - { .field_name = "STK_RESET_Q", .mask = (1 << 13) }, - { .field_name = "TSD", .mask = (1 << 12) }, - { .field_name = "TW", .mask = (1 << 11) }, - { .field_name = "UV", .mask = (1 << 10) }, - { .field_name = "OV", .mask = (1 << 9) }, - { .field_name = "WDTO", .mask = (1 << 8) }, - { .field_name = "RWD", .mask = (1 << 7) }, - { .field_name = "FW_PAS", .mask = (1 << 6) }, - { .field_name = "OFF_CAL", .mask = (1 << 5) }, - { .field_name = "CLK_SPCTR", .mask = (1 << 4) }, - { .field_name = "OVT", .mask = (1 << 3) }, - { .field_name = "OV_UV_RD", .mask = (1 << 2) }, - { .field_name = "DIAG", .mask = (3 << 0) } -}; - -static const spitr_field_desc_t hbr_applreg2_field_descs[HBR_NUM_APPLREG2_FD] = { - { .field_name = "GL_ER", .mask = (1 << 15) }, - { .field_name = "Frame Error", .mask = (1 << 14) }, - { .field_name = "STK_RESET_Q", .mask = (1 << 13) }, - { .field_name = "TSD", .mask = (1 << 12) }, - { .field_name = "TW", .mask = (1 << 11) }, - { .field_name = "UV", .mask = (1 << 10) }, - { .field_name = "OV", .mask = (1 << 9) }, - { .field_name = "WDTO", .mask = (1 << 8) }, - { .field_name = "RWD", .mask = (1 << 7) }, - { .field_name = "COPT", .mask = (7 << 4) }, - { .field_name = "FW", .mask = (1 << 3) }, - { .field_name = "MCSA", .mask = (1 << 2) }, - { .field_name = "GCSA", .mask = (3 << 0) } -}; - -static const spitr_field_desc_t hbr_applreg3_field_descs[HBR_NUM_APPLREG3_FD] = { - { .field_name = "GL_ER", .mask = (1 << 15) }, - { .field_name = "Frame Error", .mask = (1 << 14) }, - { .field_name = "STK_RESET_Q", .mask = (1 << 13) }, - { .field_name = "TSD", .mask = (1 << 12) }, - { .field_name = "TW", .mask = (1 << 11) }, - { .field_name = "UV", .mask = (1 << 10) }, - { .field_name = "OV", .mask = (1 << 9) }, - { .field_name = "WDTO", .mask = (1 << 8) }, - { .field_name = "RWD", .mask = (1 << 7) }, - { .field_name = "EXT_TS", .mask = (1 << 6) }, - { .field_name = "EXT_TH_5", .mask = (1 << 5) }, - { .field_name = "EXT_TH_4", .mask = (1 << 4) }, - { .field_name = "EXT_TH_3", .mask = (1 << 3) }, - { .field_name = "EXT_TH_2", .mask = (1 << 2) }, - { .field_name = "EXT_TH_1", .mask = (1 << 1) }, - { .field_name = "EXT_TH_0", .mask = (1 << 0) } -}; - -static const spitr_field_desc_t hbr_diaddr0_field_descs[HBR_NUM_DIADDR0_FD] = { - { .field_name = "GL_ER", .mask = (1 << 15) }, - { .field_name = "Frame Error", .mask = (1 << 14) }, - { .field_name = "STK_RESET_Q", .mask = (1 << 13) }, - { .field_name = "TSD", .mask = (1 << 12) }, - { .field_name = "TW", .mask = (1 << 11) }, - { .field_name = "UV", .mask = (1 << 10) }, - { .field_name = "OV", .mask = (1 << 9) }, - { .field_name = "WDTO", .mask = (1 << 8) }, - { .field_name = "FAM", .mask = (3 << 6) }, - { .field_name = "NR_PI", .mask = (0x3F << 0) } -}; - -static const spitr_field_desc_t hbr_diaddr1_field_descs[HBR_NUM_DIADDR1_FD] = { - { .field_name = "GL_ER", .mask = (1 << 15) }, - { .field_name = "Frame Error", .mask = (1 << 14) }, - { .field_name = "STK_RESET_Q", .mask = (1 << 13) }, - { .field_name = "TSD", .mask = (1 << 12) }, - { .field_name = "TW", .mask = (1 << 11) }, - { .field_name = "UV", .mask = (1 << 10) }, - { .field_name = "OV", .mask = (1 << 9) }, - { .field_name = "WDTO", .mask = (1 << 8) }, - { .field_name = "PRD_ID", .mask = (0xFF << 0) } -}; - -static const spitr_field_desc_t hbr_diaddr2_field_descs[HBR_NUM_DIADDR2_FD] = { - { .field_name = "GL_ER", .mask = (1 << 15) }, - { .field_name = "Frame Error", .mask = (1 << 14) }, - { .field_name = "STK_RESET_Q", .mask = (1 << 13) }, - { .field_name = "TSD", .mask = (1 << 12) }, - { .field_name = "TW", .mask = (1 << 11) }, - { .field_name = "UV", .mask = (1 << 10) }, - { .field_name = "OV", .mask = (1 << 9) }, - { .field_name = "WDTO", .mask = (1 << 8) }, - { .field_name = "PRD_ID", .mask = (0xFF << 0) } -}; - -static const spitr_field_desc_t hbr_diaddr3_field_descs[HBR_NUM_DIADDR3_FD] = { - { .field_name = "GL_ER", .mask = (1 << 15) }, - { .field_name = "Frame Error", .mask = (1 << 14) }, - { .field_name = "STK_RESET_Q", .mask = (1 << 13) }, - { .field_name = "TSD", .mask = (1 << 12) }, - { .field_name = "TW", .mask = (1 << 11) }, - { .field_name = "UV", .mask = (1 << 10) }, - { .field_name = "OV", .mask = (1 << 9) }, - { .field_name = "WDTO", .mask = (1 << 8) }, - { .field_name = "BR", .mask = (1 << 7) }, - { .field_name = "AR5", .mask = (1 << 6) }, - { .field_name = "AR4", .mask = (1 << 5) }, - { .field_name = "AR3", .mask = (1 << 4) }, - { .field_name = "32-bits", .mask = (1 << 3) }, - { .field_name = "24-bits", .mask = (1 << 2) }, - { .field_name = "16-bits", .mask = (1 << 1) }, - { .field_name = "8-bits", .mask = (1 << 0) } -}; - -/* Map register descriptors to spi commands */ -static const spitr_cmd_map_t din_cmd_map[DIN_NUM_CMD_D] = { - { .cmd_msk = 0, .command = 0, .field_desc = din_glob_field_descs, .num_fields = DIN_NUM_GLOB_FD} -}; - -static const spitr_cmd_map_t lout_cmd_map[LOUT_NUM_CMD_D] = { - { .cmd_msk = 0, .command = 0, .field_desc = lout_glob_field_descs, .num_fields = LOUT_NUM_GLOB_FD } -}; - -static const spitr_cmd_map_t dac_cmd_map[DAC_NUM_CMD_D] = { - { .cmd_msk = 0, .command = 0, .field_desc = dac_glob_field_descs, .num_fields = DAC_NUM_GLOB_FD } -}; - -static const spitr_cmd_map_t fray_cmd_map[FRAY_NUM_CMD_D] = { - { .cmd_msk = 0, .command = 0, .field_desc = fray_glob_field_descs, .num_fields = FRAY_NUM_GLOB_FD } -}; - -static const spitr_cmd_map_t hbr_cmd_map[HBR_NUM_CMD_D] = { - { .cmd_msk = 0x0000FF00, .command = 0xC000, .field_desc = hbr_diaddr0_field_descs, .num_fields = HBR_NUM_DIADDR0_FD }, - { .cmd_msk = 0x0000FF00, .command = 0xC100, .field_desc = hbr_diaddr1_field_descs, .num_fields = HBR_NUM_DIADDR1_FD }, - { .cmd_msk = 0x0000FF00, .command = 0xC200, .field_desc = hbr_diaddr2_field_descs, .num_fields = HBR_NUM_DIADDR2_FD }, - { .cmd_msk = 0x0000FF00, .command = 0xC300, .field_desc = hbr_diaddr3_field_descs, .num_fields = HBR_NUM_DIADDR3_FD }, - { .cmd_msk = 0x0000FF00, .command = 0x8000, .field_desc = hbr_statreg0_field_descs, .num_fields = HBR_NUM_STATREG_FD }, - { .cmd_msk = 0x0000FF00, .command = 0x4000, .field_desc = hbr_statreg0_field_descs, .num_fields = HBR_NUM_STATREG_FD }, - { .cmd_msk = 0x0000FF00, .command = 0x4100, .field_desc = hbr_applreg1_field_descs, .num_fields = HBR_NUM_APPLREG1_FD }, - { .cmd_msk = 0x0000FF00, .command = 0x4200, .field_desc = hbr_applreg2_field_descs, .num_fields = HBR_NUM_APPLREG2_FD }, - { .cmd_msk = 0x0000FF00, .command = 0x4300, .field_desc = hbr_applreg3_field_descs, .num_fields = HBR_NUM_APPLREG3_FD }, - { .cmd_msk = 0x0000FF00, .command = 0x0100, .field_desc = hbr_applreg1_field_descs, .num_fields = HBR_NUM_APPLREG1_FD }, - { .cmd_msk = 0x0000FF00, .command = 0x0200, .field_desc = hbr_applreg2_field_descs, .num_fields = HBR_NUM_APPLREG2_FD }, - { .cmd_msk = 0x0000FF00, .command = 0x0300, .field_desc = hbr_applreg3_field_descs, .num_fields = HBR_NUM_APPLREG3_FD }, -}; - -/* Map command maps to SPI peripheral name */ -static const spitr_name_map_t spitr_map[NUM_SPI_DEVICES] = { - { .spi_name = DIO_PORT_NAME_DINSPI, .cmd_map = din_cmd_map, .num_cmd = DIN_NUM_CMD_D}, - { .spi_name = DIO_PORT_NAME_LOUT, .cmd_map = lout_cmd_map, .num_cmd = LOUT_NUM_CMD_D }, - { .spi_name = DIO_PORT_NAME_DAC1_2, .cmd_map = dac_cmd_map, .num_cmd = DAC_NUM_CMD_D }, - { .spi_name = DIO_PORT_NAME_DAC3_4, .cmd_map = dac_cmd_map, .num_cmd = DAC_NUM_CMD_D }, - { .spi_name = DIO_PORT_NAME_HBR, .cmd_map = hbr_cmd_map, .num_cmd = HBR_NUM_CMD_D }, - { .spi_name = DIO_PORT_NAME_FRAY1, .cmd_map = fray_cmd_map, .num_cmd = FRAY_NUM_CMD_D }, - { .spi_name = DIO_PORT_NAME_FRAY2, .cmd_map = fray_cmd_map, .num_cmd = FRAY_NUM_CMD_D } -}; - - - -/** - * Get the map spi command to spi response. - * @param[in] spi_port_name String of the port name - * @param[in] len Length of the port name string, if terminated by '/0', then len = -1 - * @param[out] num_cmdDesc returns number of command->fieldDesc fields assigned to the map - * @return command to field_desc map or NULL if not found - */ -const spitr_cmd_map_t *get_spi_cmd_map(const char *spi_port_name, int len, uint32_t *num_cmdDesc) -{ - uint32_t i; - const char *spi_port_name_ptr; - char port_name_term[32]; - - if (len != -1) { // port name not terminated by '\0' - strncpy(port_name_term, spi_port_name, len); - port_name_term[len] = '\0'; - spi_port_name_ptr = port_name_term; - } - else spi_port_name_ptr = spi_port_name; - - for (i = 0; i < NUM_SPI_DEVICES; i++) { - if (strcmp(spi_port_name_ptr, spitr_map[i].spi_name) == 0) { - *num_cmdDesc = spitr_map[i].num_cmd; - return spitr_map[i].cmd_map; - } - } - *num_cmdDesc = 0; - return NULL; -} - -/** - * Get fields descriptor according to the field descriptor map and command. - * @param[in] cmd_map pointer to structure, that maps commands to their field descriptors - * @param[in] num_cmd Number of fields in the cmd_map - * @param[in] cmd Command used as a key value in the cmd_map. We are searching for the field descriptors assigned to this command - * @param[out] num_fdDesc Number of fields in field descriptors structure, that was found - * @return pointer to the structure that maps field names to field masks or NULL, when not found - */ -const spitr_field_desc_t *get_spi_field_desc(const spitr_cmd_map_t *cmd_map, uint32_t num_cmd, uint32_t cmd, uint32_t *num_fdDesc) -{ - if (cmd_map == NULL) { - *num_fdDesc = 0; - return NULL; - } - - uint32_t i; - for (i = 0; i < num_cmd; i++) { - uint32_t mskcmd = cmd & cmd_map[i].cmd_msk; - uint32_t tmpCmd = cmd_map[i].command; - if (mskcmd == tmpCmd) { - *num_fdDesc = cmd_map[i].num_fields; - return cmd_map[i].field_desc; - } - } - *num_fdDesc = cmd_map[i].num_fields; - return NULL; -} - -/** - * Translate spi response into human readable form - * @param[in] fd Pointer to structure that maps Field names to field value masks - * @param[in] num_fields Number of fields in fd - * @param[in] value spi response to be traslated - * @param[out] table The result is stored in this table, where each row consists of the value name and the value - * @return number of rows in the translated table - */ -int spitr_fill_tr_table(const spitr_field_desc_t *fd, uint32_t num_fields, uint32_t value, spitr_reg_translate_table_t *table) -{ - uint32_t i; - - for (i = 0; i < num_fields; i++) { - table->row[i].field_name = fd[i].field_name; - table->row[i].value = __mfld2val(fd[i].mask, value); - } - table->num_rows = num_fields; - return i; -} diff --git a/rpp/src/hal/pom_vect_remap.c b/rpp/src/sys/pom_vect_remap.c similarity index 100% rename from rpp/src/hal/pom_vect_remap.c rename to rpp/src/sys/pom_vect_remap.c