From: Michal Sojka Date: Sun, 2 Aug 2015 16:56:22 +0000 (+0200) Subject: Update rpp/gio.* to the new drv/gio interface and remove crap from it X-Git-Tag: eaton-0.5.5~17 X-Git-Url: http://rtime.felk.cvut.cz/gitweb/pes-rpp/rpp-lib.git/commitdiff_plain/389491eb271c6219c1e3c9bfff425b38e35287ab Update rpp/gio.* to the new drv/gio interface and remove crap from it --- diff --git a/rpp/include/rpp/gio.h b/rpp/include/rpp/gio.h index 83a89ba..fd832f8 100644 --- a/rpp/include/rpp/gio.h +++ b/rpp/include/rpp/gio.h @@ -1,14 +1,22 @@ /* - * gio.h + * Copyright (C) 2015 Czech Technical University in Prague + * + * Authors: + * - Michal Sojka + * - Michal Horn + * + * This document contains proprietary information belonging to Czech + * Technical University in Prague. Passing on and copying of this + * document, and communication of its contents is not permitted + * without prior written authorization. * - * Created on: 29.10.2014 - * Author: Michal Horn */ -#ifndef GIO_H_ -#define GIO_H_ +#ifndef RPP_GIO_H +#define RPP_GIO_H #include "types.h" +#include "drv/gio_names.h" #define RPP_GIO_PORT_GIOA 0x2 #define RPP_GIO_PORT_GIOB 0x4 @@ -17,43 +25,40 @@ int8_t rpp_gio_init(uint32_t init_ports); -int8_t rpp_gio_set_val(const char* pin_name, uint8_t value); - -int8_t rpp_gio_get_val(const char* pin_name); - -int8_t rpp_gio_set_output(const char* pin_name, uint8_t value); - -int8_t rpp_gio_set_input(const char* pin_name); - -int8_t rpp_gio_set_push_pull(const char* pin_name, boolean_t pull_up); - -int8_t rpp_gio_set_open_drain(const char* pin_name); - -int8_t rpp_gio_set_pull_up(const char* pin_name); - -int8_t rpp_gio_set_pull_down(const char* pin_name); - -boolean_t rpp_gio_is_dir_output(const char* pin_name); +int8_t rpp_gio_set(enum pin_name pin, boolean_t value); +int8_t rpp_gio_get(enum pin_name pin); -boolean_t rpp_gio_is_push_pull(const char* pin_name); +/** GIO pin input mode */ +enum rpp_gio_in_mode { + RPP_GIO_MODE_PULLDIS, /**< Disable pull resistor */ + RPP_GIO_MODE_PULLUP, + RPP_GIO_MODE_PULLDOWN, +}; -boolean_t rpp_gio_is_pull_up(const char* pin_name); +/** GIO pin direction */ +enum rpp_gio_io { + RPP_GIO_IN, + RPP_GIO_OUT, +}; -uint32_t rpp_gio_get_pin_cnt(); - -int8_t rpp_gio_get_pin_names(const char** pin_names, uint8_t max_names_cnt); - -int8_t rpp_port_set_val(const char* port_name, uint8_t port_num_vals, const uint32_t* values); - -int8_t rpp_port_get_val(const char* port_name, uint8_t port_num_vals, uint32_t* values); - -int32_t rpp_port_get_pin_cnt(const char* port_name); - -int32_t rpp_port_get_port_cnt(); - -int8_t rpp_port_get_port_names(const char** port_names, uint8_t max_names_cnt); - -int8_t rpp_port_get_interface_type(const char* port_name); +/** + * Configure GIO pin + * + * @param pin Pin to configure + * @param io Configure the pin as input or output. + * @param in_mode Input settings. Ignored when pin is configured as + * output. + * @param open_drain Output is open drain when TRUE, pull/push when + * FALSE. Ignored when pin is configured as input. + * + * @return SUCCESS or FAILURE. + */ +int8_t rpp_gio_setup(enum pin_name pin, + enum rpp_gio_io io, + enum rpp_gio_in_mode in_mode, + boolean_t open_drain); +int8_t rpp_gio_port_set(int port, uint32_t bits); +int8_t rpp_gio_port_get(int port, uint32_t *bits); #endif /* GIO_H_ */ diff --git a/rpp/src/rpp/gio.c b/rpp/src/rpp/gio.c index 2d2b473..4cbdefc 100644 --- a/rpp/src/rpp/gio.c +++ b/rpp/src/rpp/gio.c @@ -1,6 +1,7 @@ /* Copyright (C) 2013-2015 Czech Technical University in Prague * Authors: * - Michal Horn + * - Michal Sojka * * This document contains proprietary information belonging to Czech * Technical University in Prague. Passing on and copying of this @@ -9,31 +10,29 @@ * */ +#include "base.h" #include "rpp/gio.h" -#include "drv/digital_io.h" +#include "drv/gio_tab.h" static uint32_t ports_initialized = 0; /* Configuration consistency check */ -#if RPP_GIO_PORT_GIOA != (1 << DIO_PORT_ID_GIOA) || \ - RPP_GIO_PORT_GIOB != (1 << DIO_PORT_ID_GIOB) || \ - RPP_GIO_PORT_NHET1 != (1 << DIO_PORT_ID_HET1) -#error Port configuration is not consistent. -#endif +STATIC_ASSERT(RPP_GIO_PORT_GIOA == (1 << GIO_PORT_GIOA) && + RPP_GIO_PORT_GIOB == (1 << GIO_PORT_GIOB) && + RPP_GIO_PORT_NHET1 == (1 << GIO_PORT_HET1), + Port_configuration_is_not_consistent); int8_t rpp_gio_init(uint32_t init_ports) { - unsigned pin; + enum pin_name pin; gioREG->GCR0 = 1; // Bring GIO out of reset - dio_pin_map_element_t* pin_map = dio_gpio_get_pin_map(); - - for (pin = 0; pin < dio_gpio_get_pin_cnt(); pin++) { - int port_num = dio_gpio_pin_get_port_num(pin_map[pin].pin_desc); + for (pin = (enum pin_name)0; pin < _PIN_COUNT; pin++) { + int port_num = gio_port(gio_table[pin].pin_dsc); if ((init_ports & (1 << port_num)) && !(ports_initialized & (1 << port_num))) - dio_gpio_pin_configure(pin_map[pin].pin_desc); + gio_setup(gio_table[pin].pin_dsc); } ports_initialized |= init_ports; @@ -41,272 +40,39 @@ int8_t rpp_gio_init(uint32_t init_ports) return SUCCESS; } -int8_t rpp_gio_set_val(const char* pin_name, uint8_t value) { - if (ports_initialized == 0) { - return FAILURE; - } - uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1); - if (pin_dsc == NULL) { - return FAILURE; - } - - dio_gpio_pin_set_value(*pin_dsc, value); - return SUCCESS; -} - -int8_t rpp_gio_get_val(const char* pin_name) { - if (ports_initialized == 0) { - return FAILURE; - } - - uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1); - if (pin_dsc == NULL) { - return FAILURE; - } - - return dio_gpio_pin_get_value(*pin_dsc); -} - -int8_t rpp_gio_set_output(const char* pin_name, uint8_t value) { - if (ports_initialized == 0) { - return FAILURE; - } - - uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1); - if (pin_dsc == NULL) { - return FAILURE; - } - - dio_gpio_pin_set_dir_out(*pin_dsc, value); - - return SUCCESS; -} - -int8_t rpp_gio_set_input(const char* pin_name) { - if (ports_initialized == 0) { - return FAILURE; - } - - uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1); - if (pin_dsc == NULL) { - return FAILURE; - } - - dio_gpio_pin_set_dir_in(*pin_dsc); - - return SUCCESS; -} - -int8_t rpp_gio_set_push_pull(const char* pin_name, boolean_t pull_up) { - if (ports_initialized == 0) { - return FAILURE; - } - - uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1); - if (pin_dsc == NULL) { - return FAILURE; - } - - dio_gpio_pin_set_od(*pin_dsc, DIO_PORT_CONF_OD_OFF); - if (pull_up) { - dio_gpio_pin_set_mode(*pin_dsc, DIO_PORT_CONF_MODE_PU|DIO_PORT_CONF_MODE_PEN); - } - else { - dio_gpio_pin_set_mode(*pin_dsc, DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PEN); - } - - dio_gpio_pin_set_dir_in(*pin_dsc); - - return SUCCESS; -} - -int8_t rpp_gio_set_open_drain(const char* pin_name) { - if (ports_initialized == 0) { - return FAILURE; - } - - uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1); - if (pin_dsc == NULL) { - return FAILURE; - } - - dio_gpio_pin_set_od(*pin_dsc, DIO_PORT_CONF_OD_ON); - dio_gpio_pin_set_mode(*pin_dsc, DIO_PORT_CONF_MODE_PU|DIO_PORT_CONF_MODE_PDIS); - - dio_gpio_pin_set_dir_in(*pin_dsc); - - return SUCCESS; -} - -int8_t rpp_gio_set_pull_up(const char* pin_name) { - if (ports_initialized == 0) { - return FAILURE; - } - - uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1); - if (pin_dsc == NULL) { - return FAILURE; - } - - dio_gpio_pin_set_mode(*pin_dsc, DIO_PORT_CONF_MODE_PU|DIO_PORT_CONF_MODE_PEN); - - return SUCCESS; -} - -int8_t rpp_gio_set_pull_down(const char* pin_name) { - if (ports_initialized == 0) { - return FAILURE; - } - - uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1); - if (pin_dsc == NULL) { +int8_t rpp_gio_set(enum pin_name pin, boolean_t value) +{ + if (ports_initialized == 0 || pin >= _PIN_COUNT || pin < 0) return FAILURE; - } - - dio_gpio_pin_set_mode(*pin_dsc, DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PEN); + gio_tab_set(pin, value); return SUCCESS; } -boolean_t rpp_gio_is_dir_output(const char* pin_name) { - if (ports_initialized == 0) { - return FAILURE; - } - - uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1); - if (pin_dsc == NULL) { - return FAILURE; - } - - int dir = dio_gpio_pin_get_dir(*pin_dsc); - return (dir == 1) ? TRUE : FALSE; -} - -boolean_t rpp_gio_is_push_pull(const char* pin_name) { - if (ports_initialized == 0) { - return FAILURE; - } - - uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1); - if (pin_dsc == NULL) { - return FAILURE; - } - return !(dio_gpio_pin_get_port_base(*pin_dsc)->PULDIS >> ((*pin_dsc & 0x1f) & 1)); -} - -boolean_t rpp_gio_is_pull_up(const char* pin_name) { - if (ports_initialized == 0) { - return FAILURE; - } - - uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1); - if (pin_dsc == NULL) { - return FAILURE; - } - return dio_gpio_pin_get_port_base(*pin_dsc)->PSL >> ((*pin_dsc & 0x1f) & 1); -} - -uint32_t rpp_gio_get_pin_cnt() { - return dio_gpio_get_pin_cnt(); -} - -int8_t rpp_gio_get_pin_names(const char** pin_names, uint8_t max_names_cnt) { - if (ports_initialized == 0) { - return FAILURE; - } - if (pin_names == NULL) { +int8_t rpp_gio_get(enum pin_name pin) +{ + if (ports_initialized == 0 || pin >= _PIN_COUNT || pin < 0) return FAILURE; - } - dio_pin_map_element_t* pin_map = dio_gpio_get_pin_map(); - uint32_t pin_cnt = dio_gpio_get_pin_cnt(); - - uint32_t i; - for (i = 0; i < pin_cnt && i < max_names_cnt; i++) { - pin_names[i] = pin_map[i].pin_name; - } - - return i; + return gio_tab_get(pin) ? 1 : 0; } -int8_t rpp_port_set_val(const char* port_name, uint8_t port_num_vals, const uint32_t* values) { - if (ports_initialized == 0) { - return FAILURE; - } - if (port_name == NULL || values == NULL) { - return FAILURE; - } - const dio_port_desc_t* port = dio_port_get_dsc(port_name, -1); - if (port != NULL && dio_port_get_val_cnt(port) != port_num_vals) { +int8_t rpp_gio_setup(enum pin_name pin, enum rpp_gio_io io, enum rpp_gio_in_mode in_mode, + boolean_t open_drain) +{ + if (ports_initialized == 0 || pin >= _PIN_COUNT || pin < 0) return FAILURE; - } - dio_gpio_port_set_val(port->config, port_num_vals, values); - return SUCCESS; -} - -int8_t rpp_port_get_val(const char* port_name, uint8_t port_num_vals, uint32_t* values) { - if (ports_initialized == 0) { - return FAILURE; - } - if (port_name == NULL || values == NULL) { - return FAILURE; - } - dio_port_desc_t* port = dio_port_get_dsc(port_name, -1); - if (port != NULL && dio_port_get_val_cnt(port) != port_num_vals) { - return FAILURE; - } + uint32_t mode_flags[] = { + [RPP_GIO_MODE_PULLDIS] = GIO_PIN_CONF_MODE_PDIS, + [RPP_GIO_MODE_PULLUP] = GIO_PIN_CONF_MODE_PU | GIO_PIN_CONF_MODE_PEN, + [RPP_GIO_MODE_PULLDOWN] = GIO_PIN_CONF_MODE_PD | GIO_PIN_CONF_MODE_PEN, + }; + uint32_t dsc = gio_table[pin].pin_dsc & ~GIO_PIN_CONF_MASK; + dsc |= (io == RPP_GIO_OUT) ? GIO_PIN_CONF_DIR_OUT : GIO_PIN_CONF_DIR_IN; + dsc |= mode_flags[in_mode]; + dsc |= open_drain ? GIO_PIN_CONF_OD_ON : GIO_PIN_CONF_OD_OFF; - dio_gpio_port_get_val(port->config, port_num_vals, values); + gio_setup(dsc); return SUCCESS; } - -int32_t rpp_port_get_pin_cnt(const char* port_name) { - if (ports_initialized == 0) { - return FAILURE; - } - if (port_name == NULL) { - return FAILURE; - } - return dio_port_get_val_cnt(dio_port_get_dsc(port_name, -1)); -} - -int32_t rpp_port_get_port_cnt() { - return DIO_PORT_CNT; -} - -int8_t rpp_port_get_port_names(const char** port_names, uint8_t max_names_cnt) { - if (ports_initialized == 0) { - return FAILURE; - } - if (port_names == NULL) { - return FAILURE; - } - - const dio_port_def_t* port_map = dio_port_get_map(); - - uint32_t port_cnt = DIO_PORT_CNT; - uint32_t i; - for (i = 0; i < port_cnt && i < max_names_cnt; i++) { - port_names[i] = port_map[i].name; - } - - return i; -} - -int8_t rpp_port_get_interface_type(const char* port_name) { - if (ports_initialized == 0) { - return FAILURE; - } - if (port_name == NULL) { - return FAILURE; - } - - dio_port_desc_t* port = dio_port_get_dsc(port_name, -1); - if (port == NULL) { - return FAILURE; - } - - return port->interfaceType; -} -