Add RPP interface for Digital IO

[pes-rpp/rpp-lib.git] / rpp / src / rpp / gio.c

diff --git a/rpp/src/rpp/gio.c b/rpp/src/rpp/gio.c
index 37d8cdbf8ac5b3710f45c9bc8f610664a11c48be..2d2b47323d81565eb50d3a6b2e78521db60c976b 100644 (file)
--- a/rpp/src/rpp/gio.c
+++ b/rpp/src/rpp/gio.c
@@ -10,6 +10,7 @@
  */
 
 #include "rpp/gio.h"
+#include "drv/digital_io.h"
 
 static uint32_t ports_initialized = 0;
 
@@ -39,3 +40,273 @@ int8_t rpp_gio_init(uint32_t init_ports)
 
        return SUCCESS;
 }
+
+int8_t rpp_gio_set_val(const char* pin_name, uint8_t value) {
+       if (ports_initialized == 0) {
+               return FAILURE;
+       }
+       uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1);
+       if (pin_dsc == NULL) {
+               return FAILURE;
+       }
+
+       dio_gpio_pin_set_value(*pin_dsc, value);
+       return SUCCESS;
+}
+
+int8_t rpp_gio_get_val(const char* pin_name) {
+       if (ports_initialized == 0) {
+               return FAILURE;
+       }
+
+       uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1);
+       if (pin_dsc == NULL) {
+               return FAILURE;
+       }
+
+       return dio_gpio_pin_get_value(*pin_dsc);
+}
+
+int8_t rpp_gio_set_output(const char* pin_name, uint8_t value) {
+       if (ports_initialized == 0) {
+               return FAILURE;
+       }
+
+       uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1);
+       if (pin_dsc == NULL) {
+               return FAILURE;
+       }
+
+       dio_gpio_pin_set_dir_out(*pin_dsc, value);
+
+       return SUCCESS;
+}
+
+int8_t rpp_gio_set_input(const char* pin_name) {
+       if (ports_initialized == 0) {
+               return FAILURE;
+       }
+
+       uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1);
+       if (pin_dsc == NULL) {
+               return FAILURE;
+       }
+
+       dio_gpio_pin_set_dir_in(*pin_dsc);
+
+       return SUCCESS;
+}
+
+int8_t rpp_gio_set_push_pull(const char* pin_name, boolean_t pull_up) {
+       if (ports_initialized == 0) {
+               return FAILURE;
+       }
+
+       uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1);
+       if (pin_dsc == NULL) {
+               return FAILURE;
+       }
+
+       dio_gpio_pin_set_od(*pin_dsc, DIO_PORT_CONF_OD_OFF);
+       if (pull_up) {
+               dio_gpio_pin_set_mode(*pin_dsc, DIO_PORT_CONF_MODE_PU|DIO_PORT_CONF_MODE_PEN);
+       }
+       else {
+               dio_gpio_pin_set_mode(*pin_dsc, DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PEN);
+       }
+
+       dio_gpio_pin_set_dir_in(*pin_dsc);
+
+       return SUCCESS;
+}
+
+int8_t rpp_gio_set_open_drain(const char* pin_name) {
+       if (ports_initialized == 0) {
+               return FAILURE;
+       }
+
+       uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1);
+       if (pin_dsc == NULL) {
+               return FAILURE;
+       }
+
+       dio_gpio_pin_set_od(*pin_dsc, DIO_PORT_CONF_OD_ON);
+       dio_gpio_pin_set_mode(*pin_dsc, DIO_PORT_CONF_MODE_PU|DIO_PORT_CONF_MODE_PDIS);
+
+       dio_gpio_pin_set_dir_in(*pin_dsc);
+
+       return SUCCESS;
+}
+
+int8_t rpp_gio_set_pull_up(const char* pin_name) {
+       if (ports_initialized == 0) {
+               return FAILURE;
+       }
+
+       uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1);
+       if (pin_dsc == NULL) {
+               return FAILURE;
+       }
+
+       dio_gpio_pin_set_mode(*pin_dsc, DIO_PORT_CONF_MODE_PU|DIO_PORT_CONF_MODE_PEN);
+
+       return SUCCESS;
+}
+
+int8_t rpp_gio_set_pull_down(const char* pin_name) {
+       if (ports_initialized == 0) {
+               return FAILURE;
+       }
+
+       uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1);
+       if (pin_dsc == NULL) {
+               return FAILURE;
+       }
+
+       dio_gpio_pin_set_mode(*pin_dsc, DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PEN);
+
+       return SUCCESS;
+}
+
+boolean_t rpp_gio_is_dir_output(const char* pin_name) {
+       if (ports_initialized == 0) {
+               return FAILURE;
+       }
+
+       uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1);
+       if (pin_dsc == NULL) {
+               return FAILURE;
+       }
+
+       int dir = dio_gpio_pin_get_dir(*pin_dsc);
+       return (dir == 1) ? TRUE : FALSE;
+}
+
+boolean_t rpp_gio_is_push_pull(const char* pin_name) {
+       if (ports_initialized == 0) {
+               return FAILURE;
+       }
+
+       uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1);
+       if (pin_dsc == NULL) {
+               return FAILURE;
+       }
+       return !(dio_gpio_pin_get_port_base(*pin_dsc)->PULDIS >> ((*pin_dsc & 0x1f) & 1));
+}
+
+boolean_t rpp_gio_is_pull_up(const char* pin_name) {
+       if (ports_initialized == 0) {
+               return FAILURE;
+       }
+
+       uint32_t* pin_dsc = dio_gpio_pin_get_dsc(pin_name, -1);
+       if (pin_dsc == NULL) {
+               return FAILURE;
+       }
+       return dio_gpio_pin_get_port_base(*pin_dsc)->PSL >> ((*pin_dsc & 0x1f) & 1);
+}
+
+uint32_t rpp_gio_get_pin_cnt() {
+       return dio_gpio_get_pin_cnt();
+}
+
+int8_t rpp_gio_get_pin_names(const char** pin_names, uint8_t max_names_cnt) {
+       if (ports_initialized == 0) {
+               return FAILURE;
+       }
+       if (pin_names == NULL) {
+               return FAILURE;
+       }
+
+       dio_pin_map_element_t* pin_map = dio_gpio_get_pin_map();
+       uint32_t pin_cnt = dio_gpio_get_pin_cnt();
+
+       uint32_t i;
+       for (i = 0; i < pin_cnt && i < max_names_cnt; i++) {
+               pin_names[i] = pin_map[i].pin_name;
+       }
+
+       return i;
+}
+
+int8_t rpp_port_set_val(const char* port_name, uint8_t port_num_vals, const uint32_t* values) {
+       if (ports_initialized == 0) {
+               return FAILURE;
+       }
+       if (port_name == NULL || values == NULL) {
+               return FAILURE;
+       }
+       const dio_port_desc_t* port = dio_port_get_dsc(port_name, -1);
+       if (port != NULL && dio_port_get_val_cnt(port) != port_num_vals) {
+               return FAILURE;
+       }
+
+       dio_gpio_port_set_val(port->config, port_num_vals, values);
+       return SUCCESS;
+}
+
+int8_t rpp_port_get_val(const char* port_name, uint8_t port_num_vals, uint32_t* values) {
+       if (ports_initialized == 0) {
+               return FAILURE;
+       }
+       if (port_name == NULL || values == NULL) {
+               return FAILURE;
+       }
+       dio_port_desc_t* port = dio_port_get_dsc(port_name, -1);
+       if (port != NULL && dio_port_get_val_cnt(port) != port_num_vals) {
+               return FAILURE;
+       }
+
+       dio_gpio_port_get_val(port->config, port_num_vals, values);
+       return SUCCESS;
+}
+
+int32_t rpp_port_get_pin_cnt(const char* port_name) {
+       if (ports_initialized == 0) {
+               return FAILURE;
+       }
+       if (port_name == NULL) {
+               return FAILURE;
+       }
+       return dio_port_get_val_cnt(dio_port_get_dsc(port_name, -1));
+}
+
+int32_t rpp_port_get_port_cnt() {
+       return DIO_PORT_CNT;
+}
+
+int8_t rpp_port_get_port_names(const char** port_names, uint8_t max_names_cnt) {
+       if (ports_initialized == 0) {
+               return FAILURE;
+       }
+       if (port_names == NULL) {
+               return FAILURE;
+       }
+
+       const dio_port_def_t* port_map = dio_port_get_map();
+
+       uint32_t port_cnt = DIO_PORT_CNT;
+       uint32_t i;
+       for (i = 0; i < port_cnt && i < max_names_cnt; i++) {
+               port_names[i] = port_map[i].name;
+       }
+
+       return i;
+}
+
+int8_t rpp_port_get_interface_type(const char* port_name) {
+       if (ports_initialized == 0) {
+               return FAILURE;
+       }
+       if (port_name == NULL) {
+               return FAILURE;
+       }
+
+       dio_port_desc_t* port = dio_port_get_dsc(port_name, -1);
+       if (port == NULL) {
+               return FAILURE;
+       }
+
+       return port->interfaceType;
+}
+