-/* Copyright (C) 2013 Czech Technical University in Prague
+/* Copyright (C) 2013, 2015 Czech Technical University in Prague
*
* Authors:
* - Carlos Jenkins <carlos@jenkins.co.cr>
#include "rpp/rpp.h"
+#include "rpp/mutex.h"
#ifndef FREERTOS_POSIX
#include "drv/din.h"
+#include "drv/spi_def.h"
#endif
+RPP_MUTEX_DEFINE(mutex_din);
+
static boolean_t initialized = FALSE;
int8_t rpp_din_init()
{
- if(initialized) {
- return FAILURE;
- }
- initialized = TRUE;
+ if (initialized)
+ return FAILURE;
+ if (!RPP_MUTEX_INIT(mutex_din))
+ return FAILURE;
+ initialized = TRUE;
#ifndef FREERTOS_POSIX
- dmmInit();
- gioInit();
- hetInit();
- spi_tms570_init();
+ dmmInit();
+ gioInit();
+ hetInit();
+ spi_tms570_init(spi_ifcs, ARRAY_SIZE(spi_ifcs));
#endif
- return SUCCESS;
+ return SUCCESS;
}
int8_t rpp_din_ref(uint16_t ref_a, uint16_t ref_b)
{
- if((ref_a > 4095) || (ref_b > 4095)) {
- return -1;
- }
+ if ((ref_a > 4095) || (ref_b > 4095))
+ return -1;
#ifndef FREERTOS_POSIX
- drv_din_ref(ref_a, ref_b);
+ RPP_MUTEX_LOCK(mutex_din);
+ drv_din_ref(ref_a, ref_b);
+ RPP_MUTEX_UNLOCK(mutex_din);
#endif
- return SUCCESS;
+ return SUCCESS;
}
static uint16_t active_cache = 0x0; /* 0 - tri-state, 1 - active */
static uint16_t can_wake_cache = 0x0;
-static boolean_t check_pin_busy(uint8_t pin) {
- if (rpp_irc1_enabled && (pin == 10 || pin == 11))
- return TRUE;
- if (rpp_irc2_enabled && (pin == 14 || pin == 15))
- return TRUE;
- return FALSE;
+static boolean_t check_pin_busy(uint8_t pin)
+{
+ if (rpp_irc_status(RPP_IRC_1) == 1 && (pin == 10 || pin == 11))
+ return TRUE;
+ if (rpp_irc_status(RPP_IRC_2) == 1 && (pin == 14 || pin == 15))
+ return TRUE;
+ return FALSE;
}
int8_t rpp_din_setup(uint8_t pin, boolean_t pull_up,
- boolean_t active, boolean_t can_wake)
+ boolean_t active, boolean_t can_wake)
{
- // Check range
- if(pin > 15) {
- return -1;
- }
-
- // Check programmable feature
- if(!pull_up && (pin > 7)) {
- return -2;
- }
-
- // Check blockade of specific pins
- if (check_pin_busy(pin))
- return -RPP_EBUSY;
-
- // Set bits
- if(pull_up) {
- bit_set(pull_cache, pin);
- } else {
- bit_clear(pull_cache, pin);
- }
-
- if(active) {
- bit_set(active_cache, pin);
- } else {
- bit_clear(active_cache, pin);
- }
-
- if(can_wake) {
- bit_set(can_wake_cache, pin);
- } else {
- bit_clear(can_wake_cache, pin);
- }
-
- config_changed = TRUE;
- return SUCCESS;
+ // Check range
+ if (pin > 15)
+ return -1;
+
+ // Check programmable feature
+ if (!pull_up && (pin > 7))
+ return -2;
+
+ RPP_MUTEX_LOCK(mutex_din);
+ // Check blockade of specific pins
+ if (check_pin_busy(pin)) {
+ RPP_MUTEX_UNLOCK(mutex_din);
+ return -RPP_EBUSY;
+ }
+
+ // Set bits
+ if (pull_up)
+ bit_set(pull_cache, pin);
+ else
+ bit_clear(pull_cache, pin);
+
+ if (active)
+ bit_set(active_cache, pin);
+ else
+ bit_clear(active_cache, pin);
+
+ if (can_wake)
+ bit_set(can_wake_cache, pin);
+ else
+ bit_clear(can_wake_cache, pin);
+
+ config_changed = TRUE;
+ RPP_MUTEX_UNLOCK(mutex_din);
+ return SUCCESS;
}
int8_t rpp_din_get(uint8_t pin)
{
- // Check range
- if(pin > 15) {
- return -1;
- }
-
- // Check blockade of specific pins
- if (check_pin_busy(pin))
- return -RPP_EBUSY;
+ // Check range
+ if (pin > 15)
+ return -1;
+ // Check blockade of specific pins
+ if (check_pin_busy(pin))
+ return -RPP_EBUSY;
- if(is_bit_set(in_cache, pin)) {
- return RPP_CLOSED;
- }
- return RPP_OPEN;
+ return is_bit_set(in_cache, pin) ? RPP_CLOSED : RPP_OPEN;
}
int8_t rpp_din_get_tr(uint8_t pin)
{
- // Check range
- if(pin < 8 || pin > 15) {
- return -1;
- }
-
- // Check blockade of specific pins
- if (check_pin_busy(pin))
- return -RPP_EBUSY;
+ // Check range
+ if (pin < 8 || pin > 15)
+ return -1;
+ // Check blockade of specific pins
+ if (check_pin_busy(pin))
+ return -RPP_EBUSY;
#ifndef FREERTOS_POSIX
- if (drv_din_get_varthr(pin) == 1) {
- return HIGH;
- }
+ if (drv_din_get_varthr(pin) == 1)
+ return HIGH;
#endif
- return LOW;
+ return LOW;
}
int8_t rpp_din_diag(uint8_t pin)
{
- // Check range
- if(pin > 15) {
- return -1;
- }
-
- // Check blockade of specific pins
- if (check_pin_busy(pin))
- return -RPP_EBUSY;
+ // Check range
+ if (pin > 15)
+ return -1;
+ // Check blockade of specific pins
+ if (check_pin_busy(pin))
+ return -RPP_EBUSY;
- if(is_bit_set(diag_cache, pin)) {
- return HIGH;
- }
- return LOW;
+ return is_bit_set(diag_cache, pin) ? HIGH : LOW;
}
/*
*/
int8_t rpp_din_update()
{
+ RPP_MUTEX_LOCK(mutex_din);
#ifndef FREERTOS_POSIX
- /// Setup pins
- if(config_changed) {
- uint16_t sp = 0x0;
- uint16_t sg = 0x0;
-
- // Reset chip
- din_set_reg(DIN_RESET_CMD, 0, 0);
- //rpp_sci_printf("din_reset()\r\n");
-
- // Set pull-type.
- // In DRV logic is inverted:
- // DRV: 1 - set pin as switch-to-battery. RPP: 0 - pull-down.
- // DRV: 0 - set pin as switch-to-ground. RPP: 1 - pull-up.
- sp = (~pull_cache) & 0xFF;
- din_set_reg(DIN_SETTINGS_CMD, 0xffff, sp);
- //rpp_sci_printf("din_set_pr(%X)\r\n", sp);
-
- // Set state type, active or tri-stated.
- // In DRV logic is inverted:
- // DRV: 1 - tri-state. RPP: 0 - tri-state.
- // DRV: 0 - active. RPP: 1 - active.
- sp = ((~active_cache) ) & 0xFF;
- sg = ((~active_cache) >> 8) & 0xFF;
- din_set_reg(DIN_TRI_STATE_CMD_YES, 0xffff, sp);
- din_set_reg(DIN_TRI_STATE_CMD_NO, 0xffff, sg);
- //rpp_sci_printf("din_set_stat(%X, %X)\r\n", sp, sg);
-
- // Set wake / interrupt.
- // IN DRV logic is not inverted.
- // DRV: 1 - can wake. RPP: 1 - can wake.
- // DRV: 0 - interrupt disabled. RPP: 0 - interrupt disabled.
- sp = (can_wake_cache ) & 0xFF;
- sg = (can_wake_cache >> 8) & 0xFF;
-
- din_set_reg(DIN_WAKE_UP_CMD_ENB, 0xffff, sp);
- din_set_reg(DIN_WAKE_UP_CMD_DIS, 0xffff, sg);
- //rpp_sci_printf("din_set_int(%X, %X)\r\n", sp, sg);
-
- // Mark configuration as commited
- config_changed = FALSE;
- }
-
- // Update cached values
- din_set_reg(DIN_SWITCH_STATUS_CMD, 0, 0);
- in_cache = din_get_val_word();
-
- // FIXME: Implement. Dummy assign for now.
- diag_cache = in_cache;
-
- if(diag_cache != in_cache) {
- return FAILURE;
- }
- #else
- UNUSED(config_changed);
- #endif
-
- return SUCCESS;
+ /// Setup pins
+ if (config_changed) {
+ uint16_t sp = 0x0;
+ uint16_t sg = 0x0;
+
+ // Reset chip
+ din_set_reg(DIN_RESET_CMD, 0, 0);
+ //rpp_sci_printf("din_reset()\r\n");
+
+ // Set pull-type.
+ // In DRV logic is inverted:
+ // DRV: 1 - set pin as switch-to-battery. RPP: 0 - pull-down.
+ // DRV: 0 - set pin as switch-to-ground. RPP: 1 - pull-up.
+ sp = (~pull_cache) & 0xFF;
+ din_set_reg(DIN_SETTINGS_CMD, 0xffff, sp);
+ //rpp_sci_printf("din_set_pr(%X)\r\n", sp);
+
+ // Set state type, active or tri-stated.
+ // In DRV logic is inverted:
+ // DRV: 1 - tri-state. RPP: 0 - tri-state.
+ // DRV: 0 - active. RPP: 1 - active.
+ sp = ((~active_cache) ) & 0xFF;
+ sg = ((~active_cache) >> 8) & 0xFF;
+ din_set_reg(DIN_TRI_STATE_CMD_YES, 0xffff, sp);
+ din_set_reg(DIN_TRI_STATE_CMD_NO, 0xffff, sg);
+ //rpp_sci_printf("din_set_stat(%X, %X)\r\n", sp, sg);
+
+ // Set wake / interrupt.
+ // IN DRV logic is not inverted.
+ // DRV: 1 - can wake. RPP: 1 - can wake.
+ // DRV: 0 - interrupt disabled. RPP: 0 - interrupt disabled.
+ sp = (can_wake_cache ) & 0xFF;
+ sg = (can_wake_cache >> 8) & 0xFF;
+
+ din_set_reg(DIN_WAKE_UP_CMD_ENB, 0xffff, sp);
+ din_set_reg(DIN_WAKE_UP_CMD_DIS, 0xffff, sg);
+ //rpp_sci_printf("din_set_int(%X, %X)\r\n", sp, sg);
+
+ // Mark configuration as commited
+ config_changed = FALSE;
+ }
+
+ // Update cached values
+ din_set_reg(DIN_SWITCH_STATUS_CMD, 0, 0);
+ in_cache = din_get_val_word();
+
+ // FIXME: Implement. Dummy assign for now.
+ diag_cache = in_cache;
+
+ if (diag_cache != in_cache) {
+ RPP_MUTEX_UNLOCK(mutex_din);
+ return FAILURE;
+ }
+
+ #else /* ifndef FREERTOS_POSIX */
+ UNUSED(config_changed);
+ #endif /* ifndef FREERTOS_POSIX */
+
+ RPP_MUTEX_UNLOCK(mutex_din);
+ return SUCCESS;
}