Code cleanup

[pes-rpp/rpp-lib.git] / rpp / include / sys / ti_drv_fray.h

diff --git a/rpp/include/sys/ti_drv_fray.h b/rpp/include/sys/ti_drv_fray.h
index 3a5cb77a47a18df4ffd9f9b1bcbc9d2d66568659..d27e44b9bef6e62feff17f1e6653771bd3518693 100644 (file)
--- a/rpp/include/sys/ti_drv_fray.h
+++ b/rpp/include/sys/ti_drv_fray.h
@@ -24,69 +24,8 @@
 #define CMD_CLEAR_RAMS                       0xC
 #define CMD_ASYNCHRONOUS_TRANSFER_MODE       0xE
 
-// Masks for fields in configuration registers, used in init functions
+// Masks for fields in configuration registers
 #define SUCC1_CSA_MSK  (0x1F << 11)
-#define GTUC9_APO_MSK  (0x3F << 0)
-#define PRTC1_CASM_MSK (0x7F << 4)
-#define GTUC9_DSI_MSK  (0x3 << 16)
-#define GTUC8_MSL_MSK  (0x3F << 0)
-#define GTUC9_MAPO_MSK (0x1F << 8)
-#define GTUC7_SSL_MSK  (0x3FF << 0)
-#define PRTC1_TSST_MSK (0x7 << 0)
-#define PRTC2_RXI_MSK  (0x3F << 0)
-#define PRTC2_RXL_MSK  (0x3F << 8)
-#define PRTC1_RXW_MSK  (0x1FF << 16)
-#define PRTC2_TXI_MSK  (0xFF << 16)
-#define PRTC2_TXL_MSK  (0x1F << 24)
-#define SUCC2_LTN_MSK  (0xF << 24)
-#define GTUC2_MPC_MSK  (0x3FFF << 0)
-#define SUCC3_WCF_MSK  (0xF << 4)
-#define SUCC3_WCP_MSK  (0xF << 0)
-#define SUCC8_NMS_MSK  (0x1FFF << 16)
-#define GTUC4_OCS_MSK  (0x3FFF << 16)
-#define MHDC_SFDL_MSK  (0xFF << 0)
-#define GTUC2_SNM_MSK  (0xF << 16)
-#define SUCC1_CCHA_MSK (0x1 << 26)
-#define SUCC1_CCHB_MSK (0x1 << 27)
-#define GTUC5_CDD_MSK  (0x1F << 16)
-#define GTUC4_NIT_MSK  (0x3FFF << 0)
-#define PRTC1_BRP_MSK  (0x3 << 14)
-#define NEMC_NML_MSK   (0x7F << 0)
-#define SUCC1_HCSE_MSK (0x1 << 23)
-#define SUCC1_PTA_MSK  (0x1F << 16)
-#define GTUC6_ASR_MSK  (0x7FF << 0)
-#define GTUC5_CDD_MSK  (0x1F << 16)
-#define GTUC5_DEC_MSK  (0xFF << 24)
-#define GTUC5_DCA_MSK  (0xFF << 0)
-#define GTUC5_DCB_MSK  (0xFF << 8)
-#define SUCC2_LT_MSK   (0x1FFFFF << 8)
-#define GTUC6_MOD_MSK  (0x7FF << 16)
-#define GTUC11_EOC_MSK (0x7 << 16)
-#define GTUC11_ERC_MSK (0x7 << 24)
-#define SUCC1_TXST_MSK (0x1 << 8)
-#define SUCC1_TXSY_MSK (0x1 << 9)
-#define MHDC_SLT_MSK   (0x1FFF << 16)
-#define GTUC3_MIOA_MSK (0x7F << 16)
-#define GTUC3_MIOB_MSK (0x7F << 24)
-#define GTUC3_UIOA_MSK (0xFF << 0)
-#define GTUC3_UIOB_MSK (0xFF << 8)
-#define GTUC1_UT_MSK   (0xFFFFF << 0)
-#define GTUC10_MOC_MSK (0x3FFF << 0)
-#define SUCC1_TSM_MSK  (0x1 << 22)
-#define SUCC1_WUCS_MSK (0x1 << 21)
-#define PRTC1_RWP_MSK  (0x3F << 26)
-#define GTUC8_NMS_MSK  (0x1FFF << 16)
-#define GTUC7_NSS_MSK  (0x3FF << 16)
-#define MRC_FDB_MSK            (0xFF << 0)
-#define MRC_FFB_MSK            (0xFF << 8)
-#define MRC_LCB_MSK            (0xFF << 16)
-#define MRC_SEC_MSK            (0x3 << 24)
-#define MRC_SPLM_MSK   (0x1 << 26)
-#define FRF_RNF_MSK            (0x1 << 24)
-#define FRF_RSS_MSK            (0x1 << 23)
-#define FRF_CYF_MSK            (0x7FF << 16)
-#define FRF_FID_MSK            (0x7FF << 2)
-#define FRF_CH_MSK             (0x3 << 0)
 #define MTCCV_CCV_MSK  (0x3F << 16)
 #define MTCCV_MTV_MSK  (0x3F << 0)
 #define ESID_RXEA_MSK  (0x1 << 14)
@@ -96,8 +35,6 @@
 #define OSID_RXOB_MSK  (0x1 << 15)
 #define OSID_OID_MSK   (0x3F << 0)
 
-
-
 typedef volatile struct fray_registers
 {
 /* ------------------------------------------------------------------------- */