/*----------------------------------------------------------------------------*/ /* RM48L952FlashLnk.cmd */ /* /ccs_base/arm/include/RM48L952FlashLnk.cmd */ /* */ /* (c) Texas Instruments 2011, All rights reserved. */ /* */ /* * Alternative memory map found in generated HalCoGen file: * * STACKS (RW) : origin=0x08000000 length=0x00001500 * RAM (RW) : origin=0x08001500 length=0x00026B00 */ /*----------------------------------------------------------------------------*/ /* Linker Settings */ --retain="*(.intvecs)" --retain="rpp-lib.lib(.intvecs)" /* irq vectors must always be there */ /* Ensure that our startup code is used instead of the one from * rtsv7R4_T_be_v3D16_eabi.lib. */ --retain="rpp-lib.lib(.text)" /*----------------------------------------------------------------------------*/ /* Memory Map */ MEMORY{ VECTORS (X) : origin=0x00000000 length=0x00000040 FLASH0 (RX) : origin=0x00000040 length=0x0017FFC0 FLASH1 (RX) : origin=0x00180000 length=0x00180000 STACKS (RW) : origin=0x08000000 length=0x00001500 RAM (RW) : origin=0x08001500 length=0x0003EB00 } /*----------------------------------------------------------------------------*/ /* Section Configuration */ SECTIONS{ .intvecs : {} > VECTORS .text : {} > FLASH0 | FLASH1 .const : {} > FLASH0 | FLASH1 .cinit : {} > FLASH0 | FLASH1 .pinit : {} > FLASH0 | FLASH1 .bss : {} > RAM .data : {} > RAM .stack : {} > STACKS .sysmem : {} > RAM } /*----------------------------------------------------------------------------*/