+++ /dev/null
-# Makefile.rules - OCERA make framework common project rules -*- makefile -*- #OMK@base
-#
-# (C) Copyright 2003 by Pavel Pisa - OCERA team member
-# (C) Copyright 2006 by Michal Sojka - Czech Technical University, FEE, DCE
-#
-# Homepage: http://rtime.felk.cvut.cz/omk/
-#
-# The OMK build system is distributed under the GNU General Public
-# License. See file COPYING for details.
-#
-# input variables
-# V .. if set to 1, full command text is shown else short form is used
-# W .. whole tree - if set to 1, make is always called from the top-level directory
-# SUBDIRS .. list of subdirectories intended for make from actual directory
-# default_CONFIG .. list of default config assignments CONFIG_XXX=y/n ...
-#### #OMK@build
-# kbuild: Generic definitions
-OMK_RULES_TYPE=test #OMK@__type
- #OMK@base
-# We need to ensure definition of sources directory first
-ifndef SOURCES_DIR
-# Only shell built-in pwd understands -L
-SOURCES_DIR := $(shell ( pwd -L ) )
-endif
-
-# If we are not called by OMK leaf Makefile...
-ifndef MAKERULES_DIR
-MAKERULES_DIR := $(abspath $(dir $(filter %Makefile.rules,$(MAKEFILE_LIST))))
-endif
-
-# OUTPUT_DIR is the place where _compiled, _build and possible other
-# files/directories are created. By default is the same as
-# $(MAKERULES_DIR).
-ifndef OUTPUT_DIR
-OUTPUT_DIR := $(MAKERULES_DIR)
-endif
-
-.PHONY: all default check-make-ver omkize
-
-ifdef W
- ifeq ("$(origin W)", "command line")
- OMK_WHOLE_TREE:=$(W)
- endif
-endif
-ifndef OMK_WHOLE_TREE
- OMK_WHOLE_TREE:=0
-endif
-
-ifneq ($(OMK_WHOLE_TREE),1)
-all: check-make-ver default
- @echo "Compilation finished"
-else
-# Run make in the top-level directory
-all:
- @$(MAKE) -C $(MAKERULES_DIR) OMK_SERIALIZE_INCLUDED=n SOURCES_DIR=$(MAKERULES_DIR) RELATIVE_DIR="" $(MAKECMDGOALS) W=0
-endif
-
-ifdef OMK_TESTSROOT
-# Usage: $(call canttest,<error message>)
-define canttest
- ( echo "$(1)" > $(OUTPUT_DIR)/_canttest; echo "$(1)"; exit 1 )
-endef
-else
-define canttest
- echo "$(1)"
-endef
-endif
-
-#=========================
-# Include the config file
-
-# FIXME: I think CONFIG_FILE_OK variable is useless. We have three
-# config files and it is not clearly defined to which file is this
-# variable related.
-ifneq ($(CONFIG_FILE_OK),y)
-ifndef CONFIG_FILE
-CONFIG_FILE := $(OUTPUT_DIR)/config.omk
-endif
-ifneq ($(wildcard $(CONFIG_FILE)-default),)
--include $(CONFIG_FILE)-default
-else
-ifneq ($(MAKECMDGOALS),default-config)
-$(warning Please, run "make default-config" first)
-endif
-endif
-
--include $(OUTPUT_DIR)/config.target
-
-ifneq ($(wildcard $(CONFIG_FILE)),)
--include $(CONFIG_FILE)
-CONFIG_FILE_OK = y
-endif
-endif #$(CONFIG_FILE_OK)
-
-
-CONFIG_FILES ?= $(wildcard $(CONFIG_FILE)-default) $(wildcard $(OUTPUT_DIR)/config.target) $(wildcard $(CONFIG_FILE))
-
-
-export SOURCES_DIR MAKERULES_DIR RELATIVE_DIR
-export CONFIG_FILE CONFIG_FILES OMK_SERIALIZE_INCLUDED OMK_VERBOSE OMK_SILENT
-# OMK_SERIALIZE_INCLUDED has to be exported to submakes because passes
-# must to be serialized only in the toplevel make.
-
-ifndef RELATIVE_DIR
-RELATIVE_DIR := $(SOURCES_DIR:$(OUTPUT_DIR)%=%)
-endif
-#$(warning === RELATIVE_DIR = "$(RELATIVE_DIR)" ===)
-override RELATIVE_DIR := $(RELATIVE_DIR:/%=%)
-override RELATIVE_DIR := $(RELATIVE_DIR:\\%=%)
-#$(warning RELATIVE_DIR = "$(RELATIVE_DIR)")
-override BACK2TOP_DIR := $(shell echo $(RELATIVE_DIR)/ | sed -e 's_//_/_g' -e 's_/\./_/_g' -e 's_^\./__g' -e 's_\([^/][^/]*\)_.._g' -e 's_/$$__')
-#$(warning BACK2TOP_DIR = "$(BACK2TOP_DIR)")
-
-#$(warning SOURCES_DIR = "$(SOURCES_DIR)")
-#$(warning MAKERULES_DIR = "$(OUTPUT_DIR)")
-#$(warning RELATIVE_DIR = "$(RELATIVE_DIR)")
-
-# We have to use RELATIVE_PREFIX because of mingw
-override RELATIVE_PREFIX := $(RELATIVE_DIR)/
-override RELATIVE_PREFIX := $(RELATIVE_PREFIX:/%=%)
-
-#vpath %.c $(SOURCES_DIR)
-#vpath %.cc $(SOURCES_DIR)
-#vpath %.cxx $(SOURCES_DIR)
-
-# Define srcdir for Automake compatibility
-srcdir = $(SOURCES_DIR)
-
-# Defines for quiet compilation
-ifdef V
- ifeq ("$(origin V)", "command line")
- OMK_VERBOSE = $(V)
- endif
-endif
-ifndef OMK_VERBOSE
- OMK_VERBOSE = 0
-endif
-ifneq ($(OMK_VERBOSE),0)
- Q =
-else
- Q = @
-endif
-ifneq ($(findstring s,$(MAKEFLAGS)),)
- QUIET_CMD_ECHO = true
- OMK_SILENT = 1
-else
- QUIET_CMD_ECHO = echo
-endif
-
-MAKEFILE_OMK=Makefile.omk
-# All subdirectories (even linked ones) containing Makefile.omk
-# Usage in Makefile.omk: SUBDIRS = $(ALL_OMK_SUBDIRS)
-ALL_OMK_SUBDIRS = $(patsubst %/$(MAKEFILE_OMK),%,$(patsubst $(SOURCES_DIR)/%,%,$(wildcard $(SOURCES_DIR)/*/$(MAKEFILE_OMK))))
-
-# ===================================================================
-# We have set up all important variables, so we can check and include
-# real OCERA style Makefile.omk now
-ifndef OMK_INCLUDED
-include $(SOURCES_DIR)/$(MAKEFILE_OMK)
-ifeq ($(AUTOMATIC_SUBDIRS),y)
-SUBDIRS?=$(ALL_OMK_SUBDIRS)
-endif
-OMK_INCLUDED := 1
-endif
-
-check-make-ver:
- @GOOD_MAKE_VERSION=`echo $(MAKE_VERSION) | sed -n -e 's/^[4-9]\..*\|^3\.9[0-9].*\|^3\.8[1-9].*/y/p'` ; \
- if [ x$$GOOD_MAKE_VERSION != xy ] ; then \
- echo "Your make program version is too old and does not support OMK system." ; \
- echo "Please update to make program 3.81beta1 or newer." ; exit 1 ; \
- fi
-
-distclean dist-clean:
- @$(QUIET_CMD_ECHO) " RM $(COMPILED_DIR_NAME) $(BUILD_DIR_NAME)"
- @rm -fr $(OUTPUT_DIR)/$(COMPILED_DIR_NAME) $(OUTPUT_DIR)/$(BUILD_DIR_NAME)
-
-# Common OMK templates
-# ====================
-
-# Syntax: $(call mkdir,<dir name>)
-define mkdir_def
- [ -d $(1) ] || mkdir -p $(1) || exit 1
-endef
-
-ifneq ($(OMK_VERBOSE),2)
-NO_PRINT_DIRECTORY := --no-print-directory
-endif
-
-ifeq ($(USE_LEAF_MAKEFILES),n)
-export USE_LEAF_MAKEFILES
-SUBDIR_MAKEFILE=$(MAKERULES_DIR)/Makefile.rules
-SOURCESDIR_MAKEFILE=$(MAKERULES_DIR)/Makefile.rules
-else
-SUBDIR_MAKEFILE=$(SOURCES_DIR)/$(3)/Makefile
-SOURCESDIR_MAKEFILE=$(SOURCES_DIR)/Makefile
-endif
-
-pass = $(strip $(1))
-
-# Call a pass in a subdirectory
-# Usage: $(call omk_pass_subdir_template,<pass name>,<build dir>,<subdir>)
-define omk_pass_subdir_template
-.PHONY: $(pass)-$(3)-subdir
-$(pass)-subdirs: $(pass)-$(3)-subdir
-$(pass)-$(3)-subdir:
- @$(call mkdir_def,$(2)/$(3))
- +@$(MAKE) SOURCES_DIR=$(SOURCES_DIR)/$(3) $(NO_PRINT_DIRECTORY) \
- RELATIVE_DIR=$(RELATIVE_PREFIX)$(3) -C $(2)/$(3) \
- -f $(SUBDIR_MAKEFILE) $(pass)
-endef
-
-# Call a pass in a subdirectory
-# Usage: $(call extra_rules_subdir_template,<subdir>)
-define extra_rules_subdir_template
-extra-rules-subdirs: extra-rules-$(1)
-extra-rules-$(1):
- +@$(MAKE) OMK_SERIALIZE_INCLUDED=n MAKERULES_DIR=$(SOURCES_DIR)/$(1) OUTPUT_DIR=$(OUTPUT_DIR) \
- SOURCES_DIR=$(SOURCES_DIR)/$(1) RELATIVE_DIR=$(RELATIVE_PREFIX)$(1) -C $(SOURCES_DIR)/$(1)
-endef
-
-.PHONY: extra-rules-subdirs
-extra-rules-subdirs:
-
-$(foreach subdir,$(EXTRA_RULES_SUBDIRS),$(eval $(call extra_rules_subdir_template,$(subdir))))
-
-# Usage: $(call omk_pass_template,<pass name>,<build dir>,[<local make flags>],[<local enable condition>])
-define omk_pass_template
-.PHONY: $(pass) $(pass)-local $(pass)-msg $(pass)-subdirs
-$(pass): $(pass)-local
-$(pass)-local: $(pass)-subdirs $(pass)-msg
-$(foreach subdir,$(SUBDIRS),$(call omk_pass_subdir_template,$(pass),$(2),$(subdir)))
-
-$(pass)-msg: $(pass)-subdirs
- +@echo "make[omk]: $(pass) in $(RELATIVE_DIR)"
-endef
-
-# =======================
-# DEFAULT CONFIG PASS
-
-default-config:
- @echo "# Start of OMK config file" > "$(CONFIG_FILE)-default"
- @echo "# This file should not be altered manually" >> "$(CONFIG_FILE)-default"
- @echo "# Overrides should be stored in file $(notdir $(CONFIG_FILE))" >> "$(CONFIG_FILE)-default"
- @echo >> "$(CONFIG_FILE)-default"
- @$(MAKE) $(NO_PRINT_DIRECTORY) -C $(MAKERULES_DIR) \
- RELATIVE_DIR="" SOURCES_DIR=$(OUTPUT_DIR) \
- -f $(OUTPUT_DIR)/Makefile default-config-pass
-
-$(eval $(call omk_pass_template,default-config-pass,$$(LOCAL_BUILD_DIR),,always))
-
-default-config-pass-local:
-# @echo Default config for $(RELATIVE_DIR)
- @echo "# Config for $(RELATIVE_DIR)" >> "$(CONFIG_FILE)-default"
- @$(foreach x, $(default_CONFIG), echo '$(x)' | \
- sed -e 's/^[^=]*=x$$/#\0/' >> "$(CONFIG_FILE)-default" ; )
-
-
-omkize:
- $(Q)if ! grep -q MAKERULES_DIR Makefile; then \
- echo "Makefile is not OMK leaf makefile!" >&2; exit 1; \
- fi
- $(Q)for i in `find -L . -name Makefile.omk` ; do \
- d=`dirname $${i}`; \
- if ! test -f "$${d}/Makefile.rules" && ( ! test -f "$${d}/Makefile" || ! cmp --silent Makefile "$${d}/Makefile" ); then \
- rm -f "$${d}/Makefile"; \
- cp -v Makefile "$${d}/Makefile"; \
- fi \
- done
- #OMK@build
-# Convenient variables
-comma := ,
-squote := '
-#'
-empty :=
-space := $(empty) $(empty)
-
-###
-# Escape single quote for use in echo statements
-escsq = $(subst $(squote),'\$(squote)',$1)
-
-BUILD_DIR_NAME = _build
-COMPILED_DIR_NAME = _compiled
-
-USER_INCLUDE_DIR := $(OUTPUT_DIR)/$(COMPILED_DIR_NAME)/include
-USER_LIB_DIR := $(OUTPUT_DIR)/$(COMPILED_DIR_NAME)/lib
-USER_UTILS_DIR := $(OUTPUT_DIR)/$(COMPILED_DIR_NAME)/bin-utils
-USER_TESTS_DIR := $(OUTPUT_DIR)/$(COMPILED_DIR_NAME)/bin-tests
-USER_BIN_DIR := $(OUTPUT_DIR)/$(COMPILED_DIR_NAME)/bin
-USER_BUILD_DIR := $(OUTPUT_DIR)/$(BUILD_DIR_NAME)/user
-LINK_BUILD_DIR := $(OUTPUT_DIR)/$(BUILD_DIR_NAME)/link
-
-# Avoid double slash at the end in the top-level directory
-USER_OBJS_DIR = $(USER_BUILD_DIR)$(RELATIVE_DIR:%=/%)
-KERN_OBJS_DIR = $(KERN_BUILD_DIR)$(RELATIVE_DIR:%=/%)
-OMK_WORK_DIR = $(USER_OBJS_DIR)
-
-strip_out = $(patsubst $(OUTPUT_DIR)/%,%,$(1))
-repl_out = $(patsubst $(OUTPUT_DIR)/%,$$(OUTPUT_DIR)/%,$(1))
-
-.PHONY: FORCE
-
-################
-# Prepare pass #
-################
-
-$(eval $(call omk_pass_template,prepare-pass,$(USER_OBJS_DIR),,always))
-
-###
-# Name of the prepared rule. This name is used as prefix of variable
-# names in .omk.inc and is based on the first target
-omk_inc_rule = $(firstword $(1:$(OUTPUT_DIR)/%=%))
-
-# The name of .omk.inc file is derived from $(omk_inc_rule) and
-# depends whether the target is under _build or elsewhere.
-omk_inc_file = $(if $(filter $(BUILD_DIR_NAME)%,$(omk_inc_rule)),\
- $(OMK_WORK_DIR)/$(notdir $(omk_inc_rule)).omk.inc,\
- $(OMK_WORK_DIR)/$(subst /,_,$(omk_inc_rule)).omk.inc)
-
-target_omk_file = $(OMK_WORK_DIR)/$(notdir $(1)).target.omk
-
-# >'< substitution is for echo to work,
-# >$< substitution to preserve $ when reloading .omk.inc file
-subst-cmd = $(subst \#,\\\#,$(subst $$,$$$$,$(call escsq,$(1))))
-
-###
-# prepare_rule is used to generate .omk.inc files during prepare-pass.
-# All paths in this file should be relative to $(OUTPUT_DIR)
-# Usage: $(eval $(call prepare_rule,<targets>,<deps>,<msg>,<cmd>))
-define prepare_rule
-prepare-pass-local: $(omk_inc_file)
-
-$(omk_inc_file): FORCE
-#TODO remove the next line
- @echo " PREP "$$(call strip_out,$$@); \
- echo 'prepared_rules += $(omk_inc_rule)' > $$@.tmp; \
- echo '$(omk_inc_rule)_targets = $$(call strip_out,$(1))' >> $$@.tmp; \
- echo '$(omk_inc_rule)_deps += $$(call strip_out,$(2))' >> $$@.tmp; \
- echo '$(omk_inc_rule)_msg = $(3)' >> $$@.tmp; \
- echo '$(omk_inc_rule)_cmd = $(call subst-cmd,$(4))' >> $$@.tmp; \
- if cmp -s $$@.tmp $$@; then rm $$@.tmp; else mv $$@.tmp $$@; fi
-endef
-
-###
-# prepare_rule_goal - same as prepare rules but the target is put
-# as dependency to the default goal, which causes it to be built
-# upon calling make
-define prepare_rule_goal
-$(call prepare_rule,$(1),$(2),$(3),$(4))
-prepared_goals += $(call strip_out,$(1))
-endef
-
-prepare-pass-local: $(OMK_WORK_DIR)/__goals.omk.inc
-$(OMK_WORK_DIR)/__goals.omk.inc: FORCE
- $(Q)echo 'omk_goals += $(prepared_goals)' > $@.tmp; \
- if cmp -s $@.tmp $@; then rm $@.tmp; else mv $@.tmp $@; fi
-
-
-############
-# Programs #
-############
-
-# Check GCC version for user build
-ifndef CC_MAJOR_VERSION
-CC_MAJOR_VERSION := $(shell $(CC) -dumpversion | sed -e 's/\([^.]\)\..*/\1/')
-endif
-# Prepare suitable define for dependency building
-ifeq ($(CC_MAJOR_VERSION),2)
-CC_DEPFLAGS = -Wp,-MD,"$$@.d.tmp"
-else
-CC_DEPFLAGS = -MT $$@ -MD -MP -MF "$$@.d.tmp"
-endif
-
-c_o_COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \
- $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -DOMK_FOR_USER
-
-c_o_cmd = \
- if $(c_o_COMPILE) $(CC_DEPFLAGS) -o $$@ -c $$< ; \
- then mv -f "$$@.d.tmp" "$$@.d"; \
- else rm -f "$$@.d.tmp"; exit 1; \
- fi
-
-
-# Usage: $(call program_template,<executable-name>,<bin|utils|test>)
-define program_template
-$(1)_OBJS += $$(patsubst %.c,%.o,$$(filter %.c,$$($(1)_SOURCES)))
-$(1)_OBJS := $$(addprefix $(USER_OBJS_DIR)/,$$(sort $$($(1)_OBJS:%/=%)))
-
-USER_OBJS += $$($(1)_OBJS)
-USER_SOURCES += $$($(1)_SOURCES)
-
-$(call prepare_rule_goal,\
- $(USER_BIN_DIR)/$(1)$(EXE_SUFFIX),\
- $$($(1)_OBJS) $$($(1)_LIBS),\
- "LINK ",\
- $(program_cmd))
-endef
-
-program_cmd = $(if $(filter %.cc,$$($(1)_SOURCES)),$(CXX),$(CC)) \
- $($(1)_OBJS) $($(1)_LIBS:%=-l%) $(LOADLIBES) $(LDFLAGS) -Wl,-rpath-link,$(USER_LIB_DIR) \
- -Wl,-Map,$(USER_OBJS_DIR)/$(1).exe.map -o $$@
-
-$(foreach prog,$(bin_PROGRAMS),$(eval $(call program_template,$(prog),bin)))
-#$(foreach prog,$(bin_PROGRAMS),$(info >>>$(call program_template,$(prog),bin)<<<))
-$(foreach src,$(filter %.c,$(USER_SOURCES)),\
- $(eval $(call prepare_rule,\
- $(USER_OBJS_DIR)/$(src:%.c=%.o),\
- $(SOURCES_DIR)/$(src),\
- "CC ",\
- $(c_o_cmd))))
-
-$(eval $(call prepare_rule_goal,\
- $(USER_OBJS_DIR)/test.X.o,\
- $(SOURCES_DIR)/test.c,\
- "CC ",\
- $(c_o_cmd)))
-
-# OUTPUT_DIR is not defined in Makefile.build so we has to pass it on
-# command-line. After this file will be merged with Makefile.rules, it
-# will not be necessary to pass it.
-default: check-dir prepare-pass
- -$(MAKE) -qp -f $(MAKERULES_DIR)/Makefile.rules build > make.db.build-pseudo-pass;
- +@echo "make[omk]: build"
- @$(MAKE) $(NO_PRINT_DIRECTORY) -f $(MAKERULES_DIR)/Makefile.rules build
-
-check-dir:
- @$(call mkdir_def,$(USER_BUILD_DIR))
- @$(call mkdir_def,$(USER_INCLUDE_DIR))
- @$(call mkdir_def,$(USER_LIB_DIR))
- @$(call mkdir_def,$(USER_BIN_DIR))
- @$(call mkdir_def,$(USER_UTILS_DIR))
- @$(call mkdir_def,$(USER_TESTS_DIR))
-
-
-
-#####################
-# Build pseudo-pass #
-#####################
-ifneq (,$(filter build,$(MAKECMDGOALS)))
-all: build-pseudo-pass
-
-rule_targets = $(value $(1)_targets)
-rule_deps = $(value $(1)_deps)
-rule_msg = $(value $(1)_msg)
-rule_cmd = $(value $(1)_cmd)
-
-# Usage: $(eval $(call build_rule,<target>))
-define build_rule
-$(rule_targets): $(rule_deps) #$(omk_inc_file)
- @$(QUIET_CMD_ECHO) " "$(rule_msg)"$$@" #"$$(call strip_out,$$@)"
- $(Q)$(rule_cmd)
-endef
-
-# TODO: Include __goals.omk.inc only in the subtree
--include $(shell true; find $(USER_BUILD_DIR) -name '*.omk.inc') # `true' is a hack for MinGW
-# FIXME: Disable automatic remake of included files
-
-$(foreach rule,$(prepared_rules),$(eval $(call build_rule,$(rule))))
-
-.PHONY: build
-build: $(foreach target,$(omk_goals),$(target))
-endif # (,$(filter build,$(MAKECMDGOALS)))
-
-
-# Local Variables:
-# mode: makefile-gmake
-# compile-command:"make -qp V=2 > make.db; make V=2"
-# End:
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