+/* Hardware specific */
+/* BAR0 */
+#define GPIOC_reg 0x54
+
+/* BAR2 */
+#define ADCTRL_reg 0x00
+#define ADDATA0_reg 0x00
+#define ADDATA1_reg 0x02
+#define ADDATA2_reg 0x04
+#define ADDATA3_reg 0x06
+#define ADDATA4_reg 0x08
+#define ADDATA5_reg 0x0a
+#define ADDATA6_reg 0x0c
+#define ADDATA7_reg 0x0e
+#define ADSTART_reg 0x20
+
+#define DOUT_reg 0x10
+#define DIN_reg 0x10
+#define DA0_reg 0x20
+#define DA1_reg 0x22
+#define DA2_reg 0x24
+#define DA3_reg 0x26
+#define DA4_reg 0x28
+#define DA5_reg 0x2A
+#define DA6_reg 0x2C
+#define DA7_reg 0x2E
+
+#define GPIOC_DACEN_mask (1 << 26)
+#define GPIOC_LDAC_mask (1 << 23)
+#define GPIOC_EOLC_mask (1 << 17)
+
+#define MFST2REG(mfst, bar_num, reg_offs) \
+ ((void *)(mfst->bar##bar_num.virt_addr + (reg_offs)))
+
+