Add _reg suffix to MF624 counter subsystem registers.

[mf624-simulink.git] / sfReadPWM.c

diff --git a/sfReadPWM.c b/sfReadPWM.c
index fcd406ece4f53d14bedea7a8f7f8167699a18358..da79c92834eee6ee9fa798f25e7cd3178619514c 100644 (file)
--- a/sfReadPWM.c
+++ b/sfReadPWM.c
@@ -134,25 +134,25 @@ static void mdlInitializeSampleTimes(SimStruct *S)
        return;
             
     /*Configuration of desired counter modes*/
-    mf624_write32(CTRX_MODE,MFST2REG(mfst,4,CTR0MODE));
-    mf624_write32(CTRX_MODE,MFST2REG(mfst,4,CTR1MODE));
-    mf624_write32(CTRX_MODE,MFST2REG(mfst,4,CTR2MODE));
-    mf624_write32(CTR4_MODE,MFST2REG(mfst,4,CTR4MODE));
+    mf624_write32(CTRX_MODE,MFST2REG(mfst,4,CTR0MODE_reg));
+    mf624_write32(CTRX_MODE,MFST2REG(mfst,4,CTR1MODE_reg));
+    mf624_write32(CTRX_MODE,MFST2REG(mfst,4,CTR2MODE_reg));
+    mf624_write32(CTR4_MODE,MFST2REG(mfst,4,CTR4MODE_reg));
     
     /*Set reload values of ctrs 0,1,2,4 to 0 just to be sure*/
-    mf624_write32(0,MFST2REG(mfst,4,CTR0));
-    mf624_write32(0,MFST2REG(mfst,4,CTR1));
-    mf624_write32(0,MFST2REG(mfst,4,CTR2));
-    mf624_write32(0,MFST2REG(mfst,4,CTR4));
+    mf624_write32(0,MFST2REG(mfst,4,CTR0_reg));
+    mf624_write32(0,MFST2REG(mfst,4,CTR1_reg));
+    mf624_write32(0,MFST2REG(mfst,4,CTR2_reg));
+    mf624_write32(0,MFST2REG(mfst,4,CTR4_reg));
     
     /*Read values from counters and initialize IWork values with them*/
-    ssSetIWorkValue(S,0,(unsigned int)mf624_read32(MFST2REG(mfst,4,CTR0)));
-    ssSetIWorkValue(S,1,(unsigned int)mf624_read32(MFST2REG(mfst,4,CTR1)));
-    ssSetIWorkValue(S,2,(unsigned int)mf624_read32(MFST2REG(mfst,4,CTR2)));
-    ssSetIWorkValue(S,3,(unsigned int)mf624_read32(MFST2REG(mfst,4,CTR4)));
+    ssSetIWorkValue(S,0,(unsigned int)mf624_read32(MFST2REG(mfst,4,CTR0_reg)));
+    ssSetIWorkValue(S,1,(unsigned int)mf624_read32(MFST2REG(mfst,4,CTR1_reg)));
+    ssSetIWorkValue(S,2,(unsigned int)mf624_read32(MFST2REG(mfst,4,CTR2_reg)));
+    ssSetIWorkValue(S,3,(unsigned int)mf624_read32(MFST2REG(mfst,4,CTR4_reg)));
     
     /*Start counters 0,1,2, tehy are gated with their inputs so no worries about premature start*/
-    mf624_write32(CTR_START,MFST2REG(mfst,4,CTRXCTRL));
+    mf624_write32(CTR_START,MFST2REG(mfst,4,CTRXCTRL_reg));
             
     
   }
@@ -176,10 +176,10 @@ static void mdlOutputs(SimStruct *S, int_T tid)
     if (mf624_check(S) != 0)
            return;
        
-    c0 = mf624_read32(MFST2REG(mfst,4,CTR0));
-    c1 = mf624_read32(MFST2REG(mfst,4,CTR1));
-    c2 = mf624_read32(MFST2REG(mfst,4,CTR2));
-    c4 = mf624_read32(MFST2REG(mfst,4,CTR4));
+    c0 = mf624_read32(MFST2REG(mfst,4,CTR0_reg));
+    c1 = mf624_read32(MFST2REG(mfst,4,CTR1_reg));
+    c2 = mf624_read32(MFST2REG(mfst,4,CTR2_reg));
+    c4 = mf624_read32(MFST2REG(mfst,4,CTR4_reg));
     
     period = (unsigned int)(c4-(unsigned int)ssGetIWorkValue(S,3));
     
@@ -236,7 +236,7 @@ static void mdlTerminate(SimStruct *S)
     if (mf624_check(NULL) != 0)
            return;
 
-    mf624_write32(CTR_STOP,MFST2REG(mfst,4,CTRXCTRL));
+    mf624_write32(CTR_STOP,MFST2REG(mfst,4,CTRXCTRL_reg));
     mf624_done();
 }