IRC inputs support implemented.

[mf624-simulink.git] / mf624_SIMULINK.h

diff --git a/mf624_SIMULINK.h b/mf624_SIMULINK.h
index 50ef8168b8fdf5c52e84763060f28806cdf396ed..c369410568041a951afbc182749e3112b20eac44 100644 (file)
--- a/mf624_SIMULINK.h
+++ b/mf624_SIMULINK.h
@@ -7,6 +7,14 @@
 
 #include "simstruc.h"
 
+/*masked fields macros*/
+#ifndef __val2mfld
+#define __val2mfld(mask,val) (((mask)&~((mask)<<1))*(val)&(mask))
+#endif
+#ifndef __mfld2val
+#define __mfld2val(mask,val) (((val)&(mask))/((mask)&~((mask)<<1)))
+#endif
+
 /* Hardware specific */
 /* BAR0 */
 #define GPIOC_reg              0x54
@@ -47,6 +55,67 @@
 #define CTR4         0x44
 #define CTRXCTRL     0x60
 
+#define IRCSTATUS_reg          0x6C
+#define IRCCTRL_reg            0x6C
+#define IRC0_reg               0x70
+#define IRC1_reg               0x74
+#define IRC2_reg               0x78
+#define IRC3_reg               0x7C
+
+#define IRCCTRL_IRC0MODE_mask  0x00000003
+#define IRCCTRL_IRC0COUNT_mask 0x0000000C
+#define IRCCTRL_IRC0RESET_mask 0x00000070
+#define IRCCTRL_IRC0FILTER_mask        0x00000080
+
+#define IRCCTRL_IRC1MODE_mask  0x00000300
+#define IRCCTRL_IRC1COUNT_mask 0x00000C00
+#define IRCCTRL_IRC1RESET_mask 0x00007000
+#define IRCCTRL_IRC1FILTER_mask        0x00008000
+
+#define IRCCTRL_IRC2MODE_mask  0x00030000
+#define IRCCTRL_IRC2COUNT_mask 0x000C0000
+#define IRCCTRL_IRC2RESET_mask 0x00700000
+#define IRCCTRL_IRC2FILTER_mask        0x00800000
+
+#define IRCCTRL_IRC3MODE_mask  0x03000000
+#define IRCCTRL_IRC3COUNT_mask 0x0C000000
+#define IRCCTRL_IRC3RESET_mask 0x70000000
+#define IRCCTRL_IRC3FILTER_mask        0x80000000
+
+#define IRCCTRL_CHANNEL_SHIFT  8
+
+#define IRCCTRL_MODE_mask(ch)  (0x03<<((ch)*IRCCTRL_CHANNEL_SHIFT))
+#define IRCCTRL_COUNT_mask(ch) (0x0C<<((ch)*IRCCTRL_CHANNEL_SHIFT))
+#define IRCCTRL_RESET_mask(ch) (0x70<<((ch)*IRCCTRL_CHANNEL_SHIFT))
+#define IRCCTRL_FILTER_mask(ch)        (0x80<<((ch)*IRCCTRL_CHANNEL_SHIFT))
+
+#define IRCCTRL_MODE_IRC       0
+#define IRCCTRL_MODE_BIDIR_RE  1
+#define IRCCTRL_MODE_BIDIR_FE  2
+#define IRCCTRL_MODE_BIDIR_BOTH        3
+
+#define IRCCTRL_COUNT_ENABLED  0
+#define IRCCTRL_COUNT_DISABLED 1
+#define IRCCTRL_COUNT_IF_IDX_LO        2
+#define IRCCTRL_COUNT_IF_IDX_HI        3
+
+#define IRCCTRL_RESET_DISABLED 0
+#define IRCCTRL_RESET_ALWAYS   1
+#define IRCCTRL_RESET_IF_IDX_LO        2
+#define IRCCTRL_RESET_IF_IDX_HI        3
+#define IRCCTRL_RESET_IF_IDX_RE        4
+#define IRCCTRL_RESET_IF_IDX_FE        5
+#define IRCCTRL_RESET_IF_IDX_BOTH 6
+
+#define IRCSTATUS_IRC0INDEX_mask       0x00000001
+#define IRCSTATUS_IRC1INDEX_mask       0x00000100
+#define IRCSTATUS_IRC2INDEX_mask       0x00000100
+#define IRCSTATUS_IRC3INDEX_mask       0x00000100
+
+#define IRCSTATUS_CHANNEL_SHIFT        8
+
+#define IRCSTATUS_INDEX_mask(ch)       (0x01<<((ch)*IRCSTATUS_CHANNEL_SHIFT))
+
 #define GPIOC_DACEN_mask       (1 << 26)
 #define GPIOC_LDAC_mask                (1 << 23)
 #define GPIOC_EOLC_mask                (1 << 17)
@@ -76,7 +145,8 @@ typedef struct mf624_state_t {
        bar_mapping_t bar4;
        int status;
        int ADC_enabled; // Which ADCs are enabled
-    int DOut;
+       int DOut;
+       uint32_t IRC_mode;
 } mf624_state_t;
 
 //extern mf624_state_t mf624_state;
@@ -136,6 +206,8 @@ extern int ADC_enable(mf624_state_t* mfst, adc_channel_t channel);
 
 extern double ADC_read(mf624_state_t* mfst, adc_channel_t channel);
 
+extern uint32_t IRC_mode_change(mf624_state_t* mfst, uint32_t change_mask, uint32_t change_val);
+
 int mf624_init(SimStruct *S);
 int mf624_check(SimStruct *S);
 int mf624_done();