TCG_REG_R61,
TCG_REG_R62,
TCG_REG_R63,
+
+ TCG_AREG0 = TCG_REG_R32,
} TCGReg;
#define TCG_CT_CONST_ZERO 0x100
#define TCG_TARGET_HAS_not_i32 0 /* xor r1, -1, r3 */
#define TCG_TARGET_HAS_not_i64 0 /* xor r1, -1, r3 */
-#define TCG_AREG0 TCG_REG_R7
-
static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
{
start = start & ~(32UL - 1UL);