target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN set

[lisovros/qemu_apohw.git] / target-arm / cpu.c

diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 0b1ad1012f4d20a966ad34f60d55522b9847fe92..d62b792b29a14409441926f179d86c690113ab24 100644 (file)
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -100,8 +100,15 @@ static void arm_cpu_reset(CPUState *s)
         env->pstate = PSTATE_MODE_EL0t;
         /* Userspace expects access to CTL_EL0 and the cache ops */
         env->cp15.c1_sys |= SCTLR_UCT | SCTLR_UCI;
+        /* and to the FP/Neon instructions */
+        env->cp15.c1_coproc = deposit64(env->cp15.c1_coproc, 20, 2, 3);
 #else
         env->pstate = PSTATE_MODE_EL1h;
+#endif
+    } else {
+#if defined(CONFIG_USER_ONLY)
+        /* Userspace expects access to cp10 and cp11 for FP/Neon */
+        env->cp15.c1_coproc = deposit64(env->cp15.c1_coproc, 20, 4, 0xf);
 #endif
     }