2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
6 * Licensed under the GPL-2 or later.
9 #include <linux/device.h>
10 #include <linux/platform_device.h>
11 #include <linux/mtd/mtd.h>
12 #include <linux/mtd/partitions.h>
13 #include <linux/mtd/physmap.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
17 #include <linux/i2c.h>
18 #include <linux/irq.h>
19 #include <linux/interrupt.h>
20 #include <linux/usb/musb.h>
22 #include <asm/bfin5xx_spi.h>
23 #include <asm/reboot.h>
25 #include <asm/portmux.h>
27 #include <linux/spi/ad7877.h>
30 * Name the Board for the /proc/cpuinfo
32 const char bfin_board_name[] = "ADI BF526-EZBRD";
35 * Driver needs to know address, irq and flag pin.
38 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
39 static struct resource musb_resources[] = {
43 .flags = IORESOURCE_MEM,
45 [1] = { /* general IRQ */
46 .start = IRQ_USB_INT0,
48 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
53 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
57 static struct musb_hdrc_config musb_config = {
64 .gpio_vrsel = GPIO_PG13,
65 /* Some custom boards need to be active low, just set it to "0"
68 .gpio_vrsel_active = 1,
71 static struct musb_hdrc_platform_data musb_plat = {
72 #if defined(CONFIG_USB_MUSB_OTG)
74 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
76 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
77 .mode = MUSB_PERIPHERAL,
79 .config = &musb_config,
82 static u64 musb_dmamask = ~(u32)0;
84 static struct platform_device musb_device = {
88 .dma_mask = &musb_dmamask,
89 .coherent_dma_mask = 0xffffffff,
90 .platform_data = &musb_plat,
92 .num_resources = ARRAY_SIZE(musb_resources),
93 .resource = musb_resources,
97 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
98 static struct mtd_partition ezbrd_partitions[] = {
100 .name = "bootloader(nor)",
104 .name = "linux kernel(nor)",
106 .offset = MTDPART_OFS_APPEND,
108 .name = "file system(nor)",
109 .size = MTDPART_SIZ_FULL,
110 .offset = MTDPART_OFS_APPEND,
114 static struct physmap_flash_data ezbrd_flash_data = {
116 .parts = ezbrd_partitions,
117 .nr_parts = ARRAY_SIZE(ezbrd_partitions),
120 static struct resource ezbrd_flash_resource = {
123 .flags = IORESOURCE_MEM,
126 static struct platform_device ezbrd_flash_device = {
127 .name = "physmap-flash",
130 .platform_data = &ezbrd_flash_data,
133 .resource = &ezbrd_flash_resource,
137 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
138 static struct mtd_partition partition_info[] = {
140 .name = "linux kernel(nand)",
142 .size = 4 * 1024 * 1024,
145 .name = "file system(nand)",
146 .offset = MTDPART_OFS_APPEND,
147 .size = MTDPART_SIZ_FULL,
151 static struct bf5xx_nand_platform bf5xx_nand_platform = {
152 .page_size = NFC_PG_SIZE_256,
153 .data_width = NFC_NWIDTH_8,
154 .partitions = partition_info,
155 .nr_partitions = ARRAY_SIZE(partition_info),
160 static struct resource bf5xx_nand_resources[] = {
163 .end = NFC_DATA_RD + 2,
164 .flags = IORESOURCE_MEM,
169 .flags = IORESOURCE_IRQ,
173 static struct platform_device bf5xx_nand_device = {
174 .name = "bf5xx-nand",
176 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
177 .resource = bf5xx_nand_resources,
179 .platform_data = &bf5xx_nand_platform,
184 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
185 static struct platform_device rtc_device = {
192 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
193 static struct platform_device bfin_mii_bus = {
194 .name = "bfin_mii_bus",
197 static struct platform_device bfin_mac_device = {
199 .dev.platform_data = &bfin_mii_bus,
203 #if defined(CONFIG_MTD_M25P80) \
204 || defined(CONFIG_MTD_M25P80_MODULE)
205 static struct mtd_partition bfin_spi_flash_partitions[] = {
207 .name = "bootloader(spi)",
210 .mask_flags = MTD_CAP_ROM
212 .name = "linux kernel(spi)",
213 .size = MTDPART_SIZ_FULL,
214 .offset = MTDPART_OFS_APPEND,
218 static struct flash_platform_data bfin_spi_flash_data = {
220 .parts = bfin_spi_flash_partitions,
221 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
222 .type = "sst25wf040",
225 /* SPI flash chip (sst25wf040) */
226 static struct bfin5xx_spi_chip spi_flash_chip_info = {
227 .enable_dma = 0, /* use dma transfer with this chip*/
232 #if defined(CONFIG_BFIN_SPI_ADC) \
233 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
235 static struct bfin5xx_spi_chip spi_adc_chip_info = {
236 .enable_dma = 1, /* use dma transfer with this chip*/
241 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
242 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
248 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
249 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
254 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
256 .vref_delay_usecs = 50, /* internal, no capacitor */
259 .pressure_max = 1000,
261 .stopacq_polarity = 1,
262 .first_conversion_delay = 3,
263 .acquisition_time = 1,
265 .pen_down_acc_interval = 1,
269 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
270 #include <linux/spi/ad7879.h>
271 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
272 .model = 7879, /* Model = AD7879 */
273 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
274 .pressure_max = 10000,
276 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
277 .acquisition_time = 1, /* 4us acquisition time per sample */
278 .median = 2, /* do 8 measurements */
279 .averaging = 1, /* take the average of 4 middle samples */
280 .pen_down_acc_interval = 255, /* 9.4 ms */
281 .gpio_export = 1, /* Export GPIO to gpiolib */
282 .gpio_base = -1, /* Dynamic allocation */
286 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
287 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
293 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
294 && defined(CONFIG_SND_SOC_WM8731_SPI)
295 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
301 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
302 static struct bfin5xx_spi_chip spidev_chip_info = {
308 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
309 static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
315 static struct spi_board_info bfin_spi_board_info[] __initdata = {
316 #if defined(CONFIG_MTD_M25P80) \
317 || defined(CONFIG_MTD_M25P80_MODULE)
319 /* the modalias must be the same as spi device driver name */
320 .modalias = "m25p80", /* Name of spi_driver for this device */
321 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
322 .bus_num = 0, /* Framework bus number */
323 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
324 .platform_data = &bfin_spi_flash_data,
325 .controller_data = &spi_flash_chip_info,
330 #if defined(CONFIG_BFIN_SPI_ADC) \
331 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
333 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
334 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
335 .bus_num = 0, /* Framework bus number */
336 .chip_select = 1, /* Framework chip select. */
337 .platform_data = NULL, /* No spi_driver specific config */
338 .controller_data = &spi_adc_chip_info,
342 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
344 .modalias = "mmc_spi",
345 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
348 .controller_data = &mmc_spi_chip_info,
352 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
354 .modalias = "ad7877",
355 .platform_data = &bfin_ad7877_ts_info,
357 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
360 .controller_data = &spi_ad7877_chip_info,
363 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
365 .modalias = "ad7879",
366 .platform_data = &bfin_ad7879_ts_info,
368 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
371 .controller_data = &spi_ad7879_chip_info,
372 .mode = SPI_CPHA | SPI_CPOL,
375 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
376 && defined(CONFIG_SND_SOC_WM8731_SPI)
378 .modalias = "wm8731",
379 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
382 .controller_data = &spi_wm8731_chip_info,
386 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
388 .modalias = "spidev",
389 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
392 .controller_data = &spidev_chip_info,
395 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
397 .modalias = "bfin-lq035q1-spi",
398 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
401 .controller_data = &lq035q1_spi_chip_info,
402 .mode = SPI_CPHA | SPI_CPOL,
407 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
408 /* SPI controller data */
409 static struct bfin5xx_spi_master bfin_spi0_info = {
411 .enable_dma = 1, /* master has the ability to do dma transfer */
412 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
416 static struct resource bfin_spi0_resource[] = {
418 .start = SPI0_REGBASE,
419 .end = SPI0_REGBASE + 0xFF,
420 .flags = IORESOURCE_MEM,
425 .flags = IORESOURCE_DMA,
430 .flags = IORESOURCE_IRQ,
434 static struct platform_device bfin_spi0_device = {
436 .id = 0, /* Bus number */
437 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
438 .resource = bfin_spi0_resource,
440 .platform_data = &bfin_spi0_info, /* Passed to driver */
443 #endif /* spi master and devices */
445 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
446 #ifdef CONFIG_SERIAL_BFIN_UART0
447 static struct resource bfin_uart0_resources[] = {
451 .flags = IORESOURCE_MEM,
454 .start = IRQ_UART0_RX,
455 .end = IRQ_UART0_RX+1,
456 .flags = IORESOURCE_IRQ,
459 .start = IRQ_UART0_ERROR,
460 .end = IRQ_UART0_ERROR,
461 .flags = IORESOURCE_IRQ,
464 .start = CH_UART0_TX,
466 .flags = IORESOURCE_DMA,
469 .start = CH_UART0_RX,
471 .flags = IORESOURCE_DMA,
475 unsigned short bfin_uart0_peripherals[] = {
476 P_UART0_TX, P_UART0_RX, 0
479 static struct platform_device bfin_uart0_device = {
482 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
483 .resource = bfin_uart0_resources,
485 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
489 #ifdef CONFIG_SERIAL_BFIN_UART1
490 static struct resource bfin_uart1_resources[] = {
494 .flags = IORESOURCE_MEM,
497 .start = IRQ_UART1_RX,
498 .end = IRQ_UART1_RX+1,
499 .flags = IORESOURCE_IRQ,
502 .start = IRQ_UART1_ERROR,
503 .end = IRQ_UART1_ERROR,
504 .flags = IORESOURCE_IRQ,
507 .start = CH_UART1_TX,
509 .flags = IORESOURCE_DMA,
512 .start = CH_UART1_RX,
514 .flags = IORESOURCE_DMA,
516 #ifdef CONFIG_BFIN_UART1_CTSRTS
520 .flags = IORESOURCE_IO,
525 .flags = IORESOURCE_IO,
530 unsigned short bfin_uart1_peripherals[] = {
531 P_UART1_TX, P_UART1_RX, 0
534 static struct platform_device bfin_uart1_device = {
537 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
538 .resource = bfin_uart1_resources,
540 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
546 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
547 #ifdef CONFIG_BFIN_SIR0
548 static struct resource bfin_sir0_resources[] = {
552 .flags = IORESOURCE_MEM,
555 .start = IRQ_UART0_RX,
556 .end = IRQ_UART0_RX+1,
557 .flags = IORESOURCE_IRQ,
560 .start = CH_UART0_RX,
561 .end = CH_UART0_RX+1,
562 .flags = IORESOURCE_DMA,
566 static struct platform_device bfin_sir0_device = {
569 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
570 .resource = bfin_sir0_resources,
573 #ifdef CONFIG_BFIN_SIR1
574 static struct resource bfin_sir1_resources[] = {
578 .flags = IORESOURCE_MEM,
581 .start = IRQ_UART1_RX,
582 .end = IRQ_UART1_RX+1,
583 .flags = IORESOURCE_IRQ,
586 .start = CH_UART1_RX,
587 .end = CH_UART1_RX+1,
588 .flags = IORESOURCE_DMA,
592 static struct platform_device bfin_sir1_device = {
595 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
596 .resource = bfin_sir1_resources,
601 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
602 static struct resource bfin_twi0_resource[] = {
604 .start = TWI0_REGBASE,
606 .flags = IORESOURCE_MEM,
611 .flags = IORESOURCE_IRQ,
615 static struct platform_device i2c_bfin_twi_device = {
616 .name = "i2c-bfin-twi",
618 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
619 .resource = bfin_twi0_resource,
623 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
624 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
626 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
629 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
631 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
637 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
638 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
639 static struct resource bfin_sport0_uart_resources[] = {
641 .start = SPORT0_TCR1,
642 .end = SPORT0_MRCS3+4,
643 .flags = IORESOURCE_MEM,
646 .start = IRQ_SPORT0_RX,
647 .end = IRQ_SPORT0_RX+1,
648 .flags = IORESOURCE_IRQ,
651 .start = IRQ_SPORT0_ERROR,
652 .end = IRQ_SPORT0_ERROR,
653 .flags = IORESOURCE_IRQ,
657 unsigned short bfin_sport0_peripherals[] = {
658 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
659 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
662 static struct platform_device bfin_sport0_uart_device = {
663 .name = "bfin-sport-uart",
665 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
666 .resource = bfin_sport0_uart_resources,
668 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
672 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
673 static struct resource bfin_sport1_uart_resources[] = {
675 .start = SPORT1_TCR1,
676 .end = SPORT1_MRCS3+4,
677 .flags = IORESOURCE_MEM,
680 .start = IRQ_SPORT1_RX,
681 .end = IRQ_SPORT1_RX+1,
682 .flags = IORESOURCE_IRQ,
685 .start = IRQ_SPORT1_ERROR,
686 .end = IRQ_SPORT1_ERROR,
687 .flags = IORESOURCE_IRQ,
691 unsigned short bfin_sport1_peripherals[] = {
692 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
693 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
696 static struct platform_device bfin_sport1_uart_device = {
697 .name = "bfin-sport-uart",
699 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
700 .resource = bfin_sport1_uart_resources,
702 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
708 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
709 #include <linux/input.h>
710 #include <linux/gpio_keys.h>
712 static struct gpio_keys_button bfin_gpio_keys_table[] = {
713 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
714 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
717 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
718 .buttons = bfin_gpio_keys_table,
719 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
722 static struct platform_device bfin_device_gpiokeys = {
725 .platform_data = &bfin_gpio_keys_data,
730 static const unsigned int cclk_vlev_datasheet[] =
732 VRPAIR(VLEV_100, 400000000),
733 VRPAIR(VLEV_105, 426000000),
734 VRPAIR(VLEV_110, 500000000),
735 VRPAIR(VLEV_115, 533000000),
736 VRPAIR(VLEV_120, 600000000),
739 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
740 .tuple_tab = cclk_vlev_datasheet,
741 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
742 .vr_settling_time = 25 /* us */,
745 static struct platform_device bfin_dpmc = {
748 .platform_data = &bfin_dmpc_vreg_data,
752 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
753 #include <asm/bfin-lq035q1.h>
755 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
756 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
757 .ppi_mode = USE_RGB565_16_BIT_PPI,
759 .gpio_bl = GPIO_PG12,
762 static struct resource bfin_lq035q1_resources[] = {
764 .start = IRQ_PPI_ERROR,
765 .end = IRQ_PPI_ERROR,
766 .flags = IORESOURCE_IRQ,
770 static struct platform_device bfin_lq035q1_device = {
771 .name = "bfin-lq035q1",
773 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
774 .resource = bfin_lq035q1_resources,
776 .platform_data = &bfin_lq035q1_data,
781 static struct platform_device *stamp_devices[] __initdata = {
785 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
789 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
793 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
797 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
802 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
806 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
807 #ifdef CONFIG_SERIAL_BFIN_UART0
810 #ifdef CONFIG_SERIAL_BFIN_UART1
815 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
816 &bfin_lq035q1_device,
819 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
820 #ifdef CONFIG_BFIN_SIR0
823 #ifdef CONFIG_BFIN_SIR1
828 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
829 &i2c_bfin_twi_device,
832 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
833 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
834 &bfin_sport0_uart_device,
836 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
837 &bfin_sport1_uart_device,
841 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
842 &bfin_device_gpiokeys,
845 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
850 static int __init ezbrd_init(void)
852 printk(KERN_INFO "%s(): registering device resources\n", __func__);
853 i2c_register_board_info(0, bfin_i2c_board_info,
854 ARRAY_SIZE(bfin_i2c_board_info));
855 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
856 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
860 arch_initcall(ezbrd_init);
862 static struct platform_device *ezbrd_early_devices[] __initdata = {
863 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
864 #ifdef CONFIG_SERIAL_BFIN_UART0
867 #ifdef CONFIG_SERIAL_BFIN_UART1
872 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
873 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
874 &bfin_sport0_uart_device,
876 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
877 &bfin_sport1_uart_device,
882 void __init native_machine_early_platform_add_devices(void)
884 printk(KERN_INFO "register early platform devices\n");
885 early_platform_add_devices(ezbrd_early_devices,
886 ARRAY_SIZE(ezbrd_early_devices));
889 void native_machine_restart(char *cmd)
891 /* workaround reboot hang when booting from SPI */
892 if ((bfin_read_SYSCR() & 0x7) == 0x3)
893 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
896 void bfin_get_ether_addr(char *addr)
898 /* the MAC is stored in OTP memory page 0xDF */
901 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
903 ret = otp_read(0xDF, 0x00, &otp_mac);
905 char *otp_mac_p = (char *)&otp_mac;
906 for (ret = 0; ret < 6; ++ret)
907 addr[ret] = otp_mac_p[5 - ret];
910 EXPORT_SYMBOL(bfin_get_ether_addr);