From 89e3e5afa508bc4828123242efc8989d39f7cfe7 Mon Sep 17 00:00:00 2001 From: ppisa Date: Mon, 24 Nov 2008 02:55:49 +0100 Subject: [PATCH] The simulated data bus access on target simplified. The functions can_read and can_write has same parameters order as Linux readb/writeb functions. Signed-off-by: ppisa --- embedded/app/usbcan/can.c | 108 +++++++++++++++++++--------------- embedded/app/usbcan/can/can.h | 4 +- embedded/app/usbcan/main.c | 10 ++-- embedded/app/usbcan/ul_usb1.c | 4 +- 4 files changed, 71 insertions(+), 55 deletions(-) diff --git a/embedded/app/usbcan/can.c b/embedded/app/usbcan/can.c index 25d7f34..fc94599 100644 --- a/embedded/app/usbcan/can.c +++ b/embedded/app/usbcan/can.c @@ -11,22 +11,37 @@ See documentation for details. #include "can/can.h" -/// Baud rates -#if SJA1000_CLK==(24000000) - /* Bus speed, Precaler, SJW, TSEG1, TSEG2 - * For SJW setting we assume 1% xtal accuracy +inline void can_data_pins_dir_output(void) +{ + IO1DIR|=P1_SJA1000_DATA_PINS; // Port as output to send data +} + +inline void can_data_pins_dir_input(void) +{ + IO1DIR&=~P1_SJA1000_DATA_PINS; // Sets port as input +} + +inline void can_data_pins_set_value(uint8_t data) +{ + uint32_t val = __val2mfld(P1_SJA1000_DATA_PINS,data); + /* + * Clear only that pins, which need that, lower transition + * frequency and eliminate spikes */ - const long sja1000_freqs[3][5]= - {{1000, 0x00, 0xC0, 0x08, 0x10} - ,{250, 0x02, 0xC0, 0x0A, 0x30} - ,{100, 0x07, 0xC0, 0x09, 0x30}}; - const int sja1000_freq_cnt=3; -#endif + IO1CLR= val ^ P1_SJA1000_DATA_PINS; + IO1SET= val; +} + +inline uint8_t can_data_pins_get_value(void) +{ + return __mfld2val(P1_SJA1000_DATA_PINS,IO1PIN); +} -struct can_baudparams_t canbaud; void can_comm_init() { + //CANMSG("Start can_comm_init\n"); + IO1DIR |= P1_OUT_PORT_CS_PIN|P1_SJA1000_RST_PIN; // Due to change in design there is CS_PIN connected with ALE_PIN and ALE_PIN connection to LPC is interrupted // We don't use ALE_PIN //IO0DIR|=P0_SJA1000_ALE_PIN|P0_SJA1000_CS_PIN|P0_SJA1000_RD_PIN|P0_SJA1000_WR_PIN; @@ -43,94 +58,95 @@ void can_comm_init() SJA1000_INIT_DELAY(); } -int can_write(uint8_t address,uint8_t* data) +void can_write(uint8_t data, uint8_t address) { - IO1DIR|=0x00FF0000; // Port as output to send data - IO1CLR=0x00FF0000; // Clear all data on port + can_data_pins_dir_output(); + // Set memory address + can_data_pins_set_value(address); // Init SET_OUT_PIN(IO0,P0_SJA1000_RD_PIN); // Stays high on write SET_OUT_PIN(IO0,P0_SJA1000_WR_PIN); // Stays high on address write SET_OUT_PIN(IO0,P0_SJA1000_CS_PIN); // Sets output buffers to third state - SJA1000_DELAY(); + //SJA1000_DELAY(); //SET_OUT_PIN(IO0,P0_SJA1000_ALE_PIN); // Start command - // Set memory address - IO1SET=__val2mfld(0x00FF0000,address); // Shift data to SJA pins and output them - SJA1000_DELAY(); + //SJA1000_DELAY(); //CLR_OUT_PIN(IO0,P0_SJA1000_ALE_PIN); // Makes address active CLR_OUT_PIN(IO0,P0_SJA1000_CS_PIN); - SJA1000_DELAY(); + //SJA1000_DELAY(); // Setting data - CLR_OUT_PIN(IO0,P0_SJA1000_WR_PIN); + can_data_pins_set_value(data); - IO1CLR=0x00FF0000; - IO1SET=__val2mfld(0x00FF0000,*data); - SJA1000_DELAY(); + CLR_OUT_PIN(IO0,P0_SJA1000_WR_PIN); + CLR_OUT_PIN(IO0,P0_SJA1000_WR_PIN); + //SJA1000_DELAY(); SET_OUT_PIN(IO0,P0_SJA1000_WR_PIN); // Data should be accepted by now SET_OUT_PIN(IO0,P0_SJA1000_CS_PIN); - SJA1000_DELAY(); - return 0; + //SJA1000_DELAY(); } -int can_read(const uint8_t address,uint8_t* data) +uint8_t can_read(const uint8_t address) { - IO1DIR|=0x00FF0000; // Port as output to set address - IO1CLR=0x00FF0000; // Clear all data + uint8_t data; + + can_data_pins_dir_output(); + // Set memory address + can_data_pins_set_value(address); // Init SET_OUT_PIN(IO0,P0_SJA1000_WR_PIN); // Stays high on read SET_OUT_PIN(IO0,P0_SJA1000_RD_PIN); // Stays high while entering address SET_OUT_PIN(IO0,P0_SJA1000_CS_PIN); - SJA1000_DELAY(); + //SJA1000_DELAY(); //SET_OUT_PIN(IO0,P0_SJA1000_ALE_PIN); - // Request memory address - IO1SET=__val2mfld(0x00FF0000,address); - SJA1000_DELAY(); + //SJA1000_DELAY(); //CLR_OUT_PIN(IO0,P0_SJA1000_ALE_PIN); CLR_OUT_PIN(IO0,P0_SJA1000_CS_PIN); // Get data - IO1DIR&=~0x00FF0000; // Sets port as input + can_data_pins_dir_input(); + CLR_OUT_PIN(IO0,P0_SJA1000_RD_PIN); CLR_OUT_PIN(IO0,P0_SJA1000_RD_PIN); - SJA1000_DELAY(); - *data=__mfld2val(0x00FF0000,IO1PIN); + //SJA1000_DELAY(); + data = can_data_pins_get_value(); SET_OUT_PIN(IO0,P0_SJA1000_RD_PIN); SET_OUT_PIN(IO0,P0_SJA1000_CS_PIN); - SJA1000_DELAY(); - return 0; + //SJA1000_DELAY(); + + return data; } int can_init(){ uint8_t data=0,count=0; do { can_comm_init(); - can_read(SJAMOD,&data); + data = can_read(SJAMOD); if (count++ > 50) return -1; } while (!(data&sjaMOD_RM)); data=sjaCDR_CLKOUT_DIV1|sjaCDR_CLK_OFF|sjaCDR_CBP|sjaCDR_PELICAN; - can_write((uint8_t)SJACDR,(uint8_t*)&data); + can_write(data, SJACDR); // Single acceptance filter, reset mode data=sjaMOD_AFM|sjaMOD_RM; - can_write((uint8_t)SJAMOD,(uint8_t*)&data); + can_write(data, SJAMOD); // Enabling all interrupt sources data=sjaENABLE_INTERRUPTS; - can_write((uint8_t)SJAIER,(uint8_t*)&data); + can_write(data, SJAIER); // Accept all messages data=0xFF; - can_write((uint8_t)SJAAMR0,(uint8_t*)&data); - can_write((uint8_t)SJAAMR0+1,(uint8_t*)&data); - can_write((uint8_t)SJAAMR0+2,(uint8_t*)&data); - can_write((uint8_t)SJAAMR0+3,(uint8_t*)&data); + can_write(data, SJAAMR0); + can_write(data, SJAAMR0+1); + can_write(data, SJAAMR0+2); + can_write(data, SJAAMR0+3); data=sjaCMR_CDO; - can_write((uint8_t)SJACMR,(uint8_t*)&data); + can_write(data, SJACMR); return 0; } diff --git a/embedded/app/usbcan/can/can.h b/embedded/app/usbcan/can/can.h index 4dacadf..ea863f6 100644 --- a/embedded/app/usbcan/can/can.h +++ b/embedded/app/usbcan/can/can.h @@ -65,7 +65,7 @@ struct can_baudparams_t { }; extern int can_init(); -extern int can_read(uint8_t address,uint8_t *data); -extern int can_write(uint8_t address,uint8_t *data); +extern uint8_t can_read(uint8_t address); +extern void can_write(uint8_t data, uint8_t address); #endif /* SJA1000_CAN_H */ diff --git a/embedded/app/usbcan/main.c b/embedded/app/usbcan/main.c index 657b9e3..0aff221 100644 --- a/embedded/app/usbcan/main.c +++ b/embedded/app/usbcan/main.c @@ -353,7 +353,6 @@ int main(void) chip->chipspecops->irq_handler(0,chip); if (usb_device.ep_events & MASK_EP1RX) { //EP1RX - data waiting to receive - uint8_t val; if (canque_get_inslot(qends, &qedge, &slot, 0)>=0){ //Free slot obtained size=usb_udev_read_endpoint(&eps[0],ep1_rx_buff,16); if (size==16){ @@ -393,16 +392,17 @@ int main(void) /* if (size==2){ - if (((*data)&CAN_OP_MASK)==CAN_OP_READ){ // Get data from CAN device and return to caller - can_read((*data) & 0x7F,&val); + uint8_t val; + if ((data[0]&CAN_OP_MASK)==CAN_OP_READ){ // Get data from CAN device and return to caller + val = can_read(data[0] & ~CAN_OP_MASK); *(data+1)=val; usb_udev_write_endpoint(&eps[1],(unsigned char *)data,size); timer_rx_off=50; //rosviceni diody pri prijmu CLR_OUT_PIN(LED_PORT,LED2_BIT); usb_can_send=0; } - if (((*data)&CAN_OP_MASK)==CAN_OP_WRITE){ // Save data to CAN device - can_write((*data)&(~CAN_OP_MASK),data+1); + if ((data[0]&CAN_OP_MASK)==CAN_OP_WRITE){ // Save data to CAN device + can_write(data[1], data[0] & ~CAN_OP_MASK); timer_tx_off=50; //rozsviceni diod pri vysilani CLR_OUT_PIN(LED_PORT,LED1_BIT); } diff --git a/embedded/app/usbcan/ul_usb1.c b/embedded/app/usbcan/ul_usb1.c index abb1626..9e0e709 100644 --- a/embedded/app/usbcan/ul_usb1.c +++ b/embedded/app/usbcan/ul_usb1.c @@ -277,7 +277,7 @@ int ul_usb1_program_irq(struct candevice_t *candev) */ void ul_usb1_write_register(unsigned data, unsigned long address) { - can_write((uint8_t)(address & 0xFF), (uint8_t *)&data); + can_write(data, address & 0xFF); } /** ul_usb1_read_register @@ -293,7 +293,7 @@ void ul_usb1_write_register(unsigned data, unsigned long address) unsigned ul_usb1_read_register(unsigned long address) { uint8_t data; - can_read((uint8_t)(address & 0xFF), (uint8_t *)&data); + data = can_read(address & 0xFF); return data; } -- 2.39.2