From: ppisa Date: Sat, 5 Jul 2008 01:50:51 +0000 (+0200) Subject: Included ARM LPC21xx related code from uLan project. The snapshot date is 2008-07-05 X-Git-Tag: CLT_COMM_CAN_usb_can1_kriz_bp~23 X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/commitdiff_plain/d344481bcd23d73d542503b66542d0bbfc29bf13 Included ARM LPC21xx related code from uLan project. The snapshot date is 2008-07-05 It can be obtained by command cvs -z3 -d:pserver:anonymous@ulan.cvs.sourceforge.net:/cvsroot/ulan co -D 7/5/08 ulan/embedded --- diff --git a/embedded/Makefile b/embedded/Makefile new file mode 100644 index 0000000..bdb6d45 --- /dev/null +++ b/embedded/Makefile @@ -0,0 +1,15 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + +# DO NOT DELETE diff --git a/embedded/Makefile.omk b/embedded/Makefile.omk new file mode 100644 index 0000000..c0f9113 --- /dev/null +++ b/embedded/Makefile.omk @@ -0,0 +1,6 @@ +# -*- makefile -*- + +SUBDIRS = app arch board libs4c + +-include $(SOURCES_DIR)/Makefile.omk-additional + diff --git a/embedded/README.txt b/embedded/README.txt new file mode 100644 index 0000000..52b1e62 --- /dev/null +++ b/embedded/README.txt @@ -0,0 +1,93 @@ +uLan embedded source tree v 0.5 +=============================== + +This is highly experimental code, look for latest +version on the project related pages + + http://ulan.sourceforge.net/ + http://sourceforge.net/projects/ulan + http://cmp.felk.cvut.cz/~pisa#ulan + +To build code you need to have SDCC 2.5.3-CVS. +The snapshot past Sep 3 2005 are OK. +The GNU make program 3.81beta3 or better is required. +The full build has been tested on Linux based hosts only +for now. The uLan protocol code has been successfully build +by Keil compiler under Windows in the past. + +The archive has to be unpacked with symbolic links +for now. We are thinking about rearrangement +of the code to make it more portable and drop +link requirements. + +The MCS51 is only port provided in this version. + +To build do + + cd ul_embedded-x.y/mcs51 + make defaul-config + make + +You should find resulting binaries in the "_compiled/bin" +directory. The board and application is selected by used +"config.omk" file. Example files can be found in the "configs" +directory. + +The next boards and applications are supported + +Device: MCS51 TI MSC-1210 + Board: ULAD-21 - AD converter and uLan2USB converter + Applications: + config.mscboot-ulad21 - uLan enabled remote boot-loader and boot-block + config.u2u-ulad21 - uLan to USB converter + + Board: HISC - Home Information System Controller + config.mscboot-hisc - boot block for distributed HISC system + config.blinder - blinder controller + config.kswtimer - kettle switch timer + +Device: MCS51 Atmel AT89C51RD2 + config.u2u-ps1 - AT89C51RD2 based uLan2USB converter + + +The procedure to write boot-block into ULAD-21 MSC1210 based board +requires next steps + + FLASHMSC_TTY=/dev/ttyS1 + flashmsc -d $FLASHMSC_TTY -E 0x807f + flashmsc -d $FLASHMSC_TTY -E 0x7fff + flashmsc -d $FLASHMSC_TTY -X 18432000 ulad21-hcr.hex + flashmsc -d $FLASHMSC_TTY -X 18432000 ulad21-boot.hex + +The "flashmsc" sources can be found at page + http://cmp.felk.cvut.cz/~pisa/#mcuutils + +To replace application in the converter or other uLan node +over uLan communication protocol, next steps are required + + echo Reset application if running + ul_sendhex -g 0 -m 0 + echo Waiting to target to go into boot block + echo If application blocks, reset device at this time + echo to activate boot block now + ul_sendhex -o 0 -m 0 + echo Found devices + ul_sendhex -p 64 + echo Erasing flash + ul_sendhex -m 62 -t 5 -e -s 0x2000 -l 0x6000 + sleep 2 + echo Loading application + ul_sendhex -m 62 -t 5 application.hex + +Look for uLan driver for host side (Linux, Windows, DOS) +uLan protocol driver. The uLan2USB converter requires +at least version ul_drv-0.7 release. + +The code authors + + (C) Copyright 1996-2005 by Pavel Pisa + http://cmp.felk.cvut.cz/~pisa + (C) Copyright 1996-2005 PiKRON Ltd. + http://www.pikron.com + (C) Copyright 2002-2005 Petr Smolik + diff --git a/embedded/app/Makefile b/embedded/app/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/app/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/app/Makefile.omk b/embedded/app/Makefile.omk new file mode 100644 index 0000000..ff939fc --- /dev/null +++ b/embedded/app/Makefile.omk @@ -0,0 +1,4 @@ +# -*- makefile -*- + +SUBDIRS = + diff --git a/embedded/arch/Makefile b/embedded/arch/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/arch/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/arch/Makefile.omk b/embedded/arch/Makefile.omk new file mode 100644 index 0000000..974732f --- /dev/null +++ b/embedded/arch/Makefile.omk @@ -0,0 +1,3 @@ +# -*- makefile -*- + +SUBDIRS = generic $(ARCH) diff --git a/embedded/arch/arm/Makefile b/embedded/arch/arm/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/arch/arm/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/arch/arm/Makefile.omk b/embedded/arch/arm/Makefile.omk new file mode 100644 index 0000000..3f99071 --- /dev/null +++ b/embedded/arch/arm/Makefile.omk @@ -0,0 +1 @@ +SUBDIRS = generic mach-$(MACH) diff --git a/embedded/arch/arm/generic/Makefile b/embedded/arch/arm/generic/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/arch/arm/generic/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/arch/arm/generic/Makefile.omk b/embedded/arch/arm/generic/Makefile.omk new file mode 100644 index 0000000..dba8475 --- /dev/null +++ b/embedded/arch/arm/generic/Makefile.omk @@ -0,0 +1,3 @@ +# -*- makefile -*- + +SUBDIRS = defines libs diff --git a/embedded/arch/arm/generic/defines/Makefile b/embedded/arch/arm/generic/defines/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/arch/arm/generic/defines/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/arch/arm/generic/defines/Makefile.omk b/embedded/arch/arm/generic/defines/Makefile.omk new file mode 100644 index 0000000..702e343 --- /dev/null +++ b/embedded/arch/arm/generic/defines/Makefile.omk @@ -0,0 +1,3 @@ +# -*- makefile -*- + +include_HEADERS = $(notdir $(wildcard $(SOURCES_DIR)/*.h)) diff --git a/embedded/arch/arm/generic/defines/cpu_def.h b/embedded/arch/arm/generic/defines/cpu_def.h new file mode 100644 index 0000000..8c7b97d --- /dev/null +++ b/embedded/arch/arm/generic/defines/cpu_def.h @@ -0,0 +1,262 @@ +#ifndef _ARM_CPU_DEF_H +#define _ARM_CPU_DEF_H + +#ifndef CODE + #define CODE +#endif + +#ifndef XDATA + #define XDATA +#endif + +#ifndef DATA + #define DATA +#endif + +struct pt_regs { + long uregs[18]; +}; + +#define ARM_cpsr uregs[16] +#define ARM_pc uregs[15] +#define ARM_lr uregs[14] +#define ARM_sp uregs[13] +#define ARM_ip uregs[12] +#define ARM_fp uregs[11] +#define ARM_r10 uregs[10] +#define ARM_r9 uregs[9] +#define ARM_r8 uregs[8] +#define ARM_r7 uregs[7] +#define ARM_r6 uregs[6] +#define ARM_r5 uregs[5] +#define ARM_r4 uregs[4] +#define ARM_r3 uregs[3] +#define ARM_r2 uregs[2] +#define ARM_r1 uregs[1] +#define ARM_r0 uregs[0] +#define ARM_ORIG_r0 uregs[17] + +struct undef_hook { + struct undef_hook *next; + unsigned long instr_mask; + unsigned long instr_val; + unsigned long cpsr_mask; + unsigned long cpsr_val; + int (*fn)(struct pt_regs *regs, unsigned int instr); +}; + +int register_undef_hook(struct undef_hook *hook); + +#define NR_IRQS 256 + +typedef struct irq_handler { + void (*handler)(int, void *, struct pt_regs *); + unsigned long flags; + void *dev_id; + const char *devname; + struct irq_handler *next; + short vectno; +} irq_handler_t; + +#define IRQH_ON_LIST 0x100 /* handler is used */ + +extern irq_handler_t *irq_array[NR_IRQS]; +extern void *irq_vec[NR_IRQS]; + +int add_irq_handler(int vectno,irq_handler_t *handler); + +int del_irq_handler(int vectno,irq_handler_t *handler); + +int test_irq_handler(int vectno,const irq_handler_t *handler); + +void irq_redirect2vector(int vectno,struct pt_regs *regs); + +/* IRQ handling code */ + +#define sti() \ + ({ \ + unsigned long temp; \ + __asm__ __volatile__( \ + "mrs %0, cpsr @ sti\n" \ +" bic %0, %0, #128\n" \ +" msr cpsr_c, %0" \ + : "=r" (temp) \ + : \ + : "memory", "cc"); \ + }) + +#define cli() \ + ({ \ + unsigned long temp; \ + __asm__ __volatile__( \ + "mrs %0, cpsr @ cli\n" \ +" orr %0, %0, #128\n" \ +" msr cpsr_c, %0" \ + : "=r" (temp) \ + : \ + : "memory", "cc"); \ + }) + +#define save_and_cli(flags) \ + ({ \ + unsigned long temp; \ + (void) (&temp == &flags); \ + __asm__ __volatile__( \ + "mrs %0, cpsr @ save_and_cli\n" \ +" orr %1, %0, #128\n" \ +" msr cpsr_c, %1" \ + : "=r" (flags), "=r" (temp) \ + : \ + : "memory", "cc"); \ + }) + +#define save_flags(flags) \ + ({ \ + __asm__ __volatile__( \ + "mrs %0, cpsr @ save_flags\n" \ + : "=r" (flags) \ + : \ + : "memory", "cc"); \ + }) + +#define restore_flags(flags) \ + __asm__ __volatile__( \ + "msr cpsr_c, %0 @ restore_flags\n" \ + : \ + : "r" (flags) \ + : "memory", "cc") + + +/* FIQ handling code */ + +#define fiq_sti() \ + ({ \ + unsigned long temp; \ + __asm__ __volatile__( \ + "mrs %0, cpsr @ sti\n" \ +" bic %0, %0, #64\n" \ +" msr cpsr_c, %0" \ + : "=r" (temp) \ + : \ + : "memory", "cc"); \ + }) + +#define fiq_cli() \ + ({ \ + unsigned long temp; \ + __asm__ __volatile__( \ + "mrs %0, cpsr @ cli\n" \ +" orr %0, %0, #64\n" \ +" msr cpsr_c, %0" \ + : "=r" (temp) \ + : \ + : "memory", "cc"); \ + }) + +#define fiq_save_and_cli(flags) \ + ({ \ + unsigned long temp; \ + (void) (&temp == &flags); \ + __asm__ __volatile__( \ + "mrs %0, cpsr @ save_and_cli\n" \ +" orr %1, %0, #192\n" \ +" msr cpsr_c, %1" \ + : "=r" (flags), "=r" (temp) \ + : \ + : "memory", "cc"); \ + }) + +void __cpu_coherent_range(unsigned long start, unsigned long end); + +static inline void flush_icache_range(unsigned long start, unsigned long end) +{ + __cpu_coherent_range(start, end); +} + +/* atomic access routines */ + +//typedef unsigned long atomic_t; + +static inline void atomic_clear_mask(unsigned long mask, volatile unsigned long *addr) +{ + unsigned long flags; + + save_and_cli(flags); + *addr &= ~mask; + restore_flags(flags); +} + +static inline void atomic_set_mask(unsigned long mask, volatile unsigned long *addr) +{ + unsigned long flags; + + save_and_cli(flags); + *addr |= mask; + restore_flags(flags); +} + +static inline void set_bit(int nr, volatile unsigned long *addr) +{ + unsigned long flags; + + save_and_cli(flags); + *addr |= 1< + +//-------------------------------------------------------------------------- +// Static data used by HAL +// ISR tables +extern uint32_t hal_interrupt_handlers[HAL_ISR_COUNT]; +extern uint32_t hal_interrupt_data[HAL_ISR_COUNT]; + +//-------------------------------------------------------------------------- +// Default ISR +// The #define is used to test whether this routine exists, and to allow +// code outside the HAL to call it. + +typedef void (*hal_isr)(int vector, uint32_t data); //function ptr +extern uint32_t hal_default_isr(int vector, uint32_t data); +#define HAL_DEFAULT_ISR hal_default_isr + +//-------------------------------------------------------------------------- +// Vector translation. + +#ifndef HAL_TRANSLATE_VECTOR +#define HAL_TRANSLATE_VECTOR(_vector_,_index_) \ + (_index_) = (_vector_) +#endif + +//-------------------------------------------------------------------------- +// Interrupt and VSR attachment macros + +#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \ + { \ + uint32_t _index_; \ + HAL_TRANSLATE_VECTOR ((_vector_), _index_); \ + \ + if( hal_interrupt_handlers[_index_] == (uint32_t)hal_default_isr ) \ + (_state_) = 0; \ + else \ + (_state_) = 1; \ + } + +#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_) \ + { \ + if( hal_interrupt_handlers[_vector_] == (uint32_t)hal_default_isr ) \ + { \ + hal_interrupt_handlers[_vector_] = (uint32_t)_isr_; \ + hal_interrupt_data[_vector_] = (uint32_t) _data_; \ + } \ + } + +#define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \ + { \ + if( hal_interrupt_handlers[_vector_] == (uint32_t)_isr_ ) \ + { \ + hal_interrupt_handlers[_vector_] = (uint32_t)hal_default_isr; \ + hal_interrupt_data[_vector_] = 0; \ + } \ + } + + +//-------------------------------------------------------------------------- +// Interrupt controller access + +extern void hal_interrupt_mask(int); +extern void hal_interrupt_unmask(int); +extern void hal_interrupt_acknowledge(int); +extern void hal_interrupt_configure(int, int, int); +extern void hal_interrupt_set_level(int, int); + +#define HAL_INTERRUPT_MASK( _vector_ ) \ + hal_interrupt_mask( _vector_ ) +#define HAL_INTERRUPT_UNMASK( _vector_ ) \ + hal_interrupt_unmask( _vector_ ) +#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \ + hal_interrupt_acknowledge( _vector_ ) +#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) \ + hal_interrupt_configure( _vector_, _level_, _up_ ) +#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) \ + hal_interrupt_set_level( _vector_, _level_ ) + +#endif /* HAL_DEFAULT_ISR */ diff --git a/embedded/arch/arm/generic/defines/types.h b/embedded/arch/arm/generic/defines/types.h new file mode 100644 index 0000000..e5d5a57 --- /dev/null +++ b/embedded/arch/arm/generic/defines/types.h @@ -0,0 +1,77 @@ +#ifndef __ASM_ARM_TYPES_H +#define __ASM_ARM_TYPES_H + +#ifndef __ASSEMBLY__ + +typedef unsigned short umode_t; + +/* + * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the + * header files exported to user space + */ + +typedef __signed__ char __s8; +typedef unsigned char __u8; + +typedef __signed__ short __s16; +typedef unsigned short __u16; + +typedef __signed__ int __s32; +typedef unsigned int __u32; + +#if defined(__GNUC__) && !defined(__STRICT_ANSI__) +typedef __signed__ long long __s64; +typedef unsigned long long __u64; +#endif + +#endif /* __ASSEMBLY__ */ + +#ifndef __BIT_TYPES_DEFINED__ +#define __BIT_TYPES_DEFINED__ + +typedef __u8 uint8_t; +typedef __s8 int8_t; +typedef __u16 uint16_t; +typedef __s16 int16_t; +typedef __u32 uint32_t; +typedef __s32 int32_t; + +#if defined(__GNUC__) && !defined(__STRICT_ANSI__) +typedef __s64 int64_t; +typedef __u64 uint64_t; +#endif + +#endif /* !(__BIT_TYPES_DEFINED__) */ + +/* + * These aren't exported outside the kernel to avoid name space clashes + */ +#ifdef __KERNEL__ + +#define BITS_PER_LONG 32 + +#ifndef __ASSEMBLY__ + +typedef __s8 s8; +typedef __u8 u8; + +typedef __s16 s16; +typedef __u16 u16; + +typedef __s32 s32; +typedef __u32 u32; + +typedef __s64 s64; +typedef __s64 u64; + +/* Dma addresses are 32-bits wide. */ + +typedef u32 dma_addr_t; +typedef u32 dma64_addr_t; + +#endif /* __ASSEMBLY__ */ + +#endif /* __KERNEL__ */ + +#endif + diff --git a/embedded/arch/arm/generic/libs/Makefile b/embedded/arch/arm/generic/libs/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/arch/arm/generic/libs/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/arch/arm/generic/libs/Makefile.omk b/embedded/arch/arm/generic/libs/Makefile.omk new file mode 100644 index 0000000..d833bce --- /dev/null +++ b/embedded/arch/arm/generic/libs/Makefile.omk @@ -0,0 +1,3 @@ +# -*- makefile -*- + +SUBDIRS = misc diff --git a/embedded/arch/arm/generic/libs/misc/Makefile b/embedded/arch/arm/generic/libs/misc/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/arch/arm/generic/libs/misc/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/arch/arm/generic/libs/misc/Makefile.omk b/embedded/arch/arm/generic/libs/misc/Makefile.omk new file mode 100644 index 0000000..b94858c --- /dev/null +++ b/embedded/arch/arm/generic/libs/misc/Makefile.omk @@ -0,0 +1,9 @@ +# -*- makefile -*- + +include_HEADERS = system_stub.h + +lib_LIBRARIES = arch + +arch_SOURCES = system_stub.c + +lib_obj_SOURCES = system_stub.c diff --git a/embedded/arch/arm/generic/libs/misc/system_stub.c b/embedded/arch/arm/generic/libs/misc/system_stub.c new file mode 100644 index 0000000..24fa2f9 --- /dev/null +++ b/embedded/arch/arm/generic/libs/misc/system_stub.c @@ -0,0 +1,209 @@ +/* Support files for GNU libc. Files in the system namespace go here. + Files in the C namespace (ie those that do not start with an + underscore) go in .c. */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Register name faking - works in collusion with the linker. */ +register char * stack_ptr asm ("sp"); + +system_stub_ops_t system_stub_ops; + +int +_read (int file, + char * ptr, + int len) +{ + if(!system_stub_ops.read) + return -1; + return system_stub_ops.read(file,ptr,len); +} + +int +_write (int file, + char * ptr, + int len) +{ + if(!system_stub_ops.write) + return len; + return system_stub_ops.write(file,ptr,len); +} + + +int +_lseek (int file, + int pos, + int dir) +{ + if(!system_stub_ops.lseek) + return -1; + return system_stub_ops.lseek(file,pos,dir); +} + +int +_open (const char * path, + int flags, + ...) +{ + if(!system_stub_ops.open) + return -1; + return system_stub_ops.open(path,flags,0); +} + +int +_close (int file) +{ + if(!system_stub_ops.close) + return -1; + return system_stub_ops.close(file); +} + +typedef int (local_call_t)(void); + +void +_exit (int n) +{ + ((local_call_t*)0)(); + while(1); +} + +int +_kill (int n, int m) +{ + return -1; +} + +int +_getpid (int n) +{ + return 1; +} + + +caddr_t +_sbrk (int incr) +{ + extern char end asm ("end"); /* Defined by the linker. */ + static char *heap_end; + char * prev_heap_end; + + incr=(incr+3) & ~3; + + if (heap_end == NULL) + heap_end = & end; + + prev_heap_end = heap_end; + + if (heap_end + incr > stack_ptr) + { + /* Some of the libstdc++-v3 tests rely upon detecting + out of memory errors, so do not abort here. */ +#if 0 + extern void abort (void); + + _write (1, "_sbrk: Heap and stack collision\n", 32); + + abort (); +#else + errno = ENOMEM; + return (caddr_t) -1; +#endif + } + + heap_end += incr; + + return (caddr_t) prev_heap_end; +} + +int +_fstat (int file, struct stat * st) +{ + return -1; +} + +int _stat (const char *fname, struct stat *st) +{ + return -1; +} + +int +_link (void) +{ + return -1; +} + +int +_unlink (void) +{ + return -1; +} + +void +_raise (void) +{ + return; +} + +int +_gettimeofday (struct timeval * tp, struct timezone * tzp) +{ + + if(tp) + { + tp->tv_sec = 0; + tp->tv_usec = 0; + } + /* Return fixed data for the timezone. */ + if (tzp) + { + tzp->tz_minuteswest = 0; + tzp->tz_dsttime = 0; + } + + return 0; +} + +/* Return a clock that ticks at 100Hz. */ +clock_t +_times (struct tms * tp) +{ + clock_t timeval = 0; + + if (tp) + { + tp->tms_utime = timeval; /* user time */ + tp->tms_stime = 0; /* system time */ + tp->tms_cutime = 0; /* user time, children */ + tp->tms_cstime = 0; /* system time, children */ + } + + return timeval; +}; + + +int +isatty (int fd) +{ + return 1; +} + +int +_system (const char *s) +{ + return -1; +} + +int +_rename (const char * oldpath, const char * newpath) +{ + return -1; +} diff --git a/embedded/arch/arm/generic/libs/misc/system_stub.h b/embedded/arch/arm/generic/libs/misc/system_stub.h new file mode 100644 index 0000000..b1e3375 --- /dev/null +++ b/embedded/arch/arm/generic/libs/misc/system_stub.h @@ -0,0 +1,16 @@ +#ifndef _SYSTEM_STUB_H_ +#define _SYSTEM_STUB_H_ + +#include + +typedef struct system_stub_ops_t { + int (*open)(const char * path, int flags, ...); + int (*close)(int file); + int (*read)(int file, char * ptr, int len); + int (*write)(int file, char * ptr, int len); + int (*lseek)(int file, int ptr, int dir); +} system_stub_ops_t; + +extern system_stub_ops_t system_stub_ops; + +#endif /* _SYSTEM_DEF_H_ */ diff --git a/embedded/arch/arm/generic/libs/misc/undef_support.c b/embedded/arch/arm/generic/libs/misc/undef_support.c new file mode 100644 index 0000000..a51b708 --- /dev/null +++ b/embedded/arch/arm/generic/libs/misc/undef_support.c @@ -0,0 +1,55 @@ +#include +#include + +static int undef_initialized = 0; + +static unsigned long cpu_undef_stack[256]; + +struct undef_hook *undef_hook_chain = NULL; + +static void undef_exception_handler(int excptnum, struct pt_regs *regs) +{ + /*unsigned int correction = thumb_mode(regs) ? 2 : 4;*/ + unsigned int correction = 0; + struct undef_hook *hook; + void *pc; + unsigned long instr; + + regs->ARM_pc -= correction; + + pc = (void *)regs->ARM_pc; + + instr = *(unsigned long *)pc; + + for(hook = undef_hook_chain; hook; hook = hook->next) { + if (((instr & hook->instr_mask) == hook->instr_val) && + ((regs->ARM_cpsr & hook->cpsr_mask) == hook->cpsr_val)) { + if (hook->fn(regs, instr) == 0) { + return; + } + } + } + + for(;;){ + /* Fatal error */ + } +} + +int register_undef_hook(struct undef_hook *hook) +{ + unsigned long flags; + + save_and_cli(flags); + + if(!undef_initialized) { + set_cpu_exception_handler(ARM_EXCEPTION_UNDEF, (long)undef_exception_handler); + set_cpu_exception_stack(ARM_EXCEPTION_UNDEF, (long)((char*)cpu_undef_stack+sizeof(cpu_undef_stack)-8)); + undef_initialized = 1; + } + + hook->next = undef_hook_chain; + undef_hook_chain = hook; + restore_flags(flags); + + return 0; +} diff --git a/embedded/arch/arm/mach-lpc21xx/Makefile b/embedded/arch/arm/mach-lpc21xx/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/arch/arm/mach-lpc21xx/Makefile.omk b/embedded/arch/arm/mach-lpc21xx/Makefile.omk new file mode 100644 index 0000000..2ebd5c8 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/Makefile.omk @@ -0,0 +1 @@ +SUBDIRS = defines libs diff --git a/embedded/arch/arm/mach-lpc21xx/defines/LPC210x.h b/embedded/arch/arm/mach-lpc21xx/defines/LPC210x.h new file mode 100644 index 0000000..1e4e2f4 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/LPC210x.h @@ -0,0 +1,6 @@ +#ifndef INC_LPC210x_H +#define INC_LPC210x_H + +#include "LPC21xx.h" + +#endif diff --git a/embedded/arch/arm/mach-lpc21xx/defines/LPC214x.h b/embedded/arch/arm/mach-lpc21xx/defines/LPC214x.h new file mode 100644 index 0000000..d6a95d4 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/LPC214x.h @@ -0,0 +1,165 @@ +/****************************************************************************** + * + * $RCSfile: LPC214x.h,v $ + * $Revision: 1.4 $ + * + * Header file for Philips LPC214x ARM Processors + * Copyright 2006 Pavel Pisa + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact or GPL license is applied. + * + *****************************************************************************/ + +#ifndef INC_LPC214x_H +#define INC_LPC214x_H + +/////////////////////////////////////////////////////////////////////////////// +// ISP_RAM2FLASH_BLOCK_SIZE for 210x CPU +#ifndef ISP_RAM2FLASH_BLOCK_SIZE + #define ISP_RAM2FLASH_BLOCK_SIZE 256 +#endif /* ISP_RAM2FLASH_BLOCK_SIZE */ + +#include "LPC21xx.h" + +#include "lpcUSB.h" +#include "lpcADC-214x.h" + +// USB Phase Locked Loop Registers (PLL48) +#define PLLCON48 SCB->pll48.con /* Control Register */ +#define PLLCFG48 SCB->pll48.cfg /* Configuration Register */ +#define PLLSTAT48 SCB->pll48.stat /* Status Register */ +#define PLLFEED48 SCB->pll48.feed /* Feed Register */ + +/////////////////////////////////////////////////////////////////////////////// +// USB Device + +#define USBIntSt (*(REG32*)0xE01FC1C0) /* USB Interrupt Status (R/W) */ + +#if 1 + +#define USB ((usbRegs_t *)0xE0090000) + +#define USBDevIntSt USB->DevIntSt +#define USBDevIntEn USB->DevIntEn +#define USBDevIntClr USB->DevIntClr +#define USBDevIntSet USB->DevIntSet +#define USBDevIntPri USB->DevIntPri +#define USBEpIntSt USB->EpIntSt +#define USBEpIntEn USB->EpIntEn +#define USBEpIntClr USB->EpIntClr +#define USBEpIntSet USB->EpIntSet +#define USBEpIntPri USB->EpIntPri +#define USBReEp USB->ReEp +#define USBEpInd USB->EpInd +#define USBMaxPSize USB->MaxPSize +#define USBRxData USB->RxData +#define USBRxPLen USB->RxPLen +#define USBTxData USB->TxData +#define USBTxPLen USB->TxPLen +#define USBCtrl USB->Ctrl +#define USBCmdCode USB->CmdCode +#define USBCmdData USB->CmdData +#define USBDMARSt USB->DMARSt +#define USBDMARClr USB->DMARClr +#define USBDMARSet USB->DMARSet +#define USBUDCAH USB->UDCAH +#define USBEpDMASt USB->EpDMASt +#define USBEpDMAEn USB->EpDMAEn +#define USBEpDMADis USB->EpDMADis +#define USBDMAIntSt USB->DMAIntSt +#define USBDMAIntEn USB->DMAIntEn +#define USBEoTIntSt USB->EoTIntSt +#define USBEoTIntClr USB->EoTIntClr +#define USBEoTIntSet USB->EoTIntSet +#define USBNDDRIntSt USB->NDDRIntSt +#define USBNDDRIntClr USB->NDDRIntClr +#define USBNDDRIntSet USB->NDDRIntSet +#define USBSysErrIntSt USB->SysErrIntSt +#define USBSysErrIntClr USB->SysErrIntClr +#define USBSysErrIntSet USB->SysErrIntSet +#define USB_MODULE_ID USB->MODULE_ID +# else + +#define USB_REGS_BASE 0xE0090000 + +#define USBDevIntSt (*(REG32*)(USB_REGS_BASE+USBDevIntSt_o)) +#define USBDevIntEn (*(REG32*)(USB_REGS_BASE+USBDevIntEn_o)) +#define USBDevIntClr (*(REG32*)(USB_REGS_BASE+USBDevIntClr_o)) +#define USBDevIntSet (*(REG32*)(USB_REGS_BASE+USBDevIntSet_o)) +#define USBDevIntPri (*(REG_8*)(USB_REGS_BASE+USBDevIntPri_o)) +#define USBEpIntSt (*(REG32*)(USB_REGS_BASE+USBEpIntSt_o)) +#define USBEpIntEn (*(REG32*)(USB_REGS_BASE+USBEpIntEn_o)) +#define USBEpIntClr (*(REG32*)(USB_REGS_BASE+USBEpIntClr_o)) +#define USBEpIntSet (*(REG32*)(USB_REGS_BASE+USBEpIntSet_o)) +#define USBEpIntPri (*(REG32*)(USB_REGS_BASE+USBEpIntPri_o)) +#define USBReEp (*(REG32*)(USB_REGS_BASE+USBReEp_o)) +#define USBEpInd (*(REG32*)(USB_REGS_BASE+USBEpInd_o)) +#define USBMaxPSize (*(REG32*)(USB_REGS_BASE+USBMaxPSize_o)) +#define USBRxData (*(REG32*)(USB_REGS_BASE+USBRxData_o)) +#define USBRxPLen (*(REG32*)(USB_REGS_BASE+USBRxPLen_o)) +#define USBTxData (*(REG32*)(USB_REGS_BASE+USBTxData_o)) +#define USBTxPLen (*(REG32*)(USB_REGS_BASE+USBTxPLen_o)) +#define USBCtrl (*(REG32*)(USB_REGS_BASE+USBCtrl_o)) +#define USBCmdCode (*(REG32*)(USB_REGS_BASE+USBCmdCode_o)) +#define USBCmdData (*(REG32*)(USB_REGS_BASE+USBCmdData_o)) +#define USBDMARSt (*(REG32*)(USB_REGS_BASE+USBDMARSt_o)) +#define USBDMARClr (*(REG32*)(USB_REGS_BASE+USBDMARClr_o)) +#define USBDMARSet (*(REG32*)(USB_REGS_BASE+USBDMARSet_o)) +#define USBUDCAH (*(REG32*)(USB_REGS_BASE+USBUDCAH_o)) +#define USBEpDMASt (*(REG32*)(USB_REGS_BASE+USBEpDMASt_o)) +#define USBEpDMAEn (*(REG32*)(USB_REGS_BASE+USBEpDMAEn_o)) +#define USBEpDMADis (*(REG32*)(USB_REGS_BASE+USBEpDMADis_o)) +#define USBDMAIntSt (*(REG32*)(USB_REGS_BASE+USBDMAIntSt_o)) +#define USBDMAIntEn (*(REG32*)(USB_REGS_BASE+USBDMAIntEn_o)) +#define USBEoTIntSt (*(REG32*)(USB_REGS_BASE+USBEoTIntSt_o)) +#define USBEoTIntClr (*(REG32*)(USB_REGS_BASE+USBEoTIntClr_o)) +#define USBEoTIntSet (*(REG32*)(USB_REGS_BASE+USBEoTIntSet_o)) +#define USBNDDRIntSt (*(REG32*)(USB_REGS_BASE+USBNDDRIntSt_o)) +#define USBNDDRIntClr (*(REG32*)(USB_REGS_BASE+USBNDDRIntClr_o)) +#define USBNDDRIntSet (*(REG32*)(USB_REGS_BASE+USBNDDRIntSet_o)) +#define USBSysErrIntSt (*(REG32*)(USB_REGS_BASE+USBSysErrIntSt_o)) +#define USBSysErrIntClr (*(REG32*)(USB_REGS_BASE+USBSysErrIntClr_o)) +#define USBSysErrIntSet (*(REG32*)(USB_REGS_BASE+USBSysErrIntSet_o)) +#define USB_MODULE_ID (*(REG32*)(USB_REGS_BASE+USB_MODULE_ID_o)) + +#endif + + +/////////////////////////////////////////////////////////////////////////////// +// A/D Converter +#define ADC0 ((adc214xRegs_t *)0xE0034000) + +#define AD0CR ADC0->cr // Control Register +#define AD0GDR ADC0->gdr // Global Data Register +#define AD0GSR ADC0->gsr // Global Start Register +#define AD0INTEN ADC0->inten // Interrupt Enable Register +#define AD0DR0 ADC0->dr0 // Channel 0 Data Register +#define AD0DR1 ADC0->dr1 // Channel 1 Data Register +#define AD0DR2 ADC0->dr2 // Channel 2 Data Register +#define AD0DR3 ADC0->dr3 // Channel 3 Data Register +#define AD0DR4 ADC0->dr4 // Channel 4 Data Register +#define AD0DR5 ADC0->dr5 // Channel 5 Data Register +#define AD0DR6 ADC0->dr6 // Channel 6 Data Register +#define AD0DR7 ADC0->dr7 // Channel 7 Data Register +#define AD0STAT ADC0->stat // Status Register + +#define ADC1 ((adc214xRegs_t *)0xE0060000) + +#define AD1CR ADC0->cr // Control Register +#define AD1GDR ADC0->gdr // Global Data Register +#define AD1GSR ADC0->gsr // Global Start Register +#define AD1INTEN ADC0->inten // Interrupt Enable Register +#define AD1DR0 ADC0->dr0 // Channel 0 Data Register +#define AD1DR1 ADC0->dr1 // Channel 1 Data Register +#define AD1DR2 ADC0->dr2 // Channel 2 Data Register +#define AD1DR3 ADC0->dr3 // Channel 3 Data Register +#define AD1DR4 ADC0->dr4 // Channel 4 Data Register +#define AD1DR5 ADC0->dr5 // Channel 5 Data Register +#define AD1DR6 ADC0->dr6 // Channel 6 Data Register +#define AD1DR7 ADC0->dr7 // Channel 7 Data Register +#define AD1STAT ADC0->stat // Status Register + + +#endif /*INC_LPC21xx_H*/ diff --git a/embedded/arch/arm/mach-lpc21xx/defines/LPC21xx.h b/embedded/arch/arm/mach-lpc21xx/defines/LPC21xx.h new file mode 100644 index 0000000..c9d06c8 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/LPC21xx.h @@ -0,0 +1,333 @@ +/****************************************************************************** + * + * $RCSfile: LPC21xx.h,v $ + * $Revision: 1.3 $ + * + * Header file for Philips LPC21xx ARM Processors + * Copyright 2004 R O SoftWare + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + *****************************************************************************/ +#ifndef INC_LPC21xx_H +#define INC_LPC21xx_H + +#define REG_8 volatile unsigned char +#define REG16 volatile unsigned short +#define REG32 volatile unsigned long + +#include "lpcWD.h" +#include "lpcTMR.h" +#include "lpcUART.h" +#include "lpcI2C.h" +#include "lpcSPI.h" +#include "lpcRTC.h" +#include "lpcGPIO.h" +#include "lpcPIN.h" +#include "lpcADC.h" +#include "lpcSCB.h" +#include "lpcVIC.h" + +/////////////////////////////////////////////////////////////////////////////// +// Keyval +#define KVPB_CHUNK_SIZE 16 + +/////////////////////////////////////////////////////////////////////////////// +// ISP_RAM2FLASH_BLOCK_SIZE for CPU - minimal is 512, can be smaller for some CPU +#ifndef ISP_RAM2FLASH_BLOCK_SIZE + #define ISP_RAM2FLASH_BLOCK_SIZE 512 +#endif /* ISP_RAM2FLASH_BLOCK_SIZE */ + +/////////////////////////////////////////////////////////////////////////////// +// Watchdog +#define WD ((wdRegs_t *)0xE0000000) + +// Watchdog Registers +#define WDMOD WD->mod /* Watchdog Mode Register */ +#define WDTC WD->tc /* Watchdog Time Constant Register */ +#define WDFEED WD->feed /* Watchdog Feed Register */ +#define WDTV WD->tv /* Watchdog Time Value Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Timer 0 +#define TMR0 ((pwmTmrRegs_t *)0xE0004000) + +// Timer 0 Registers +#define T0IR TMR0->ir /* Interrupt Register */ +#define T0TCR TMR0->tcr /* Timer Control Register */ +#define T0TC TMR0->tc /* Timer Counter */ +#define T0PR TMR0->pr /* Prescale Register */ +#define T0PC TMR0->pc /* Prescale Counter Register */ +#define T0MCR TMR0->mcr /* Match Control Register */ +#define T0MR0 TMR0->mr0 /* Match Register 0 */ +#define T0MR1 TMR0->mr1 /* Match Register 1 */ +#define T0MR2 TMR0->mr2 /* Match Register 2 */ +#define T0MR3 TMR0->mr3 /* Match Register 3 */ +#define T0CCR TMR0->ccr /* Capture Control Register */ +#define T0CR0 TMR0->cr0 /* Capture Register 0 */ +#define T0CR1 TMR0->cr1 /* Capture Register 1 */ +#define T0CR2 TMR0->cr2 /* Capture Register 2 */ +#define T0CR3 TMR0->cr3 /* Capture Register 3 */ +#define T0EMR TMR0->emr /* External Match Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Timer 1 +#define TMR1 ((pwmTmrRegs_t *)0xE0008000) + +// Timer 1 Registers +#define T1IR TMR1->ir /* Interrupt Register */ +#define T1TCR TMR1->tcr /* Timer Control Register */ +#define T1TC TMR1->tc /* Timer Counter */ +#define T1PR TMR1->pr /* Prescale Register */ +#define T1PC TMR1->pc /* Prescale Counter Register */ +#define T1MCR TMR1->mcr /* Match Control Register */ +#define T1MR0 TMR1->mr0 /* Match Register 0 */ +#define T1MR1 TMR1->mr1 /* Match Register 1 */ +#define T1MR2 TMR1->mr2 /* Match Register 2 */ +#define T1MR3 TMR1->mr3 /* Match Register 3 */ +#define T1CCR TMR1->ccr /* Capture Control Register */ +#define T1CR0 TMR1->cr0 /* Capture Register 0 */ +#define T1CR1 TMR1->cr1 /* Capture Register 1 */ +#define T1CR2 TMR1->cr2 /* Capture Register 2 */ +#define T1CR3 TMR1->cr3 /* Capture Register 3 */ +#define T1EMR TMR1->emr /* External Match Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Pulse Width Modulator (PWM) +#define PWM ((pwmTmrRegs_t *)0xE0014000) + +// PWM Registers +#define PWMIR PWM->ir /* Interrupt Register */ +#define PWMTCR PWM->tcr /* Timer Control Register */ +#define PWMTC PWM->tc /* Timer Counter */ +#define PWMPR PWM->pr /* Prescale Register */ +#define PWMPC PWM->pc /* Prescale Counter Register */ +#define PWMMCR PWM->mcr /* Match Control Register */ +#define PWMMR0 PWM->mr0 /* Match Register 0 */ +#define PWMMR1 PWM->mr1 /* Match Register 1 */ +#define PWMMR2 PWM->mr2 /* Match Register 2 */ +#define PWMMR3 PWM->mr3 /* Match Register 3 */ +#define PWMMR4 PWM->mr4 /* Match Register 4 */ +#define PWMMR5 PWM->mr5 /* Match Register 5 */ +#define PWMMR6 PWM->mr6 /* Match Register 6 */ +#define PWMPCR PWM->pcr /* Control Register */ +#define PWMLER PWM->ler /* Latch Enable Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Universal Asynchronous Receiver Transmitter 0 (UART0) +#define UART0 ((uartRegs_t *)0xE000C000) +#define U0_PINSEL (0x00000005) /* PINSEL0 Value for UART0 */ +#define U0_PINMASK (0x0000000F) /* PINSEL0 Mask for UART0 */ + +// UART0 Registers +#define U0RBR UART0->rbr /* Receive Buffer Register */ +#define U0THR UART0->thr /* Transmit Holding Register */ +#define U0IER UART0->ier /* Interrupt Enable Register */ +#define U0IIR UART0->iir /* Interrupt ID Register */ +#define U0FCR UART0->fcr /* FIFO Control Register */ +#define U0LCR UART0->lcr /* Line Control Register */ +#define U0LSR UART0->lsr /* Line Status Register */ +#define U0SCR UART0->scr /* Scratch Pad Register */ +#define U0DLL UART0->dll /* Divisor Latch Register (LSB) */ +#define U0DLM UART0->dlm /* Divisor Latch Register (MSB) */ + +/////////////////////////////////////////////////////////////////////////////// +// Universal Asynchronous Receiver Transmitter 1 (UART1) +#define UART1 ((uartRegs_t *)0xE0010000) +#define U1_PINSEL (0x00050000) /* PINSEL0 Value for UART1 */ +#define U1_PINMASK (0x000F0000) /* PINSEL0 Mask for UART1 */ + +// UART1 Registers +#define U1RBR UART1->rbr /* Receive Buffer Register */ +#define U1THR UART1->thr /* Transmit Holding Register */ +#define U1IER UART1->ier /* Interrupt Enable Register */ +#define U1IIR UART1->iir /* Interrupt ID Register */ +#define U1FCR UART1->fcr /* FIFO Control Register */ +#define U1LCR UART1->lcr /* Line Control Register */ +#define U1MCR UART1->mcr /* MODEM Control Register */ +#define U1LSR UART1->lsr /* Line Status Register */ +#define U1MSR UART1->msr /* MODEM Status Register */ +#define U1SCR UART1->scr /* Scratch Pad Register */ +#define U1DLL UART1->dll /* Divisor Latch Register (LSB) */ +#define U1DLM UART1->dlm /* Divisor Latch Register (MSB) */ + +/////////////////////////////////////////////////////////////////////////////// +// I2C Interface +#define I2C ((i2cRegs_t *)0xE001C000) + +// I2C Registers +#define I2CONSET I2C->conset /* Control Set Register */ +#define I2STAT I2C->stat /* Status Register */ +#define I2DAT I2C->dat /* Data Register */ +#define I2ADR I2C->adr /* Slave Address Register */ +#define I2SCLH I2C->sclh /* SCL Duty Cycle Register (high half word) */ +#define I2SCLL I2C->scll /* SCL Duty Cycle Register (low half word) */ +#define I2CONCLR I2C->conclr /* Control Clear Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Serial Peripheral Interface 0 (SPI0) +#define SPI0 ((spiRegs_t *)0xE0020000) + +// SPI0 Registers +#define S0SPCR SPI0->cr /* Control Register */ +#define S0SPSR SPI0->sr /* Status Register */ +#define S0SPDR SPI0->dr /* Data Register */ +#define S0SPCCR SPI0->ccr /* Clock Counter Register */ +#define S0SPINT SPI0->flag /* Interrupt Flag Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Serial Peripheral Interface 1 (SPI1) +#define SPI1 ((spiRegs_t *)0xE0030000) + +// SPI1 Registers +#define S1SPCR SPI1->cr /* Control Register */ +#define S1SPSR SPI1->sr /* Status Register */ +#define S1SPDR SPI1->dr /* Data Register */ +#define S1SPCCR SPI1->ccr /* Clock Counter Register */ +#define S1SPINT SPI1->flag /* Interrupt Flag Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Real Time Clock +#define RTC ((rtcRegs_t *)0xE0024000) + +// RTC Registers +#define RTCILR RTC->ilr /* Interrupt Location Register */ +#define RTCCTC RTC->ctc /* Clock Tick Counter */ +#define RTCCCR RTC->ccr /* Clock Control Register */ +#define RTCCIIR RTC->ciir /* Counter Increment Interrupt Register */ +#define RTCAMR RTC->amr /* Alarm Mask Register */ +#define RTCCTIME0 RTC->ctime0 /* Consolidated Time Register 0 */ +#define RTCCTIME1 RTC->ctime1 /* Consolidated Time Register 1 */ +#define RTCCTIME2 RTC->ctime2 /* Consolidated Time Register 2 */ +#define RTCSEC RTC->sec /* Seconds Register */ +#define RTCMIN RTC->min /* Minutes Register */ +#define RTCHOUR RTC->hour /* Hours Register */ +#define RTCDOM RTC->dom /* Day Of Month Register */ +#define RTCDOW RTC->dow /* Day Of Week Register */ +#define RTCDOY RTC->doy /* Day Of Year Register */ +#define RTCMONTH RTC->month /* Months Register */ +#define RTCYEAR RTC->year /* Years Register */ +#define RTCALSEC RTC->alsec /* Alarm Seconds Register */ +#define RTCALMIN RTC->almin /* Alarm Minutes Register */ +#define RTCALHOUR RTC->alhour /* Alarm Hours Register */ +#define RTCALDOM RTC->aldom /* Alarm Day Of Month Register */ +#define RTCALDOW RTC->aldow /* Alarm Day Of Week Register */ +#define RTCALDOY RTC->aldoy /* Alarm Day Of Year Register */ +#define RTCALMON RTC->almon /* Alarm Months Register */ +#define RTCALYEAR RTC->alyear /* Alarm Years Register */ +#define RTCPREINT RTC->preint /* Prescale Value Register (integer) */ +#define RTCPREFRAC RTC->prefrac /* Prescale Value Register (fraction) */ + +/////////////////////////////////////////////////////////////////////////////// +// General Purpose Input/Output +#define GPIO ((gpioRegs_t *)0xE0028000) + +// GPIO Registers +#define IO0PIN GPIO->in0 /* P0 Pin Value Register */ +#define IO0SET GPIO->set0 /* P0 Pin Output Set Register */ +#define IO0DIR GPIO->dir0 /* P0 Pin Direction Register */ +#define IO0CLR GPIO->clr0 /* P0 Pin Output Clear Register */ +#define IO1PIN GPIO->in1 /* P1 Pin Value Register */ +#define IO1SET GPIO->set1 /* P1 Pin Output Set Register */ +#define IO1DIR GPIO->dir1 /* P1 Pin Direction Register */ +#define IO1CLR GPIO->clr1 /* P1 Pin Output Clear Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Pin Connect Block +#define PINSEL ((pinRegs_t *)0xE002C000) + +// Pin Connect Block Registers +#define PINSEL0 PINSEL->sel0 /* Pin Function Select Register 0 */ +#define PINSEL1 PINSEL->sel1 /* Pin Function Select Register 1 */ +#define PINSEL2 PINSEL->sel2 /* Pin Function Select Register 2 */ + +/////////////////////////////////////////////////////////////////////////////// +// A/D Converter +#define ADC ((adcRegs_t *)0xE0034000) + +// A/D Converter Registers +#define ADCR ADC->cr /* Control Register */ +#define ADDR ADC->dr /* Data Register */ + +/////////////////////////////////////////////////////////////////////////////// +// System Contol Block +#define SCB ((scbRegs_t *)0xE01FC000) + +// Memory Accelerator Module Registers (MAM) +#define MAMCR SCB->mam.cr /* Control Register */ +#define MAMTIM SCB->mam.tim /* Timing Control Register */ + +// Memory Mapping Control Register +#define MEMMAP SCB->memmap + +// Phase Locked Loop Registers (PLL) +#define PLLCON SCB->pll.con /* Control Register */ +#define PLLCFG SCB->pll.cfg /* Configuration Register */ +#define PLLSTAT SCB->pll.stat /* Status Register */ +#define PLLFEED SCB->pll.feed /* Feed Register */ + +// Power Control Registers +#define PCON SCB->p.con /* Control Register */ +#define PCONP SCB->p.conp /* Peripherals Register */ + +// VPB Divider Register +#define VPBDIV SCB->vpbdiv + +// External Interrupt Registers +#define EXTINT SCB->ext.flag /* Flag Register */ +#define EXTWAKE SCB->ext.wake /* Wakeup Register */ +#define EXTMODE SCB->ext.mode /* Mode Register */ +#define EXTPOLAR SCB->ext.polar /* Polarity Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Vectored Interrupt Controller +#define VIC ((vicRegs_t *)0xFFFFF000) + +// Vectored Interrupt Controller Registers +#define VICIRQStatus VIC->irqStatus /* IRQ Status Register */ +#define VICFIQStatus VIC->fiqStatus /* FIQ Status Register */ +#define VICRawIntr VIC->rawIntr /* Raw Interrupt Status Register */ +#define VICIntSelect VIC->intSelect /* Interrupt Select Register */ +#define VICIntEnable VIC->intEnable /* Interrupt Enable Register */ +#define VICIntEnClear VIC->intEnClear /* Interrupt Enable Clear Register */ +#define VICSoftInt VIC->softInt /* Software Interrupt Register */ +#define VICSoftIntClear VIC->softIntClear /* Software Interrupt Clear Register */ +#define VICProtection VIC->protection /* Protection Enable Register */ +#define VICVectAddr VIC->vectAddr /* Vector Address Register */ +#define VICDefVectAddr VIC->defVectAddr /* Default Vector Address Register */ +#define VICVectAddr0 VIC->vectAddr0 /* Vector Address 0 Register */ +#define VICVectAddr1 VIC->vectAddr1 /* Vector Address 1 Register */ +#define VICVectAddr2 VIC->vectAddr2 /* Vector Address 2 Register */ +#define VICVectAddr3 VIC->vectAddr3 /* Vector Address 3 Register */ +#define VICVectAddr4 VIC->vectAddr4 /* Vector Address 4 Register */ +#define VICVectAddr5 VIC->vectAddr5 /* Vector Address 5 Register */ +#define VICVectAddr6 VIC->vectAddr6 /* Vector Address 6 Register */ +#define VICVectAddr7 VIC->vectAddr7 /* Vector Address 7 Register */ +#define VICVectAddr8 VIC->vectAddr8 /* Vector Address 8 Register */ +#define VICVectAddr9 VIC->vectAddr9 /* Vector Address 9 Register */ +#define VICVectAddr10 VIC->vectAddr10 /* Vector Address 10 Register */ +#define VICVectAddr11 VIC->vectAddr11 /* Vector Address 11 Register */ +#define VICVectAddr12 VIC->vectAddr12 /* Vector Address 12 Register */ +#define VICVectAddr13 VIC->vectAddr13 /* Vector Address 13 Register */ +#define VICVectAddr14 VIC->vectAddr14 /* Vector Address 14 Register */ +#define VICVectAddr15 VIC->vectAddr15 /* Vector Address 15 Register */ +#define VICVectCntl0 VIC->vectCntl0 /* Vector Control 0 Register */ +#define VICVectCntl1 VIC->vectCntl1 /* Vector Control 1 Register */ +#define VICVectCntl2 VIC->vectCntl2 /* Vector Control 2 Register */ +#define VICVectCntl3 VIC->vectCntl3 /* Vector Control 3 Register */ +#define VICVectCntl4 VIC->vectCntl4 /* Vector Control 4 Register */ +#define VICVectCntl5 VIC->vectCntl5 /* Vector Control 5 Register */ +#define VICVectCntl6 VIC->vectCntl6 /* Vector Control 6 Register */ +#define VICVectCntl7 VIC->vectCntl7 /* Vector Control 7 Register */ +#define VICVectCntl8 VIC->vectCntl8 /* Vector Control 8 Register */ +#define VICVectCntl9 VIC->vectCntl9 /* Vector Control 9 Register */ +#define VICVectCntl10 VIC->vectCntl10 /* Vector Control 10 Register */ +#define VICVectCntl11 VIC->vectCntl11 /* Vector Control 11 Register */ +#define VICVectCntl12 VIC->vectCntl12 /* Vector Control 12 Register */ +#define VICVectCntl13 VIC->vectCntl13 /* Vector Control 13 Register */ +#define VICVectCntl14 VIC->vectCntl14 /* Vector Control 14 Register */ +#define VICVectCntl15 VIC->vectCntl15 /* Vector Control 15 Register */ + +#endif diff --git a/embedded/arch/arm/mach-lpc21xx/defines/LPC22xx.h b/embedded/arch/arm/mach-lpc21xx/defines/LPC22xx.h new file mode 100644 index 0000000..c2d30e0 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/LPC22xx.h @@ -0,0 +1,342 @@ +/****************************************************************************** + * + * $RCSfile: LPC22xx.h,v $ + * $Revision: 1.1 $ + * + * Header file for Philips LPC22xx ARM Processors + * Copyright 2004 R O SoftWare + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + *****************************************************************************/ +#ifndef INC_LPC22xx_H +#define INC_LPC22xx_H + +#define REG_8 volatile unsigned char +#define REG16 volatile unsigned short +#define REG32 volatile unsigned long + +#include "lpcWD.h" +#include "lpcTMR.h" +#include "lpcUART.h" +#include "lpcI2C.h" +#include "lpcSPI.h" +#include "lpcRTC.h" +#include "lpcGPIO.h" +#include "lpcPIN.h" +#include "lpcADC.h" +#include "lpcSCB.h" +#include "lpcEMC.h" +#include "lpcVIC.h" + +/////////////////////////////////////////////////////////////////////////////// +// Watchdog +#define WD ((wdRegs_t *)0xE0000000) + +// Watchdog Registers +#define WDMOD WD->mod /* Watchdog Mode Register */ +#define WDTC WD->tc /* Watchdog Time Constant Register */ +#define WDFEED WD->feed /* Watchdog Feed Register */ +#define WDTV WD->tv /* Watchdog Time Value Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Timer 0 +#define TMR0 ((pwmTmrRegs_t *)0xE0004000) + +// Timer 0 Registers +#define T0IR TMR0->ir /* Interrupt Register */ +#define T0TCR TMR0->tcr /* Timer Control Register */ +#define T0TC TMR0->tc /* Timer Counter */ +#define T0PR TMR0->pr /* Prescale Register */ +#define T0PC TMR0->pc /* Prescale Counter Register */ +#define T0MCR TMR0->mcr /* Match Control Register */ +#define T0MR0 TMR0->mr0 /* Match Register 0 */ +#define T0MR1 TMR0->mr1 /* Match Register 1 */ +#define T0MR2 TMR0->mr2 /* Match Register 2 */ +#define T0MR3 TMR0->mr3 /* Match Register 3 */ +#define T0CCR TMR0->ccr /* Capture Control Register */ +#define T0CR0 TMR0->cr0 /* Capture Register 0 */ +#define T0CR1 TMR0->cr1 /* Capture Register 1 */ +#define T0CR2 TMR0->cr2 /* Capture Register 2 */ +#define T0CR3 TMR0->cr3 /* Capture Register 3 */ +#define T0EMR TMR0->emr /* External Match Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Timer 1 +#define TMR1 ((pwmTmrRegs_t *)0xE0008000) + +// Timer 1 Registers +#define T1IR TMR1->ir /* Interrupt Register */ +#define T1TCR TMR1->tcr /* Timer Control Register */ +#define T1TC TMR1->tc /* Timer Counter */ +#define T1PR TMR1->pr /* Prescale Register */ +#define T1PC TMR1->pc /* Prescale Counter Register */ +#define T1MCR TMR1->mcr /* Match Control Register */ +#define T1MR0 TMR1->mr0 /* Match Register 0 */ +#define T1MR1 TMR1->mr1 /* Match Register 1 */ +#define T1MR2 TMR1->mr2 /* Match Register 2 */ +#define T1MR3 TMR1->mr3 /* Match Register 3 */ +#define T1CCR TMR1->ccr /* Capture Control Register */ +#define T1CR0 TMR1->cr0 /* Capture Register 0 */ +#define T1CR1 TMR1->cr1 /* Capture Register 1 */ +#define T1CR2 TMR1->cr2 /* Capture Register 2 */ +#define T1CR3 TMR1->cr3 /* Capture Register 3 */ +#define T1EMR TMR1->emr /* External Match Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Pulse Width Modulator (PWM) +#define PWM ((pwmTmrRegs_t *)0xE0014000) + +// PWM Registers +#define PWMIR PWM->ir /* Interrupt Register */ +#define PWMTCR PWM->tcr /* Timer Control Register */ +#define PWMTC PWM->tc /* Timer Counter */ +#define PWMPR PWM->pr /* Prescale Register */ +#define PWMPC PWM->pc /* Prescale Counter Register */ +#define PWMMCR PWM->mcr /* Match Control Register */ +#define PWMMR0 PWM->mr0 /* Match Register 0 */ +#define PWMMR1 PWM->mr1 /* Match Register 1 */ +#define PWMMR2 PWM->mr2 /* Match Register 2 */ +#define PWMMR3 PWM->mr3 /* Match Register 3 */ +#define PWMMR4 PWM->mr4 /* Match Register 4 */ +#define PWMMR5 PWM->mr5 /* Match Register 5 */ +#define PWMMR6 PWM->mr6 /* Match Register 6 */ +#define PWMPCR PWM->pcr /* Control Register */ +#define PWMLER PWM->ler /* Latch Enable Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Universal Asynchronous Receiver Transmitter 0 (UART0) +#define UART0 ((uartRegs_t *)0xE000C000) +#define U0_PINSEL (0x00000005) /* PINSEL0 Value for UART0 */ +#define U0_PINMASK (0x0000000F) /* PINSEL0 Mask for UART0 */ + +// UART0 Registers +#define U0RBR UART0->rbr /* Receive Buffer Register */ +#define U0THR UART0->thr /* Transmit Holding Register */ +#define U0IER UART0->ier /* Interrupt Enable Register */ +#define U0IIR UART0->iir /* Interrupt ID Register */ +#define U0FCR UART0->fcr /* FIFO Control Register */ +#define U0LCR UART0->lcr /* Line Control Register */ +#define U0LSR UART0->lsr /* Line Status Register */ +#define U0SCR UART0->scr /* Scratch Pad Register */ +#define U0DLL UART0->dll /* Divisor Latch Register (LSB) */ +#define U0DLM UART0->dlm /* Divisor Latch Register (MSB) */ + +/////////////////////////////////////////////////////////////////////////////// +// Universal Asynchronous Receiver Transmitter 1 (UART1) +#define UART1 ((uartRegs_t *)0xE0010000) +#define U1_PINSEL (0x00050000) /* PINSEL0 Value for UART1 */ +#define U1_PINMASK (0x000F0000) /* PINSEL0 Mask for UART1 */ + +// UART1 Registers +#define U1RBR UART1->rbr /* Receive Buffer Register */ +#define U1THR UART1->thr /* Transmit Holding Register */ +#define U1IER UART1->ier /* Interrupt Enable Register */ +#define U1IIR UART1->iir /* Interrupt ID Register */ +#define U1FCR UART1->fcr /* FIFO Control Register */ +#define U1LCR UART1->lcr /* Line Control Register */ +#define U1MCR UART1->mcr /* MODEM Control Register */ +#define U1LSR UART1->lsr /* Line Status Register */ +#define U1MSR UART1->msr /* MODEM Status Register */ +#define U1SCR UART1->scr /* Scratch Pad Register */ +#define U1DLL UART1->dll /* Divisor Latch Register (LSB) */ +#define U1DLM UART1->dlm /* Divisor Latch Register (MSB) */ + +/////////////////////////////////////////////////////////////////////////////// +// I2C Interface +#define I2C ((i2cRegs_t *)0xE001C000) + +// I2C Registers +#define I2CONSET I2C->conset /* Control Set Register */ +#define I2STAT I2C->stat /* Status Register */ +#define I2DAT I2C->dat /* Data Register */ +#define I2ADR I2C->adr /* Slave Address Register */ +#define I2SCLH I2C->sclh /* SCL Duty Cycle Register (high half word) */ +#define I2SCLL I2C->scll /* SCL Duty Cycle Register (low half word) */ +#define I2CONCLR I2C->conclr /* Control Clear Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Serial Peripheral Interface 0 (SPI0) +#define SPI0 ((spiRegs_t *)0xE0020000) + +// SPI0 Registers +#define S0SPCR SPI0->cr /* Control Register */ +#define S0SPSR SPI0->sr /* Status Register */ +#define S0SPDR SPI0->dr /* Data Register */ +#define S0SPCCR SPI0->ccr /* Clock Counter Register */ +#define S0SPINT SPI0->flag /* Interrupt Flag Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Serial Peripheral Interface 1 (SPI1) +#define SPI1 ((spiRegs_t *)0xE0030000) + +// SPI1 Registers +#define S1SPCR SPI1->cr /* Control Register */ +#define S1SPSR SPI1->sr /* Status Register */ +#define S1SPDR SPI1->dr /* Data Register */ +#define S1SPCCR SPI1->ccr /* Clock Counter Register */ +#define S1SPINT SPI1->flag /* Interrupt Flag Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Real Time Clock +#define RTC ((rtcRegs_t *)0xE0024000) + +// RTC Registers +#define RTCILR RTC->ilr /* Interrupt Location Register */ +#define RTCCTC RTC->ctc /* Clock Tick Counter */ +#define RTCCCR RTC->ccr /* Clock Control Register */ +#define RTCCIIR RTC->ciir /* Counter Increment Interrupt Register */ +#define RTCAMR RTC->amr /* Alarm Mask Register */ +#define RTCCTIME0 RTC->ctime0 /* Consolidated Time Register 0 */ +#define RTCCTIME1 RTC->ctime1 /* Consolidated Time Register 1 */ +#define RTCCTIME2 RTC->ctime2 /* Consolidated Time Register 2 */ +#define RTCSEC RTC->sec /* Seconds Register */ +#define RTCMIN RTC->min /* Minutes Register */ +#define RTCHOUR RTC->hour /* Hours Register */ +#define RTCDOM RTC->dom /* Day Of Month Register */ +#define RTCDOW RTC->dow /* Day Of Week Register */ +#define RTCDOY RTC->doy /* Day Of Year Register */ +#define RTCMONTH RTC->month /* Months Register */ +#define RTCYEAR RTC->year /* Years Register */ +#define RTCALSEC RTC->alsec /* Alarm Seconds Register */ +#define RTCALMIN RTC->almin /* Alarm Minutes Register */ +#define RTCALHOUR RTC->alhour /* Alarm Hours Register */ +#define RTCALDOM RTC->aldom /* Alarm Day Of Month Register */ +#define RTCALDOW RTC->aldow /* Alarm Day Of Week Register */ +#define RTCALDOY RTC->aldoy /* Alarm Day Of Year Register */ +#define RTCALMON RTC->almon /* Alarm Months Register */ +#define RTCALYEAR RTC->alyear /* Alarm Years Register */ +#define RTCPREINT RTC->preint /* Prescale Value Register (integer) */ +#define RTCPREFRAC RTC->prefrac /* Prescale Value Register (fraction) */ + +/////////////////////////////////////////////////////////////////////////////// +// General Purpose Input/Output +#define GPIO ((gpioRegs_t *)0xE0028000) + +// GPIO Registers +#define IO0PIN GPIO->in0 /* P0 Pin Value Register */ +#define IO0SET GPIO->set0 /* P0 Pin Output Set Register */ +#define IO0DIR GPIO->dir0 /* P0 Pin Direction Register */ +#define IO0CLR GPIO->clr0 /* P0 Pin Output Clear Register */ +#define IO1PIN GPIO->in1 /* P1 Pin Value Register */ +#define IO1SET GPIO->set1 /* P1 Pin Output Set Register */ +#define IO1DIR GPIO->dir1 /* P1 Pin Direction Register */ +#define IO1CLR GPIO->clr1 /* P1 Pin Output Clear Register */ +#define IO2PIN GPIO->in2 /* P2 Pin Value Register */ +#define IO2SET GPIO->set2 /* P2 Pin Output Set Register */ +#define IO2DIR GPIO->dir2 /* P2 Pin Direction Register */ +#define IO2CLR GPIO->clr2 /* P2 Pin Output Clear Register */ +#define IO3PIN GPIO->in3 /* P3 Pin Value Register */ +#define IO3SET GPIO->set3 /* P3 Pin Output Set Register */ +#define IO3DIR GPIO->dir3 /* P3 Pin Direction Register */ +#define IO3CLR GPIO->clr3 /* P3 Pin Output Clear Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Pin Connect Block +#define PINSEL ((pinRegs_t *)0xE002C000) + +// Pin Connect Block Registers +#define PINSEL0 PINSEL->sel0 /* Pin Function Select Register 0 */ +#define PINSEL1 PINSEL->sel1 /* Pin Function Select Register 1 */ +#define PINSEL2 PINSEL->sel2 /* Pin Function Select Register 2 */ + +/////////////////////////////////////////////////////////////////////////////// +// A/D Converter +#define ADC ((adcRegs_t *)0xE0034000) + +// A/D Converter Registers +#define ADCR ADC->cr /* Control Register */ +#define ADDR ADC->dr /* Data Register */ + +/////////////////////////////////////////////////////////////////////////////// +// System Contol Block +#define SCB ((scbRegs_t *)0xE01FC000) + +// Memory Accelerator Module Registers (MAM) +#define MAMCR SCB->mam.cr /* Control Register */ +#define MAMTIM SCB->mam.tim /* Timing Control Register */ + +// Memory Mapping Control Register +#define MEMMAP SCB->memmap + +// Phase Locked Loop Registers (PLL) +#define PLLCON SCB->pll.con /* Control Register */ +#define PLLCFG SCB->pll.cfg /* Configuration Register */ +#define PLLSTAT SCB->pll.stat /* Status Register */ +#define PLLFEED SCB->pll.feed /* Feed Register */ + +// Power Control Registers +#define PCON SCB->p.con /* Control Register */ +#define PCONP SCB->p.conp /* Peripherals Register */ + +// VPB Divider Register +#define VPBDIV SCB->vpbdiv + +// External Interrupt Registers +#define EXTINT SCB->ext.flag /* Flag Register */ +#define EXTWAKE SCB->ext.wake /* Wakeup Register */ +#define EXTMODE SCB->ext.mode /* Mode Register */ +#define EXTPOLAR SCB->ext.polar /* Polarity Register */ + +/////////////////////////////////////////////////////////////////////////////// +// External Memory Controller (EMC) +#define EMC ((volatile emcRegs_t *)0xFFE00000) + +// External Memory Controller Registers +#define BCFG0 EMC->bcfg0 /* Bank 0 Configuration Register */ +#define BCFG1 EMC->bcfg1 /* Bank 1 Configuration Register */ +#define BCFG2 EMC->bcfg2 /* Bank 2 Configuration Register */ +#define BCFG3 EMC->bcfg3 /* Bank 3 Configuration Register */ + +/////////////////////////////////////////////////////////////////////////////// +// Vectored Interrupt Controller +#define VIC ((vicRegs_t *)0xFFFFF000) + +// Vectored Interrupt Controller Registers +#define VICIRQStatus VIC->irqStatus /* IRQ Status Register */ +#define VICFIQStatus VIC->fiqStatus /* FIQ Status Register */ +#define VICRawIntr VIC->rawIntr /* Raw Interrupt Status Register */ +#define VICIntSelect VIC->intSelect /* Interrupt Select Register */ +#define VICIntEnable VIC->intEnable /* Interrupt Enable Register */ +#define VICIntEnClear VIC->intEnClear /* Interrupt Enable Clear Register */ +#define VICSoftInt VIC->softInt /* Software Interrupt Register */ +#define VICSoftIntClear VIC->softIntClear /* Software Interrupt Clear Register */ +#define VICProtection VIC->protection /* Protection Enable Register */ +#define VICVectAddr VIC->vectAddr /* Vector Address Register */ +#define VICDefVectAddr VIC->defVectAddr /* Default Vector Address Register */ +#define VICVectAddr0 VIC->vectAddr0 /* Vector Address 0 Register */ +#define VICVectAddr1 VIC->vectAddr1 /* Vector Address 1 Register */ +#define VICVectAddr2 VIC->vectAddr2 /* Vector Address 2 Register */ +#define VICVectAddr3 VIC->vectAddr3 /* Vector Address 3 Register */ +#define VICVectAddr4 VIC->vectAddr4 /* Vector Address 4 Register */ +#define VICVectAddr5 VIC->vectAddr5 /* Vector Address 5 Register */ +#define VICVectAddr6 VIC->vectAddr6 /* Vector Address 6 Register */ +#define VICVectAddr7 VIC->vectAddr7 /* Vector Address 7 Register */ +#define VICVectAddr8 VIC->vectAddr8 /* Vector Address 8 Register */ +#define VICVectAddr9 VIC->vectAddr9 /* Vector Address 9 Register */ +#define VICVectAddr10 VIC->vectAddr10 /* Vector Address 10 Register */ +#define VICVectAddr11 VIC->vectAddr11 /* Vector Address 11 Register */ +#define VICVectAddr12 VIC->vectAddr12 /* Vector Address 12 Register */ +#define VICVectAddr13 VIC->vectAddr13 /* Vector Address 13 Register */ +#define VICVectAddr14 VIC->vectAddr14 /* Vector Address 14 Register */ +#define VICVectAddr15 VIC->vectAddr15 /* Vector Address 15 Register */ +#define VICVectCntl0 VIC->vectCntl0 /* Vector Control 0 Register */ +#define VICVectCntl1 VIC->vectCntl1 /* Vector Control 1 Register */ +#define VICVectCntl2 VIC->vectCntl2 /* Vector Control 2 Register */ +#define VICVectCntl3 VIC->vectCntl3 /* Vector Control 3 Register */ +#define VICVectCntl4 VIC->vectCntl4 /* Vector Control 4 Register */ +#define VICVectCntl5 VIC->vectCntl5 /* Vector Control 5 Register */ +#define VICVectCntl6 VIC->vectCntl6 /* Vector Control 6 Register */ +#define VICVectCntl7 VIC->vectCntl7 /* Vector Control 7 Register */ +#define VICVectCntl8 VIC->vectCntl8 /* Vector Control 8 Register */ +#define VICVectCntl9 VIC->vectCntl9 /* Vector Control 9 Register */ +#define VICVectCntl10 VIC->vectCntl10 /* Vector Control 10 Register */ +#define VICVectCntl11 VIC->vectCntl11 /* Vector Control 11 Register */ +#define VICVectCntl12 VIC->vectCntl12 /* Vector Control 12 Register */ +#define VICVectCntl13 VIC->vectCntl13 /* Vector Control 13 Register */ +#define VICVectCntl14 VIC->vectCntl14 /* Vector Control 14 Register */ +#define VICVectCntl15 VIC->vectCntl15 /* Vector Control 15 Register */ + +#endif diff --git a/embedded/arch/arm/mach-lpc21xx/defines/Makefile b/embedded/arch/arm/mach-lpc21xx/defines/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/arch/arm/mach-lpc21xx/defines/Makefile.omk b/embedded/arch/arm/mach-lpc21xx/defines/Makefile.omk new file mode 100644 index 0000000..176b8a6 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/Makefile.omk @@ -0,0 +1,2 @@ +# -*- makefile -*- +include_HEADERS = $(notdir $(wildcard $(SOURCES_DIR)/*.h)) diff --git a/embedded/arch/arm/mach-lpc21xx/defines/armVIC.h b/embedded/arch/arm/mach-lpc21xx/defines/armVIC.h new file mode 100644 index 0000000..560a6b4 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/armVIC.h @@ -0,0 +1,157 @@ +/****************************************************************************** + * + * $RCSfile: armVIC.h,v $ + * $Revision: 1.1 $ + * + * This module provides the interface definitions for setting up and + * controlling the various interrupt modes present on the ARM processor. + * Copyright 2004, R O SoftWare + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + *****************************************************************************/ +#ifndef INC_ARM_VIC_H +#define INC_ARM_VIC_H + +/****************************************************************************** + * + * MACRO Name: ISR_ENTRY() + * + * Description: + * This MACRO is used upon entry to an ISR. The current version of + * the gcc compiler for ARM does not produce correct code for + * interrupt routines to operate properly with THUMB code. The MACRO + * performs the following steps: + * + * 1 - Adjust address at which execution should resume after servicing + * ISR to compensate for IRQ entry + * 2 - Save the non-banked registers r0-r12 and lr onto the IRQ stack. + * 3 - Get the status of the interrupted program is in SPSR. + * 4 - Push it onto the IRQ stack as well. + * + *****************************************************************************/ +#define ISR_ENTRY() asm volatile(" sub lr, lr,#4\n" \ + " stmfd sp!,{r0-r12,lr}\n" \ + " mrs r1, spsr\n" \ + " stmfd sp!,{r1}") + +/****************************************************************************** + * + * MACRO Name: ISR_EXIT() + * + * Description: + * This MACRO is used to exit an ISR. The current version of the gcc + * compiler for ARM does not produce correct code for interrupt + * routines to operate properly with THUMB code. The MACRO performs + * the following steps: + * + * 1 - Recover SPSR value from stack + * 2 - and restore its value + * 3 - Pop the return address & the saved general registers from + * the IRQ stack & return + * + *****************************************************************************/ +#define ISR_EXIT() asm volatile(" ldmfd sp!,{r1}\n" \ + " msr spsr_c,r1\n" \ + " ldmfd sp!,{r0-r12,pc}^") + +/****************************************************************************** + * + * Function Name: disableIRQ() + * + * Description: + * This function sets the IRQ disable bit in the status register + * + * Calling Sequence: + * void + * + * Returns: + * previous value of CPSR + * + *****************************************************************************/ +unsigned disableIRQ(void); + +/****************************************************************************** + * + * Function Name: enableIRQ() + * + * Description: + * This function clears the IRQ disable bit in the status register + * + * Calling Sequence: + * void + * + * Returns: + * previous value of CPSR + * + *****************************************************************************/ +unsigned enableIRQ(void); + +/****************************************************************************** + * + * Function Name: restoreIRQ() + * + * Description: + * This function restores the IRQ disable bit in the status register + * to the value contained within passed oldCPSR + * + * Calling Sequence: + * void + * + * Returns: + * previous value of CPSR + * + *****************************************************************************/ +unsigned restoreIRQ(unsigned oldCPSR); + +/****************************************************************************** + * + * Function Name: disableFIQ() + * + * Description: + * This function sets the FIQ disable bit in the status register + * + * Calling Sequence: + * void + * + * Returns: + * previous value of CPSR + * + *****************************************************************************/ +unsigned disableFIQ(void); + +/****************************************************************************** + * + * Function Name: enableFIQ() + * + * Description: + * This function clears the FIQ disable bit in the status register + * + * Calling Sequence: + * void + * + * Returns: + * previous value of CPSR + * + *****************************************************************************/ +unsigned enableFIQ(void); + +/****************************************************************************** + * + * Function Name: restoreIRQ() + * + * Description: + * This function restores the FIQ disable bit in the status register + * to the value contained within passed oldCPSR + * + * Calling Sequence: + * void + * + * Returns: + * previous value of CPSR + * + *****************************************************************************/ +unsigned restoreFIQ(unsigned oldCPSR); + +#endif diff --git a/embedded/arch/arm/mach-lpc21xx/defines/lpcADC-214x.h b/embedded/arch/arm/mach-lpc21xx/defines/lpcADC-214x.h new file mode 100644 index 0000000..7e66dae --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/lpcADC-214x.h @@ -0,0 +1,74 @@ +#ifndef INC_LPC_ADC_214x_H +#define INC_LPC_ADC_214x_H + +// A/D Converter Registers +typedef struct +{ + REG32 cr; // Control Register + REG32 gdr; // Global Data Register + REG32 gsr; // Global Start Register + REG32 inten; // Interrupt Enable Register + REG32 dr0; // Channel 0 Data Register + REG32 dr1; // Channel 1 Data Register + REG32 dr2; // Channel 2 Data Register + REG32 dr3; // Channel 3 Data Register + REG32 dr4; // Channel 4 Data Register + REG32 dr5; // Channel 5 Data Register + REG32 dr6; // Channel 6 Data Register + REG32 dr7; // Channel 7 Data Register + REG32 stat; // Status Register +} adc214xRegs_t; + +#define ADCR_SEL 0x000000FF +#define ADCR_CLKDIV 0x0000FF00 +#define ADCR_BURST 0x00010000 +#define ADCR_CLKS 0x000E0000 +#define ADCR_PDN 0x00200000 +#define ADCR_START 0x07000000 +#define ADCR_EDGE 0x08000000 + +#define ADGDR_RESULT 0x0000FFC0 +#define ADGDR_CHN 0x07000000 +#define ADGDR_OVERRUN 0x40000000 +#define ADGDR_DONE 0x80000000 + +#define ADGSR_BURST 0x00010000 +#define ADGSR_START 0x07000000 +#define ADGSR_EDGE 0x08000000 + +#define ADSTAT_DONE 0x000000FF +#define ADSTAT_DONE0 0x00000001 +#define ADSTAT_DONE1 0x00000002 +#define ADSTAT_DONE2 0x00000004 +#define ADSTAT_DONE3 0x00000008 +#define ADSTAT_DONE4 0x00000010 +#define ADSTAT_DONE5 0x00000020 +#define ADSTAT_DONE6 0x00000040 +#define ADSTAT_DONE7 0x00000080 +#define ADSTAT_OVERRUN 0x0000FF00 +#define ADSTAT_OVERRUN0 0x00000100 +#define ADSTAT_OVERRUN1 0x00000200 +#define ADSTAT_OVERRUN2 0x00000400 +#define ADSTAT_OVERRUN3 0x00000800 +#define ADSTAT_OVERRUN4 0x00001000 +#define ADSTAT_OVERRUN5 0x00002000 +#define ADSTAT_OVERRUN6 0x00004000 +#define ADSTAT_OVERRUN7 0x00008000 +#define ADSTAT_ADINT 0x00010000 + +#define ADINTEN_INTEN 0x000000FF +#define ADINTEN_INTEN0 0x00000001 +#define ADINTEN_INTEN1 0x00000002 +#define ADINTEN_INTEN2 0x00000004 +#define ADINTEN_INTEN3 0x00000008 +#define ADINTEN_INTEN4 0x00000010 +#define ADINTEN_INTEN5 0x00000020 +#define ADINTEN_INTEN6 0x00000040 +#define ADINTEN_INTEN7 0x00000080 +#define ADINTEN_GINTEN 0x00000100 + +#define ADDR_RESULT 0x0000FFC0 +#define ADDR_OVERRUN 0x40000000 +#define ADDR_DONE 0x80000000 + +#endif diff --git a/embedded/arch/arm/mach-lpc21xx/defines/lpcADC.h b/embedded/arch/arm/mach-lpc21xx/defines/lpcADC.h new file mode 100644 index 0000000..11bc2a3 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/lpcADC.h @@ -0,0 +1,24 @@ +/****************************************************************************** + * + * $RCSfile: lpcADC.h,v $ + * $Revision: 1.1 $ + * + * Header file for Philips LPC ARM Processors. + * Copyright 2004 R O SoftWare + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + *****************************************************************************/ +#ifndef INC_LPC_ADC_H +#define INC_LPC_ADC_H + +// A/D Converter Registers +typedef struct +{ + REG32 cr; // Control Register + REG32 dr; // Data Register +} adcRegs_t; + +#endif diff --git a/embedded/arch/arm/mach-lpc21xx/defines/lpcEMC.h b/embedded/arch/arm/mach-lpc21xx/defines/lpcEMC.h new file mode 100644 index 0000000..2349617 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/lpcEMC.h @@ -0,0 +1,26 @@ +/****************************************************************************** + * + * $RCSfile: lpcEMC.h,v $ + * $Revision: 1.1 $ + * + * Header file for Philips LPC ARM Processors. + * Copyright 2004 R O SoftWare + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + *****************************************************************************/ +#ifndef INC_LPC_EMC_H +#define INC_LPC_EMC_H + +// External Memory Controller Registers +typedef struct +{ + REG32 bcfg0; // Bank 0 Configuration Register + REG32 bcfg1; // Bank 1 Configuration Register + REG32 bcfg2; // Bank 2 Configuration Register + REG32 bcfg3; // Bank 3 Configuration Register +} emcRegs_t; + +#endif diff --git a/embedded/arch/arm/mach-lpc21xx/defines/lpcGPIO.h b/embedded/arch/arm/mach-lpc21xx/defines/lpcGPIO.h new file mode 100644 index 0000000..f4c78c9 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/lpcGPIO.h @@ -0,0 +1,38 @@ +/****************************************************************************** + * + * $RCSfile: lpcGPIO.h,v $ + * $Revision: 1.1 $ + * + * Header file for Philips LPC ARM Processors. + * Copyright 2004 R O SoftWare + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + *****************************************************************************/ +#ifndef INC_LPC_GPIO_H +#define INC_LPC_GPIO_H + +// General Purpose Input/Output Registers (GPIO) +typedef struct +{ + REG32 in0; // P0 Pin Value Register + REG32 set0; // P0 Pin Output Set Register + REG32 dir0; // P0 Pin Direction Register + REG32 clr0; // P0 Pin Output Clear Register + REG32 in1; // P1 Pin Value Register + REG32 set1; // P1 Pin Output Set Register + REG32 dir1; // P1 Pin Direction Register + REG32 clr1; // P1 Pin Output Clear Register + REG32 in2; // P2 Pin Value Register + REG32 set2; // P2 Pin Output Set Register + REG32 dir2; // P2 Pin Direction Register + REG32 clr2; // P2 Pin Output Clear Register + REG32 in3; // P3 Pin Value Register + REG32 set3; // P3 Pin Output Set Register + REG32 dir3; // P3 Pin Direction Register + REG32 clr3; // P3 Pin Output Clear Register +} gpioRegs_t; + +#endif diff --git a/embedded/arch/arm/mach-lpc21xx/defines/lpcI2C.h b/embedded/arch/arm/mach-lpc21xx/defines/lpcI2C.h new file mode 100644 index 0000000..e874abc --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/lpcI2C.h @@ -0,0 +1,36 @@ +/****************************************************************************** + * + * $RCSfile: lpcI2C.h,v $ + * $Revision: 1.1 $ + * + * Header file for Philips LPC ARM Processors. + * Copyright 2004 R O SoftWare + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + *****************************************************************************/ +#ifndef INC_LPC_I2C_H +#define INC_LPC_I2C_H + +// I2C Interface Registers +typedef struct +{ + REG_8 conset; // Control Set Register + REG_8 _pad0[3]; + REG_8 stat; // Status Register + REG_8 _pad1[3]; + REG_8 dat; // Data Register + REG_8 _pad2[3]; + REG_8 adr; // Slave Address Register + REG_8 _pad3[3]; + REG16 sclh; // SCL Duty Cycle Register (high half word) + REG16 _pad4; + REG16 scll; // SCL Duty Cycle Register (low half word) + REG16 _pad5; + REG_8 conclr; // Control Clear Register + REG_8 _pad6[3]; +} i2cRegs_t; + +#endif diff --git a/embedded/arch/arm/mach-lpc21xx/defines/lpcPIN.h b/embedded/arch/arm/mach-lpc21xx/defines/lpcPIN.h new file mode 100644 index 0000000..df52b37 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/lpcPIN.h @@ -0,0 +1,26 @@ +/****************************************************************************** + * + * $RCSfile: lpcPIN.h,v $ + * $Revision: 1.1 $ + * + * Header file for Philips LPC ARM Processors. + * Copyright 2004 R O SoftWare + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + *****************************************************************************/ +#ifndef INC_LPC_PIN_H +#define INC_LPC_PIN_H + +// Pin Connect Block Registers +typedef struct +{ + REG32 sel0; // Pin Function Select Register 0 + REG32 sel1; // Pin Function Select Register 1 + REG32 _pad[3]; + REG32 sel2; // Pin Function Select Register 2 +} pinRegs_t; + +#endif diff --git a/embedded/arch/arm/mach-lpc21xx/defines/lpcRTC.h b/embedded/arch/arm/mach-lpc21xx/defines/lpcRTC.h new file mode 100644 index 0000000..f9d9c0b --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/lpcRTC.h @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * $RCSfile: lpcRTC.h,v $ + * $Revision: 1.1 $ + * + * Header file for Philips LPC ARM Processors. + * Copyright 2004 R O SoftWare + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + *****************************************************************************/ +#ifndef INC_LPC_RTC_H +#define INC_LPC_RTC_H + +typedef struct +{ + REG_8 ilr; // Interrupt Location Register + REG_8 _pad0[3]; + REG16 ctc; // Clock Tick Counter + REG16 _pad1; + REG_8 ccr; // Clock Control Register + REG_8 _pad2[3]; + REG_8 ciir; // Counter Increment Interrupt Register + REG_8 _pad3[3]; + REG_8 amr; // Alarm Mask Register + REG_8 _pad4[3]; + REG32 ctime0; // Consolidated Time Register 0 + REG32 ctime1; // Consolidated Time Register 1 + REG32 ctime2; // Consolidated Time Register 2 + REG_8 sec; // Seconds Register + REG_8 _pad5[3]; + REG_8 min; // Minutes Register + REG_8 _pad6[3]; + REG_8 hour; // Hours Register + REG_8 _pad7[3]; + REG_8 dom; // Day Of Month Register + REG_8 _pad8[3]; + REG_8 dow; // Day Of Week Register + REG_8 _pad9[3]; + REG16 doy; // Day Of Year Register + REG16 _pad10; + REG_8 month; // Months Register + REG_8 _pad11[3]; + REG16 year; // Years Register + REG32 _pad12[8]; + REG_8 alsec; // Alarm Seconds Register + REG_8 _pad13[3]; + REG_8 almin; // Alarm Minutes Register + REG_8 _pad14[3]; + REG_8 alhour; // Alarm Hours Register + REG_8 _pad15[3]; + REG_8 aldom; // Alarm Day Of Month Register + REG_8 _pad16[3]; + REG_8 aldow; // Alarm Day Of Week Register + REG_8 _pad17[3]; + REG16 aldoy; // Alarm Day Of Year Register + REG16 _pad18; + REG_8 almon; // Alarm Months Register + REG_8 _pad19[3]; + REG16 alyear; // Alarm Years Register + REG16 _pad20; + REG16 preint; // Prescale Value Register (integer) + REG16 _pad21; + REG16 prefrac; // Prescale Value Register (fraction) + REG16 _pad22; +} rtcRegs_t; + +#endif diff --git a/embedded/arch/arm/mach-lpc21xx/defines/lpcSCB.h b/embedded/arch/arm/mach-lpc21xx/defines/lpcSCB.h new file mode 100644 index 0000000..5612a94 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/lpcSCB.h @@ -0,0 +1,129 @@ +/****************************************************************************** + * + * $RCSfile: lpcSCB.h,v $ + * $Revision: 1.2 $ + * + * Header file for Philips LPC ARM Processors. + * Copyright 2004 R O SoftWare + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + *****************************************************************************/ +#ifndef INC_LPC_SCB_H +#define INC_LPC_SCB_H + +// System Control Block Registers +typedef struct +{ + // Memory Accelerator Module Registers (MAM) + struct + { + REG_8 cr; // Control Register + REG_8 _pad0[3]; + REG_8 tim; // Timing Control Register + REG32 _pad1[14]; + } mam; + + // Memory Mapping Control Register + REG_8 memmap; + REG32 _pad0[15]; + + // Phase Locked Loop Registers (PLL) + struct + { + REG_8 con; // Control Register + REG_8 _pad0[3]; + REG_8 cfg; // Configuration Register + REG_8 _pad1[3]; + REG16 stat; // Status Register + REG16 _pad2; + REG_8 feed; // Feed Register + REG_8 _pad3[3]; + REG32 _pad4[4]; + } pll; + + struct + { + REG_8 con; // Control Register + REG_8 _pad0[3]; + REG_8 cfg; // Configuration Register + REG_8 _pad1[3]; + REG16 stat; // Status Register + REG16 _pad2; + REG_8 feed; // Feed Register + REG_8 _pad3[3]; + REG32 _pad4[4]; + } pll48; + + // Power Control Registers + struct + { + REG_8 con; // Control Register + REG_8 _pad0[3]; + REG32 conp; // Peripherals Register + REG32 _pad1[14]; + } p; + + // VPB Divider Register + REG_8 vpbdiv; + REG32 _pad1[15]; + + // External Interrupt Registers + struct + { + REG_8 flag; // Flag Register + REG_8 _pad0[3]; + REG_8 wake; // Wakeup Register + REG_8 _pad1[3]; + REG_8 mode; // Mode Register + REG_8 _pad2[3]; + REG_8 polar; // Polarity Register + REG32 _pad3[12]; + } ext; +} scbRegs_t; + + +/////////////////////////////////////////////////////////////////////////////// +// MAM defines +#define MAMCR_OFF 0 +#define MAMCR_PART 1 +#define MAMCR_FULL 2 + +#define MAMTIM_CYCLES (((CCLK) + 19999999) / 20000000) + +/////////////////////////////////////////////////////////////////////////////// +// MEMMAP defines +#define MEMMAP_BBLK 0 // Interrupt Vectors in Boot Block +#define MEMMAP_FLASH 1 // Interrupt Vectors in Flash +#define MEMMAP_SRAM 2 // Interrupt Vectors in SRAM + +/////////////////////////////////////////////////////////////////////////////// +// PLL defines & computations +// Compute the value of PLL_DIV and test range validity +// FOSC & PLL_MUL should be defined in project configuration file (config.h) +#ifndef CCLK +#define CCLK (FOSC * PLL_MUL) // CPU Clock Freq. +#endif + +#define FCCO_MAX (320000000) // Max CC Osc Freq. +#define PLL_DIV (FCCO_MAX / (2 * CCLK)) // PLL Divider +#define FCCO (FOSC * PLL_MUL * 2 * PLL_DIV) // CC Osc. Freq. + +// PLLCON Register Bit Definitions +#define PLLCON_PLLE (1 << 0) // PLL Enable +#define PLLCON_PLLC (1 << 1) // PLL Connect + +// PLLCFG Register Bit Definitions +#define PLLCFG_MSEL ((PLL_MUL - 1) << 0) // PLL Multiplier +#define PLLCFG_PSEL ((PLL_DIV - 1) << 5) // PLL Divider + +// PLLSTAT Register Bit Definitions +#define PLLSTAT_LOCK (1 << 10) // PLL Lock Status Bit + +/////////////////////////////////////////////////////////////////////////////// +// VPBDIV defines & computations +#define VPBDIV_VALUE (PBSD & 0x03) // VPBDIV value + +#endif diff --git a/embedded/arch/arm/mach-lpc21xx/defines/lpcSPI.h b/embedded/arch/arm/mach-lpc21xx/defines/lpcSPI.h new file mode 100644 index 0000000..9e6bd2b --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/lpcSPI.h @@ -0,0 +1,72 @@ +/****************************************************************************** + * + * $RCSfile: lpcSPI.h,v $ + * $Revision: 1.2 $ + * + * Header file for Philips LPC ARM Processors. + * Copyright 2004 R O SoftWare + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + *****************************************************************************/ +#ifndef INC_LPC_SPI_H +#define INC_LPC_SPI_H + +// Serial Peripheral Interface Registers (SPI) +typedef struct +{ + REG_8 cr; // Control Register + REG_8 _pad0[3]; + REG_8 sr; // Status Register + REG_8 _pad1[3]; + REG_8 dr; // Data Register + REG_8 _pad2[3]; + REG_8 ccr; // Clock Counter Register + REG_8 _pad3[3]; + REG_8 tcr; // Test Control Register + REG_8 _pad4[3]; + REG_8 tsr; // Test Status Register + REG_8 _pad5[3]; + REG_8 tor; // Test Observe Register + REG_8 _pad6[3]; + REG_8 flag; // Interrupt Flag Register + REG_8 _pad7[3]; +} spiRegs_t; + + +// SPI Control Register +#define SPCR_BE (1 << 2) // BitEnable : If set the SPI controller + // sends and receives the number of bits + // selected by bits 11:8. +#define SPCR_CPHA (1 << 3) // Clock phase control +#define SPCR_CPOL (1 << 4) // Clock polarity control. +#define SPCR_MSTR (1 << 5) // Master mode select. +#define SPCR_LSBF (1 << 6) // LSB First controls +#define SPCR_SPIE (1 << 7) // Serial peripheral interrupt enable. +#define SPCR_BITS (0xF << 8) // When bit 2 of this register is 1, + // this field controls the number of + // bits per transfer + // 1000 : 8 bits per transfer + // 1001 : 9 bits per transfer + // 1010 : 10 bits per transfer + // 1011 : 11 bits per transfer + // 1100 : 12 bits per transfer + // 1101 : 13 bits per transfer + // 1110 : 14 bits per transfer + // 1111 : 15 bits per transfer + // 0000 : 16 bits per transfer + +//SPI Status Register +#define SPSR_ABRT (1 << 3) // Slave abort. +#define SPSR_MODF (1 << 4) // Mode fault. +#define SPSR_ROVR (1 << 5) // Read overrun. +#define SPSR_WCOL (1 << 6) // Write collision. +#define SPSR_SPIF (1 << 7) // SPI transfer complete flag. + +//SPI Interrupt register +#define SPINT_IF (1 << 0) // SPI interrupt flag. + + +#endif diff --git a/embedded/arch/arm/mach-lpc21xx/defines/lpcTMR.h b/embedded/arch/arm/mach-lpc21xx/defines/lpcTMR.h new file mode 100644 index 0000000..cbc7bed --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/lpcTMR.h @@ -0,0 +1,108 @@ +/****************************************************************************** + * + * $RCSfile: lpcTMR.h,v $ + * $Revision: 1.2 $ + * + * Header file for Philips LPC ARM Processors. + * Copyright 2004 R O SoftWare + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + *****************************************************************************/ +#ifndef INC_LPC_TMR_H +#define INC_LPC_TMR_H + +// Timer & PWM Registers +typedef struct +{ + REG32 ir; // Interrupt Register + REG32 tcr; // Timer Control Register + REG32 tc; // Timer Counter + REG32 pr; // Prescale Register + REG32 pc; // Prescale Counter Register + REG32 mcr; // Match Control Register + REG32 mr0; // Match Register 0 + REG32 mr1; // Match Register 1 + REG32 mr2; // Match Register 2 + REG32 mr3; // Match Register 3 + REG32 ccr; // Capture Control Register + REG32 cr0; // Capture Register 0 + REG32 cr1; // Capture Register 1 + REG32 cr2; // Capture Register 2 + REG32 cr3; // Capture Register 3 + REG32 emr; // External Match Register + REG32 mr4; // Match Register 4 + REG32 mr5; // Match Register 5 + REG32 mr6; // Match Register 6 + REG32 pcr; // Control Register + REG32 ler; // Latch Enable Register +} pwmTmrRegs_t; + +// Timer Interrupt Register Bit Definitions +#define TIR_MR0I (1 << 0) // Interrupt flag for match channel 0 +#define TIR_MR1I (1 << 1) // Interrupt flag for match channel 1 +#define TIR_MR2I (1 << 2) // Interrupt flag for match channel 2 +#define TIR_MR3I (1 << 3) // Interrupt flag for match channel 3 +#define TIR_CR0I (1 << 4) // Interrupt flag for capture channel 0 event +#define TIR_CR1I (1 << 5) // Interrupt flag for capture channel 1 event +#define TIR_CR2I (1 << 6) // Interrupt flag for capture channel 2 event +#define TIR_CR3I (1 << 7) // Interrupt flag for capture channel 3 event + +// PWM Interrupt Register Bit Definitions +#define PWMIR_MR0I (1 << 0) // Interrupt flag for match channel 0 +#define PWMIR_MR1I (1 << 1) // Interrupt flag for match channel 1 +#define PWMIR_MR2I (1 << 2) // Interrupt flag for match channel 2 +#define PWMIR_MR3I (1 << 3) // Interrupt flag for match channel 3 +#define PWMIR_MR4I (1 << 8) // Interrupt flag for match channel 4 +#define PWMIR_MR5I (1 << 9) // Interrupt flag for match channel 5 +#define PWMIR_MR6I (1 << 10) // Interrupt flag for match channel 6 +#define PWMIR_MASK (0x070F) + +// Timer Control Register Bit Definitions +#define TCR_ENABLE (1 << 0) +#define TCR_RESET (1 << 1) + +// PWM Control Register Bit Definitions +#define PWMCR_ENABLE (1 << 0) +#define PWMCR_RESET (1 << 1) + +// PWM Latch Enable Register Bit Definitions +#define PWMLER_PWML0E (1<<0) +#define PWMLER_PWML1E (1<<1) +#define PWMLER_PWML2E (1<<2) +#define PWMLER_PWML3E (1<<3) +#define PWMLER_PWML4E (1<<4) +#define PWMLER_PWML5E (1<<5) +#define PWMLER_PWML6E (1<<6) + +// Timer Match Control Register Bit Definitions +#define TMCR_MR0_I (1 << 0) // Enable Interrupt when MR0 matches TC +#define TMCR_MR0_R (1 << 1) // Enable Reset of TC upon MR0 match +#define TMCR_MR0_S (1 << 2) // Enable Stop of TC upon MR0 match +#define TMCR_MR1_I (1 << 3) // Enable Interrupt when MR1 matches TC +#define TMCR_MR1_R (1 << 4) // Enable Reset of TC upon MR1 match +#define TMCR_MR1_S (1 << 5) // Enable Stop of TC upon MR1 match +#define TMCR_MR2_I (1 << 6) // Enable Interrupt when MR2 matches TC +#define TMCR_MR2_R (1 << 7) // Enable Reset of TC upon MR2 match +#define TMCR_MR2_S (1 << 8) // Enable Stop of TC upon MR2 match +#define TMCR_MR3_I (1 << 9) // Enable Interrupt when MR3 matches TC +#define TMCR_MR3_R (1 << 10) // Enable Reset of TC upon MR3 match +#define TMCR_MR3_S (1 << 11) // Enable Stop of TC upon MR3 match + +// Timer Capture Control Register Bit Definitions +#define TCCR_CR0_R (1 << 0) // Enable Rising edge on CAPn.0 will load TC to CR0 +#define TCCR_CR0_F (1 << 1) // Enable Falling edge on CAPn.0 will load TC to CR0 +#define TCCR_CR0_I (1 << 2) // Enable Interrupt on load of CR0 +#define TCCR_CR1_R (1 << 3) // Enable Rising edge on CAPn.1 will load TC to CR1 +#define TCCR_CR1_F (1 << 4) // Enable Falling edge on CAPn.1 will load TC to CR1 +#define TCCR_CR1_I (1 << 5) // Enable Interrupt on load of CR1 +#define TCCR_CR2_R (1 << 6) // Enable Rising edge on CAPn.2 will load TC to CR2 +#define TCCR_CR2_F (1 << 7) // Enable Falling edge on CAPn.2 will load TC to CR2 +#define TCCR_CR2_I (1 << 8) // Enable Interrupt on load of CR2 +#define TCCR_CR3_R (1 << 9) // Enable Rising edge on CAPn.3 will load TC to CR3 +#define TCCR_CR3_F (1 << 10) // Enable Falling edge on CAPn.3 will load TC to CR3 +#define TCCR_CR3_I (1 << 11) // Enable Interrupt on load of CR3 + +#endif diff --git a/embedded/arch/arm/mach-lpc21xx/defines/lpcUART.h b/embedded/arch/arm/mach-lpc21xx/defines/lpcUART.h new file mode 100644 index 0000000..74e257a --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/lpcUART.h @@ -0,0 +1,122 @@ +/****************************************************************************** + * + * $RCSfile: lpcUART.h,v $ + * $Revision: 1.1 $ + * + * Header file for Philips LPC ARM Processors. + * Copyright 2004 R O SoftWare + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + *****************************************************************************/ +#ifndef INC_LPC_UART_H +#define INC_LPC_UART_H + +// Universal Asynchronous Receiver Transmitter Registers +typedef struct +{ + union + { + REG_8 rbr; // Receive Buffer Register + REG_8 thr; // Transmit Holding Register + REG_8 dll; // Divisor Latch Register (LSB) + REG_8 _pad0[4]; + }; + + union + { + REG_8 ier; // Interrupt Enable Register + REG_8 dlm; // Divisor Latch Register (MSB) + REG_8 _pad1[4]; + }; + + union + { + REG_8 iir; // Interrupt ID Register + REG_8 fcr; // FIFO Control Register + REG_8 _pad2[4]; + }; + + REG_8 lcr; // Line Control Registe + REG_8 _pad3[3]; + REG_8 mcr; // MODEM Control Register + REG_8 _pad4[3]; + REG_8 lsr; // Line Status Register + REG_8 _pad5[3]; + REG_8 msr; // MODEM Status Register + REG_8 _pad6[3]; + REG_8 scr; // Scratch Pad Register + REG_8 _pad7[3]; +} uartRegs_t; + +/////////////////////////////////////////////////////////////////////////////// +// UART defines + +// Interrupt Enable Register bit definitions +#define UIER_ERBFI (1 << 0) // Enable Receive Data Available Interrupt +#define UIER_ETBEI (1 << 1) // Enable Transmit Holding Register Empty Interrupt +#define UIER_ELSI (1 << 2) // Enable Receive Line Status Interrupt +#define UIER_EDSSI (1 << 3) // Enable MODEM Status Interrupt + +// Interrupt ID Register bit definitions +#define UIIR_NO_INT (1 << 0) // NO INTERRUPTS PENDING +#define UIIR_MS_INT (0 << 1) // MODEM Status +#define UIIR_THRE_INT (1 << 1) // Transmit Holding Register Empty +#define UIIR_RDA_INT (2 << 1) // Receive Data Available +#define UIIR_RLS_INT (3 << 1) // Receive Line Status +#define UIIR_CTI_INT (6 << 1) // Character Timeout Indicator +#define UIIR_ID_MASK 0x0E + +// FIFO Control Register bit definitions +#define UFCR_FIFO_ENABLE (1 << 0) // FIFO Enable +#define UFCR_RX_FIFO_RESET (1 << 1) // Reset Receive FIFO +#define UFCR_TX_FIFO_RESET (1 << 2) // Reset Transmit FIFO +#define UFCR_FIFO_TRIG1 (0 << 6) // Trigger @ 1 character in FIFO +#define UFCR_FIFO_TRIG4 (1 << 6) // Trigger @ 4 characters in FIFO +#define UFCR_FIFO_TRIG8 (2 << 6) // Trigger @ 8 characters in FIFO +#define UFCR_FIFO_TRIG14 (3 << 6) // Trigger @ 14 characters in FIFO + +// Line Control Register bit definitions +#define ULCR_CHAR_5 (0 << 0) // 5-bit character length +#define ULCR_CHAR_6 (1 << 0) // 6-bit character length +#define ULCR_CHAR_7 (2 << 0) // 7-bit character length +#define ULCR_CHAR_8 (3 << 0) // 8-bit character length +#define ULCR_STOP_1 (0 << 2) // 1 stop bit +#define ULCR_STOP_2 (1 << 2) // 2 stop bits +#define ULCR_PAR_NO (0 << 3) // No Parity +#define ULCR_PAR_ODD (1 << 3) // Odd Parity +#define ULCR_PAR_EVEN (3 << 3) // Even Parity +#define ULCR_PAR_MARK (5 << 3) // MARK "1" Parity +#define ULCR_PAR_SPACE (7 << 3) // SPACE "0" Paruty +#define ULCR_BREAK_ENABLE (1 << 6) // Output BREAK line condition +#define ULCR_DLAB_ENABLE (1 << 7) // Enable Divisor Latch Access + +// Modem Control Register bit definitions +#define UMCR_DTR (1 << 0) // Data Terminal Ready +#define UMCR_RTS (1 << 1) // Request To Send +#define UMCR_LB (1 << 4) // Loopback + +// Line Status Register bit definitions +#define ULSR_RDR (1 << 0) // Receive Data Ready +#define ULSR_OE (1 << 1) // Overrun Error +#define ULSR_PE (1 << 2) // Parity Error +#define ULSR_FE (1 << 3) // Framing Error +#define ULSR_BI (1 << 4) // Break Interrupt +#define ULSR_THRE (1 << 5) // Transmit Holding Register Empty +#define ULSR_TEMT (1 << 6) // Transmitter Empty +#define ULSR_RXFE (1 << 7) // Error in Receive FIFO +#define ULSR_ERR_MASK 0x1E + +// Modem Status Register bit definitions +#define UMSR_DCTS (1 << 0) // Delta Clear To Send +#define UMSR_DDSR (1 << 1) // Delta Data Set Ready +#define UMSR_TERI (1 << 2) // Trailing Edge Ring Indicator +#define UMSR_DDCD (1 << 3) // Delta Data Carrier Detect +#define UMSR_CTS (1 << 4) // Clear To Send +#define UMSR_DSR (1 << 5) // Data Set Ready +#define UMSR_RI (1 << 6) // Ring Indicator +#define UMSR_DCD (1 << 7) // Data Carrier Detect + +#endif diff --git a/embedded/arch/arm/mach-lpc21xx/defines/lpcUSB.h b/embedded/arch/arm/mach-lpc21xx/defines/lpcUSB.h new file mode 100644 index 0000000..3f924b5 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/lpcUSB.h @@ -0,0 +1,229 @@ +/****************************************************************************** + * + * $RCSfile: lpcUSB.h,v $ + * $Revision: 1.3 $ + * + * Header file for Philips LPC214x USB enabled ARM Processors + * Copyright 2006 Pavel Pisa + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact or GPL license is applied. + * + *****************************************************************************/ + +/* USBIntSt - USB Interrupt Status (R/W) */ +#define USB_INT_REQ_LP (1<<0) /*Low priority interrupt line status (RO) */ +#define USB_INT_REQ_HP (1<<1) /*High priority interrupt line status. (RO) */ +#define USB_INT_REQ_DMA (1<<2) /*DMA interrupt line status. This bit is read only. (LPC2146/8 only) 0*/ +#define USB_need_clock (1<<8) /*USB need clock indicator*/ +#define USB_EN_USB_INTS (1<<31) /*Enable all USB interrupts*/ + +/* Device interrupt registers */ +#define USBDevIntSt_o 0x0000 /* USB Device Interrupt Status (RO) */ +#define USBDevIntEn_o 0x0004 /* USB Device Interrupt Enable (R/W) */ +#define USBDevIntClr_o 0x0008 /* USB Device Interrupt Clear (WO) */ +#define USBDevIntSet_o 0x000C /* USB Device Interrupt Set (WO) */ +#define USBDevInt_FRAME (1<<0) /*Frame interrupt @1kHz for ISO transfers*/ +#define USBDevInt_EP_FAST (1<<1) /*Fast interrupt transfer for the endpoint*/ +#define USBDevInt_EP_SLOW (1<<2) /*Slow interrupt transfer for the endpoint*/ +#define USBDevInt_DEV_STAT (1<<3) /*USB Bus reset, USB suspend change or Connect occured*/ +#define USBDevInt_CCEMTY (1<<4) /*Command code register is empty/ready for CMD*/ +#define USBDevInt_CDFULL (1<<5) /*Command data register is full/data available*/ +#define USBDevInt_RxENDPKT (1<<6) /*Current packet in the FIFO is transferred to the CPU*/ +#define USBDevInt_TxENDPKT (1<<7) /*TxPacket bytes written to FIFO*/ +#define USBDevInt_EP_RLZED (1<<8) /*Endpoints realized after Maxpacket size update*/ +#define USBDevInt_ERR_INT (1<<9) /*Error Interrupt - Use Read Error Status Command 0xFB*/ + +#define USBDevIntPri_o 0x002C /* USB Device Interrupt Priority (WO) */ +#define USBDevIntPri_FRAME (1<<0) /*0/1 FRAME int routed to the low/high priority interrupt line*/ +#define USBDevIntPri_EP_FAST (1<<1) /*0/1 EP_FAST int routed to the low/high priority line*/ + +/* Endpoint interrupt registers - bits corresponds to EP0 to EP31 */ +#define USBEpIntSt_o 0x0030 /* USB Endpoint Interrupt Status (RO) */ +#define USBEpIntEn_o 0x0034 /* USB Endpoint Interrupt Enable (R/W) */ +#define USBEpIntClr_o 0x0038 /* USB Endpoint Interrupt Clear (WO) */ +#define USBEpIntSet_o 0x003C /* USB Endpoint Interrupt Set (WO) */ +#define USBEpIntPri_o 0x0040 /* USB Endpoint Priority (WO) */ +/* Endpoint realization registers */ +#define USBReEp_o 0x0044 /* USB Realize Endpoint (R/W) */ +#define USBEpInd_o 0x0048 /* USB Endpoint Index (WO) */ +#define USBEpInd_Ind 0x001F /* Index for subsequent USBMaxPSize (WO) */ +#define USBMaxPSize_o 0x004C /* USB MaxPacketSize (R/W) */ +#define USBMaxPSize_Size 0x03FF /* The maximum packet size value */ +/* USB transfer registers */ +#define USBRxData_o 0x0018 /* USB Receive Data (RO) */ +#define USBRxPLen_o 0x0020 /* USB Receive Packet Length (RO) */ +#define USBRxPLen_PKT_LNGTH (0x03FF) /*Remaining amount of bytes to be read from RAM*/ +#define USBRxPLen_DV (1<<10) /*Data valid. 0 only for error ISO packet*/ +#define USBRxPLen_PKT_RDY (1<<11) /*Packet length valid and packet is ready for reading*/ +#define USBTxData_o 0x001C /* USB Transmit Data (WO) */ +#define USBTxPLen_o 0x0024 /* USB Transmit Packet Length (WO) */ +#define USBTxPLen_PKT_LNGTH (0x03FF) /*Remaining amount of bytes to be written to the EP_RAM*/ +#define USBCtrl_o 0x0028 /* USB Control (R/W) */ +#define USBCtrl_RD_EN (1<<0) /*Read mode control*/ +#define USBCtrl_WR_EN (1<<1) /*Write mode control*/ +#define USBCtrl_LOG_ENDPOINT 0x003C /*Logical Endpoint number*/ +/* Command registers */ +#define USBCmdCode_o 0x0010 /* USB Command Code (WO) */ +#define USBCmdCode_CMD_PHASE 0x0000FF00 /*The command phase*/ +#define USBCmdCode_CMD_CODE 0x00FF0000 /*The code for the command*/ +#define USBCmdData_o 0x0014 /* USB Command Data (RO) */ +/* DMA registers (LPC2146/8 only) */ +#define USBDMARSt_o 0x0050 /* USB DMA Request Status (RO) */ +#define USBDMARClr_o 0x0054 /* USB DMA Request Clear (WO) */ +#define USBDMARSet_o 0x0058 /* USB DMA Request Set (WO) */ +#define USBUDCAH_o 0x0080 /* USB UDCA Head (R/W) has to be aligned to 128 bytes */ +#define USBEpDMASt_o 0x0084 /* USB Endpoint DMA Status (RO) */ +#define USBEpDMAEn_o 0x0088 /* USB Endpoint DMA Enable (WO) */ +#define USBEpDMADis_o 0x008C /* USB Endpoint DMA Disable (WO) */ +#define USBDMAIntSt_o 0x0090 /* USB DMA Interrupt Status (RO) */ +#define USBDMAIntEn_o 0x0094 /* USB DMA Interrupt Enable (R/W) */ +#define USBDMAInt_EoT (1<<0) /*End of Transfer Interrupt bit, 1 if USBEoTIntSt != 0*/ +#define USBDMAInt_New_DD_Rq (1<<1) /* New DD Request Interrupt bit, 1 if USBNDDRIntSt != 0*/ +#define USBDMAInt_SysError (1<<2) /*System Error Interrupt bit, 1 if USBSysErrIntSt != 0*/ +#define USBEoTIntSt_o 0x00A0 /* USB End of Transfer Interrupt Status (RO) */ +#define USBEoTIntClr_o 0x00A4 /* USB End of Transfer Interrupt Clear (WO) */ +#define USBEoTIntSet_o 0x00A8 /* USB End of Transfer Interrupt Set (WO) */ +#define USBNDDRIntSt_o 0x00AC /* USB New DD Request Interrupt Status (RO) */ +#define USBNDDRIntClr_o 0x00B0 /* USB New DD Request Interrupt Clear (WO) */ +#define USBNDDRIntSet_o 0x00B4 /* USB New DD Request Interrupt Set (WO) */ +#define USBSysErrIntSt_o 0x00B8 /* USB System Error Interrupt Status (RO) */ +#define USBSysErrIntClr_o 0x00BC /* USB System Error Interrupt Clear (WO) */ +#define USBSysErrIntSet_o 0x00C0 /* USB System Error Interrupt Set (WO) */ +#define USB_MODULE_ID_o 0x00FC /* USB Module ID */ + +/* Command Codes */ +#define USB_CMD_SET_ADDR 0x00D00500 +#define USB_CMD_CFG_DEV 0x00D80500 +#define USB_CMD_SET_MODE 0x00F30500 +#define USB_CMD_RD_FRAME 0x00F50500 +#define USB_DAT_RD_FRAME 0x00F50200 +#define USB_CMD_RD_TEST 0x00FD0500 +#define USB_DAT_RD_TEST 0x00FD0200 +#define USB_CMD_SET_DEV_STAT 0x00FE0500 +#define USB_CMD_GET_DEV_STAT 0x00FE0500 +#define USB_DAT_GET_DEV_STAT 0x00FE0200 +#define USB_CMD_GET_ERR_CODE 0x00FF0500 +#define USB_DAT_GET_ERR_CODE 0x00FF0200 +#define USB_CMD_RD_ERR_STAT 0x00FB0500 +#define USB_DAT_RD_ERR_STAT 0x00FB0200 +#define USB_DAT_WR_BYTE(x) (0x00000100 | ((x) << 16)) +#define USB_CMD_SEL_EP(x) (0x00000500 | ((x) << 16)) +#define USB_DAT_SEL_EP(x) (0x00000200 | ((x) << 16)) +#define USB_CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16)) +#define USB_DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16)) +#define USB_CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16)) +#define USB_CMD_CLR_BUF 0x00F20500 +#define USB_DAT_CLR_BUF 0x00F20200 +#define USB_CMD_VALID_BUF 0x00FA0500 + +/* Device Address Register Definitions */ +#define USBC_DEV_ADDR_MASK 0x7F +#define USBC_DEV_EN 0x80 + +/* Device Configure Register Definitions */ +#define USBC_CONF_DEVICE 0x01 + +/* Device Mode Register Definitions */ +#define USBC_AP_CLK 0x01 +#define USBC_INAK_CI 0x02 +#define USBC_INAK_CO 0x04 +#define USBC_INAK_II 0x08 +#define USBC_INAK_IO 0x10 +#define USBC_INAK_BI 0x20 +#define USBC_INAK_BO 0x40 + +/* Device Status Register Definitions */ +#define USBC_DEV_CON 0x01 +#define USBC_DEV_CON_CH 0x02 +#define USBC_DEV_SUS 0x04 +#define USBC_DEV_SUS_CH 0x08 +#define USBC_DEV_RST 0x10 + +/* Error Code Register Definitions */ +#define USBC_ERR_EC_MASK 0x0F +#define USBC_ERR_EA 0x10 + +/* Error Status Register Definitions */ +#define USBC_ERR_PID 0x01 +#define USBC_ERR_UEPKT 0x02 +#define USBC_ERR_DCRC 0x04 +#define USBC_ERR_TIMOUT 0x08 +#define USBC_ERR_EOP 0x10 +#define USBC_ERR_B_OVRN 0x20 +#define USBC_ERR_BTSTF 0x40 +#define USBC_ERR_TGL 0x80 + +/* Endpoint Select Register Definitions */ +#define USBC_EP_SEL_F 0x01 +#define USBC_EP_SEL_ST 0x02 +#define USBC_EP_SEL_STP 0x04 +#define USBC_EP_SEL_PO 0x08 +#define USBC_EP_SEL_EPN 0x10 +#define USBC_EP_SEL_B_1_FULL 0x20 +#define USBC_EP_SEL_B_2_FULL 0x40 + +/* Endpoint Status Register Definitions */ +#define USBC_EP_STAT_ST 0x01 +#define USBC_EP_STAT_DA 0x20 +#define USBC_EP_STAT_RF_MO 0x40 +#define USBC_EP_STAT_CND_ST 0x80 + +/* Clear Buffer Register Definitions */ +#define USBC_CLR_BUF_PO 0x01 + +typedef struct +{ +/* Device interrupt registers */ + REG32 DevIntSt; /* USB Device Interrupt Status (RO) 0000 */ + REG32 DevIntEn; /* USB Device Interrupt Enable (R/W) 0004 */ + REG32 DevIntClr; /* USB Device Interrupt Clear (WO) 0008 */ + REG32 DevIntSet; /* USB Device Interrupt Set (WO) 000C */ +/* Command registers */ + REG32 CmdCode; /* USB Command Code (WO) 0010 */ + REG32 CmdData; /* USB Command Data (RO) 0014 */ +/* USB transfer registers */ + REG32 RxData; /* USB Receive Data (RO) 0018 */ + REG32 TxData; /* USB Transmit Data (WO) 001C */ + REG32 RxPLen; /* USB Receive Packet Length (RO) 0020 */ + REG32 TxPLen; /* USB Transmit Packet Length (WO) 0024 */ + REG32 Ctrl; /* USB Control (R/W) 0028 */ +/* Device interrupt priority register */ + REG_8 USBDevIntPri; /* USB Device Interrupt Priority (WO) 002C */ + REG_8 _pad0[3]; +/* Endpoint interrupt registers */ + REG32 EpIntSt; /* USB Endpoint Interrupt Status (RO) 0030 */ + REG32 EpIntEn; /* USB Endpoint Interrupt Enable (R/W) 0034 */ + REG32 EpIntClr; /* USB Endpoint Interrupt Clear (WO) 0038 */ + REG32 EpIntSet; /* USB Endpoint Interrupt Set (WO) 003C */ + REG32 EpIntPri; /* USB Endpoint Priority (WO) 0040 */ +/* Endpoint realization registers */ + REG32 ReEp; /* USB Realize Endpoint (R/W) 0044 */ + REG32 EpInd; /* USB Endpoint Index (WO) 0048 */ + REG32 MaxPSize; /* USB MaxPacketSize (R/W) 004C */ +/* DMA registers (LPC2146/8 only) */ + REG32 DMARSt; /* USB DMA Request Status (RO) 0050 */ + REG32 DMARClr; /* USB DMA Request Clear (WO) 0054 */ + REG32 DMARSet; /* USB DMA Request Set (WO) 0058 */ + REG32 _pad1[9]; + REG32 UDCAH; /* USB UDCA Head (R/W) 0080 */ + REG32 EpDMASt; /* USB Endpoint DMA Status (RO) 0084 */ + REG32 EpDMAEn; /* USB Endpoint DMA Enable (WO) 0088 */ + REG32 EpDMADis; /* USB Endpoint DMA Disable (WO) 008C */ + REG32 DMAIntSt; /* USB DMA Interrupt Status (RO) 0090 */ + REG32 DMAIntEn; /* USB DMA Interrupt Enable (R/W) 0094 */ + REG32 _pad2[2]; + REG32 EoTIntSt; /* USB End of Transfer Interrupt Status (RO) 00A0 */ + REG32 EoTIntClr; /* USB End of Transfer Interrupt Clear (WO) 00A4 */ + REG32 EoTIntSet; /* USB End of Transfer Interrupt Set (WO) 00A8 */ + REG32 NDDRIntSt; /* USB New DD Request Interrupt Status (RO) 00AC */ + REG32 NDDRIntClr; /* USB New DD Request Interrupt Clear (WO) 00B0 */ + REG32 NDDRIntSet; /* USB New DD Request Interrupt Set (WO) 00B4 */ + REG32 SysErrIntSt; /* USB System Error Interrupt Status (RO) 00B8 */ + REG32 SysErrIntClr; /* USB System Error Interrupt Clear (WO) 00BC */ + REG32 SysErrIntSet; /* USB System Error Interrupt Set (WO) 00C0 */ + REG32 _pad3[0xE]; + REG32 MODULE_ID; /* Module ID (RO) 00FC */ +} usbRegs_t; + diff --git a/embedded/arch/arm/mach-lpc21xx/defines/lpcVIC.h b/embedded/arch/arm/mach-lpc21xx/defines/lpcVIC.h new file mode 100644 index 0000000..28d12a6 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/lpcVIC.h @@ -0,0 +1,95 @@ +/****************************************************************************** + * + * $RCSfile: lpcVIC.h,v $ + * $Revision: 1.1 $ + * + * Header file for Philips LPC ARM Processors. + * Copyright 2004 R O SoftWare + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + *****************************************************************************/ +#ifndef INC_LPC_VIC_H +#define INC_LPC_VIC_H + +// Vectored Interrupt Controller Registers (VIC) +typedef struct +{ + REG32 irqStatus; // IRQ Status Register + REG32 fiqStatus; // FIQ Status Register + REG32 rawIntr; // Raw Interrupt Status Register + REG32 intSelect; // Interrupt Select Register + REG32 intEnable; // Interrupt Enable Register + REG32 intEnClear; // Interrupt Enable Clear Register + REG32 softInt; // Software Interrupt Register + REG32 softIntClear; // Software Interrupt Clear Register + REG32 protection; // Protection Enable Register + REG32 _pad0[3]; + REG32 vectAddr; // Vector Address Register + REG32 defVectAddr; // Default Vector Address Register + REG32 _pad1[50]; + REG32 vectAddr0; // Vector Address 0 Register + REG32 vectAddr1; // Vector Address 1 Register + REG32 vectAddr2; // Vector Address 2 Register + REG32 vectAddr3; // Vector Address 3 Register + REG32 vectAddr4; // Vector Address 4 Register + REG32 vectAddr5; // Vector Address 5 Register + REG32 vectAddr6; // Vector Address 6 Register + REG32 vectAddr7; // Vector Address 7 Register + REG32 vectAddr8; // Vector Address 8 Register + REG32 vectAddr9; // Vector Address 9 Register + REG32 vectAddr10; // Vector Address 10 Register + REG32 vectAddr11; // Vector Address 11 Register + REG32 vectAddr12; // Vector Address 12 Register + REG32 vectAddr13; // Vector Address 13 Register + REG32 vectAddr14; // Vector Address 14 Register + REG32 vectAddr15; // Vector Address 15 Register + REG32 _pad2[48]; + REG32 vectCntl0; // Vector Control 0 Register + REG32 vectCntl1; // Vector Control 1 Register + REG32 vectCntl2; // Vector Control 2 Register + REG32 vectCntl3; // Vector Control 3 Register + REG32 vectCntl4; // Vector Control 4 Register + REG32 vectCntl5; // Vector Control 5 Register + REG32 vectCntl6; // Vector Control 6 Register + REG32 vectCntl7; // Vector Control 7 Register + REG32 vectCntl8; // Vector Control 8 Register + REG32 vectCntl9; // Vector Control 9 Register + REG32 vectCntl10; // Vector Control 10 Register + REG32 vectCntl11; // Vector Control 11 Register + REG32 vectCntl12; // Vector Control 12 Register + REG32 vectCntl13; // Vector Control 13 Register + REG32 vectCntl14; // Vector Control 14 Register + REG32 vectCntl15; // Vector Control 15 Register +} vicRegs_t; + +// VIC Channel Assignments +#define VIC_WDT 0 +#define VIC_TIMER0 4 +#define VIC_TIMER1 5 +#define VIC_UART0 6 +#define VIC_UART1 7 +#define VIC_PWM 8 +#define VIC_PWM0 8 +#define VIC_I2C 9 +#define VIC_SPI 10 +#define VIC_SPI0 10 +#define VIC_SPI1 11 +#define VIC_PLL 12 +#define VIC_RTC 13 +#define VIC_EINT0 14 +#define VIC_EINT1 15 +#define VIC_EINT2 16 +#define VIC_EINT3 17 +#define VIC_ADC 18 + +// Vector Control Register bit definitions +#define VIC_ENABLE (1 << 5) + +// Convert Channel Number to Bit Value +#define VIC_BIT(chan) (1 << (chan)) + +#endif + diff --git a/embedded/arch/arm/mach-lpc21xx/defines/lpcWD.h b/embedded/arch/arm/mach-lpc21xx/defines/lpcWD.h new file mode 100644 index 0000000..65f1d73 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/defines/lpcWD.h @@ -0,0 +1,27 @@ +/****************************************************************************** + * + * $RCSfile: lpcWD.h,v $ + * $Revision: 1.1 $ + * + * Header file for Philips LPC ARM Processors. + * Copyright 2004 R O SoftWare + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + *****************************************************************************/ +#ifndef INC_LPC_WD_H +#define INC_LPC_WD_H + +// Watchdog Registers +typedef struct +{ + REG_8 mod; // Watchdog Mode Register + REG_8 _pad0[3]; + REG32 tc; // Watchdog Time Constant Register + REG_8 feed; // Watchdog Feed Register + REG32 tv; // Watchdog Time Value Register +} wdRegs_t; + +#endif diff --git a/embedded/arch/arm/mach-lpc21xx/libs/Makefile b/embedded/arch/arm/mach-lpc21xx/libs/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/libs/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/arch/arm/mach-lpc21xx/libs/Makefile.omk b/embedded/arch/arm/mach-lpc21xx/libs/Makefile.omk new file mode 100644 index 0000000..778cdc0 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/libs/Makefile.omk @@ -0,0 +1,3 @@ +# -*- makefile -*- + +SUBDIRS = hal iap diff --git a/embedded/arch/arm/mach-lpc21xx/libs/hal/Makefile b/embedded/arch/arm/mach-lpc21xx/libs/hal/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/libs/hal/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/arch/arm/mach-lpc21xx/libs/hal/Makefile.omk b/embedded/arch/arm/mach-lpc21xx/libs/hal/Makefile.omk new file mode 100644 index 0000000..a7917db --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/libs/hal/Makefile.omk @@ -0,0 +1,12 @@ +# -*- makefile -*- + +lib_obj_SOURCES = startup.S ivt.S + +lib_LIBRARIES = mach_hal + +include_HEADERS = hal_ints.h hal_machperiph.h + +mach_hal_SOURCES = hal.c hal_machperiph.c + + + diff --git a/embedded/arch/arm/mach-lpc21xx/libs/hal/hal.c b/embedded/arch/arm/mach-lpc21xx/libs/hal/hal.c new file mode 100644 index 0000000..a983e95 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/libs/hal/hal.c @@ -0,0 +1,189 @@ +#include +#include +#include +#include + +// ------------------------------------------------------------------------- +// Hardware init + +// Return value of VPBDIV register. According to errata doc +// we need to read twice consecutively to get correct value +uint32_t lpc_get_vpbdiv(void) +{ + uint32_t vpbdiv_reg; + + vpbdiv_reg=VPBDIV; + vpbdiv_reg=VPBDIV; + + return (vpbdiv_reg); +} + + +// ------------------------------------------------------------------------- +// This routine is called to respond to a hardware interrupt (IRQ). It +// should interrogate the hardware and return the IRQ vector number. +int hal_IRQ_handler(void) +{ + uint32_t irq_num, irq_stat; + + irq_stat=VICIRQStatus; + for (irq_num = 0; irq_num < 32; irq_num++) + if (irq_stat & (1 << irq_num)) + break; + + // If not a valid interrrupt source, treat as spurious interrupt + if (irq_num < HAL_ISR_MIN || irq_num > HAL_ISR_MAX) + irq_num = HAL_INTERRUPT_NONE; + + return (irq_num); +} + + +// ------------------------------------------------------------------------- +// Interrupt control +// + +// Block the the interrupt associated with the vector +void hal_interrupt_mask(int vector) +{ + VICIntEnClear = 1 << vector; +} + +// Unblock the the interrupt associated with the vector +void hal_interrupt_unmask(int vector) +{ + VICIntEnable = 1 << vector; +} + +// Acknowledge the the interrupt associated with the vector. This +// clears the interrupt but may result in another interrupt being +// delivered +void hal_interrupt_acknowledge(int vector) +{ + + // External interrupts have to be cleared from the EXTINT register + if (vector >= HAL_INTERRUPT_EINT0 && + vector <= HAL_INTERRUPT_EINT3) + { + // Map int vector to corresponding bit (0..3) + vector = 1 << (vector - HAL_INTERRUPT_EINT0); + + // Clear the external interrupt + EXTINT=vector; + } + + // Acknowledge interrupt in the VIC + VICVectAddr=0; +} + +// This provides control over how an interrupt signal is detected. +// Options are between level or edge sensitive (level) and high/low +// level or rising/falling edge triggered (up). +// +// This should be simple, but unfortunately on some processor revisions, +// it trips up on two errata issues (for the LPC2294 Rev.A these are +// EXTINT.1 and VPBDIV.1) and so on these devices a somewhat convoluted +// sequence in order to work properly. There is nothing in the errata +// sequence that won't work on a processor without these issues. +void hal_interrupt_configure(int vector, int level, int up) +{ + uint32_t regval; +#ifdef HAL_ARM_LPC2XXX_EXTINT_ERRATA + uint32_t saved_vpbdiv; +#endif + + // Map int vector to corresponding bit (0..3) + vector = 1 << (vector - HAL_INTERRUPT_EINT0); + +#ifdef HAL_ARM_LPC2XXX_EXTINT_ERRATA + // From discussions with the Philips applications engineers on the + // Yahoo LPC2000 forum, it appears that in order up change both + // EXTMODE and EXTPOLAR, the operations have to be performed in + // two passes as follows: + // old=VPBDIV (x2), + // VPBDIV=0, EXTMODE=n, VPBDIV=n, VPBDIV=0, EXTPOLAR=y, VPBDIV=y + // VPCDIV=old + + // Save current VPBDIV register settings + saved_vpbdiv = lpc_get_vpbdiv(); + + // Clear VPBDIV register + VPBDIV=0; + + // Read current mode and update for level (0) or edge detection (1) + regval=EXTMODE; + if (level) + regval &= ~vector; + else + regval |= vector; + EXTMODE=regval; + + // Set VPBDIV register to same value as mode + VPBDIV=regval; + + // Clear VPBDIV register + VPBDIV=0; + + // Read current polarity and update for trigger level or edge + // level: high (1), low (0) edge: rising (1), falling (0) + regval=EXTPOLAR; + if (up) + regval |= vector; + else + regval &= ~vector; + EXTPOLAR=regval; + + + // Set VPBDIV register to same value as mode + VPBDIV=regval; + + // Restore saved VPBDIV register + VPBDIV=saved_vpbdiv; +#else + // Read current mode and update for level (0) or edge detection (1) + regval=EXTMODE; + if (level) + regval &= ~vector; + else + regval |= vector; + EXTMODE=regval; + + // Read current polarity and update for trigger level or edge + // level: high (1), low (0) edge: rising (1), falling (0) + regval=EXTPOLAR; + if (up) + regval |= vector; + else + regval &= ~vector; + EXTPOLAR=regval; +#endif + // Clear any spurious interrupt that might have been generated + EXTINT=vector; +} + +// Change interrupt level. This is a non-operation on the LPC2XXX +void hal_interrupt_set_level(int vector, int level) +{ +} + +uint32_t hal_default_isr(int vector, uint32_t data) +{ + return 0; +} + +uint32_t hal_interrupt_handlers[HAL_ISR_COUNT]={[0 ... HAL_ISR_COUNT-1]=(uint32_t)hal_default_isr}; +uint32_t hal_interrupt_data[HAL_ISR_COUNT]; + +void irq_handler_resolver(void) __attribute__ ((interrupt)); +void irq_handler_resolver(void) +{ + int v; + uint32_t f,d; + + v=hal_IRQ_handler(); + if (v==HAL_INTERRUPT_NONE) return; + f=hal_interrupt_handlers[v]; + d=hal_interrupt_data[v]; + ((hal_isr)f)(v,d); + hal_interrupt_acknowledge(v); +} diff --git a/embedded/arch/arm/mach-lpc21xx/libs/hal/hal_ints.h b/embedded/arch/arm/mach-lpc21xx/libs/hal/hal_ints.h new file mode 100644 index 0000000..d218725 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/libs/hal/hal_ints.h @@ -0,0 +1,35 @@ +#ifndef HAL_INTS_H +#define HAL_INTS_H + +#define HAL_INTERRUPT_NONE -1 + +#define HAL_INTERRUPT_WD 0 +#define HAL_INTERRUPT_SOFT 1 +#define HAL_INTERRUPT_DCC_RX 2 +#define HAL_INTERRUPT_DCC_TX 3 +#define HAL_INTERRUPT_TIMER0 4 +#define HAL_INTERRUPT_TIMER1 5 +#define HAL_INTERRUPT_UART0 6 +#define HAL_INTERRUPT_UART1 7 +#define HAL_INTERRUPT_PWM0 8 +#define HAL_INTERRUPT_I2C0 9 +#define HAL_INTERRUPT_SPI0 10 +#define HAL_INTERRUPT_SPI1 11 +#define HAL_INTERRUPT_PLL 12 +#define HAL_INTERRUPT_RTCDEV 13 +#define HAL_INTERRUPT_EINT0 14 +#define HAL_INTERRUPT_EINT1 15 +#define HAL_INTERRUPT_EINT2 16 +#define HAL_INTERRUPT_EINT3 17 +#define HAL_INTERRUPT_AD 18 +#define HAL_INTERRUPT_I2C1 19 + +#define HAL_ISR_MIN 0 +#define HAL_ISR_MAX (31) + +#define HAL_ISR_COUNT (HAL_ISR_MAX+1) + +//The vector used by the Real time clock +#define HAL_INTERRUPT_RTC HAL_INTERRUPT_TIMER0 + +#endif /* HAL_INTS_H */ diff --git a/embedded/arch/arm/mach-lpc21xx/libs/hal/hal_machperiph.c b/embedded/arch/arm/mach-lpc21xx/libs/hal/hal_machperiph.c new file mode 100644 index 0000000..599fdc3 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/libs/hal/hal_machperiph.c @@ -0,0 +1,49 @@ +#include +#include +#include + +void lpc_pll_on() +{ + // set PLL multiplier & divisor. + // values computed from config.h + PLLCFG = PLLCFG_MSEL | PLLCFG_PSEL; + + // enable PLL + PLLCON = PLLCON_PLLE; + PLLFEED = 0xAA; // Make it happen. These two updates + PLLFEED = 0x55; // MUST occur in sequence. + + // wait for PLL lock + while (!(PLLSTAT & PLLSTAT_LOCK)) + continue; + + // enable & connect PLL + PLLCON = PLLCON_PLLE | PLLCON_PLLC; + PLLFEED = 0xAA; // Make it happen. These two updates + PLLFEED = 0x55; // MUST occur in sequence. +} + +void lpc_pll_off() +{ + // disable PLL + PLLCON = 0; + PLLFEED = 0xAA; // Make it happen. These two updates + PLLFEED = 0x55; // MUST occur in sequence. +} + +void lpc_watchdog_feed() +{ + unsigned long flags; + + save_and_cli(flags); + WDFEED = 0xAA; + WDFEED = 0x55; + restore_flags(flags); +} + +void lpc_watchdog_init(int on,int timeout_ms) +{ + if (!on) return; + WDTC = PCLK/(1000/timeout_ms); + WDMOD = 0x03; /* Enable watchdog timer and reset */ +} diff --git a/embedded/arch/arm/mach-lpc21xx/libs/hal/hal_machperiph.h b/embedded/arch/arm/mach-lpc21xx/libs/hal/hal_machperiph.h new file mode 100644 index 0000000..9f8c27f --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/libs/hal/hal_machperiph.h @@ -0,0 +1,10 @@ +#ifndef _HAL_MACHPERIPH_H +#define _HAL_MACHPERIPH_H + +void lpc_pll_on(); +void lpc_pll_off(); +void lpc_watchdog_init(int on,int timeout_ms); +void lpc_watchdog_feed(); + +#endif /* _HAL_MACHPERIPH_H */ + diff --git a/embedded/arch/arm/mach-lpc21xx/libs/hal/ivt.S b/embedded/arch/arm/mach-lpc21xx/libs/hal/ivt.S new file mode 100644 index 0000000..ae9032a --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/libs/hal/ivt.S @@ -0,0 +1,34 @@ +/* Setup vector table. Note that undf, pabt, dabt, fiq just execute +a null loop. */ + +.section .ivt,"ax" + .code 32 + .align 0 + + .global hal_vectors + +hal_vectors: LDR PC, Reset_Addr + LDR PC, Undef_Addr + LDR PC, SWI_Addr + LDR PC, PAbt_Addr + LDR PC, DAbt_Addr + NOP /* Reserved Vector */ + LDR PC, IRQ_Addr + LDR PC, FIQ_Addr + +Reset_Addr: .word reset_handler +Undef_Addr: .word Undef_Handler +SWI_Addr: .word SWI_Handler +PAbt_Addr: .word PAbt_Handler +DAbt_Addr: .word DAbt_Handler + .word 0 /* Reserved Address */ +IRQ_Addr: .word irq_handler_resolver +FIQ_Addr: .word FIQ_Handler + +Undef_Handler: B Undef_Handler +SWI_Handler: B SWI_Handler +PAbt_Handler: B PAbt_Handler +DAbt_Handler: B DAbt_Handler +FIQ_Handler: B FIQ_Handler + + .end diff --git a/embedded/arch/arm/mach-lpc21xx/libs/hal/startup.S b/embedded/arch/arm/mach-lpc21xx/libs/hal/startup.S new file mode 100644 index 0000000..3201fbc --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/libs/hal/startup.S @@ -0,0 +1,128 @@ +#/***********************************************************************/ +#/* Startup file for LPC21xx MCU applications */ +#/* Partially inspired by KEIL ELEKTRONIK startup code */ +#/***********************************************************************/ + + +# *** Startup Code (executed after Reset) *** + +# Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs + .set MODE_USR, 0x10 // User Mode + .set MODE_FIQ, 0x11 // FIQ Mode + .set MODE_IRQ, 0x12 // IRQ Mode + .set MODE_SVC, 0x13 // Supervisor Mode + .set MODE_ABT, 0x17 // Abort Mode + .set MODE_UND, 0x1B // Undefined Mode + .set MODE_SYS, 0x1F // System Mode + + .equ I_BIT, 0x80 // when I bit is set, IRQ is disabled + .equ F_BIT, 0x40 // when F bit is set, FIQ is disabled + + .set UND_STACK_SIZE, 0x00000004 + .set ABT_STACK_SIZE, 0x00000004 + .set FIQ_STACK_SIZE, 0x00000004 + .set IRQ_STACK_SIZE, 0X00000400 + .set SVC_STACK_SIZE, 0x00000004 + +# Starupt Code must be linked first at Address at which it expects to run. + + .text +# .arm + + .global _stack // top of stack + .global _startup + .global reset_handler + .func _startup +_startup: + +reset_handler: + +# Memory Mapping (when Interrupt Vectors are in RAM) + .equ MEMMAP, 0xE01FC040 /* Memory Mapping Control */ + + MOV R1, #1 + LDR R0, =hal_vectors + CMP R0, #0 + BEQ mam_sram + MOV R1, #2 +mam_sram: + LDR R0, =MEMMAP + STR R1, [R0] + +# Initialize Interrupt System +# - Set stack location for each mode +# - Leave in System Mode with Interrupts Disabled +# ----------------------------------------------- + ldr r0,=_stack + msr CPSR_c,#MODE_UND|I_BIT|F_BIT // Undefined Instruction Mode + mov sp,r0 + sub r0,r0,#UND_STACK_SIZE + msr CPSR_c,#MODE_ABT|I_BIT|F_BIT // Abort Mode + mov sp,r0 + sub r0,r0,#ABT_STACK_SIZE + msr CPSR_c,#MODE_FIQ|I_BIT|F_BIT // FIQ Mode + mov sp,r0 + sub r0,r0,#FIQ_STACK_SIZE + msr CPSR_c,#MODE_IRQ|I_BIT|F_BIT // IRQ Mode + mov sp,r0 + sub r0,r0,#IRQ_STACK_SIZE + msr CPSR_c,#MODE_SVC|I_BIT|F_BIT // Supervisor Mode + mov sp,r0 + sub r0,r0,#SVC_STACK_SIZE + msr CPSR_c,#MODE_SYS|I_BIT|F_BIT // System Mode + mov sp,r0 + +# Disable interrupt from VIC + .equ VICINTENABLE, 0xFFFFF010 + .equ VICINTENCLR, 0xFFFFF014 + .equ VICSOFTINT, 0xFFFFF018 + .equ VICSOFTINTCLEAR, 0xFFFFF01C + LDR R0, =VICINTENABLE + MOV R1, #0 + STR R1, [R0] + MOV R1, #0xFFFFFFFF + STR R1, [R0,#VICINTENCLR-VICINTENABLE] + STR R1, [R0,#VICSOFTINTCLEAR-VICINTENABLE] + +# Enable interrupts and return back into supervisor mode + msr CPSR_c,#MODE_SVC // Supervisor Mode + +# Relocate .data section (Copy from ROM to RAM) + LDR R1, =_etext + LDR R2, =_data + LDR R3, =_edata + CMP R1, R2 + BEQ ZI +LoopRel:CMP R2, R3 + LDRLO R0, [R1], #4 + STRLO R0, [R2], #4 + BLO LoopRel + +ZI: +# Clear .bss section (Zero init) + MOV R0, #0 + LDR R1, =__bss_start__ + LDR R2, =__bss_end__ +LoopZI: CMP R1, R2 + STRLO R0, [R1], #4 + BLO LoopZI + + +# Enter the C _setup_board code + ADR LR, __main_start + LDR R0, =_setup_board + CMP R0, #0 + BEQ __main_start + BX R0 + +__main_start: + ADR LR, __main_exit + LDR R0, =main + BX R0 + +__main_exit: B __main_exit + + .size _start, . - _start + .endfunc + + .end diff --git a/embedded/arch/arm/mach-lpc21xx/libs/iap/Makefile b/embedded/arch/arm/mach-lpc21xx/libs/iap/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/libs/iap/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/arch/arm/mach-lpc21xx/libs/iap/Makefile.omk b/embedded/arch/arm/mach-lpc21xx/libs/iap/Makefile.omk new file mode 100644 index 0000000..b0c47ee --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/libs/iap/Makefile.omk @@ -0,0 +1,14 @@ +# -*- makefile -*- + +lib_LIBRARIES = lpciap +lpciap_SOURCES = iap.c iap_asm.S + +include_HEADERS = lpciap.h + +ifeq ($(CONFIG_KEYVAL),y) +lib_LIBRARIES += lpciap_kvpb +lpciap_kvpb_SOURCES = iap_kvpb.c + +include_HEADERS += lpciap_kvpb.h + +endif diff --git a/embedded/arch/arm/mach-lpc21xx/libs/iap/iap.c b/embedded/arch/arm/mach-lpc21xx/libs/iap/iap.c new file mode 100644 index 0000000..9403f68 --- /dev/null +++ b/embedded/arch/arm/mach-lpc21xx/libs/iap/iap.c @@ -0,0 +1,118 @@ +#include +#include +#include + +#define CMD_SUCCESS 0 +#define BUSY 11 + +#define IAP_CMD_PREPARE 50 +#define IAP_CMD_WRITE 51 +#define IAP_CMD_ERASE 52 +#define IAP_CMD_READ_PARTID 54 + +uint32_t command[5]; +uint32_t result[2]; + +extern void iap_asm_entry (unsigned int *,unsigned int *); +#define iap_entry iap_asm_entry + +#ifdef INC_LPC210x_H +inline int addr2sec(unsigned long addr) +{ + return addr/0x2000; +} +#elif defined INC_LPC214x_H +inline int addr2sec(unsigned long addr) +{ + if (addr<0x8000) return (addr>>12); + else if (addr<0x78000) return (addr>>15)+7; + else return 22+((addr&0x7fff)>>12); +} +#else +#error "Undefined type of CPU for function addr2sec!" +#endif + +int lpcisp_read_partid() +{ + command[0] = IAP_CMD_READ_PARTID; + iap_entry(command, result); + return result[1]; +} + +int lpcisp_prepare_sectors(unsigned char start, unsigned char end) +{ + command[0] = IAP_CMD_PREPARE; + command[1] = start; + command[2] = end; + command[3] = FOSC/1000; + + iap_entry(command, result); + + return (CMD_SUCCESS == *result); +} + +int lpcisp_erase_sectors(unsigned char start, unsigned char end) +{ + command[0] = IAP_CMD_ERASE; + command[1] = start; + command[2] = end; + command[3] = FOSC/1000; + + iap_entry(command, result); + + return (CMD_SUCCESS == *result); +} + +int lpcisp_erase(void *addr, int len) +{ + int start,end; + unsigned long flags; + + start=addr2sec((unsigned long)addr); + end=addr2sec((unsigned long)addr+len-1); + + if (end +#include +#include + +unsigned long lpciap_buff[ISP_RAM2FLASH_BLOCK_SIZE/4]; +char *lpciap_addr_base=NULL; + +#define ISP_RAM2FLASH_BLOCK_SIZE_MASK (ISP_RAM2FLASH_BLOCK_SIZE-1) + +int lpcisp_kvpb_erase(struct kvpb_block *store, void *base,int size) +{ + return lpcisp_erase(base, size); +} + +int lpcisp_kvpb_flush(struct kvpb_block *store) +{ + if (lpciap_addr_base==NULL) return -1; + lpcisp_write(lpciap_addr_base,lpciap_buff,ISP_RAM2FLASH_BLOCK_SIZE); + lpciap_addr_base=NULL; + return 0; +} + +int lpcisp_kvpb_copy(struct kvpb_block *store,void *des, const void *src, int len) +{ + char *addr_base,*addr_src=(char*)src; + int cp_len; + + while(len) { + addr_base=(char*)((unsigned long)des&~ISP_RAM2FLASH_BLOCK_SIZE_MASK); + cp_len=ISP_RAM2FLASH_BLOCK_SIZE-((unsigned long)des&ISP_RAM2FLASH_BLOCK_SIZE_MASK); + if (len + +extern unsigned long lpciap_buff[ISP_RAM2FLASH_BLOCK_SIZE/4]; + +int lpcisp_kvpb_erase(struct kvpb_block *store, void *base,int size); +int lpcisp_kvpb_flush(struct kvpb_block *store); +int lpcisp_kvpb_copy(struct kvpb_block *store,void *des, const void *src, int len); + +#endif /* _LPCIAP_KVPB_ */ diff --git a/embedded/arch/generic/Makefile b/embedded/arch/generic/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/arch/generic/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/arch/generic/Makefile.omk b/embedded/arch/generic/Makefile.omk new file mode 100644 index 0000000..4291134 --- /dev/null +++ b/embedded/arch/generic/Makefile.omk @@ -0,0 +1,3 @@ +# -*- makefile -*- + +SUBDIRS = defines \ No newline at end of file diff --git a/embedded/arch/generic/defines/Makefile b/embedded/arch/generic/defines/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/arch/generic/defines/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/arch/generic/defines/Makefile.omk b/embedded/arch/generic/defines/Makefile.omk new file mode 100644 index 0000000..5bbf0f6 --- /dev/null +++ b/embedded/arch/generic/defines/Makefile.omk @@ -0,0 +1,4 @@ +# -*- makefile -*- + +include_HEADERS += byteswap.h endian.h lt_timer.h lt_timer_types.h +#include_HEADERS = $(notdir $(wildcard $(SOURCES_DIR)/*.h)) diff --git a/embedded/arch/generic/defines/byteswap.h b/embedded/arch/generic/defines/byteswap.h new file mode 100644 index 0000000..2324696 --- /dev/null +++ b/embedded/arch/generic/defines/byteswap.h @@ -0,0 +1,22 @@ +#ifndef _BYTESWAP_H +#define _BYTESWAP_H 1 + +#if defined(__KEIL__) +#define __bswap_16(x) ( (((x) << 8) & 0xFF00) | (((x) >> 8) & 0x00FF) ) +#else +#define __bswap_16(x) ({unsigned short __x=(x); \ + (((__x>>8)&0xff)|((__x&0xff)<<8)); }) +#endif + +#if defined(__KEIL__) + //todo +#else +#define __bswap_32(x) ({unsigned long __y=(x); \ + (__bswap_16(__y>>16)|__bswap_16(__y)<<16); }) +#endif + +#define bswap_16(x) __bswap_16 (x) + +#define bswap_32(x) __bswap_32 (x) + +#endif /* byteswap.h */ diff --git a/embedded/arch/generic/defines/endian.h b/embedded/arch/generic/defines/endian.h new file mode 100644 index 0000000..13d6d51 --- /dev/null +++ b/embedded/arch/generic/defines/endian.h @@ -0,0 +1,16 @@ +#ifndef _ENDIAN_H +#define _ENDIAN_H 1 + +#define __LITTLE_ENDIAN 1234 +#define __BIG_ENDIAN 4321 +#define __PDP_ENDIAN 3412 + +#if defined(__i386__) || defined(SDCC) || defined (__ARMEL__) +#define __BYTE_ORDER __LITTLE_ENDIAN +#endif + +#if defined(__H8300__) || defined(__H8500__) || defined (__H8300H__) || defined(__W65__) || defined (__H8300S__) || defined (__m68k__) || defined (__ARMEB__) || defined(__KEIL__) +#define __BYTE_ORDER __BIG_ENDIAN +#endif + +#endif /* endian.h */ diff --git a/embedded/arch/generic/defines/lt_timer.h b/embedded/arch/generic/defines/lt_timer.h new file mode 100644 index 0000000..772cf13 --- /dev/null +++ b/embedded/arch/generic/defines/lt_timer.h @@ -0,0 +1,64 @@ +#ifndef _LT_TIMER_H +#define _LT_TIMER_H + +#include +#include +#include +#include + +//timers + +#ifndef LT_TIMER_VAR_LOC +#define LT_TIMER_VAR_LOC +#endif + +static lt_ticks_t LT_TIMER_VAR_LOC last_ticks; +static lt_mstime_t LT_TIMER_VAR_LOC actual_msec; + +/* Declaration of ulan light timers */ + +#define lt_get_msbase() (1000/SYS_TIMER_HZ) /* in ms */ +#define lt_get_ticks() (get_sys_timer_ticks()) + +static inline void +lt_mstime_update() +{ + lt_ticks_t LT_TIMER_VAR_LOC act_ticks; + lt_mstime_t LT_TIMER_VAR_LOC msec_diff; + + act_ticks=lt_get_ticks(); + msec_diff=((lt_tidiff_t)(act_ticks-last_ticks))*lt_get_msbase(); + last_ticks=act_ticks; + + actual_msec+=msec_diff; +} + + +#define LT_TIMER_DEC(cust_prefix) \ +\ +extern lt_mstime_t LT_TIMER_VAR_LOC cust_prefix##_last_expired; \ +static inline void \ +cust_prefix##_init() \ +{\ + lt_mstime_update();\ + cust_prefix##_last_expired=actual_msec;\ +}\ +static inline int \ +cust_prefix##_expired(lt_mstime_t expiration) \ +{\ + lt_mstime_update();\ + \ + if ((lt_msdiff_t)(actual_msec-cust_prefix##_last_expired)>=expiration) {\ + cust_prefix##_last_expired=actual_msec;\ + return 1;\ + }\ + \ + return 0;\ +} + +#define LT_TIMER_IMP(cust_prefix) \ +\ +lt_mstime_t LT_TIMER_VAR_LOC cust_prefix##_last_expired; \ + + +#endif /* _LT_TIMER_H */ diff --git a/embedded/arch/generic/defines/lt_timer_types.h b/embedded/arch/generic/defines/lt_timer_types.h new file mode 100644 index 0000000..e7dc27c --- /dev/null +++ b/embedded/arch/generic/defines/lt_timer_types.h @@ -0,0 +1,19 @@ +#ifndef _LT_TIMER_TYPES_H +#define _LT_TIMER_TYPES_H + +//timers + +#ifdef SDCC +typedef unsigned char lt_ticks_t; +typedef char lt_tidiff_t; +typedef unsigned int lt_mstime_t; +typedef int lt_msdiff_t; +#define LT_TIMER_VAR_LOC DATA +#else +typedef unsigned int lt_ticks_t; +typedef int lt_tidiff_t; +typedef unsigned long lt_mstime_t; +typedef signed long lt_msdiff_t; +#endif + +#endif /* _LT_TIMER_TYPES_H */ diff --git a/embedded/board/Makefile b/embedded/board/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/board/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/board/Makefile.omk b/embedded/board/Makefile.omk new file mode 100644 index 0000000..ae8ebdc --- /dev/null +++ b/embedded/board/Makefile.omk @@ -0,0 +1,3 @@ +# -*- makefile -*- + +SUBDIRS = $(ARCH) diff --git a/embedded/board/arm/Makefile b/embedded/board/arm/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/board/arm/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/board/arm/Makefile.omk b/embedded/board/arm/Makefile.omk new file mode 100644 index 0000000..2ca7db1 --- /dev/null +++ b/embedded/board/arm/Makefile.omk @@ -0,0 +1,5 @@ +# -*- makefile -*- + +ifneq ($(wildcard $(SOURCES_DIR)/$(BOARD)),) +SUBDIRS = $(BOARD) +endif \ No newline at end of file diff --git a/embedded/board/arm/ul_usb1/Makefile b/embedded/board/arm/ul_usb1/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/board/arm/ul_usb1/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/board/arm/ul_usb1/Makefile.omk b/embedded/board/arm/ul_usb1/Makefile.omk new file mode 100644 index 0000000..dba8475 --- /dev/null +++ b/embedded/board/arm/ul_usb1/Makefile.omk @@ -0,0 +1,3 @@ +# -*- makefile -*- + +SUBDIRS = defines libs diff --git a/embedded/board/arm/ul_usb1/config/config.bell-keypad b/embedded/board/arm/ul_usb1/config/config.bell-keypad new file mode 100644 index 0000000..65b5279 --- /dev/null +++ b/embedded/board/arm/ul_usb1/config/config.bell-keypad @@ -0,0 +1,51 @@ +# -*- makefile -*- + +ARCH=arm +MACH=lpc21xx +BOARD=ul_usb1 +CONFIG_BOARD_VARIANT=hisc-keypad + +CONFIG_APP_HISC_BELL_KEYPAD=y +CONFIG_OC_UL_DRV_SYSLESS=y +CONFIG_OC_UL_DRV_U450_TMELATE=y +CONFIG_ULAN_DY=y +CONFIG_ULOI_LT=y +CONFIG_KEYVAL=y +CONFIG_KBD=y + +#CONFIG_STDIO_COM_PORT=0 + +CROSS_COMPILE = arm-elf- +TARGET_ARCH = -mcpu=arm7tdmi + +# Set default C flags. If theese are set elsewhere (e.g. on a command +# line), these default flags are not used. +DEBUG ?= -g +OPTIMIZE ?= -O2 + +LPC_BAUD = 38400 +TOLPC = tolpc --baud $(LPC_BAUD) --sdev /dev/ttyS0 +LOAD_CMD-ramisp = $(TOLPC) -v -q 7372 -L -f +LOAD_CMD-boot = lpc21isp -bin /dev/ttyS0 $(LPC_BAUD) 12000 + +# This selects linker script +LD_SCRIPT=lpc2148 +#DEFAULT_LD_SCRIPT_VARIANT=boot + +#OUTPUT_FORMATS = bin hex srec + +OUTPUT_FORMATS = bin + +PROG_BASE=0x20000 +PROG_SIZE=0x20000 + +UL_SENDHEX ?= ul_sendhex +MOD ?= 62 + +LOAD_CMD-app = \ + $(UL_SENDHEX) -m $(MOD) -r -o 0 ; \ + $(UL_SENDHEX) -m $(MOD) -o 0 -t 0x101 -s $(PROG_BASE) -l $(PROG_SIZE) -e; \ + $(UL_SENDHEX) -m $(MOD) -o 0 -t 0x101 -b 256 -s $(PROG_BASE) -f binary + +RUN_CMD-app = \ + $(UL_SENDHEX) -m $(MOD) -r diff --git a/embedded/board/arm/ul_usb1/config/config.garage-gate b/embedded/board/arm/ul_usb1/config/config.garage-gate new file mode 100644 index 0000000..2949391 --- /dev/null +++ b/embedded/board/arm/ul_usb1/config/config.garage-gate @@ -0,0 +1,50 @@ +# -*- makefile -*- + +ARCH=arm +MACH=lpc21xx +BOARD=ul_usb1 +CONFIG_BOARD_VARIANT=hisc-garage-gate + +CONFIG_APP_HISC_GARAGE_GATE=y +CONFIG_OC_UL_DRV_SYSLESS=y +CONFIG_OC_UL_DRV_U450_TMELATE=y +CONFIG_ULAN_DY=y +CONFIG_ULOI_LT=y +CONFIG_KEYVAL=y + +#CONFIG_STDIO_COM_PORT=0 + +CROSS_COMPILE = arm-elf- +TARGET_ARCH = -mcpu=arm7tdmi + +# Set default C flags. If theese are set elsewhere (e.g. on a command +# line), these default flags are not used. +DEBUG ?= -g +OPTIMIZE ?= -O2 + +LPC_BAUD = 38400 +TOLPC = tolpc --baud $(LPC_BAUD) --sdev /dev/ttyS0 +LOAD_CMD-ramisp = $(TOLPC) -v -q 7372 -L -f +LOAD_CMD-boot = lpc21isp -bin /dev/ttyS0 $(LPC_BAUD) 12000 + +# This selects linker script +LD_SCRIPT=lpc2148 +#DEFAULT_LD_SCRIPT_VARIANT=boot + +#OUTPUT_FORMATS = bin hex srec + +OUTPUT_FORMATS = bin + +PROG_BASE=0x20000 +PROG_SIZE=0x20000 + +UL_SENDHEX ?= ul_sendhex +MOD ?= 62 + +LOAD_CMD-app = \ + $(UL_SENDHEX) -m $(MOD) -r -o 0 ; \ + $(UL_SENDHEX) -m $(MOD) -o 0 -t 0x101 -s $(PROG_BASE) -l $(PROG_SIZE) -e; \ + $(UL_SENDHEX) -m $(MOD) -o 0 -t 0x101 -b 256 -s $(PROG_BASE) -f binary + +RUN_CMD-app = \ + $(UL_SENDHEX) -m $(MOD) -r diff --git a/embedded/board/arm/ul_usb1/config/config.ha-switch b/embedded/board/arm/ul_usb1/config/config.ha-switch new file mode 100644 index 0000000..4ed1f04 --- /dev/null +++ b/embedded/board/arm/ul_usb1/config/config.ha-switch @@ -0,0 +1,48 @@ +# -*- makefile -*- + +ARCH=arm +MACH=lpc21xx +BOARD=ul_usb1 +CONFIG_BOARD_VARIANT=ha-switch + +CONFIG_HA_LIGHT_SWITCH=y + +CONFIG_OC_UL_DRV_SYSLESS=y +CONFIG_OC_UL_DRV_U450_VARPINS=y +CONFIG_OC_UL_DRV_U450_VARPINS_DIRNEG=y +CONFIG_OC_UL_DRV_U450_LOOPBACK=y +CONFIG_ULAN_DY=y +CONFIG_ULOI_LT=y +CONFIG_KEYVAL=y + +# CONFIG_STDIO_COM_PORT=0 + +CROSS_COMPILE = arm-elf- +TARGET_ARCH = -mcpu=arm7tdmi + +# Set default C flags. If theese are set elsewhere (e.g. on a command +# line), these default flags are not used. +DEBUG ?= -g +OPTIMIZE ?= -O2 + +# This selects linker script +LD_SCRIPT=lpc2105 +#DEFAULT_LD_SCRIPT_VARIANT=boot + +#OUTPUT_FORMATS = bin hex srec + +OUTPUT_FORMATS = bin + +PROG_BASE=0xA000 +PROG_SIZE=0x10000 + +UL_SENDHEX ?= ul_sendhex +MOD ?= 62 + +LOAD_CMD-app = \ + $(UL_SENDHEX) -m $(MOD) -r -o 0 ; \ + $(UL_SENDHEX) -m $(MOD) -o 0 -t 0x101 -s $(PROG_BASE) -l $(PROG_SIZE) -e; \ + $(UL_SENDHEX) -m $(MOD) -o 0 -t 0x101 -b 512 -s $(PROG_BASE) -f binary + +RUN_CMD-app = \ + $(UL_SENDHEX) -m $(MOD) -r diff --git a/embedded/board/arm/ul_usb1/config/config.ha-switch-ulboot b/embedded/board/arm/ul_usb1/config/config.ha-switch-ulboot new file mode 100644 index 0000000..bda5aa0 --- /dev/null +++ b/embedded/board/arm/ul_usb1/config/config.ha-switch-ulboot @@ -0,0 +1,41 @@ +# -*- makefile -*- + +ARCH=arm +MACH=lpc21xx +BOARD=ul_usb1 +CONFIG_BOARD_VARIANT=ha-switch + +CONFIG_ULBOOT=y + +CONFIG_OC_UL_DRV_SYSLESS=y +CONFIG_OC_UL_DRV_U450_VARPINS=y +CONFIG_OC_UL_DRV_U450_VARPINS_DIRNEG=y +CONFIG_OC_UL_DRV_U450_LOOPBACK=y +CONFIG_KEYVAL=y +CONFIG_ULAN_DY=y + +# CONFIG_STDIO_COM_PORT=0 + +CROSS_COMPILE = arm-elf- +TARGET_ARCH = -mcpu=arm7tdmi + +# Set default C flags. If theese are set elsewhere (e.g. on a command +# line), these default flags are not used. +DEBUG ?= -g +OPTIMIZE ?= -O2 + +# This selects linker script +LD_SCRIPT=lpc2105 +#DEFAULT_LD_SCRIPT_VARIANT=boot + +#OUTPUT_FORMATS = bin hex srec + +OUTPUT_FORMATS = hex bin + +TOHIT=lpc21isp +DEV=/dev/ttyUSB0 +CPU_SYS_KHZ=14745 +BAUD=57600 + +LOAD_CMD-boot = \ + $(TOHIT) $(DEV) $(BAUD) $(CPU_SYS_KHZ) diff --git a/embedded/board/arm/ul_usb1/config/config.u2uv2 b/embedded/board/arm/ul_usb1/config/config.u2uv2 new file mode 100644 index 0000000..6deb39e --- /dev/null +++ b/embedded/board/arm/ul_usb1/config/config.u2uv2 @@ -0,0 +1,58 @@ +# -*- makefile -*- + +ARCH=arm +MACH=lpc21xx +BOARD=ul_usb1 + +CONFIG_OC_UL_DRV_SYSLESS=y +CONFIG_OC_UL_DRV_U450_VARPINS=y +CONFIG_OC_UL_DRV_U450_VARPINS_MSRSWAP=y +CONFIG_OC_UL_DRV_U450_TMELATE=y +#CONFIG_ULAN_DY=y +#CONFIG_ULOI_LT=y +#CONFIG_ULOI_GENOBJIDTAG=y +#CONFIG_KEYVAL=y +CONFIG_USB_BASE=y +CONFIG_USB_LPCUSB=y +CONFIG_APP_U2U_V2=y + +#CONFIG_APP_TEST_LPC=y +#CONFIG_APP_ULAD31=y +#CONFIG_ULBOOT=y + +CONFIG_STDIO_COM_PORT=0 + +CROSS_COMPILE = arm-elf- +TARGET_ARCH = -mcpu=arm7tdmi + +# Set default C flags. If theese are set elsewhere (e.g. on a command +# line), these default flags are not used. +DEBUG ?= -g +OPTIMIZE ?= -O2 + +LPC_BAUD = 38400 +TOLPC = tolpc --baud $(LPC_BAUD) --sdev /dev/ttyS0 +LOAD_CMD-ramisp = $(TOLPC) -v -q 7372 -L -f +LOAD_CMD-boot = lpc21isp -bin /dev/ttyUSB0 $(LPC_BAUD) 12000 + +# This selects linker script +LD_SCRIPT=lpc2148 +#DEFAULT_LD_SCRIPT_VARIANT=boot + +#OUTPUT_FORMATS = bin hex srec + +OUTPUT_FORMATS = bin + +PROG_BASE=0x20000 +PROG_SIZE=0x20000 + +UL_SENDHEX ?= ul_sendhex +MOD ?= 3 + +LOAD_CMD-app = \ + $(UL_SENDHEX) -m $(MOD) -r -o 0 ; \ + $(UL_SENDHEX) -m $(MOD) -o 0 -t 0x101 -s $(PROG_BASE) -l $(PROG_SIZE) -e; \ + $(UL_SENDHEX) -m $(MOD) -o 0 -t 0x101 -b 256 -s $(PROG_BASE) -f binary + +RUN_CMD-app = \ + $(UL_SENDHEX) -m $(MOD) -g $(PROG_BASE) diff --git a/embedded/board/arm/ul_usb1/config/config.ul_usb1 b/embedded/board/arm/ul_usb1/config/config.ul_usb1 new file mode 100644 index 0000000..e0eccad --- /dev/null +++ b/embedded/board/arm/ul_usb1/config/config.ul_usb1 @@ -0,0 +1,55 @@ +# -*- makefile -*- + +ARCH=arm +MACH=lpc21xx +BOARD=ul_usb1 + +#CONFIG_BOARD_VARIANT=aa_rch +CONFIG_OC_UL_DRV_SYSLESS=y +CONFIG_OC_UL_DRV_U450_VARPINS=y +CONFIG_OC_UL_DRV_U450_VARPINS_MSRSWAP=y +CONFIG_OC_UL_DRV_U450_TMELATE=y +CONFIG_ULAN_DY=y +CONFIG_ULOI_LT=y +CONFIG_ULOI_GENOBJIDTAG=y +CONFIG_KEYVAL=y +CONFIG_APP_TEST_LPC=y +CONFIG_APP_ULAD31=y +CONFIG_ULBOOT=y + +CONFIG_STDIO_COM_PORT=0 + +CROSS_COMPILE = arm-elf- +TARGET_ARCH = -mcpu=arm7tdmi + +# Set default C flags. If theese are set elsewhere (e.g. on a command +# line), these default flags are not used. +DEBUG ?= -g +OPTIMIZE ?= -O2 + +LPC_BAUD = 38400 +TOLPC = tolpc --baud $(LPC_BAUD) --sdev /dev/ttyS0 +LOAD_CMD-ramisp = $(TOLPC) -v -q 7372 -L -f +LOAD_CMD-boot = lpc21isp -bin /dev/ttyS0 $(LPC_BAUD) 12000 + +# This selects linker script +LD_SCRIPT=lpc2148 +#DEFAULT_LD_SCRIPT_VARIANT=boot + +#OUTPUT_FORMATS = bin hex srec + +OUTPUT_FORMATS = bin + +PROG_BASE=0x20000 +PROG_SIZE=0x20000 + +UL_SENDHEX ?= ul_sendhex +MOD ?= 3 + +LOAD_CMD-app = \ + $(UL_SENDHEX) -m $(MOD) -r -o 0 ; \ + $(UL_SENDHEX) -m $(MOD) -o 0 -t 0x101 -s $(PROG_BASE) -l $(PROG_SIZE) -e; \ + $(UL_SENDHEX) -m $(MOD) -o 0 -t 0x101 -b 256 -s $(PROG_BASE) -f binary + +RUN_CMD-app = \ + $(UL_SENDHEX) -m $(MOD) -g $(PROG_BASE) diff --git a/embedded/board/arm/ul_usb1/config/config.ulboot b/embedded/board/arm/ul_usb1/config/config.ulboot new file mode 100644 index 0000000..52b0004 --- /dev/null +++ b/embedded/board/arm/ul_usb1/config/config.ulboot @@ -0,0 +1,40 @@ +# -*- makefile -*- + +ARCH=arm +MACH=lpc21xx +BOARD=ul_usb1 + +CONFIG_ULBOOT=y + +CONFIG_OC_UL_DRV_SYSLESS=y +CONFIG_OC_UL_DRV_U450_VARPINS=y +CONFIG_OC_UL_DRV_U450_VARPINS_MSRSWAP=y +CONFIG_OC_UL_DRV_U450_TMELATE=y +CONFIG_KEYVAL=y +CONFIG_ULAN_DY=y + +# CONFIG_STDIO_COM_PORT=0 + +CROSS_COMPILE = arm-elf- +TARGET_ARCH = -mcpu=arm7tdmi + +# Set default C flags. If theese are set elsewhere (e.g. on a command +# line), these default flags are not used. +DEBUG ?= -g +OPTIMIZE ?= -O2 + +# This selects linker script +LD_SCRIPT=lpc2148 +#DEFAULT_LD_SCRIPT_VARIANT=boot + +#OUTPUT_FORMATS = bin hex srec + +OUTPUT_FORMATS = hex bin + +TOHIT=lpc21isp +DEV=/dev/ttyUSB0 +CPU_SYS_KHZ=12000 +BAUD=38400 + +LOAD_CMD-boot = \ + $(TOHIT) $(DEV) $(BAUD) $(CPU_SYS_KHZ) diff --git a/embedded/board/arm/ul_usb1/defines/Makefile b/embedded/board/arm/ul_usb1/defines/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/board/arm/ul_usb1/defines/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/board/arm/ul_usb1/defines/Makefile.omk b/embedded/board/arm/ul_usb1/defines/Makefile.omk new file mode 100644 index 0000000..4ed4e2d --- /dev/null +++ b/embedded/board/arm/ul_usb1/defines/Makefile.omk @@ -0,0 +1,15 @@ +# -*- makefile -*- + +default_CONFIG = CONFIG_BOARD_VARIANT=x + +#include_HEADERS = $(notdir $(wildcard $(SOURCES_DIR)/*.h)) + +ifneq ($(CONFIG_BOARD_VARIANT),) + +renamed_include_HEADERS = system_def-$(CONFIG_BOARD_VARIANT).h->system_def.h + +else + +include_HEADERS = system_def.h + +endif # CONFIG_BOARD_VARIANT diff --git a/embedded/board/arm/ul_usb1/defines/system_def-ha-switch.h b/embedded/board/arm/ul_usb1/defines/system_def-ha-switch.h new file mode 100644 index 0000000..80c3ba3 --- /dev/null +++ b/embedded/board/arm/ul_usb1/defines/system_def-ha-switch.h @@ -0,0 +1,191 @@ +/******************************************************************* + Components for embedded applications builded for + laboratory and medical instruments firmware + + system_def.h - common cover for definition of hardware adresses, + registers, timing and other hardware dependant + parts of embedded hardware + + Copyright (C) 2001 by Pavel Pisa pisa@cmp.felk.cvut.cz + (C) 2002 by PiKRON Ltd. http://www.pikron.com + + *******************************************************************/ + +#ifndef _SYSTEM_DEF_H_ +#define _SYSTEM_DEF_H_ + +#include +#include +#include +#include + +#ifndef NULL +#define NULL 0 +#endif + +#define WITH_SFI_SEL + +#define VER_CODE(major,minor,patch) (major*0x10000+minor*0x100+patch) +/* Software version */ +#define SW_VER_ID "UL_HA_SWITCH" +#define SW_VER_MAJOR 0 +#define SW_VER_MINOR 2 +#define SW_VER_PATCH 0 +#define SW_VER_CODE VER_CODE(SW_VER_MAJOR,SW_VER_MINOR,SW_VER_PATCH) +/* Hardware version */ +#define HW_VER_ID "UL_HA_SWITCH" +#define HW_VER_MAJOR 1 +#define HW_VER_MINOR 0 +#define HW_VER_PATCH 0 +#define HW_VER_CODE VER_CODE(HW_VER_MAJOR,HW_VER_MINOR,HW_VER_PATCH) +/* Version of mechanical */ +#define MECH_VER_ID "UL_HA_SWITCH" +#define MECH_VER_MAJOR 0 +#define MECH_VER_MINOR 0 +#define MECH_VER_PATCH 0 +#define MECH_VER_CODE VER_CODE(MECH_VER_MAJOR,MECH_VER_MINOR,MECH_VER_PATCH) + + +// PLL setup values are computed within the LPC include file +// It relies upon the following defines +#define FOSC (14745600) // Master Oscillator Freq. +#define PLL_MUL (4) // PLL Multiplier +#define CCLK (FOSC * PLL_MUL) // CPU Clock Freq. + +// Pheripheral Bus Speed Divider +#define PBSD 1 // MUST BE 1, 2, or 4 +#define PCLK (CCLK / PBSD) // Pheripheal Bus Clock Freq. + +#define SYS_TIMER_HZ 1000 + +#ifndef BIT +#define BIT(n) (1 << (n)) +#endif + +// Port Bit Definitions & Macros: Description - initial conditions +#define TXD0_BIT BIT(0) // used by UART0 +#define RXD0_BIT BIT(1) // used by UART0 +#define P0_02_UNUSED_BIT BIT(2) // P0.02 unused - low output +#define OUT2_BIT BIT(3) // P0.03 unused - low output +#define P0_04_UNUSED_BIT BIT(4) // P0.04 unused - low output +#define OUT1_BIT BIT(5) // P0.05 unused - low output +#define IR_BIT BIT(6) // P0.06 unused - low output +#define SPK_P_BIT BIT(7) // P0.07 unused - low output +#define TXD1_BIT BIT(8) // used by UART1 +#define RXD1_BIT BIT(9) // used by UART1 +#define RTS1_BIT BIT(10) // used by UART1 +#define CTS1_BIT BIT(11) // used by UART1 +#define DSR1_BIT BIT(12) // used by UART1 +#define LED3_BIT BIT(13) // used by LED +#define BOOT_BIT BIT(14) // SWITCH +#define IN1_BIT BIT(15) // P0.15 unused - low output +#define IN2_BIT BIT(16) // P0.16 unused - low output +#define P0_17_UNUSED_BIT BIT(17) // P0.17 unused - low output +#define P0_18_UNUSED_BIT BIT(18) // P0.18 unused - low output +#define LED4_BIT BIT(19) // used by LED +#define LED1_BIT BIT(20) // used by LED +#define LED2_BIT BIT(21) // used by LED +#define USENSE_BIT BIT(22) // P0.22 unused - low output +#define SW1_BIT BIT(23) // P0.23 unused - low output +#define SW3_BIT BIT(24) // P0.24 unused - low output +#define SW2_BIT BIT(25) // P0.25 unused - low output +#define SW4_BIT BIT(26) // P0.26 unused - low output +#define P0_27_UNUSED_BIT BIT(27) // P0.27 unused - low output +#define P0_28_UNUSED_BIT BIT(28) // P0.28 unused - low output +#define P0_29_UNUSED_BIT BIT(29) // P0.29 unused - low output +#define LED5_BIT BIT(30) // P0.30 unused - low output +#define P0_31_UNUSED_BIT BIT(31) // P0.31 unused - low output + + +#define P0IO_INPUT_BITS (uint32_t) ( \ + BOOT_BIT | \ + IR_BIT | \ + IN1_BIT | \ + IN2_BIT | \ + SW1_BIT | \ + SW2_BIT | \ + SW3_BIT | \ + SW4_BIT | \ + UNSENSE_BIT | \ + 0 ) + +#define P0IO_ZERO_BITS (uint32_t) ( \ + SPK_P_BIT | \ + OUT1_BIT | \ + OUT2_BIT | \ + LED1_BIT | \ + LED2_BIT | \ + LED3_BIT | \ + LED4_BIT | \ + LED5_BIT | \ + P0_02_UNUSED_BIT | \ + P0_04_UNUSED_BIT | \ + P0_17_UNUSED_BIT | \ + P0_18_UNUSED_BIT | \ + P0_27_UNUSED_BIT | \ + P0_28_UNUSED_BIT | \ + P0_29_UNUSED_BIT | \ + P0_31_UNUSED_BIT | \ + 0 ) + + + +#define P0IO_ONE_BITS (uint32_t) ( \ + BOOT_BIT | \ + 0 ) + +#define P0IO_OUTPUT_BITS (uint32_t) ( \ + P0IO_ZERO_BITS | \ + P0IO_ONE_BITS ) + + +/***************************************************************************/ +/* io functions */ +#define LED_GP LED1_BIT /* GENREAL PURPOSE LED */ +#define LED_ERR LED2_BIT + +/***************************************************************************/ +/* io functions */ +#define IN_PORT IO0 +#define OUT_PORT IO0 +#define LED_PORT IO0 + +#define CREATE_PORT_NAME_PIN(port) port##PIN +#define CREATE_PORT_NAME_CLR(port) port##CLR +#define CREATE_PORT_NAME_SET(port) port##SET + +#define GET_IN_PIN(port,in) ((CREATE_PORT_NAME_PIN(port) & in)?1:0) +#define SET_OUT_PIN(port,out) (CREATE_PORT_NAME_SET(port)=out) +#define CLR_OUT_PIN(port,out) (CREATE_PORT_NAME_CLR(port)=out) + +/***************************************************************************/ +/* watchdog */ +//#define WATCHDOG_ENABLED +#define WATCHDOG_TIMEOUT_MS 1000 + +/***************************************************************************/ +/* uLan configuration */ +#ifdef UL_LOG_ENABLE + #undef UL_LOG_ENABLE +#endif + +#ifdef ULD_DEFAULT_BUFFER_SIZE + #undef ULD_DEFAULT_BUFFER_SIZE + #define ULD_DEFAULT_BUFFER_SIZE 0x0400 +#endif + +#define UL_DRV_SYSLESS_PORT 0xE0010000 +#define UL_DRV_SYSLESS_BAUD 19200 +#define UL_DRV_SYSLESS_IRQ HAL_INTERRUPT_UART1 +#define UL_DRV_SYSLESS_MY_ADR_DEFAULT 1 + + +#define watchdog_feed lpc_watchdog_feed +#define kvpb_erase lpcisp_kvpb_erase +#define kvpb_copy lpcisp_kvpb_copy +#define kvpb_flush lpcisp_kvpb_flush +#define KVPB_DEFAULT_FLAGS KVPB_DESC_DOUBLE|KVPB_DESC_CHUNKWO + +#define HAL_ARM_LPC2XXX_EXTINT_ERRATA + +#endif /* _SYSTEM_DEF_H_ */ diff --git a/embedded/board/arm/ul_usb1/defines/system_def-hisc-garage-gate.h b/embedded/board/arm/ul_usb1/defines/system_def-hisc-garage-gate.h new file mode 100644 index 0000000..250d27b --- /dev/null +++ b/embedded/board/arm/ul_usb1/defines/system_def-hisc-garage-gate.h @@ -0,0 +1,239 @@ +/******************************************************************* + Components for embedded applications builded for + laboratory and medical instruments firmware + + system_def.h - common cover for definition of hardware adresses, + registers, timing and other hardware dependant + parts of embedded hardware + + Copyright (C) 2001 by Pavel Pisa pisa@cmp.felk.cvut.cz + (C) 2002 by PiKRON Ltd. http://www.pikron.com + + *******************************************************************/ + +#ifndef _SYSTEM_DEF_H_ +#define _SYSTEM_DEF_H_ + +#include +#include +#include +#include + +#ifndef NULL +#define NULL 0 +#endif + +#define WITH_SFI_SEL + +#define VER_CODE(major,minor,patch) (major*0x10000+minor*0x100+patch) +/* Software version */ +#define SW_VER_ID "UL_USB" +#define SW_VER_MAJOR 0 +#define SW_VER_MINOR 2 +#define SW_VER_PATCH 0 +#define SW_VER_CODE VER_CODE(SW_VER_MAJOR,SW_VER_MINOR,SW_VER_PATCH) +/* Hardware version */ +#define HW_VER_ID "UL_USB" +#define HW_VER_MAJOR 1 +#define HW_VER_MINOR 0 +#define HW_VER_PATCH 0 +#define HW_VER_CODE VER_CODE(HW_VER_MAJOR,HW_VER_MINOR,HW_VER_PATCH) +/* Version of mechanical */ +#define MECH_VER_ID "UL_USB" +#define MECH_VER_MAJOR 0 +#define MECH_VER_MINOR 0 +#define MECH_VER_PATCH 0 +#define MECH_VER_CODE VER_CODE(MECH_VER_MAJOR,MECH_VER_MINOR,MECH_VER_PATCH) + + +// PLL setup values are computed within the LPC include file +// It relies upon the following defines +#define FOSC (14745600) // Master Oscillator Freq. +#define PLL_MUL (4) // PLL Multiplier +#define CCLK (FOSC * PLL_MUL) // CPU Clock Freq. + +// Pheripheral Bus Speed Divider +#define PBSD 1 // MUST BE 1, 2, or 4 +#define PCLK (CCLK / PBSD) // Pheripheal Bus Clock Freq. + +#define SYS_TIMER_HZ 1000 + +#ifndef BIT +#define BIT(n) (1 << (n)) +#endif + +// Port Bit Definitions & Macros: Description - initial conditions +#define TXD0_BIT BIT(0) // used by UART0 +#define RXD0_BIT BIT(1) // used by UART0 +#define P0_02_UNUSED_BIT BIT(2) // P0.02 unused - low output +#define P0_03_UNUSED_BIT BIT(3) // P0.03 unused - low output +#define P0_04_UNUSED_BIT BIT(4) // P0.04 unused - low output +#define P0_05_UNUSED_BIT BIT(5) // P0.05 unused - low output +#define P0_06_UNUSED_BIT BIT(6) // P0.06 unused - low output +#define P0_07_UNUSED_BIT BIT(7) // P0.07 unused - low output +#define TXD1_BIT BIT(8) // used by UART1 +#define RXD1_BIT BIT(9) // used by UART1 +#define RTS1_BIT BIT(10) // used by UART1 +#define CTS1_BIT BIT(11) // used by UART1 +#define DSR1_BIT BIT(12) // used by UART1 +#define P0_13_UNUSED_BIT BIT(13) // P0.13 unused - low output +#define BOOT_BIT BIT(14) // SWITCH +#define P0_15_UNUSED_BIT BIT(15) // P0.15 unused - low output +#define P0_16_UNUSED_BIT BIT(16) // P0.16 unused - low output +#define P0_17_UNUSED_BIT BIT(17) // P0.17 unused - low output +#define P0_18_UNUSED_BIT BIT(18) // P0.18 unused - low output +#define P0_19_UNUSED_BIT BIT(19) // P0.19 unused - low output +#define P0_20_UNUSED_BIT BIT(20) // P0.20 unused - low output +#define LED1_BIT BIT(21) // used by LED +#define LED2_BIT BIT(22) // used by LED +#define P0_23_UNUSED_BIT BIT(23) // P0.23 unused - low output +#define P0_24_UNUSED_BIT BIT(24) // P0.24 unused - low output +#define P0_25_UNUSED_BIT BIT(25) // P0.25 unused - low output +#define P0_26_UNUSED_BIT BIT(26) // P0.26 unused - low output +#define P0_27_UNUSED_BIT BIT(27) // P0.27 unused - low output +#define P0_28_UNUSED_BIT BIT(28) // P0.28 unused - low output +#define P0_29_UNUSED_BIT BIT(29) // P0.29 unused - low output +#define P0_30_UNUSED_BIT BIT(30) // P0.30 unused - low output +#define P0_31_UNUSED_BIT BIT(31) // P0.31 unused - low output + + +#define P1_16_UNUSED_BIT BIT(16) // P1.16 unused - low output +#define P1_17_UNUSED_BIT BIT(17) // P1.17 unused - low output +#define P1_18_UNUSED_BIT BIT(18) // P1.18 unused - low output +#define P1_19_UNUSED_BIT BIT(19) // P1.19 unused - low output +#define P1_20_UNUSED_BIT BIT(20) // P1.20 unused - low output +#define P1_21_UNUSED_BIT BIT(21) // P1.21 unused - low output +#define P1_22_UNUSED_BIT BIT(22) // P1.22 unused - low output +#define P1_23_UNUSED_BIT BIT(23) // P1.23 unused - low output +#define P1_24_UNUSED_BIT BIT(24) // P1.24 unused - low output +#define P1_25_UNUSED_BIT BIT(25) // P1.25 unused - low output +#define P1_26_GATE BIT(26) // used by JTAG +#define P1_27_UNUSED_BIT BIT(27) // used by JTAG +#define P1_28_UNUSED_BIT BIT(28) // used by JTAG +#define P1_29_UNUSED_BIT BIT(29) // used by JTAG +#define P1_30_UNUSED_BIT BIT(30) // used by JTAG +#define P1_31_UNUSED_BIT BIT(31) // used by JTAG + +#define P0IO_INPUT_BITS (uint32_t) ( \ + BOOT_BIT | \ + 0 ) + +#define P1IO_INPUT_BITS (uint32_t) ( \ + 0 ) + +#define P0IO_ZERO_BITS (uint32_t) ( \ + P0_02_UNUSED_BIT | \ + P0_03_UNUSED_BIT | \ + P0_04_UNUSED_BIT | \ + P0_05_UNUSED_BIT | \ + P0_06_UNUSED_BIT | \ + P0_07_UNUSED_BIT | \ + P0_13_UNUSED_BIT | \ + P0_15_UNUSED_BIT | \ + P0_16_UNUSED_BIT | \ + P0_17_UNUSED_BIT | \ + P0_18_UNUSED_BIT | \ + P0_19_UNUSED_BIT | \ + P0_20_UNUSED_BIT | \ + P0_23_UNUSED_BIT | \ + P0_24_UNUSED_BIT | \ + P0_25_UNUSED_BIT | \ + P0_26_UNUSED_BIT | \ + P0_27_UNUSED_BIT | \ + P0_28_UNUSED_BIT | \ + P0_29_UNUSED_BIT | \ + P0_30_UNUSED_BIT | \ + P0_31_UNUSED_BIT | \ + 0 ) + +#define P1IO_ZERO_BITS (uint32_t) ( \ + P1_16_UNUSED_BIT | \ + P1_17_UNUSED_BIT | \ + P1_18_UNUSED_BIT | \ + P1_19_UNUSED_BIT | \ + P1_20_UNUSED_BIT | \ + P1_21_UNUSED_BIT | \ + P1_22_UNUSED_BIT | \ + P1_23_UNUSED_BIT | \ + P1_24_UNUSED_BIT | \ + P1_25_UNUSED_BIT | \ + P1_27_UNUSED_BIT | \ + P1_28_UNUSED_BIT | \ + P1_29_UNUSED_BIT | \ + P1_30_UNUSED_BIT | \ + P1_31_UNUSED_BIT | \ + 0 ) + + +#define P0IO_ONE_BITS (uint32_t) ( \ + LED1_BIT | \ + BOOT_BIT | \ + LED2_BIT | \ + 0 ) + +#define P1IO_ONE_BITS (uint32_t) ( \ + P1_26_GATE | \ + 0 ) + +#define P0IO_OUTPUT_BITS (uint32_t) ( \ + P0IO_ZERO_BITS | \ + P0IO_ONE_BITS ) + +#define P1IO_OUTPUT_BITS (uint32_t) ( \ + P1IO_ZERO_BITS | \ + P1IO_ONE_BITS ) + + +/***************************************************************************/ +/* io functions */ +#define LED_GP LED1_BIT /* GENREAL PURPOSE LED */ +#define LED_ERR LED2_BIT + +#define LED_YELLOW LED1_BIT +#define LED_RED LED2_BIT + +/***************************************************************************/ +/* io functions */ +#define KBD_PORT IO1 +#define IN_PORT IO0 +#define LED_PORT IO0 +#define OUT_PORT IO1 + +#define CREATE_PORT_NAME_PIN(port) port##PIN +#define CREATE_PORT_NAME_CLR(port) port##CLR +#define CREATE_PORT_NAME_SET(port) port##SET + +#define GET_IN_PIN(port,in) ((CREATE_PORT_NAME_PIN(port) & in)?1:0) +#define SET_OUT_PIN(port,out) (CREATE_PORT_NAME_SET(port)=out) +#define CLR_OUT_PIN(port,out) (CREATE_PORT_NAME_CLR(port)=out) + +/***************************************************************************/ +/* watchdog */ +#define WATCHDOG_ENABLED +#define WATCHDOG_TIMEOUT_MS 1000 + +/***************************************************************************/ +/* uLan configuration */ +#ifdef UL_LOG_ENABLE + #undef UL_LOG_ENABLE +#endif + +#ifdef ULD_DEFAULT_BUFFER_SIZE + #undef ULD_DEFAULT_BUFFER_SIZE + #define ULD_DEFAULT_BUFFER_SIZE 0x0800 +#endif + +#define UL_DRV_SYSLESS_PORT 0xE0010000 +#define UL_DRV_SYSLESS_BAUD 19200 +#define UL_DRV_SYSLESS_IRQ HAL_INTERRUPT_UART1 +#define UL_DRV_SYSLESS_MY_ADR_DEFAULT 1 + +#define watchdog_feed lpc_watchdog_feed +#define kvpb_erase lpcisp_kvpb_erase +#define kvpb_copy lpcisp_kvpb_copy +#define kvpb_flush lpcisp_kvpb_flush +#define KVPB_DEFAULT_FLAGS KVPB_DESC_DOUBLE|KVPB_DESC_CHUNKWO + +#define HAL_ARM_LPC2XXX_EXTINT_ERRATA + +#endif /* _SYSTEM_DEF_H_ */ diff --git a/embedded/board/arm/ul_usb1/defines/system_def-hisc-keypad.h b/embedded/board/arm/ul_usb1/defines/system_def-hisc-keypad.h new file mode 100644 index 0000000..09a90c5 --- /dev/null +++ b/embedded/board/arm/ul_usb1/defines/system_def-hisc-keypad.h @@ -0,0 +1,276 @@ +/******************************************************************* + Components for embedded applications builded for + laboratory and medical instruments firmware + + system_def.h - common cover for definition of hardware adresses, + registers, timing and other hardware dependant + parts of embedded hardware + + Copyright (C) 2001 by Pavel Pisa pisa@cmp.felk.cvut.cz + (C) 2002 by PiKRON Ltd. http://www.pikron.com + + *******************************************************************/ + +#ifndef _SYSTEM_DEF_H_ +#define _SYSTEM_DEF_H_ + +#include +#include +#include +#include + +#ifndef NULL +#define NULL 0 +#endif + +#define WITH_SFI_SEL + +#define VER_CODE(major,minor,patch) (major*0x10000+minor*0x100+patch) +/* Software version */ +#define SW_VER_ID "UL_USB" +#define SW_VER_MAJOR 0 +#define SW_VER_MINOR 2 +#define SW_VER_PATCH 0 +#define SW_VER_CODE VER_CODE(SW_VER_MAJOR,SW_VER_MINOR,SW_VER_PATCH) +/* Hardware version */ +#define HW_VER_ID "UL_USB" +#define HW_VER_MAJOR 1 +#define HW_VER_MINOR 0 +#define HW_VER_PATCH 0 +#define HW_VER_CODE VER_CODE(HW_VER_MAJOR,HW_VER_MINOR,HW_VER_PATCH) +/* Version of mechanical */ +#define MECH_VER_ID "UL_USB" +#define MECH_VER_MAJOR 0 +#define MECH_VER_MINOR 0 +#define MECH_VER_PATCH 0 +#define MECH_VER_CODE VER_CODE(MECH_VER_MAJOR,MECH_VER_MINOR,MECH_VER_PATCH) + + +// PLL setup values are computed within the LPC include file +// It relies upon the following defines +#define FOSC (14745600) // Master Oscillator Freq. +#define PLL_MUL (4) // PLL Multiplier +#define CCLK (FOSC * PLL_MUL) // CPU Clock Freq. + +// Pheripheral Bus Speed Divider +#define PBSD 1 // MUST BE 1, 2, or 4 +#define PCLK (CCLK / PBSD) // Pheripheal Bus Clock Freq. + +#define SYS_TIMER_HZ 1000 + +#ifndef BIT +#define BIT(n) (1 << (n)) +#endif + +// Port Bit Definitions & Macros: Description - initial conditions +#define TXD0_BIT BIT(0) // used by UART0 +#define RXD0_BIT BIT(1) // used by UART0 +#define P0_02_UNUSED_BIT BIT(2) // P0.02 unused - low output +#define P0_03_UNUSED_BIT BIT(3) // P0.03 unused - low output +#define P0_04_UNUSED_BIT BIT(4) // P0.04 unused - low output +#define P0_05_UNUSED_BIT BIT(5) // P0.05 unused - low output +#define IP1_BIT BIT(6) // P0.06 unused - low output +#define IP2_BIT BIT(7) // P0.07 unused - low output +#define TXD1_BIT BIT(8) // used by UART1 +#define RXD1_BIT BIT(9) // used by UART1 +#define RTS1_BIT BIT(10) // used by UART1 +#define CTS1_BIT BIT(11) // used by UART1 +#define DSR1_BIT BIT(12) // used by UART1 +#define P0_13_UNUSED_BIT BIT(13) // P0.13 unused - low output +#define BOOT_BIT BIT(14) // SWITCH +#define P0_15_UNUSED_BIT BIT(15) // P0.15 unused - low output +#define P0_16_UNUSED_BIT BIT(16) // P0.16 unused - low output +#define P0_17_UNUSED_BIT BIT(17) // P0.17 unused - low output +#define P0_18_UNUSED_BIT BIT(18) // P0.18 unused - low output +#define P0_19_UNUSED_BIT BIT(19) // P0.19 unused - low output +#define P0_20_UNUSED_BIT BIT(20) // P0.20 unused - low output +#define LED1_BIT BIT(21) // used by LED +#define LED2_BIT BIT(22) // used by LED +#define P0_23_UNUSED_BIT BIT(23) // P0.23 unused - low output +#define P0_24_UNUSED_BIT BIT(24) // P0.24 unused - low output +#define P0_25_UNUSED_BIT BIT(25) // P0.25 unused - low output +#define P0_26_UNUSED_BIT BIT(26) // P0.26 unused - low output +#define P0_27_UNUSED_BIT BIT(27) // P0.27 unused - low output +#define P0_28_UNUSED_BIT BIT(28) // P0.28 unused - low output +#define P0_29_SOUND BIT(29) // P0.29 unused - low output +#define P0_30_LED_R BIT(30) // P0.30 unused - low output +#define P0_31_LED_G BIT(31) // P0.31 unused - low output + + +#define P1_16_RELE BIT(16) // P1.16 unused - low output +#define P1_17_UNUSED_BIT BIT(17) // P1.17 unused - low output +#define P1_18_UNUSED_BIT BIT(18) // P1.18 unused - low output +#define P1_19_UNUSED_BIT BIT(19) // P1.19 unused - low output +#define P1_20_UNUSED_BIT BIT(20) // P1.20 unused - low output +#define P1_21_UNUSED_BIT BIT(21) // P1.21 unused - low output +#define P1_22_UNUSED_BIT BIT(22) // P1.22 unused - low output +#define P1_23_UNUSED_BIT BIT(23) // P1.23 unused - low output +#define P1_24_COL369H BIT(24) // P1.24 unused - low output +#define P1_25_COL2580 BIT(25) // P1.25 unused - low output +#define P1_26_COL147S BIT(26) // used by JTAG +#define P1_27_ROW123 BIT(27) // used by JTAG +#define P1_28_ROW456 BIT(28) // used by JTAG +#define P1_29_ROW789 BIT(29) // used by JTAG +#define P1_30_ROWS0H BIT(30) // used by JTAG +#define P1_31_RING BIT(31) // used by JTAG + +#define P0IO_INPUT_BITS (uint32_t) ( \ + BOOT_BIT | \ + IP1_BIT | \ + IP2_BIT | \ + 0 ) + +#define P1IO_INPUT_BITS (uint32_t) ( \ + P1_27_ROW123 | \ + P1_28_ROW456 | \ + P1_29_ROW789 | \ + P1_30_ROWS0H | \ + P1_31_RING | \ + 0 ) + +#define P0IO_ZERO_BITS (uint32_t) ( \ + P0_02_UNUSED_BIT | \ + P0_03_UNUSED_BIT | \ + P0_04_UNUSED_BIT | \ + P0_05_UNUSED_BIT | \ + P0_13_UNUSED_BIT | \ + P0_15_UNUSED_BIT | \ + P0_16_UNUSED_BIT | \ + P0_17_UNUSED_BIT | \ + P0_18_UNUSED_BIT | \ + P0_19_UNUSED_BIT | \ + P0_20_UNUSED_BIT | \ + P0_23_UNUSED_BIT | \ + P0_24_UNUSED_BIT | \ + P0_25_UNUSED_BIT | \ + P0_26_UNUSED_BIT | \ + P0_27_UNUSED_BIT | \ + P0_28_UNUSED_BIT | \ + P0_29_SOUND | \ + 0 ) + +#define P1IO_ZERO_BITS (uint32_t) ( \ + P1_16_RELE | \ + P1_17_UNUSED_BIT | \ + P1_18_UNUSED_BIT | \ + P1_19_UNUSED_BIT | \ + P1_20_UNUSED_BIT | \ + P1_21_UNUSED_BIT | \ + P1_22_UNUSED_BIT | \ + P1_23_UNUSED_BIT | \ + 0 ) + + +#define P0IO_ONE_BITS (uint32_t) ( \ + LED1_BIT | \ + BOOT_BIT | \ + LED2_BIT | \ + P0_30_LED_R | \ + P0_31_LED_G | \ + 0 ) + +#define P1IO_ONE_BITS (uint32_t) ( \ + P1_24_COL369H | \ + P1_25_COL2580 | \ + P1_26_COL147S | \ + 0 ) + +#define P0IO_OUTPUT_BITS (uint32_t) ( \ + P0IO_ZERO_BITS | \ + P0IO_ONE_BITS ) + +#define P1IO_OUTPUT_BITS (uint32_t) ( \ + P1IO_ZERO_BITS | \ + P1IO_ONE_BITS ) + + +/***************************************************************************/ +/* io functions */ +#define LED_GP LED1_BIT /* GENREAL PURPOSE LED */ +#define LED_ERR LED2_BIT + +#define LED_YELLOW LED1_BIT +#define LED_RED LED2_BIT +#define LED_KEYPAD_RED P0_30_LED_R +#define LED_KEYPAD_YELLOW P0_31_LED_G + +/***************************************************************************/ +/* io functions */ +#define KBD_PORT IO1 +#define IN_PORT IO0 +#define LED_PORT IO0 +#define OUT_PORT IO1 + +#define CREATE_PORT_NAME_PIN(port) port##PIN +#define CREATE_PORT_NAME_CLR(port) port##CLR +#define CREATE_PORT_NAME_SET(port) port##SET + +#define GET_IN_PIN(port,in) ((CREATE_PORT_NAME_PIN(port) & in)?1:0) +#define SET_OUT_PIN(port,out) (CREATE_PORT_NAME_SET(port)=out) +#define CLR_OUT_PIN(port,out) (CREATE_PORT_NAME_CLR(port)=out) + +/***************************************************************************/ +/* watchdog */ +#define WATCHDOG_ENABLED +#define WATCHDOG_TIMEOUT_MS 1000 + +/***************************************************************************/ +/* uLan configuration */ +#ifdef UL_LOG_ENABLE + #undef UL_LOG_ENABLE +#endif + +#ifdef ULD_DEFAULT_BUFFER_SIZE + #undef ULD_DEFAULT_BUFFER_SIZE + #define ULD_DEFAULT_BUFFER_SIZE 0x0800 +#endif + +#define UL_DRV_SYSLESS_PORT 0xE0010000 +#define UL_DRV_SYSLESS_BAUD 19200 +#define UL_DRV_SYSLESS_IRQ HAL_INTERRUPT_UART1 +#define UL_DRV_SYSLESS_MY_ADR_DEFAULT 1 + +#define watchdog_feed lpc_watchdog_feed +#define kvpb_erase lpcisp_kvpb_erase +#define kvpb_copy lpcisp_kvpb_copy +#define kvpb_flush lpcisp_kvpb_flush +#define KVPB_DEFAULT_FLAGS KVPB_DESC_DOUBLE|KVPB_DESC_CHUNKWO + +#define HAL_ARM_LPC2XXX_EXTINT_ERRATA + +/***************************************************************************/ +/* kbd */ +#define KEY_TIMER sys_timer_ticks +#define KBDDEVICE void + +typedef unsigned short kbd_key_t; +typedef unsigned int kbd_keymod_t; +typedef long kbd_interval_t; +typedef unsigned short kbd_scan_code_t; + +#define KEY_DEFAULT_TIMES +#define KEY_PUSH_T 70 +#define KEY_RELEASE_T 50 +#define KEY_REPFIRST_T 60000 +#define KEY_REPNEXT_T 300 + +#define KBD_DR _reg_PTD_DR +#define KBD_SSR IO1PIN +#define KBD_DDIR _reg_PTD_DDIR +#define KBD_PUEN _reg_PTD_PUEN + +typedef unsigned long kbdisr_lock_level_t; +#define kbdisr_lock save_and_cli +#define kbdisr_unlock restore_flags + +#define KBD_SCAN_CNT 3 +#define KBD_SCAN_BIT0 24 +#define KBD_RET_CNT 5 +#define KBD_RET_BIT0 27 + +#define KBD_SCAN_MASK (((1< +#include +#include +#include + +#ifndef NULL +#define NULL 0 +#endif + +#define WITH_SFI_SEL + +#define VER_CODE(major,minor,patch) (major*0x10000+minor*0x100+patch) +/* Software version */ +#define SW_VER_ID "UL_USB" +#define SW_VER_MAJOR 0 +#define SW_VER_MINOR 2 +#define SW_VER_PATCH 0 +#define SW_VER_CODE VER_CODE(SW_VER_MAJOR,SW_VER_MINOR,SW_VER_PATCH) +/* Hardware version */ +#define HW_VER_ID "UL_USB" +#define HW_VER_MAJOR 1 +#define HW_VER_MINOR 0 +#define HW_VER_PATCH 0 +#define HW_VER_CODE VER_CODE(HW_VER_MAJOR,HW_VER_MINOR,HW_VER_PATCH) +/* Version of mechanical */ +#define MECH_VER_ID "UL_USB" +#define MECH_VER_MAJOR 0 +#define MECH_VER_MINOR 0 +#define MECH_VER_PATCH 0 +#define MECH_VER_CODE VER_CODE(MECH_VER_MAJOR,MECH_VER_MINOR,MECH_VER_PATCH) + + +// PLL setup values are computed within the LPC include file +// It relies upon the following defines +//#define FOSC (11059200) // Master Oscillator Freq. +#define FOSC (12000000) // Master Oscillator Freq. +#define PLL_MUL (4) // PLL Multiplier +#define CCLK (FOSC * PLL_MUL) // CPU Clock Freq. + +// Pheripheral Bus Speed Divider +#define PBSD 1 // MUST BE 1, 2, or 4 +#define PCLK (CCLK / PBSD) // Pheripheal Bus Clock Freq. + +#define SYS_TIMER_HZ 1000 + +#ifndef BIT +#define BIT(n) (1 << (n)) +#endif + +// Port Bit Definitions & Macros: Description - initial conditions +#define TXD0_BIT BIT(0) // used by UART0 +#define RXD0_BIT BIT(1) // used by UART0 +#define P0_SCL0_PIN BIT(2) // I2C 0 SCL +#define P0_SDA0_PIN BIT(3) // I2C 0 SDA +#define P0_SCK0_PIN BIT(4) // SPI0 clocks +#define P0_MISO0_PIN BIT(5) // SPI0 master input +#define P0_MOSI0_PIN BIT(6) // SPI0 master output +#define P0_SSEL0_PIN BIT(7) // SPI0 external select/ADS1218 DRDY +#define TXD1_BIT BIT(8) // used by UART1 +#define RXD1_BIT BIT(9) // used by UART1 +#define RTS1_BIT BIT(10) // used by UART1 +#define CTS1_BIT BIT(11) // used by UART1 +#define DSR1_BIT BIT(12) // used by UART1 +#define LED2_BIT BIT(13) // used by LED +#define BOOT_BIT BIT(14) // SWITCH +#define LED1_BIT BIT(15) // used by LED +#define P0_SWITCH1_PIN BIT(16) // pin connected to the switch 1 +#define P0_SCK1_PIN BIT(17) // SPI1 clocks +#define P0_MISO1_PIN BIT(18) // SPI1 master input +#define P0_MOSI1_PIN BIT(19) // SPI1 master output +#define P0_SSEL1_PIN BIT(20) // SPI1 slave select/25VF016 chipselect +#define P0_21_UNUSED_BIT BIT(21) // P0.21 unused - low output +#define P0_22_UNUSED_BIT BIT(22) // P0.22 unused - low output +#define P0_SJA1000_ALE_PIN BIT(23) // SJA1000 ALE +#define P0_24_UNUSED_BIT BIT(24) // P0.24 unused - low output +#define P0_SJA1000_CS_PIN BIT(25) // SJA1000 CS +#define P0_26_UNUSED_BIT BIT(26) // P0.26 unused - low output +#define P0_27_UNUSED_BIT BIT(27) // P0.27 unused - low output +#define P0_SJA1000_RD_PIN BIT(28) // SJA1000 RD +#define P0_SJA1000_WR_PIN BIT(29) // SJA1000 WR +#define P0_SJA1000_INT_PIN BIT(30) // SJA1000 INT +#define P0_USB_CONNECT_PIN BIT(31) // USB Connect Control + +#define P1_SJA1000_D0_PIN BIT(16) // SJA1000 D0 +#define P1_SJA1000_D1_PIN BIT(17) // SJA1000 D1 +#define P1_SJA1000_D2_PIN BIT(18) // SJA1000 D2 +#define P1_SJA1000_D3_PIN BIT(19) // SJA1000 D3 +#define P1_SJA1000_D4_PIN BIT(20) // SJA1000 D4 +#define P1_SJA1000_D5_PIN BIT(21) // SJA1000 D5 +#define P1_SJA1000_D6_PIN BIT(22) // SJA1000 D6 +#define P1_SJA1000_D7_PIN BIT(23) // SJA1000 D7 +#define P1_OUT_PORT_CS_PIN BIT(24) // Chip select for 74HC574 chip +#define P1_SJA1000_RST_PIN BIT(25) // SJA1000 RST +#define P1_26_UNUSED_BIT BIT(26) // used by JTAG +#define P1_27_UNUSED_BIT BIT(27) // used by JTAG +#define P1_28_UNUSED_BIT BIT(28) // used by JTAG +#define P1_29_UNUSED_BIT BIT(29) // used by JTAG +#define P1_30_UNUSED_BIT BIT(30) // used by JTAG +#define P1_31_UNUSED_BIT BIT(31) // used by JTAG + +#define P1_SJA1000_DATA_PINS (uint32_t) ( \ + P1_SJA1000_D0_PIN | \ + P1_SJA1000_D1_PIN | \ + P1_SJA1000_D2_PIN | \ + P1_SJA1000_D3_PIN | \ + P1_SJA1000_D4_PIN | \ + P1_SJA1000_D5_PIN | \ + P1_SJA1000_D6_PIN | \ + P1_SJA1000_D7_PIN | \ + 0 ) + +#define P0IO_INPUT_BITS (uint32_t) ( \ + P0_SCL0_PIN | \ + P0_SDA0_PIN | \ + P0_MISO0_PIN | \ + P0_SSEL0_PIN | \ + P0_MISO1_PIN | \ + BOOT_BIT | \ + P0_SWITCH1_PIN | \ + P0_SJA1000_INT_PIN | \ + 0 ) + +#define P1IO_INPUT_BITS (uint32_t) ( \ + P1_26_UNUSED_BIT | \ + P1_27_UNUSED_BIT | \ + P1_28_UNUSED_BIT | \ + P1_29_UNUSED_BIT | \ + P1_30_UNUSED_BIT | \ + P1_31_UNUSED_BIT | \ + 0 ) + +#define P0IO_ZERO_BITS (uint32_t) ( \ + P0_21_UNUSED_BIT | \ + P0_22_UNUSED_BIT | \ + P0_24_UNUSED_BIT | \ + P0_26_UNUSED_BIT | \ + P0_27_UNUSED_BIT | \ + P0_USB_CONNECT_PIN | \ + 0 ) + +#define P1IO_ZERO_BITS (uint32_t) ( \ + P1_SJA1000_DATA_PINS | \ + P1_SJA1000_RST_PIN | \ + 0 ) + + +#define P0IO_ONE_BITS (uint32_t) ( \ + P0_SCK0_PIN | \ + P0_MOSI0_PIN | \ + LED1_BIT | \ + BOOT_BIT | \ + LED2_BIT | \ + P0_SCK1_PIN | \ + P0_MOSI1_PIN | \ + P0_SSEL1_PIN | \ + P0_SJA1000_ALE_PIN | \ + P0_SJA1000_CS_PIN | \ + P0_SJA1000_RD_PIN | \ + P0_SJA1000_WR_PIN | \ + 0 ) + +#define P1IO_ONE_BITS (uint32_t) ( \ + P1_OUT_PORT_CS_PIN | \ + 0 ) + +#define P0IO_OUTPUT_BITS (uint32_t) ( \ + P0IO_ZERO_BITS | \ + P0IO_ONE_BITS ) + +#define P1IO_OUTPUT_BITS (uint32_t) ( \ + P1IO_ZERO_BITS | \ + P1IO_ONE_BITS ) + +/***************************************************************************/ +/* io functions */ +#define LED_GP LED1_BIT /* GENREAL PURPOSE LED */ +#define LED_ERR LED2_BIT + +#define LED_YELLOW LED1_BIT +#define LED_RED LED2_BIT + +/***************************************************************************/ +/* io functions */ +#define IN_PORT IO0 +#define LED_PORT IO0 +#define OUT_PORT IO1 + +#define CREATE_PORT_NAME_PIN(port) port##PIN +#define CREATE_PORT_NAME_CLR(port) port##CLR +#define CREATE_PORT_NAME_SET(port) port##SET + +#define GET_IN_PIN(port,in) ((CREATE_PORT_NAME_PIN(port) & in)?1:0) +#define SET_OUT_PIN(port,out) (CREATE_PORT_NAME_SET(port)=out) +#define CLR_OUT_PIN(port,out) (CREATE_PORT_NAME_CLR(port)=out) + +/***************************************************************************/ +/* watchdog */ +//#define WATCHDOG_ENABLED +#define WATCHDOG_TIMEOUT_MS 1000 + +/***************************************************************************/ +/* uLan configuration */ + +#ifdef UL_LOG_ENABLE + #undef UL_LOG_ENABLE +#endif + +#ifdef ULD_DEFAULT_BUFFER_SIZE + #undef ULD_DEFAULT_BUFFER_SIZE + #define ULD_DEFAULT_BUFFER_SIZE 0x0800 +#endif + +#define UL_DRV_SYSLESS_PORT 0xE0010000 +#define UL_DRV_SYSLESS_BAUD 19200 +#define UL_DRV_SYSLESS_IRQ HAL_INTERRUPT_UART1 +#define UL_DRV_SYSLESS_MY_ADR_DEFAULT 1 + +#define watchdog_feed lpc_watchdog_feed +#define kvpb_erase lpcisp_kvpb_erase +#define kvpb_copy lpcisp_kvpb_copy +#define kvpb_flush lpcisp_kvpb_flush +#define KVPB_DEFAULT_FLAGS KVPB_DESC_DOUBLE|KVPB_DESC_CHUNKWO + +/***************************************************************************/ +/* USB configuration */ +#define USB_WITH_UDEV_FNC +#define USB_EP_NUM 32 +#define USB_MAX_PACKET0 64 +#define USB_MAX_PACKET 8 +#define USB_DMA_EP 0x00000000 + +/***************************************************************************/ +/* i2c0 configuration */ +#define I2C_DRV_SYSLESS_IRQ HAL_INTERRUPT_I2C0 +#define I2C_DRV_SYSLESS_PORT 0xE001C000 +#define I2C_DRV_SYSLESS_BITRATE 100000 +#define I2C_DRV_SYSLESS_SLADR 0 + +#endif /* _SYSTEM_DEF_H_ */ diff --git a/embedded/board/arm/ul_usb1/libs/Makefile b/embedded/board/arm/ul_usb1/libs/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/board/arm/ul_usb1/libs/Makefile.omk b/embedded/board/arm/ul_usb1/libs/Makefile.omk new file mode 100644 index 0000000..1e281da --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/Makefile.omk @@ -0,0 +1,3 @@ +# -*- makefile -*- + +SUBDIRS = bspbase ldscripts diff --git a/embedded/board/arm/ul_usb1/libs/bspbase/Makefile b/embedded/board/arm/ul_usb1/libs/bspbase/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/bspbase/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/board/arm/ul_usb1/libs/bspbase/Makefile.omk b/embedded/board/arm/ul_usb1/libs/bspbase/Makefile.omk new file mode 100644 index 0000000..72f7977 --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/bspbase/Makefile.omk @@ -0,0 +1,28 @@ +# -*- makefile -*- + +default_CONFIG += CONFIG_OC_UL_DRV_SYSLESS=x +default_CONFIG += CONFIG_OC_IC_DRV_SYSLESS=x +default_CONFIG += CONFIG_KEYVAL=x +default_CONFIG += CONFIG_STDIO_COM_PORT=x +default_CONFIG += CONFIG_OC_UL_DRV_U450_VARPINS=x +default_CONFIG += CONFIG_OC_UL_DRV_U450_VARPINS_MSRSWAP=x +default_CONFIG += CONFIG_OC_UL_DRV_U450_VARPINS_DIRNEG=x +default_CONFIG += CONFIG_OC_I2C_DRV_SYSLESS=x + +LOCAL_CONFIG_H = local_config.h + +INCLUDES += -I . + +include_HEADERS = bspbase.h + +lib_LIBRARIES = bspbase + +bspbase_SOURCES = bsp0hwinit.c + +ifneq ($(CONFIG_STDIO_COM_PORT),) +bspbase_SOURCES += uart.c +endif #CONFIG_STDIO_COM_PORT + +ifeq ($(CONFIG_KBD),y) +bspbase_SOURCES += kbd_io_hisc.c +endif #CONFIG_KBD \ No newline at end of file diff --git a/embedded/board/arm/ul_usb1/libs/bspbase/bsp0hwinit.c b/embedded/board/arm/ul_usb1/libs/bspbase/bsp0hwinit.c new file mode 100644 index 0000000..eceffb4 --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/bspbase/bsp0hwinit.c @@ -0,0 +1,345 @@ +#include "local_config.h" +#include +#ifdef CONFIG_KEYVAL + #include + #include + #include +#endif /* CONFIG_KEYVAL */ +#ifdef CONFIG_STDIO_COM_PORT + #include +#endif +#ifdef CONFIG_OC_UL_DRV_SYSLESS + #include + #include + #include + #include + #include + extern long int uld_jiffies; +#endif /* CONFIG_OC_UL_DRV_SYSLESS */ +#ifdef CONFIG_OC_I2C_DRV_SYSLESS + #include +#endif /* CONFIG_OC_I2C_DRV_SYSLESS */ +#include +#include + +/* timers */ +volatile lt_ticks_t sys_timer_ticks; + +static void sysInit(void) +{ + + lpc_pll_off(); + lpc_pll_on(); + + // setup & enable the MAM + MAMCR = 0; + MAMTIM = MAMTIM_CYCLES; + MAMCR = MAMCR_FULL; + + // set the peripheral bus speed + // value computed from config.h + VPBDIV = VPBDIV_VALUE; // set the peripheral bus clock speed + + // setup the parallel port pin + IO0CLR = P0IO_ZERO_BITS; // clear the ZEROs output + IO0SET = P0IO_ONE_BITS; // set the ONEs output + IO0DIR = P0IO_OUTPUT_BITS; // set the output bit direction + + #ifdef P1IO_OUTPUT_BITS + IO1CLR = P1IO_ZERO_BITS; // clear the ZEROs output + IO1SET = P1IO_ONE_BITS; // set the ONEs output + IO1DIR = P1IO_OUTPUT_BITS; // set the output bit direction + #endif + + IO0CLR = LED1_BIT; // Indicate functional state on the LED1 +} + +void timer0_isr(void) +{ + unsigned int ir; + ir=T0IR; + if (ir&TIR_MR0I) { + do { + T0MR0+=PCLK/SYS_TIMER_HZ; + T0IR=TIR_MR0I; // Clear match0 interrupt + #ifdef CONFIG_OC_UL_DRV_SYSLESS + uld_jiffies++; + #endif + sys_timer_ticks++; + } while (((int32_t)(T0MR0-T0TC))<0); + } +} + +void timerInit(void) +{ + sys_timer_ticks=0; + + HAL_INTERRUPT_ATTACH(HAL_INTERRUPT_TIMER0,timer0_isr,0); + HAL_INTERRUPT_UNMASK(HAL_INTERRUPT_TIMER0); + + T0TC=0; + T0MCR=0; + + T0MR0=PCLK/SYS_TIMER_HZ; /* ms tics */ + T0MCR|=TMCR_MR0_I; + + T0TCR = TCR_ENABLE; //Run timer 0 +} + +#ifdef CONFIG_STDIO_COM_PORT + +int uartcon_write(int file, char * ptr, int len) +{ + int cnt; + unsigned char ch; + for(cnt=0;cntlen=0; + + if(ul_iac_mem_head_rd((uint8_t *)ibuff, msginfo->len,&mtype,&start,&len)) + return UL_IAC_RC_PROC; + + if (mtype==0x00) { + data->len=len; + data->buff=(unsigned char*)start; + return UL_IAC_RC_FREEMSG; + } + return UL_IAC_RC_PROC; +} + +int ul_iac_call_erm(struct ul_drv *udrv,ul_msginfo *msginfo,char *ibuff,ul_iac_data *data) +{ + uint32_t mtype,start,len; + + data->len=0; + + if(ul_iac_mem_head_rd((uint8_t *)ibuff, msginfo->len,&mtype,&start,&len)) + return UL_IAC_RC_PROC; + + #ifdef CONFIG_KEYVAL + if (mtype==0x01) { + lpcisp_erase((void*)start,len); + data->len=0; + return UL_IAC_RC_FREEMSG; + } + #endif /* CONFIG_KEYVAL */ + return UL_IAC_RC_PROC; +} + +int ul_iac_call_wrm(struct ul_drv *udrv,ul_msginfo *msginfo,char *ibuff,ul_iac_data *data) +{ + uint32_t mtype,start,len; + + data->len=0; + + if(ul_iac_mem_head_rd((uint8_t *)ibuff, msginfo->len,&mtype,&start,&len)) + return UL_IAC_RC_PROC; + + if (mtype==0x00) { + memcpy((void*)start,data->buff,data->len); + return UL_IAC_RC_FREEMSG; + } + #ifdef CONFIG_KEYVAL + if (mtype==0x01) { + lpcisp_write((char*)start, data->buff, ISP_RAM2FLASH_BLOCK_SIZE); + return UL_IAC_RC_FREEMSG; + } + #endif /* CONFIG_KEYVAL */ + return UL_IAC_RC_PROC; +} + + +int ul_iac_call_deb(struct ul_drv *udrv,ul_msginfo *msginfo,char *ibuff,ul_iac_data *data) +{ + uint32_t debcmd,mtype,start; + uint8_t *p=(uint8_t*)ibuff; + + if (msginfo->len<1) return UL_IAC_RC_PROC; + debcmd=*(p++); + switch (debcmd) { + case 0x10: /* goto */ + data->len=0; + if (msginfo->len<5) return UL_IAC_RC_PROC; + mtype=*(p++); + mtype+=*(p++)<<8; + start=*(p++); + start+=*(p++)<<8; + if(mtype&UL_MTYPE_START32BIT){ + mtype&=~UL_MTYPE_START32BIT; + if (msginfo->len<7) return UL_IAC_RC_PROC; + start+=(uint32_t)*(p++)<<16; + start+=(uint32_t)*(p++)<<24; + } + if (mtype==0x00) + ((void (*)())start)(); + default:break; + } + return UL_IAC_RC_PROC; +} + +int ul_iac_call_res(struct ul_drv *udrv,ul_msginfo *msginfo,char *ibuff,ul_iac_data *data) +{ + uint32_t rescmd,pass; + uint8_t *p=(uint8_t*)ibuff; + + if (msginfo->len<1) return UL_IAC_RC_PROC; + rescmd=*(p++); + switch (rescmd) { + case ULRES_CPU: /* CPU */ + data->len=0; + if (msginfo->len<3) return UL_IAC_RC_PROC; + pass=*(p++); + pass+=*(p++)<<8; + if (pass==0xaa55) { + MEMMAP=MEMMAP_FLASH; + lpc_watchdog_init(1,10); /* 10ms */ + lpc_watchdog_feed(); + while(1); + } + default:break; + } + return UL_IAC_RC_PROC; +} + +int uLanInit() +{ + struct ul_drv *udrv; + + /* set rs485 mode for UART1 */ + PINSEL0 = (PINSEL0 & ~0xFFFF0000) | 0x01550000; /* dsr(txd), cts(rxd), rts(rs485_dir), rxd, txd */ + + udrv=ul_drv_new(UL_DRV_SYSLESS_PORT, /* port */ + UL_DRV_SYSLESS_IRQ, /* irq */ + UL_DRV_SYSLESS_BAUD, /* baud */ + UL_DRV_SYSLESS_MY_ADR_DEFAULT, /* my adr */ + #ifdef CONFIG_OC_UL_DRV_U450_VARPINS + #ifdef CONFIG_OC_UL_DRV_U450_VARPINS_MSRSWAP + "16450-msrswap", /* chip name */ + #elif defined(CONFIG_OC_UL_DRV_U450_VARPINS_DIRNEG) + "16450-dirneg", /* chip name */ + #else + "16450", /* chip name */ + #endif + #else /*CONFIG_OC_UL_DRV_U450_VARPINS*/ + "16450", /* chip name */ + #endif /*CONFIG_OC_UL_DRV_U450_VARPINS*/ + 0); /* baud base - default */ + + if (udrv==NULL) + return -1; + + ul_drv_add_iac(udrv,UL_CMD_RDM,UL_IAC_OP_SND,ul_iac_call_rdm,NULL,0,0,NULL); + ul_drv_add_iac(udrv,UL_CMD_ERM,UL_IAC_OP_CALLBACK,ul_iac_call_erm,NULL,0,0,NULL); + ul_drv_add_iac(udrv,UL_CMD_WRM,UL_IAC_OP_REC,ul_iac_call_wrm,(char*)lpciap_buff,0,0,NULL); + ul_drv_add_iac(udrv,UL_CMD_DEB,UL_IAC_OP_CALLBACK,ul_iac_call_deb,NULL,0,0,NULL); + ul_drv_add_iac(udrv,UL_CMD_RES,UL_IAC_OP_CALLBACK,ul_iac_call_res,NULL,0,0,NULL); + + return ul_drv_add_dev(udrv); +} +#endif /* CONFIG_OC_UL_DRV_SYSLESS */ + +#ifdef CONFIG_OC_I2C_DRV_SYSLESS + +i2c_drv_t i2c_drv; + +int +i2cInit(void) +{ + + /* set io pins */ + PINSEL0 = (PINSEL0 & ~0x000000F0) | 0x00000050; /* I2C - SCL, SDA */ + + if (i2c_drv_init(&i2c_drv, + I2C_DRV_SYSLESS_PORT, + I2C_DRV_SYSLESS_IRQ, + I2C_DRV_SYSLESS_BITRATE, + I2C_DRV_SYSLESS_SLADR)<0) return -1; + + return 1; +} + +#endif /*CONFIG_OC_I2C_DRV_SYSLESS*/ + +void _setup_board() +{ + // initialize the system + sysInit(); + + #ifdef WATCHDOG_ENABLED + lpc_watchdog_init(1,WATCHDOG_TIMEOUT_MS); + lpc_watchdog_feed(); + #endif /* WATCHDOG_ENABLED */ + + // initialize the system timer + timerInit(); + + #ifdef CONFIG_STDIO_COM_PORT + uart0Init( B57600 , UART_8N1, UART_FIFO_8); + init_system_stub(); + #endif /* CONFIG_STDIO_COM_PORT */ + + #ifdef CONFIG_OC_UL_DRV_SYSLESS +// uld_debug_flg=0x3ff; + uLanInit(); + #endif /* CONFIG_OC_UL_DRV_SYSLESS */ + + #ifdef CONFIG_OC_I2C_DRV_SYSLESS + i2cInit(); + #endif /* CONFIG_OC_I2C_DRV_SYSLESS */ +} diff --git a/embedded/board/arm/ul_usb1/libs/bspbase/bspbase.h b/embedded/board/arm/ul_usb1/libs/bspbase/bspbase.h new file mode 100644 index 0000000..5369f81 --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/bspbase/bspbase.h @@ -0,0 +1,11 @@ +#ifndef _BSPBASE_H +#define _BSPBASE_H + +#include +#include + +extern volatile lt_ticks_t sys_timer_ticks; + +#define get_sys_timer_ticks() sys_timer_ticks + +#endif /* _BSPBASE_H */ diff --git a/embedded/board/arm/ul_usb1/libs/bspbase/kbd_io_hisc.c b/embedded/board/arm/ul_usb1/libs/bspbase/kbd_io_hisc.c new file mode 100644 index 0000000..ff4d1d5 --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/bspbase/kbd_io_hisc.c @@ -0,0 +1,88 @@ +#include +#include "kbd.h" + +unsigned char kbd_onerow(unsigned char scan) +{ + kbdisr_lock_level_t level; + unsigned int scan_mask=KBD_SCAN_MASK; + unsigned int scan_val; + unsigned int ret; + int delay=10; + + kbdisr_lock(level); + + #ifdef KBD_USE_IO_SETCLR_OPS + scan_val=(scan<>KBD_RET_BIT0)&((1<> 8); // set for baud high byte + + // set the number of characters and other + // user specified operating parameters + // Databits, Parity, Stopbits - Settings in Line Control Register + U0LCR = (mode & ~(1< + +/////////////////////////////////////////////////////////////////////////////// +// use the following macros to determine the 'baud' parameter values +// for uart0Init() and uart1Init() +// CAUTION - 'baud' SHOULD ALWAYS BE A CONSTANT or +// a lot of code will be generated. +// Baud-Rate is calculated based on pclk (VPB-clock) +// the devisor must be 16 times the desired baudrate +#define UART_BAUD(baud) (uint16_t)((PCLK / ((baud) * 16.0)) + 0.5) + +/////////////////////////////////////////////////////////////////////////////// +// Definitions for typical UART 'baud' settings +#define B1200 UART_BAUD(1200) +#define B9600 UART_BAUD(9600) +#define B19200 UART_BAUD(19200) +#define B38400 UART_BAUD(38400) +#define B57600 UART_BAUD(57600) +#define B115200 UART_BAUD(115200) + +/////////////////////////////////////////////////////////////////////////////// +// Definitions for typical UART 'mode' settings +#define UART_8N1 (uint8_t)(ULCR_CHAR_8 + ULCR_PAR_NO + ULCR_STOP_1) +#define UART_7N1 (uint8_t)(ULCR_CHAR_7 + ULCR_PAR_NO + ULCR_STOP_1) +#define UART_8N2 (uint8_t)(ULCR_CHAR_8 + ULCR_PAR_NO + ULCR_STOP_2) +#define UART_7N2 (uint8_t)(ULCR_CHAR_7 + ULCR_PAR_NO + ULCR_STOP_2) +#define UART_8E1 (uint8_t)(ULCR_CHAR_8 + ULCR_PAR_EVEN + ULCR_STOP_1) +#define UART_7E1 (uint8_t)(ULCR_CHAR_7 + ULCR_PAR_EVEN + ULCR_STOP_1) +#define UART_8E2 (uint8_t)(ULCR_CHAR_8 + ULCR_PAR_EVEN + ULCR_STOP_2) +#define UART_7E2 (uint8_t)(ULCR_CHAR_7 + ULCR_PAR_EVEN + ULCR_STOP_2) +#define UART_8O1 (uint8_t)(ULCR_CHAR_8 + ULCR_PAR_ODD + ULCR_STOP_1) +#define UART_7O1 (uint8_t)(ULCR_CHAR_7 + ULCR_PAR_ODD + ULCR_STOP_1) +#define UART_8O2 (uint8_t)(ULCR_CHAR_8 + ULCR_PAR_ODD + ULCR_STOP_2) +#define UART_7O2 (uint8_t)(ULCR_CHAR_7 + ULCR_PAR_ODD + ULCR_STOP_2) + +/////////////////////////////////////////////////////////////////////////////// +// Definitions for typical UART 'fmode' settings +#define UART_FIFO_OFF (0x00) +#define UART_FIFO_1 (uint8_t)(UFCR_FIFO_ENABLE + UFCR_FIFO_TRIG1) +#define UART_FIFO_4 (uint8_t)(UFCR_FIFO_ENABLE + UFCR_FIFO_TRIG4) +#define UART_FIFO_8 (uint8_t)(UFCR_FIFO_ENABLE + UFCR_FIFO_TRIG8) +#define UART_FIFO_14 (uint8_t)(UFCR_FIFO_ENABLE + UFCR_FIFO_TRIG14) + +void uart0Init(uint16_t baud, uint8_t mode, uint8_t fmode); +int uart0Putch(int ch); +uint16_t uart0Space(void); +const char *uart0Puts(const char *string); +int uart0TxEmpty(void); +void uart0TxFlush(void); +int uart0Getch(void); +int uart0GetchW(void); + +#endif diff --git a/embedded/board/arm/ul_usb1/libs/ldscripts/Makefile b/embedded/board/arm/ul_usb1/libs/ldscripts/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/ldscripts/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/board/arm/ul_usb1/libs/ldscripts/Makefile.omk b/embedded/board/arm/ul_usb1/libs/ldscripts/Makefile.omk new file mode 100644 index 0000000..01e6b77 --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/ldscripts/Makefile.omk @@ -0,0 +1,5 @@ +# -*- makefile -*- + +lib_LDSCRIPTS = $(notdir $(wildcard $(SOURCES_DIR)/*.ld*)) + +include_HEADERS = mem_loc.h keyval_loc.h diff --git a/embedded/board/arm/ul_usb1/libs/ldscripts/keyval_loc.h b/embedded/board/arm/ul_usb1/libs/ldscripts/keyval_loc.h new file mode 100644 index 0000000..2ee23e5 --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/ldscripts/keyval_loc.h @@ -0,0 +1,10 @@ +#ifndef _KEYVAL_LOC_H +#define _KEYVAL_LOC_H + +extern int _keyval_start; +extern int _keyval_page_len; + +#define KEYVAL_START ((unsigned int)&_keyval_start) +#define KEYVAL_PAGE_LEN ((unsigned int)&_keyval_page_len) + +#endif /* _KVPB_LOC */ diff --git a/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2103.ld-cfg b/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2103.ld-cfg new file mode 100644 index 0000000..a29dfc8 --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2103.ld-cfg @@ -0,0 +1,12 @@ + +/* Memory Definitions */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00008000 + RAM (rw) : ORIGIN = 0x40000000, LENGTH = 0x00001FE0 + STACK (rw) : ORIGIN = 0x40000000 + 0x00001FE0 - 4, LENGTH = 4 + + FLASHVEC (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000020 + RAMVEC (w) : ORIGIN = 0x40000000, LENGTH = 0x00000020 +} + diff --git a/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2103.ld-flash b/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2103.ld-flash new file mode 100644 index 0000000..e1a20c6 --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2103.ld-flash @@ -0,0 +1,94 @@ +/***********************************************************************/ +/* */ +/* ROM.ld: Linker Script File */ +/* */ +/***********************************************************************/ +ENTRY(_startup) + +INCLUDE "lpc2103.ld-cfg" + +STARTUP(startup.o) + +PROVIDE (_setup_board = 0); + +/* Section Definitions */ +SECTIONS +{ + + /* first section is .text which is used for code */ + .text : + { + . = ALIGN(4); + *(.ivt) + *(.text) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + _etext = ALIGN( 4 ) ; + } > FLASH + + /* .data section which is used for initialized data */ +/* .data : AT (_etext) */ + .data : + AT ( ADDR( .text ) + SIZEOF( .text ) ) + { + . = ALIGN(4); + _data = .; + *(.data) + _edata = ALIGN( 4 ) ; + } > RAM + + /* .bss section which is used for uninitialized data */ + .bss (NOLOAD) : + { + . = ALIGN(4); + __bss_start = . ; + __bss_start__ = . ; + *(.bss) + *(COMMON) + __bss_end__ = ALIGN( 4 ) ; + end = ALIGN( 4 ) ; + _end = ALIGN( 4 ) ; + } > RAM + + .stack : + { + _stack = .; + } > STACK + + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2105.ld-app b/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2105.ld-app new file mode 100644 index 0000000..4998f11 --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2105.ld-app @@ -0,0 +1,99 @@ +/***********************************************************************/ +/* */ +/* ROM.ld: Linker Script File */ +/* */ +/***********************************************************************/ +ENTRY(_startup) + +INCLUDE "lpc2105.ld-cfg" + +STARTUP(startup.o) + +PROVIDE (_setup_board = 0); + +/* Section Definitions */ +SECTIONS +{ + + /* first section is .text which is used for code */ + .text : + { + . = ALIGN(4); + *(.text) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + _etext = ALIGN( 4 ) ; + } > FLASHAPP + + .keyval : + { + PROVIDE (_keyval_start = .); + PROVIDE (_keyval_page_len = KEYVAL_PAGE_LEN ); + }> KEYVAL + + /* .data section which is used for initialized data */ +/* .data : AT (_etext) */ + .data : + AT ( ADDR( .text ) + SIZEOF( .text ) ) + { + . = ALIGN(4); + _data = .; + *(.ivt) + *(.data) + _edata = ALIGN( 4 ) ; + } > RAM + + /* .bss section which is used for uninitialized data */ + .bss (NOLOAD) : + { + . = ALIGN(4); + __bss_start = . ; + __bss_start__ = . ; + *(.bss) + *(COMMON) + __bss_end__ = ALIGN( 4 ) ; + end = ALIGN( 4 ) ; + _end = ALIGN( 4 ) ; + } > RAM + + .stack : + { + _stack = .; + } > STACK + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2105.ld-boot b/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2105.ld-boot new file mode 100644 index 0000000..5ddb822 --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2105.ld-boot @@ -0,0 +1,104 @@ +/***********************************************************************/ +/* */ +/* ROM.ld: Linker Script File */ +/* */ +/***********************************************************************/ +ENTRY(_startup) + +INCLUDE "lpc2105.ld-cfg" + +STARTUP(startup.o) + +PROVIDE (_setup_board = 0); + +/* Section Definitions */ +SECTIONS +{ + + /* first section is .text which is used for code */ + .text : + { + . = ALIGN(4); + *(.ivt) + *(.text) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + _etext = ALIGN( 4 ) ; + } > FLASHBOOT + + .app : + { + PROVIDE (_mem_app_start = . ); + } > FLASHAPP + + .keyval : + { + PROVIDE (_keyval_start = .); + PROVIDE (_keyval_page_len = KEYVAL_PAGE_LEN ); + }> KEYVAL + + /* .data section which is used for initialized data */ +/* .data : AT (_etext) */ + .data : + AT ( ADDR( .text ) + SIZEOF( .text ) ) + { + . = ALIGN(4); + _data = .; + *(.data) + _edata = ALIGN( 4 ) ; + } > RAM + + /* .bss section which is used for uninitialized data */ + .bss (NOLOAD) : + { + . = ALIGN(4); + __bss_start = . ; + __bss_start__ = . ; + *(.bss) + *(COMMON) + __bss_end__ = ALIGN( 4 ) ; + end = ALIGN( 4 ) ; + _end = ALIGN( 4 ) ; + } > RAM + + .stack : + { + _stack = .; + } > STACK + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2105.ld-cfg b/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2105.ld-cfg new file mode 100644 index 0000000..d5a9ba9 --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2105.ld-cfg @@ -0,0 +1,18 @@ + +KEYVAL_PAGE_LEN = 0x00002000; + +/* Memory Definitions */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00020000 + RAM (rw) : ORIGIN = 0x40000000, LENGTH = 0x00003FE0 + STACK (rw) : ORIGIN = 0x40000000 + 0x00003FE0 - 4, LENGTH = 4 + + FLASHVEC (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000020 + FLASHBOOT (rx) : ORIGIN = 0x0000000, LENGTH = 0x0000A000 + FLASHAPP (rx) : ORIGIN = 0x0000A000, LENGTH = 0x0001A000 + KEYVAL (rx) : ORIGIN = 0x00001A000, LENGTH = 0x00004000 + + RAMVEC (w) : ORIGIN = 0x40000000, LENGTH = 0x00000020 +} + diff --git a/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2148.ld-app b/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2148.ld-app new file mode 100644 index 0000000..767081f --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2148.ld-app @@ -0,0 +1,99 @@ +/***********************************************************************/ +/* */ +/* ROM.ld: Linker Script File */ +/* */ +/***********************************************************************/ +ENTRY(_startup) + +INCLUDE "lpc2148.ld-cfg" + +STARTUP(startup.o) + +PROVIDE (_setup_board = 0); + +/* Section Definitions */ +SECTIONS +{ + + /* first section is .text which is used for code */ + .text : + { + . = ALIGN(4); + *(.text) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + _etext = ALIGN( 4 ) ; + } > FLASHAPP + + .keyval : + { + PROVIDE (_keyval_start = .); + PROVIDE (_keyval_page_len = KEYVAL_PAGE_LEN ); + }> KEYVAL + + /* .data section which is used for initialized data */ +/* .data : AT (_etext) */ + .data : + AT ( ADDR( .text ) + SIZEOF( .text ) ) + { + . = ALIGN(4); + _data = .; + *(.ivt) + *(.data) + _edata = ALIGN( 4 ) ; + } > RAM + + /* .bss section which is used for uninitialized data */ + .bss (NOLOAD) : + { + . = ALIGN(4); + __bss_start = . ; + __bss_start__ = . ; + *(.bss) + *(COMMON) + __bss_end__ = ALIGN( 4 ) ; + end = ALIGN( 4 ) ; + _end = ALIGN( 4 ) ; + } > RAM + + .stack : + { + _stack = .; + } > STACK + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2148.ld-boot b/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2148.ld-boot new file mode 100644 index 0000000..de00d81 --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2148.ld-boot @@ -0,0 +1,104 @@ +/***********************************************************************/ +/* */ +/* ROM.ld: Linker Script File */ +/* */ +/***********************************************************************/ +ENTRY(_startup) + +INCLUDE "lpc2148.ld-cfg" + +STARTUP(startup.o) + +PROVIDE (_setup_board = 0); + +/* Section Definitions */ +SECTIONS +{ + + /* first section is .text which is used for code */ + .text : + { + . = ALIGN(4); + *(.ivt) + *(.text) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + _etext = ALIGN( 4 ) ; + } > FLASHBOOT + + .app : + { + PROVIDE (_mem_app_start = . ); + } > FLASHAPP + + .keyval : + { + PROVIDE (_keyval_start = .); + PROVIDE (_keyval_page_len = KEYVAL_PAGE_LEN ); + }> KEYVAL + + /* .data section which is used for initialized data */ +/* .data : AT (_etext) */ + .data : + AT ( ADDR( .text ) + SIZEOF( .text ) ) + { + . = ALIGN(4); + _data = .; + *(.data) + _edata = ALIGN( 4 ) ; + } > RAM + + /* .bss section which is used for uninitialized data */ + .bss (NOLOAD) : + { + . = ALIGN(4); + __bss_start = . ; + __bss_start__ = . ; + *(.bss) + *(COMMON) + __bss_end__ = ALIGN( 4 ) ; + end = ALIGN( 4 ) ; + _end = ALIGN( 4 ) ; + } > RAM + + .stack : + { + _stack = .; + } > STACK + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2148.ld-cfg b/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2148.ld-cfg new file mode 100644 index 0000000..7534208 --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/ldscripts/lpc2148.ld-cfg @@ -0,0 +1,18 @@ + +KEYVAL_PAGE_LEN = 0x00001000; + +/* Memory Definitions */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000 + RAM (rw) : ORIGIN = 0x40000000, LENGTH = 0x00007FE0 + STACK (rw) : ORIGIN = 0x40000000 + 0x00007FE0 - 4, LENGTH = 4 + + FLASHVEC (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000020 + FLASHBOOT (rx) : ORIGIN = 0x0000000, LENGTH = 0x00020000 + FLASHAPP (rx) : ORIGIN = 0x00020000, LENGTH = 0x00058000 + KEYVAL (rx) : ORIGIN = 0x000078000, LENGTH = 0x00002000 + + RAMVEC (w) : ORIGIN = 0x40000000, LENGTH = 0x00000020 +} + diff --git a/embedded/board/arm/ul_usb1/libs/ldscripts/mem_loc.h b/embedded/board/arm/ul_usb1/libs/ldscripts/mem_loc.h new file mode 100644 index 0000000..77b24d1 --- /dev/null +++ b/embedded/board/arm/ul_usb1/libs/ldscripts/mem_loc.h @@ -0,0 +1,8 @@ +#ifndef _MEM_LOC_H +#define _MEM_LOC_H + +extern int _mem_app_start; + +#define MEM_APP_START ((unsigned int)&_mem_app_start) + +#endif /* _MEM_LOC */ diff --git a/embedded/libs4c/Makefile b/embedded/libs4c/Makefile new file mode 100644 index 0000000..bdb6d45 --- /dev/null +++ b/embedded/libs4c/Makefile @@ -0,0 +1,15 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + +# DO NOT DELETE diff --git a/embedded/libs4c/Makefile.omk b/embedded/libs4c/Makefile.omk new file mode 100644 index 0000000..f76e30f --- /dev/null +++ b/embedded/libs4c/Makefile.omk @@ -0,0 +1,3 @@ +# -*- makefile -*- + +SUBDIRS = keyval usb kbd i2c \ No newline at end of file diff --git a/embedded/libs4c/i2c/Makefile b/embedded/libs4c/i2c/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/libs4c/i2c/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/libs4c/i2c/Makefile.omk b/embedded/libs4c/i2c/Makefile.omk new file mode 100644 index 0000000..f58b859 --- /dev/null +++ b/embedded/libs4c/i2c/Makefile.omk @@ -0,0 +1,19 @@ +# -*- makefile -*- + +default_CONFIG = CONFIG_OC_I2C_DRV_SYSLESS=n +default_CONFIG += CONFIG_OC_I2C_CHIP_C552=y + +LOCAL_CONFIG_H = i2c_drv_config.h + +INCLUDES += -I . + +ifeq ($(CONFIG_OC_I2C_DRV_SYSLESS),y) +lib_LIBRARIES = i2c_drv +include_HEADERS += i2c_drv.h +i2c_drv_SOURCES += i2c_drv.c + +ifeq ($(CONFIG_OC_I2C_CHIP_C552),y) +i2c_drv_SOURCES += i2c_c552.c +endif #CONFIG_OC_I2C_CHIP_C552 + +endif #CONFIG_OC_I2C_DRV_SYSLESS diff --git a/embedded/libs4c/i2c/i2c_c552.c b/embedded/libs4c/i2c/i2c_c552.c new file mode 100644 index 0000000..56837d0 --- /dev/null +++ b/embedded/libs4c/i2c/i2c_c552.c @@ -0,0 +1,396 @@ +/******************************************************************* + Components for embedded applications builded for + laboratory and medical instruments firmware + + i2c_mx1.c - I2C communication automata for M9328 MX1 microcontroller + + Copyright holders and project originators + (C) 2001-2008 by Pavel Pisa pisa@cmp.felk.cvut.cz + (C) 2002-2008 by PiKRON Ltd. http://www.pikron.com + (C) 2007-2008 by Petr Smolik + + The COLAMI components can be used and copied under next licenses + - MPL - Mozilla Public License + - GPL - GNU Public License + - LGPL - Lesser GNU Public License + - and other licenses added by project originators + Code can be modified and re-distributed under any combination + of the above listed licenses. If contributor does not agree with + some of the licenses, he can delete appropriate line. + Warning, if you delete all lines, you are not allowed to + distribute code or build project. + *******************************************************************/ + + +#include +#include +#include "i2c_drv_config.h" +#include "i2c_drv.h" + +int c552_poll(i2c_drv_t *drv); +void c552_irq_handler(int intno, void *dev_id); +static int c552_ctrl_fnc(struct i2c_drv *drv, int ctrl, void *p); + +// I2C Registers +#define C552_CONSET(port) (((i2cRegs_t *)(port))->conset) /* Control Set Register */ +#define C552_STAT(port) (((i2cRegs_t *)(port))->stat) /* Status Register */ +#define C552_DAT(port) (((i2cRegs_t *)(port))->dat) /* Data Register */ +#define C552_ADR(port) (((i2cRegs_t *)(port))->adr) /* Slave Address Register */ +#define C552_SCLH(port) (((i2cRegs_t *)(port))->sclh) /* SCL Duty Cycle Register (high half word) */ +#define C552_SCLL(port) (((i2cRegs_t *)(port))->scll) /* SCL Duty Cycle Register (low half word) */ +#define C552_CONCLR(port) (((i2cRegs_t *)(port))->conclr) /* Control Clear Register */ + +#define C552CON_AA (1 << 2) +#define C552CON_SI (1 << 3) +#define C552CON_STO (1 << 4) +#define C552CON_STA (1 << 5) +#define C552CON_EN (1 << 6) + +#define C552CON_AAC (1 << 2) +#define C552CON_SIC (1 << 3) +#define C552CON_STAC (1 << 5) +#define C552CON_ENC (1 << 6) + +/***************************************************************************/ +int c552_init_start(struct i2c_drv *drv, int port, int irq, int bitrate, int sladr) +{ + C552_ADR(port)=sladr; + C552_SCLH(port)=((PCLK/2)/bitrate); //minimal value + C552_SCLL(port)=((PCLK/2)/bitrate); + drv->irq=irq; + drv->port=port; + drv->sfnc_act=NULL; + drv->ctrl_fnc=c552_ctrl_fnc; + drv->poll_fnc=c552_poll; + drv->flags=I2C_DRV_ON; /* todo - use atomic operation */ + C552_CONCLR(port)=0x6C; /* clearing all flags */ + C552_CONSET(port)=C552CON_EN; + HAL_INTERRUPT_ATTACH(irq,c552_irq_handler,drv); + HAL_INTERRUPT_UNMASK(irq); + return 0; +} + +static int c552_sfnc_ms_end(struct i2c_drv *drv); +static inline i2c_msg_head_t *c552_sfnc_sl_prep(struct i2c_drv *drv, int cmd, int rxtx); + +/***************************************************************************/ +static int c552_sfnc_ms_end(struct i2c_drv *drv) +{ + i2c_msg_head_t *msg=drv->msg_act; + + if(msg) { + if((msg->flags&I2C_MSG_CB_END) && (msg->callback)) + msg->callback(drv,I2C_MSG_CB_END,msg); + if(msg->flags&I2C_MSG_REPEAT){ + drv->master_queue=msg->next; + }else{ + i2c_drv_queue_msg(msg->flags&I2C_MSG_NOPROC?NULL:&drv->proc_queue,msg); + } + msg->flags|=I2C_MSG_FINISHED; + } + + if(drv->master_queue) { + /* there is some more work for master*/ + /* We need to request start of the next transfer somewhere */ + C552_CONSET(drv->port)=C552CON_STA; + } else { + drv->flags&=~I2C_DRV_MS_INPR; + } + + drv->msg_act = NULL; + return 0; +} + +static inline +i2c_msg_head_t *c552_sfnc_sl_prep(struct i2c_drv *drv, int cmd, int rxtx) +{ + i2c_msg_head_t *msg=drv->slave_queue; + if(!msg) do { + if((msg->flags&rxtx) && !((cmd^msg->sl_cmd)&msg->sl_msk)){ + drv->slave_queue=msg; + if((msg->flags&I2C_MSG_CB_START) && (msg->callback)) + msg->callback(drv,I2C_MSG_CB_START|rxtx,msg); + return msg; + } + } while((msg=msg->next)!=drv->slave_queue); + return NULL; +} + +/***************************************************************************/ +static int c552_ctrl_fnc(struct i2c_drv *drv, int ctrl, void *p) +{ + unsigned long saveif; + switch(ctrl){ + case I2C_CTRL_MS_RQ: + if(!(drv->flags&I2C_DRV_ON)) + return -1; + if(!drv->master_queue) + return 0; + save_and_cli(saveif); + if(!(drv->flags&I2C_DRV_MS_INPR)) { + drv->flags|=I2C_DRV_MS_INPR; + drv->flags&=~I2C_DRV_NA; + C552_CONSET(drv->port)=C552CON_STA; + } + restore_flags(saveif); + return 0; + default: + return -1; + } + return 0; +} + +/***************************************************************************/ +int c552_poll(i2c_drv_t *drv) +{ + i2c_msg_head_t *msg; + + if((msg=drv->proc_queue)!=NULL){ + i2c_drv_queue_msg(NULL,msg); + if((msg->flags&I2C_MSG_CB_PROC) && (msg->callback)) + msg->callback(drv,I2C_MSG_CB_PROC,msg); + } + return 0; +} + +int i2c_irq_seq_num=0; + +/***************************************************************************/ +void c552_irq_handler(int intno, void *dev_id) +{ + i2c_drv_t *drv; + i2c_msg_head_t *msg; + int port; + int stat; + + drv=(i2c_drv_t*)dev_id; + if(drv->magic!=I2C_DRV_MAGIC) + { + #ifdef FOR_LINUX_KERNEL + panic("i2c_irq_handler : BAD drv magic !!!"); + #elif defined(_WIN32) + I2C_PRINTF("i2c_irq_handler : BAD drv magic !!!\n"); + return FALSE; + #elif defined(__DJGPP__)||defined(CONFIG_OC_I2C_DRV_SYSLESS) + I2C_PRINTF("i2c_irq_handler : BAD drv magic !!!\n"); + return; + #else + error("i2c_irq_handler : BAD drv magic !!!"); + #endif + } + drv->flags&=~I2C_DRV_NA; + + port=drv->port; + msg=drv->msg_act; + + stat=C552_STAT(port); + + switch(stat) { + case 0x00: + /* Bus Error has occured */ + drv->msg_act=NULL; + C552_CONSET(port)=C552CON_STO; + if(drv->master_queue) { + /* there is some work for master*/ + C552_CONSET(port)=C552CON_STA; + } + break; + case 0x08: /* MS_STA */ + /* the initial start condition has been sent */ + if(!drv->master_queue) { + C552_CONCLR(port)=C552CON_STAC; + C552_CONSET(port)=C552CON_STO; + drv->msg_act=NULL; + break; + } + C552_CONCLR(port)=C552CON_STAC; + C552_CONSET(port)=C552CON_AA; + + msg=drv->master_queue; + drv->msg_act=msg; + msg->tx_len=msg->rx_len=0; + + if((msg->flags&I2C_MSG_CB_START) && (msg->callback)) + msg->callback(drv,I2C_MSG_CB_START,msg); + + if (msg->flags&I2C_MSG_MS_TX) { + /* proceed Tx request first */ + C552_DAT(port) = msg->addr&~1; + break; + } + /* if there is no request for transmit, continue by Rx immediately */ + case 0x10: /* MS_REPS */ + /* the repeated start has been successfully sent, continue by Rx */ + C552_CONCLR(port)=C552CON_STAC; + C552_CONSET(port)=C552CON_AA; + C552_DAT(port) = msg->addr|1; + if (!msg || !(msg->flags&I2C_MSG_MS_RX)) { + /* there are no data to be received */ + C552_CONSET(port)=C552CON_STO; + c552_sfnc_ms_end(drv); + } else { + msg->rx_len=0; + } + break; + case 0x18: + /* sent SLA W received ACK */ + case 0x28: + /* sent DATA received ACK */ + if (msg->tx_lentx_rq) { + C552_DAT(port) = msg->tx_buf[msg->tx_len]; + msg->tx_len++; + break; + } + /* all data has been sent */ + if (!(msg->flags&I2C_MSG_MS_RX)) { + C552_CONSET(port)=C552CON_STO; + c552_sfnc_ms_end(drv); + } else { + C552_CONSET(port)=C552CON_STA; + } + break; + case 0x30: + /* sent DATA received NACK */ + case 0x48: + /* sent SLA R received ACK */ + case 0x20: + /* vyslano SLA W prijato NACK */ + C552_CONSET(port)=C552CON_STO; + msg->flags|=I2C_MSG_FAIL; + c552_sfnc_ms_end(drv); + break; + case 0x38: + /* arbitration lost during Tx */ + C552_CONSET(port)=C552CON_STA; + break; + case 0x40: + /* sent SLA R received ACK */ + if (msg->rx_rq==1) + C552_CONCLR(port)=C552CON_AAC; + break; + case 0x50: + /* received DATA sent ACK */ + msg->rx_buf[msg->rx_len]= C552_DAT(port); + msg->rx_len++; + if (msg->rx_rq==msg->rx_len) + C552_CONCLR(port)=C552CON_AAC; + break; + case 0x58: + /* received DATA sent NACK */ + msg->rx_buf[msg->rx_len]= C552_DAT(port); + msg->rx_len++; + C552_CONSET(port)=C552CON_STO; + c552_sfnc_ms_end(drv); + break; + + /*** slave mode ***/ + + case 0x68: + /* received own SLA W sent ACK after arbitration lost */ + + case 0x78: + /* received Generall CALL sent ACK after arbitration lost */ + C552_CONSET(port)=C552CON_STA; + + case 0x60: + /* received own SLA W sent ACK */ + + case 0x70: + /* received Generall CALL sent ACK */ + if(!drv->slave_queue) { + C552_CONCLR(port)=C552CON_AAC; + break; + } + C552_CONSET(port)=C552CON_AA; + drv->flags|=I2C_DRV_SL_CEXP|I2C_DRV_SL_INRX; + break; + + case 0x80: + /* SLA W : received DATA sent ACK */ + + case 0x90: + /* GCall : received DATA sent ACK */ + + if(drv->flags&I2C_DRV_SL_CEXP){ + drv->flags&=~I2C_DRV_SL_CEXP; + drv->sl_last_cmd=C552_DAT(port); + msg=c552_sfnc_sl_prep(drv, drv->sl_last_cmd, I2C_MSG_SL_RX); + drv->msg_act=msg; + } + if(!msg || (msg->rx_len>=msg->rx_rq)){ + C552_CONCLR(port)=C552CON_AAC; + break; + } + msg->rx_buf[msg->rx_len]= C552_DAT(port); + msg->rx_len++; + break; + + case 0x88: + /* SLA W : received DATA sent NACK */ + /* may it be, the handling should fall into A0 state */ + + case 0x98: + /* GCall : received DATA sent NACK */ + /* may it be, the handling should fall into A0 state */ + + C552_CONSET(port)=C552CON_AA; + break; + + case 0xA0: + /* Slave : Repeated START or STOP */ + if(msg && (msg->flags&I2C_MSG_CB_END) && (msg->callback)) { + int cbcode; + if(drv->flags&I2C_DRV_SL_INRX) + cbcode=I2C_MSG_CB_END|I2C_MSG_SL_RX; + else + cbcode=I2C_MSG_CB_END|I2C_MSG_SL_TX; + msg->callback(drv,cbcode,msg); + } + C552_CONSET(port)=C552CON_AA; + break; + + case 0xB0: + /* received own SLA R sent ACK after arbitration lost */ + C552_CONSET(port)=C552CON_STA; + + case 0xA8: + /* received own SLA R sent ACK */ + drv->flags&=~I2C_DRV_SL_INRX; + msg=c552_sfnc_sl_prep(drv, drv->sl_last_cmd, I2C_MSG_SL_RX); + drv->msg_act=msg; + if(!msg) { + C552_CONCLR(port)=C552CON_AAC; + break; + } + C552_CONSET(port)=C552CON_AA; + + case 0xB8: + /* SLA R : sent DATA received ACK */ + if(!msg || (msg->tx_len>=msg->tx_rq)){ + C552_DAT(port) = 0xff; + break; + } + C552_DAT(port) = msg->tx_buf[msg->tx_len]; + msg->tx_len++; + break; + + case 0xC0: + /* SLA R : sent DATA received NACK */ + /* the A0 state is not enerred most probably */ + + case 0xC8: + /* SLA R : last data sent, DATA (AA=0) received ACK */ + /* the A0 state is not enerred most probably */ + C552_CONSET(port)=C552CON_AA; + + if(msg && (msg->flags&I2C_MSG_CB_END) && (msg->callback)) { + msg->callback(drv,I2C_MSG_CB_END|I2C_MSG_SL_TX,msg); + } + break; + + default: break; + } + + /* vymaz SI bit */ + C552_CONCLR(port)=C552CON_SIC; +} diff --git a/embedded/libs4c/i2c/i2c_drv.c b/embedded/libs4c/i2c/i2c_drv.c new file mode 100644 index 0000000..3a2f12a --- /dev/null +++ b/embedded/libs4c/i2c/i2c_drv.c @@ -0,0 +1,182 @@ +/******************************************************************* + Components for embedded applications builded for + laboratory and medical instruments firmware + + i2c_mx1.c - I2C communication automata for M9328 MX1 microcontroller + + Copyright holders and project originators + (C) 2001-2004 by Pavel Pisa pisa@cmp.felk.cvut.cz + (C) 2002-2004 by PiKRON Ltd. http://www.pikron.com + (C) 2007-2008 by Petr Smolik + + The COLAMI components can be used and copied under next licenses + - MPL - Mozilla Public License + - GPL - GNU Public License + - LGPL - Lesser GNU Public License + - and other licenses added by project originators + Code can be modified and re-distributed under any combination + of the above listed licenses. If contributor does not agree with + some of the licenses, he can delete appropriate line. + Warning, if you delete all lines, you are not allowed to + distribute code or build project. + *******************************************************************/ + + +#include +#include +#include "i2c_drv_config.h" +#include "i2c_drv.h" + +/***************************************************************************/ +int +i2c_drv_init(i2c_drv_t *drv, int port, int irq, int bitrate,int sladr) +{ + int r=-1; + memset(drv,0,sizeof(i2c_drv_t)); + drv->magic=I2C_DRV_MAGIC; + #ifdef CONFIG_OC_I2C_CHIP_C552 + r=c552_init_start(drv,port,irq,bitrate,sladr); + #endif /* CONFIG_OC_I2C_CHIP_C552 */ + if (r<0) return r; + return 0; +} + +/********************************************************************/ +/* Generic I2C functions */ + +void i2c_drv_queue_msg(i2c_msg_head_t **queue, i2c_msg_head_t *msg) +{ + I2C_IRQ_LOCK_FINI + i2c_msg_head_t *prev, *next; + I2C_IRQ_LOCK; + if(msg->on_queue){ + if(msg->next==msg){ + if(*msg->on_queue==msg) + *msg->on_queue=NULL; + }else{ + msg->next->prev=msg->prev; + msg->prev->next=msg->next; + if(*msg->on_queue==msg) + *msg->on_queue=msg->next; + } + } + if((msg->on_queue=queue)!=NULL){ + if((next=*queue)!=NULL){ + msg->prev=prev=next->prev; + msg->next=next; + next->prev=msg; + prev->next=msg; + }else{ + *queue=msg->prev=msg->next=msg; + } + } + I2C_IRQ_UNLOCK; + return; +} + +int i2c_drv_master_msg_ins(i2c_drv_t *drv, i2c_msg_head_t *msg) +{ + if(!drv) return -1; + if(!(drv->flags&I2C_DRV_ON)) return -1; + if(!msg->tx_buf) msg->flags&=~I2C_MSG_MS_TX; + if(!msg->rx_buf) msg->flags&=~I2C_MSG_MS_RX; + i2c_drv_queue_msg(&drv->master_queue,msg); + drv->ctrl_fnc(drv,I2C_CTRL_MS_RQ,NULL); + return 0; +} + +int i2c_drv_master_msg_rem(i2c_drv_t *drv, i2c_msg_head_t *msg) +{ + int act; + I2C_IRQ_LOCK_FINI + do { + i2c_drv_queue_msg(NULL,msg); + I2C_IRQ_LOCK; + act = (msg==drv->msg_act); + if(act) { + drv->msg_act=NULL; + } + I2C_IRQ_UNLOCK; + } while(msg->on_queue || act); + return 0; +} + +int i2c_drv_flush_all(i2c_drv_t *drv) +{ + I2C_IRQ_LOCK_FINI + i2c_msg_head_t *msg, *next; + i2c_msg_head_t *queue[3]; + int quenum; + + I2C_IRQ_LOCK; + queue[0]=drv->master_queue; + queue[1]=drv->slave_queue; + queue[2]=drv->proc_queue; + drv->master_queue=NULL; + drv->slave_queue=NULL; + drv->proc_queue=NULL; + drv->msg_act=NULL; + I2C_IRQ_UNLOCK; + for(quenum=0;quenum<3;quenum++){ + msg=queue[quenum]; + if(!msg) continue; + msg->prev->next=NULL; + for(;msg;msg=next){ + next=msg->next; + msg->flags|=I2C_MSG_FAIL; + msg->on_queue=NULL; + if((msg->flags&I2C_MSG_CB_PROC) && (msg->callback)) + msg->callback(drv,I2C_MSG_CB_PROC,msg); + } + } + return 0; +} + +int i2c_drv_master_transfer_callback(struct i2c_drv *drv, int code, struct i2c_msg_head *msg) +{ + if(code!=I2C_MSG_CB_PROC) return 0; + set_bit(0,&(msg->private)); + return 0; +} + + +int i2c_drv_master_transfer(i2c_drv_t *drv, int addr, int tx_rq, int rx_rq, + void *tx_buf, void *rx_buf, int *ptx_len, int *prx_len) +{ + i2c_msg_head_t msg; + + msg.flags = I2C_MSG_CB_PROC; + msg.addr = addr; + msg.tx_rq = tx_rq; + msg.rx_rq = rx_rq; + msg.tx_buf = tx_buf; + msg.rx_buf = rx_buf; + msg.on_queue = NULL; + msg.callback = i2c_drv_master_transfer_callback; + msg.private = 0; + + if(msg.tx_buf) + msg.flags |= I2C_MSG_MS_TX; + + if(msg.rx_buf && (msg.rx_rq>=1)) + msg.flags |= I2C_MSG_MS_RX; + + if(!(msg.flags & (I2C_MSG_MS_TX | I2C_MSG_MS_RX))) + return 0; + + if(i2c_drv_master_msg_ins(drv, &msg)<0) + return -1; + + /* wait for message process */ + while(test_bit(0,&(msg.private))==0) + drv->poll_fnc(drv); + + if(ptx_len) *ptx_len = msg.tx_len; + if(prx_len) *prx_len = msg.rx_len; + + if(msg.flags & I2C_MSG_FAIL) + return -1; + + return msg.tx_len+msg.rx_len; +} + diff --git a/embedded/libs4c/i2c/i2c_drv.h b/embedded/libs4c/i2c/i2c_drv.h new file mode 100644 index 0000000..50725d1 --- /dev/null +++ b/embedded/libs4c/i2c/i2c_drv.h @@ -0,0 +1,122 @@ +/******************************************************************* + Components for embedded applications builded for + laboratory and medical instruments firmware + + i2c_drv.h - I2C communication automat interface + + Copyright holders and project originators + (C) 2001-2008 by Pavel Pisa pisa@cmp.felk.cvut.cz + (C) 2002-2008 by PiKRON Ltd. http://www.pikron.com + (C) 2007-2008 by Petr Smolik + + The COLAMI components can be used and copied under next licenses + - MPL - Mozilla Public License + - GPL - GNU Public License + - LGPL - Lesser GNU Public License + - and other licenses added by project originators + Code can be modified and re-distributed under any combination + of the above listed licenses. If contributor does not agree with + some of the licenses, he can delete appropriate line. + Warning, if you delete all lines, you are not allowed to + distribute code or build project. + *******************************************************************/ + +#ifndef _I2C_DRV_H_ +#define _I2C_DRV_H_ + +#include +#include + +#if defined(CONFIG_OC_I2C_DRV_SYSLESS) + #define I2C_IRQ_LOCK_FINI unsigned long i2c_irq_lock_flags=0; + #define I2C_IRQ_LOCK \ + {save_flags(i2c_irq_lock_flags);cli();} + #define I2C_IRQ_UNLOCK \ + {restore_flags(i2c_irq_lock_flags);} + #define I2C_MB() {asm volatile ("":::"memory");} +#endif + +struct i2c_drv; + +#define I2C_MSG_TX 0x001 +#define I2C_MSG_RX 0x002 +#define I2C_MSG_MS_TX I2C_MSG_TX +#define I2C_MSG_MS_RX I2C_MSG_RX +#define I2C_MSG_SL_TX I2C_MSG_TX +#define I2C_MSG_SL_RX I2C_MSG_RX +#define I2C_MSG_SLAVE 0x004 +#define I2C_MSG_FAIL 0x008 +#define I2C_MSG_REPEAT 0x010 +#define I2C_MSG_NOPROC 0x020 +#define I2C_MSG_FINISHED 0x040 +#define I2C_MSG_CB_START 0x100 +#define I2C_MSG_CB_END 0x200 +#define I2C_MSG_CB_PROC 0x400 + +typedef struct i2c_msg_head { + unsigned long flags;/* message flags */ + uint8_t sl_cmd; /* command for slave queue lookup */ + uint8_t sl_msk; /* sl_cmd match mask */ + uint16_t addr; /* message destination address */ + uint16_t tx_rq; /* requested TX transfer length */ + uint16_t rx_rq; /* requested RX transfer length */ + uint16_t tx_len; /* finished TX transfer length */ + uint16_t rx_len; /* finished RX transfer length */ + uint8_t *tx_buf; /* pointer to TX data */ + uint8_t *rx_buf; /* pointer to RX data */ + struct i2c_msg_head *prev; + struct i2c_msg_head *next; + struct i2c_msg_head **on_queue; + int (*callback)(struct i2c_drv *ifc, int code, struct i2c_msg_head *msg); + unsigned long private; + } i2c_msg_head_t; + +typedef int (i2c_sfnc_t)(struct i2c_drv *drv, int code); +typedef int (i2c_ctrl_fnc_t)(struct i2c_drv *drv, int ctrl, void *p); + +#define I2C_DRV_ON 1 /* flag indicating that driver is ready to operate */ +#define I2C_DRV_MS_INPR 2 /* master request in in progress */ +#define I2C_DRV_NA 4 /* driver is not active for some period */ +#define I2C_DRV_SL_CEXP 8 /* slave expect receive of the first byte */ +#define I2C_DRV_SL_INRX 0x10 /* slave in mode */ + +#define I2C_DRV_MAGIC 0x12345432 + +typedef struct i2c_drv { + int magic; /* magic number */ + int irq; /* irq number */ + long port; /* base port number */ + uint8_t flags; + uint16_t self_addr; + i2c_msg_head_t *master_queue; + i2c_msg_head_t *slave_queue; + i2c_msg_head_t *proc_queue; + i2c_msg_head_t *msg_act; + i2c_sfnc_t *sfnc_act; + void *failed; + i2c_ctrl_fnc_t *ctrl_fnc; + int (*poll_fnc)(struct i2c_drv *drv); + uint8_t sl_last_cmd; /* last received slave command */ + } i2c_drv_t; + +#define I2C_CTRL_MS_RQ 1 + +#ifdef CONFIG_OC_I2C_CHIP_C552 +int c552_init_start(struct i2c_drv *drv, int port, int irq, int bitrate, int sladr); +#endif /* CONFIG_OC_I2C_CHIP_C552 */ + +void i2c_drv_queue_msg(i2c_msg_head_t **queue, i2c_msg_head_t *msg); +int i2c_drv_init(i2c_drv_t *drv, int port, int irq, int bitrate,int sladr); +int i2c_drv_master_msg_ins(i2c_drv_t *drv, i2c_msg_head_t *msg); +int i2c_drv_master_msg_rem(i2c_drv_t *drv, i2c_msg_head_t *msg); +int i2c_drv_flush_all(i2c_drv_t *drv); +int i2c_drv_master_transfer(i2c_drv_t *drv, int addr, int tx_rq, int rx_rq, + void *tx_buf, void *rx_buf, int *ptx_len, int *prx_len); + +#ifdef I2C_LOG_ENABLE + /* todo */ +#else + #define I2C_PRINTF(x,args...) +#endif + +#endif /* _I2C_DRV_H_ */ diff --git a/embedded/libs4c/kbd/Makefile b/embedded/libs4c/kbd/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/libs4c/kbd/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/libs4c/kbd/Makefile.omk b/embedded/libs4c/kbd/Makefile.omk new file mode 100644 index 0000000..72023f5 --- /dev/null +++ b/embedded/libs4c/kbd/Makefile.omk @@ -0,0 +1,9 @@ +# -*- makefile -*- + +default_CONFIG = CONFIG_KBD=n + +ifeq ($(CONFIG_KBD),y) +lib_LIBRARIES = kbd +include_HEADERS += kbd.h +kbd_SOURCES += kbd_base.c kbd_dev_ops.c +endif #CONFIG_KBD diff --git a/embedded/libs4c/kbd/kbd.h b/embedded/libs4c/kbd/kbd.h new file mode 100644 index 0000000..6721c8d --- /dev/null +++ b/embedded/libs4c/kbd/kbd.h @@ -0,0 +1,45 @@ +#include + +#ifndef KEY_DEFAULT_TIMES + #define KEY_PUSH_T 20 + #define KEY_RELEASE_T 10 + #define KEY_REPFIRST_T 800 + #define KEY_REPNEXT_T 300 +#endif /* KEY_DEFAULT_TIMES */ + +typedef struct { + kbd_key_t bc; + kbd_key_t sc; +} scan2key_t; + +typedef struct { + int scan; + int flag; + kbd_keymod_t is_mod; + kbd_keymod_t set_mod; + kbd_keymod_t xor_mod; +} scan2mod_t; + +#define KBDMOD_SGM_SC 0x8000 +#define KBDMOD_SGM_RELEASE 0x0080 + +extern int key_last_changed; +extern kbd_keymod_t key_mod; +extern unsigned char key_hit; +extern short key_use_timer; +extern unsigned char key_down_arr[KBD_SCAN_CNT]; + +unsigned char kbd_onerow(unsigned char scan); +void kbd_setio(void); + +int kbd_scan(); +void kbd_scan2mod(int scan_code); +int kbd_down(); +kbd_key_t kbd_scan2key(int scan); + +int kbd_Open(KBDDEVICE *pkd); +void kbd_Close(void); +void kbd_GetModifierInfo(kbd_keymod_t *modifiers, kbd_keymod_t *curmodifiers); +int kbd_Read(kbd_key_t *buf, kbd_keymod_t *modifiers, kbd_scan_code_t *scancode); +int kbd_Poll(void); + diff --git a/embedded/libs4c/kbd/kbd_base.c b/embedded/libs4c/kbd/kbd_base.c new file mode 100644 index 0000000..f59dd52 --- /dev/null +++ b/embedded/libs4c/kbd/kbd_base.c @@ -0,0 +1,183 @@ +#include "kbd.h" + +extern scan2key_t *kbd_scan2key_tab; +extern scan2mod_t *kbd_scan2mod_tab; + +/* State of keyboard matrix and key press reporting */ + +unsigned char key_down_arr[KBD_SCAN_CNT]; +unsigned char key_chng_arr[KBD_SCAN_CNT]; +unsigned char key_hit; + +kbd_keymod_t key_mod; + +int key_last_changed; + +/* Internal state for repeat processing */ + +short key_use_timer; +short key_state; +kbd_interval_t key_time; + +#define KEY_STATE_IDLE 0 +#define KEY_STATE_PUSH 1 +#define KEY_STATE_RELEASE 2 +#define KEY_STATE_REPEAT 4 +#define KEY_STATE_NOISE 8 +#define KEY_STATE_BUSY (KEY_STATE_PUSH|KEY_STATE_RELEASE) + + +/** + * kbd_scan - Scan keyboard matrix and report requests for state change + * + * Scans keyboard matrix connected row by row by calling function + * mx1_kbd_onerow(). Number of scanned output lines is defined + * by %KBD_SCAN_CNT. Checks read keyboard state against @key_down_arr + * and updates @key_change_arr array. The @key_down_arr state is + * left unchanged. It is changed later by kbd_down() function. + * Returns 0, if no keyboard activity is found. Returns 1 + * if at least one key is pressed. Returns 2 or 3 in case + * of detected change. + */ +int +kbd_scan() +{ + int i, ret=0; + unsigned char mask, val, chng; + for(i=0,mask=1;iscan);mt++) { + chng=(s==scan_code); + s--; + val=key_down_arr[s/KBD_RET_CNT]&(1<<(s%KBD_RET_CNT)); + if(val) { + key_mod|=mt->set_mod; + if(chng){ + key_mod^=mt->xor_mod; + } + } else { + key_mod&=~mt->set_mod; + } + } +} + +/** + * kbd_down - Detects changed key scancode and applies changes to matrix state + * + * Functions check @key_chng_arr and process changes. + * It updates its internal state @key_state, does + * noise cancellation and repeat timing, then updates + * @key_down_arr, stores detected scancode to @key_last_changed + * and calls modifiers processing kbd_scan2mod(). + * Return value is zero if no change is detected. + * In other case evaluated scancode is returned. + * Variable @key_hit signals by value 1 pressed key, by value + * 2 key release. + */ +int +kbd_down() +{ + int i, j=0; + unsigned char val; + + if(!(key_state&KEY_STATE_BUSY)){ + for(i=0;i>=1; + key_last_changed=i*KBD_RET_CNT+j+1; + if(key_down_arr[i]&(1< +#include "kbd.h" + +#ifdef _DEVICE_H +/* create the microwindows keyboard device */ + +KBDDEVICE kbddev = { + kbd_Open, + kbd_Close, + kbd_GetModifierInfo, + kbd_Read, + kbd_Poll +}; +#endif /* _DEVICE_H */ + +/** + * kbd_Open - Open the keyboard + * @pkd: Pointer to keyboard device + */ +int +kbd_Open(KBDDEVICE *pkd) +{ + key_last_changed=0; + key_mod=0; + key_hit=0; + key_use_timer=0; + memset(key_down_arr,0,sizeof(key_down_arr)); + kbd_setio(); + return 1; +} + +/** + * mx1_kbd_Close - Closes keyboard + */ +void +kbd_Close(void) +{ +} + +/** + * mx1_kbd_Poll - Polls for keyboard events + * + * Returns non-zero value if change is detected. + */ +int +kbd_Poll(void) +{ + if(key_hit) + return 1; + if(kbd_scan()) + kbd_down(); + return key_hit?1:0; +} + +/** + * kbd_GetModifierInfo - Returns the possible modifiers for the keyboard + * @modifiers: If non-NULL, ones in defined modifiers bits are returned. + * @curmodifiers: If non-NULL, ones in actually active modifiers + * bits are returned. + */ +void +kbd_GetModifierInfo(kbd_keymod_t *modifiers, kbd_keymod_t *curmodifiers) +{ + if (modifiers) + *modifiers = 0; /* no modifiers available */ + if (curmodifiers) + *curmodifiers = key_mod&~KBDMOD_SGM_SC; +} + +/** + * mx1_kbd_Read - Reads resolved MWKEY value, modifiers and scancode + * @buf: If non-NULL, resolved MWKEY is stored here + * @modifiers: If non-NULL, ones in actually active modifiers + * bits are returned + * @scancode: If non-NULL, scancode of resolved key is stored + * here + * + * This function reads one keystroke from the keyboard, and the current state + * of the modifier keys (ALT, SHIFT, etc). Returns -1 on error, 0 if no data + * is ready, 1 on a keypress, and 2 on keyrelease. + * This is a non-blocking call. + */ +int +kbd_Read(kbd_key_t *buf, kbd_keymod_t *modifiers, kbd_scan_code_t *scancode) +{ + int ret; + if(!key_hit) { + if(kbd_scan()){ + kbd_down(); + } + } + if(modifiers) + *modifiers = key_mod&~KBDMOD_SGM_SC; + if(!key_hit) + return 0; + if(scancode) + *scancode = key_last_changed; + if(buf) + *buf = kbd_scan2key(key_last_changed); + ret=key_hit; + key_hit=0; + return ret; +} diff --git a/embedded/libs4c/keyval/Makefile b/embedded/libs4c/keyval/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/libs4c/keyval/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/libs4c/keyval/Makefile.omk b/embedded/libs4c/keyval/Makefile.omk new file mode 100644 index 0000000..36743e7 --- /dev/null +++ b/embedded/libs4c/keyval/Makefile.omk @@ -0,0 +1,9 @@ +# -*- makefile -*- + +default_CONFIG = CONFIG_KEYVAL=n + +ifeq ($(CONFIG_KEYVAL),y) +lib_LIBRARIES = keyval +include_HEADERS += keyvalpb.h keyval_id.h +keyval_SOURCES += keyvalpb.c +endif #CONFIG_KEYVAL diff --git a/embedded/libs4c/keyval/keyval_id.h b/embedded/libs4c/keyval/keyval_id.h new file mode 100644 index 0000000..60641d2 --- /dev/null +++ b/embedded/libs4c/keyval/keyval_id.h @@ -0,0 +1,12 @@ +#ifndef _KEYVAL_ID_H_ +#define _KEYVAL_ID_H_ + +#include "keyvalpb.h" + +#define KVPB_KEYID_ULAN_ADDR 0x10 +#define KVPB_KEYID_ULAN_SN 0x11 + +#define KVPB_KEYID_HIS_ACCESS_CODE 0x20 + +#endif /* _KEYVAL_ID_H_ */ + diff --git a/embedded/libs4c/keyval/keyvalpb.c b/embedded/libs4c/keyval/keyvalpb.c new file mode 100644 index 0000000..8dd6d1e --- /dev/null +++ b/embedded/libs4c/keyval/keyvalpb.c @@ -0,0 +1,494 @@ +/******************************************************************* + Key Value Persistent Storage + + keyvalpb.c - key value parameters block + + (C) Copyright 2003-2005 by Pavel Pisa - Originator + (C) Copyright 2004-2005 by Petr Smolik - Originator + + The uLan utilities library can be used, copied and modified under + next licenses + - GPL - GNU General Public License + - LGPL - GNU Lesser General Public License + - MPL - Mozilla Public License + - and other licenses added by project originators + Code can be modified and re-distributed under any combination + of the above listed licenses. If contributor does not agree with + some of the licenses, he/she can delete appropriate line. + Warning, if you delete all lines, you are not allowed to + distribute source code and/or binaries utilizing code. + + See files COPYING and README for details. + + *******************************************************************/ + +#include +#include "keyvalpb.h" + +/* + * kvpb_memsum - Compute checksum of given memory area + * @base: Pointer to the base of of the region + * @size: Size of utilized part of the region + * + * Return Value: Computed checksum value + * File: keyvalpb.c + */ +kvpb_sum_t kvpb_memsum(KVPB_DPTRTYPE uint8_t *base, kvpb_size_t size) +{ + KVPB_LOCALDATA kvpb_sum_t sum=0; + KVPB_DPTRTYPE uint16_t *p=(KVPB_DPTRTYPE uint16_t *)base; + size=(size+1)>>1; + while(size--){ + sum+=*(p++); + } + sum&=KVPB_SUM_MASK; + sum|=KVPB_SUM_OKVAL; + return sum; +} + +#ifndef KVPB_WITHOUT_HADLE +/* + * kvpb_get_psum - Get pointer to the region check sum + * @kvpb_block: Pointer to the KVPB access information/state structure + * @base: Pointer to the base of of the region + * @size: Size of one data block region + * + * Return Value: Pointer to the actual region check sum placement + * File: keyvalpb.c + */ +KVPB_DPTRTYPE kvpb_sum_t *kvpb_get_psum(kvpb_block_t *kvpb_block, + KVPB_DPTRTYPE uint8_t *base, kvpb_size_t size) +#else +KVPB_DPTRTYPE kvpb_sum_t *__kvpb_get_psum( + KVPB_DPTRTYPE uint8_t *base, kvpb_size_t size) +#endif +{ + KVPB_DPTRTYPE kvpb_sum_t *psum; + psum=kvpb_psum_align(kvpb_block,(KVPB_DPTRTYPE kvpb_sum_t*)(base+size)-1); + while((KVPB_DPTRTYPE uint8_t*)psum>=base) { + if (*kvpb_psum_valid_loc(kvpb_block,psum)!=0) + return psum; + psum=kvpb_psum_align(kvpb_block,psum-1); + } + return NULL; +} + +#ifndef KVPB_WITHOUT_HADLE +/* + * kvpb_get_cfk - Get space where to place new key-value pair + * @kvpb_block: Pointer to the KVPB access information/state structure + * @mode: 0 .. work on active/valid data region; + * 1 .. work on the first copy/region, 2 .. work on the second copy/region + * @size: Size of required space for stored value + * + * Return Value: Pointer where next pair should be stored or %NULL + * File: keyvalpb.c + */ +KVPB_DPTRTYPE kvpb_key_t *kvpb_get_cfk(kvpb_block_t *kvpb_block,uint8_t mode,int size) +#else +KVPB_DPTRTYPE kvpb_key_t *__kvpb_get_cfk(uint8_t mode,int size) +#endif +{ + KVPB_DPTRTYPE kvpb_sum_t *psum; + KVPB_DPTRTYPE uint8_t *p; + KVPB_DPTRTYPE uint8_t *r; + p=kvpb_region_base(kvpb_block,0); + size=kvpb_chunk_align(kvpb_block,size+sizeof(kvpb_key_t))+ + (kvpb_block->flags&KVPB_DESC_CHUNKWO?kvpb_chunk_size(kvpb_block):0); + psum=kvpb_block->psum1; + if((!mode && (kvpb_block->flags & KVPB_DESC_USE2ND))||(mode==2)) { + if(!(kvpb_block->flags&KVPB_DESC_DOUBLE)) + return NULL; + p=kvpb_region_base(kvpb_block,1); + psum=kvpb_block->psum2; + } + do { + kvpb_size_t ksize=((KVPB_DPTRTYPE kvpb_key_t *)p)->size; + if(ksize==KVPB_EMPTY) + break; + if(((uint8_t*)psum-(uint8_t*)p)flags&KVPB_DESC_CHUNKWO?kvpb_chunk_size(kvpb_block):0); + } while(1); + r=(KVPB_DPTRTYPE uint8_t*)p+size+sizeof(kvpb_key_t); + if(rflags&=~KVPB_DESC_USE2ND; + + p=kvpb_region_base(kvpb_block,0); + kvpb_block->psum1=kvpb_get_psum(kvpb_block,p,kvpb_block->size); + if (kvpb_block->psum1) { + sum=kvpb_memsum(p,(KVPB_DPTRTYPE uint8_t*)kvpb_block->psum1-p); + if(*kvpb_block->psum1==sum){ + ret=1; + } + } + + if(kvpb_block->flags&KVPB_DESC_DOUBLE){ + p=kvpb_region_base(kvpb_block,1); + kvpb_block->psum2=kvpb_get_psum(kvpb_block,p,kvpb_block->size); + if (kvpb_block->psum2) { + sum=kvpb_memsum(p,(KVPB_DPTRTYPE uint8_t*)kvpb_block->psum2-p); + if(*kvpb_block->psum2==sum) { + if(ret>=0){ + ret=0; + } else { + ret=2; + kvpb_block->flags|=KVPB_DESC_USE2ND; + } + } + } + } else { + if(ret>=0) + ret=0; + } + + if(ret){ + if(!mode) { + kvpb_block->flags|=KVPB_DESC_RO; + } else { + /* correct for FLASH */ + if(ret<0){ + p=kvpb_region_base(kvpb_block,0); + kvpb_block_erase(kvpb_block,p,kvpb_block->size); + kvpb_block->psum1=kvpb_psum_align(kvpb_block,(KVPB_DPTRTYPE kvpb_sum_t*)(p+kvpb_block->size)-1); + sum=kvpb_memsum(p,(KVPB_DPTRTYPE uint8_t*)kvpb_block->psum1-p); + kvpb_block_copy(kvpb_block,kvpb_block->psum1,&sum,sizeof(kvpb_sum_t)); + if(kvpb_block->flags&KVPB_DESC_DOUBLE){ + p=kvpb_region_base(kvpb_block,1); + kvpb_block_erase(kvpb_block,p,kvpb_block->size); + kvpb_block->psum2=kvpb_psum_align(kvpb_block,(KVPB_DPTRTYPE kvpb_sum_t*)(p+kvpb_block->size)-1); + sum=kvpb_memsum(p,(KVPB_DPTRTYPE uint8_t*)kvpb_block->psum2-p); + kvpb_block_copy(kvpb_block,kvpb_block->psum2,&sum,sizeof(kvpb_sum_t)); + } + ret=3; + }else{ + if(ret==1){ + kvpb_block_erase(kvpb_block,kvpb_region_base(kvpb_block,1),kvpb_block->size); + kvpb_block_copy(kvpb_block,kvpb_region_base(kvpb_block,1), + kvpb_region_base(kvpb_block,0),kvpb_block->size); + + }else{ + kvpb_block_erase(kvpb_block,kvpb_region_base(kvpb_block,0),kvpb_block->size); + kvpb_block_copy(kvpb_block,kvpb_region_base(kvpb_block,0), + kvpb_region_base(kvpb_block,1),kvpb_block->size); + } + } + kvpb_block->flags&=~KVPB_DESC_RO; + } + } + kvpb_block_flush(kvpb_block); + if(ret>=0) kvpb_block->flags|=KVPB_DESC_VALID; + return ret; +} + +#ifndef KVPB_WITHOUT_HADLE +/** + * kvpb_first - Get pointer to the first key-value pair in the KVPB storage + * @kvpb_block: Pointer to the KVPB access information/state structure + * @mode: 0 .. iterate over active/valid data region; + * 1 .. iterate over first copy/region, 2 .. iterate over second copy/region + * + * Return Value: Pointer to the first key-value pair + * or %NULL if no pair exist. + * File: keyvalpb.c + */ +KVPB_DPTRTYPE kvpb_key_t *kvpb_first(kvpb_block_t *kvpb_block, uint8_t mode) +#else +KVPB_DPTRTYPE kvpb_key_t *__kvpb_first(uint8_t mode) +#endif +{ + KVPB_DPTRTYPE kvpb_key_t *key=(KVPB_DPTRTYPE kvpb_key_t *)kvpb_region_base(kvpb_block,0); + if((!mode && (kvpb_block->flags & KVPB_DESC_USE2ND))||(mode==2)) { + if(!(kvpb_block->flags&KVPB_DESC_DOUBLE)) + return NULL; + key=(KVPB_DPTRTYPE kvpb_key_t *)kvpb_region_base(kvpb_block,1); + } + while(*kvpb_keyid_valid(kvpb_block,key)==KVPB_KEYID_INVALID) { + key=kvpb_next(kvpb_block,key); + if (!key) + return NULL; + } + return key->size!=KVPB_EMPTY?key:NULL; +} + +#ifndef KVPB_WITHOUT_HADLE +/** + * kvpb_next - Iterate to the next consecutive key-value pair + * @kvpb_block: Pointer to the KVPB access information/state structure + * @key: Pointer to the previous key-value pair + * + * Return Value: Pointer to the next key-value pair + * or %NULL if no/no-more pairs exist. + * File: keyvalpb.c + */ +KVPB_DPTRTYPE kvpb_key_t *kvpb_next(kvpb_block_t *kvpb_block, KVPB_DPTRTYPE kvpb_key_t *key) +#else +KVPB_DPTRTYPE kvpb_key_t *__kvpb_next(KVPB_DPTRTYPE kvpb_key_t *key) +#endif +{ + do { + key=(KVPB_DPTRTYPE kvpb_key_t *)((KVPB_DPTRTYPE uint8_t *)key+ + kvpb_chunk_align(kvpb_block,key->size+sizeof(kvpb_key_t))+ + (kvpb_block->flags&KVPB_DESC_CHUNKWO?kvpb_chunk_size(kvpb_block):0)); + if (key->size==KVPB_EMPTY) return NULL; + } while(*kvpb_keyid_valid(kvpb_block,key)==KVPB_KEYID_INVALID); + return key; +} + +#ifndef KVPB_WITHOUT_HADLE +/** + * kvpb_find - Find first of occurrence of given key ID + * @kvpb_block: Pointer to the KVPB access information/state structure + * @keyid: Ordinal value representing key ID + * @mode: iteration mode modifier: 0 .. search in the active/valid data region; + * 1 .. search in the first copy/region, 2 .. search in the second copy/region + * @key: Previous key occurrence pointer or %NULL value to find first key ID named key-value pair + * + * Return Value: Pointer to the first on subsequent occurrence of key-value pair addressed by given key ID + * or %NULL if no/no-more occurrences exists. + * File: keyvalpb.c + */ +KVPB_DPTRTYPE kvpb_key_t *kvpb_find(kvpb_block_t *kvpb_block, kvpb_keyid_t keyid, uint8_t mode, KVPB_DPTRTYPE kvpb_key_t *key) +#else +KVPB_DPTRTYPE kvpb_key_t *__kvpb_find(kvpb_keyid_t keyid, uint8_t mode, KVPB_DPTRTYPE kvpb_key_t *key) +#endif +{ + if(!(kvpb_block->flags&KVPB_DESC_VALID)) + return NULL; + if (key) { + key=kvpb_next(kvpb_block, key); + } else { + key=kvpb_first(kvpb_block, mode); + } + while(key) { + if((key->keyid==keyid) || (keyid==0)) + return key; + key=kvpb_next(kvpb_block, key); + } + return key; +} + +#ifndef KVPB_WITHOUT_HADLE +/** + * kvpb_compact_region - Compact one KVPB data block/region + * @kvpb_block: Pointer to the KVPB access information/state structure + * @keyid: Key ID which should be omitted from compacted data + * @mode: 0 .. compact active/valid data region; + * 1 .. compact the first data copy, 2 .. compact the second copy + * + * Return Value: Operation cannot be finished. + * File: keyvalpb.c + */ +int kvpb_compact_region(kvpb_block_t *kvpb_block, uint8_t mode, kvpb_keyid_t keyid) +#else +int __kvpb_compact_region(uint8_t mode, kvpb_keyid_t keyid) +#endif +{ + KVPB_DPTRTYPE uint8_t *p; + KVPB_DPTRTYPE kvpb_key_t *des,*src; + + p=kvpb_region_base(kvpb_block,0); + src=(KVPB_DPTRTYPE kvpb_key_t*)kvpb_region_base(kvpb_block,1); + des=(KVPB_DPTRTYPE kvpb_key_t*)p; + kvpb_block->psum1=kvpb_psum_align(kvpb_block, + (KVPB_DPTRTYPE kvpb_sum_t*)(kvpb_region_base(kvpb_block,1))-1); + if((!mode && (kvpb_block->flags & KVPB_DESC_USE2ND))||(mode==2)) { + if(!(kvpb_block->flags&KVPB_DESC_DOUBLE)) + return -1; + src=(KVPB_DPTRTYPE kvpb_key_t*)p; + des=(KVPB_DPTRTYPE kvpb_key_t*)kvpb_region_base(kvpb_block,1); + kvpb_block->psum2=kvpb_psum_align(kvpb_block, + (KVPB_DPTRTYPE kvpb_sum_t*)(kvpb_region_base(kvpb_block,2))-1); + } + kvpb_block_flush(kvpb_block); + kvpb_block_erase(kvpb_block,des,kvpb_block->size); + while(src) { + int s=kvpb_chunk_align(kvpb_block,src->size+sizeof(kvpb_key_t)); + if((*kvpb_keyid_valid(kvpb_block,src)!=KVPB_KEYID_INVALID) && (src->keyid!=keyid)) { + kvpb_block_copy(kvpb_block,des,src,s); + if (kvpb_block->flags&KVPB_DESC_CHUNKWO) s+=kvpb_chunk_size(kvpb_block); + des=(KVPB_DPTRTYPE kvpb_key_t*)((uint8_t*)des+s); + } + src=kvpb_next(kvpb_block, src); + } + kvpb_block_flush(kvpb_block); + return 0; +} + +#ifndef KVPB_WITHOUT_HADLE +/** + * kvpb_get_key - Get value for given key ID + * @kvpb_block: Pointer to the KVPB access information/state structure + * @keyid: Ordinal value representing key ID + * @size: The size of the buffer provided to store data into + * @buf: Pointer to the buffer, where retrieved data should be copied + * + * Return Value: Number of retrieved value bytes if operation is successful + * or -1 if there is no such key ID or operation fails for other reason. + * File: keyvalpb.c + */ +int kvpb_get_key(kvpb_block_t *kvpb_block, kvpb_keyid_t keyid, kvpb_size_t size, void *buf) +#else +int __kvpb_get_key(kvpb_keyid_t keyid, kvpb_size_t size, void *buf) +#endif +{ + KVPB_DPTRTYPE kvpb_key_t *key; + key=kvpb_find(kvpb_block,keyid,0,NULL); + if(!key) return -1; + if(size && buf){ + if(key->sizesize; + memcpy(buf,key+1,size); + } + return key->size; +} + + +#ifndef KVPB_WITHOUT_HADLE +/** + * kvpb_set_key - Set new value or define new key-value pair + * @kvpb_block: Pointer to the KVPB access information/state structure + * @keyid: Ordinal value representing key ID, if or-red with %KVPB_KEYID_DUPLIC, + * the key ID can be defined/inserted multiple times + * @size: Stored value size in bytes + * @buf: Pointer to the stored value data + * + * Return Value: Number of stored bytes (equal to @size) if operation is successful + * or -1 if operation fails. + * File: keyvalpb.c + */ +int kvpb_set_key(kvpb_block_t *kvpb_block, kvpb_keyid_t keyid, kvpb_size_t size, const void *buf) +#else +int __kvpb_set_key(kvpb_keyid_t keyid, kvpb_size_t size, const void *buf) +#endif +{ + KVPB_LOCALDATA kvpb_sum_t sum; + KVPB_DPTRTYPE kvpb_sum_t *psum; + KVPB_DPTRTYPE kvpb_key_t *key; + KVPB_DPTRTYPE uint8_t *p; + + if(!(kvpb_block->flags&KVPB_DESC_VALID)) + return -1; + if(kvpb_block->flags&KVPB_DESC_RO) + return -1; + + /*first region*/ + psum=kvpb_psum_align(kvpb_block,kvpb_block->psum1); + sum=0; + kvpb_block_copy(kvpb_block,kvpb_psum_valid_loc(kvpb_block,psum),&sum,sizeof(kvpb_sum_t)); + kvpb_block->psum1=kvpb_psum_align(kvpb_block,kvpb_block->psum1-1); + if (!(keyid&KVPB_KEYID_DUPLIC) || !buf) { + kvpb_each_from(kvpb_block,keyid,1,key) { + kvpb_keyid_t dkeyid=KVPB_KEYID_INVALID; + kvpb_block_copy(kvpb_block,kvpb_keyid_valid(kvpb_block,key),&dkeyid,sizeof(kvpb_keyid_t)); + } + } + key=kvpb_get_cfk(kvpb_block,1,size); + if (!key) { + kvpb_compact_region(kvpb_block,1,(keyid&KVPB_KEYID_DUPLIC)?0:keyid); + key=kvpb_get_cfk(kvpb_block,1,size); + } + if (keyid && key && buf) { + kvpb_block_copy(kvpb_block,&key->size,&size,sizeof(kvpb_size_t)); + kvpb_block_copy(kvpb_block,&key->keyid,&keyid,sizeof(kvpb_keyid_t)); + kvpb_block_copy(kvpb_block,(uint8_t*)(key+1),buf,/*align???*/ size); + } + /* need flush data to count correct value of new check sum */ + kvpb_block_flush(kvpb_block); + + p=kvpb_region_base(kvpb_block,0); + sum=kvpb_memsum(p,(KVPB_DPTRTYPE uint8_t*)kvpb_block->psum1-p); + kvpb_block_copy(kvpb_block,kvpb_block->psum1,&sum,sizeof(kvpb_sum_t)); + kvpb_block_flush(kvpb_block); + if(!(kvpb_block->flags&KVPB_DESC_DOUBLE)) + return key?size:-1; + + /*Write in the first region failed, switching to backup region */ + if(kvpb_block->flags&KVPB_DESC_RO){ + kvpb_block->flags|=KVPB_DESC_USE2ND; + return -1; + } + + /*second region*/ + psum=kvpb_psum_align(kvpb_block,kvpb_block->psum2); + sum=0; + kvpb_block_copy(kvpb_block,kvpb_psum_valid_loc(kvpb_block,psum),&sum,sizeof(kvpb_sum_t)); + kvpb_block->psum2=kvpb_psum_align(kvpb_block,kvpb_block->psum2-1); + if (!(keyid&KVPB_KEYID_DUPLIC) || !buf) { + kvpb_each_from(kvpb_block,keyid,2,key) { + kvpb_keyid_t dkeyid=KVPB_KEYID_INVALID; + kvpb_block_copy(kvpb_block,kvpb_keyid_valid(kvpb_block,key),&dkeyid,sizeof(kvpb_keyid_t)); + } + } + key=kvpb_get_cfk(kvpb_block,2,size); + if (!key) { + kvpb_compact_region(kvpb_block,2,(keyid&KVPB_KEYID_DUPLIC)?0:keyid); + key=kvpb_get_cfk(kvpb_block,2,size); + } + if (keyid && key && buf) { + kvpb_block_copy(kvpb_block,&key->size,&size,sizeof(kvpb_size_t)); + kvpb_block_copy(kvpb_block,&key->keyid,&keyid,sizeof(kvpb_keyid_t)); + kvpb_block_copy(kvpb_block,(uint8_t*)(key+1),buf,/*align???*/ size); + } + kvpb_block_flush(kvpb_block); + + p=kvpb_region_base(kvpb_block,1); + sum=kvpb_memsum(p,(KVPB_DPTRTYPE uint8_t*)kvpb_block->psum2-p); + kvpb_block_copy(kvpb_block,kvpb_block->psum2,&sum,sizeof(kvpb_sum_t)); + kvpb_block_flush(kvpb_block); + /*Write in the second region failed, switching to the first region */ + if(kvpb_block->flags&KVPB_DESC_RO){ + kvpb_block->flags&=~KVPB_DESC_USE2ND; + return -1; + } + + return key?size:-1; +} + +#ifndef KVPB_MINIMALIZED +/** + * kvpb_err_keys - Erase/delete key-value pair + * @kvpb_block: Pointer to the KVPB access information/state structure + * @keyid: Ordinal value representing key ID + * + * Return Value: Positive or zero value informs about successful operation, + * -1 if operation fails. + * File: keyvalpb.c + */ +int kvpb_err_keys(kvpb_block_t *kvpb_block, kvpb_keyid_t keyid) +{ + return kvpb_set_key(kvpb_block,keyid,0,NULL); +} +#endif /*KVPB_MINIMALIZED*/ + diff --git a/embedded/libs4c/keyval/keyvalpb.h b/embedded/libs4c/keyval/keyvalpb.h new file mode 100644 index 0000000..dbb7774 --- /dev/null +++ b/embedded/libs4c/keyval/keyvalpb.h @@ -0,0 +1,327 @@ +/******************************************************************* + Key Value Persistent Storage + + keyvalpb.h - key value parameters block + + (C) Copyright 2003-2005 by Pavel Pisa - Originator + (C) Copyright 2004-2005 by Petr Smolik - Originator + + The uLan utilities library can be used, copied and modified under + next licenses + - GPL - GNU General Public License + - LGPL - GNU Lesser General Public License + - MPL - Mozilla Public License + - and other licenses added by project originators + Code can be modified and re-distributed under any combination + of the above listed licenses. If contributor does not agree with + some of the licenses, he/she can delete appropriate line. + Warning, if you delete all lines, you are not allowed to + distribute source code and/or binaries utilizing code. + + See files COPYING and README for details. + + *******************************************************************/ + +#ifndef _KEYVALPB_H_ +#define _KEYVALPB_H_ + +//#include +#include +#include +#include + +#ifdef KVPB_MINIMALIZED +#define KVPB_WITHOUT_HADLE +#define KVPB_DPTRTYPE CODE +#define KVPB_LOCALDATA DATA +#endif /*KVPB_MINIMALIZED*/ + +#ifndef KVPB_DPTRTYPE +#define KVPB_DPTRTYPE +#endif /*KVPB_DPTRTYPE*/ + +#ifndef KVPB_LOCALDATA +#define KVPB_LOCALDATA +#endif /*KVPB_DPTRTYPE*/ + +#ifndef KVPB_BLOCK_LOC +#define KVPB_BLOCK_LOC +#endif /*KVPB_BLOCK_LOC*/ + +#define KVPB_EMPTY ((kvpb_size_t)~0) + +#define KVPB_KEYID_INVALID 0 +#define KVPB_KEYID_DUPLIC ((((kvpb_keyid_t)~0)>>1)+1) +#define KBPB_KEYID_INVALID_BIT (KVPB_KEYID_DUPLIC>>1) + +#define KVPB_SUM_MASK (((kvpb_sum_t)~0)>>2) +#define KVPB_SUM_OKVAL (KVPB_SUM_MASK+1) + +#define KVPB_DESC_DOUBLE 0x01 +#define KVPB_DESC_USE2ND 0x02 +#define KVPB_DESC_VALID 0x04 +#define KVPB_DESC_RO 0x08 +#define KVPB_DESC_CHUNKWO 0x10 +#define KVPB_DESC_ALIGN4 0x40 +#define KVPB_DESC_FLASH 0x80 + +#ifdef KVPB_MINIMALIZED +typedef uint16_t kvpb_sum_t; +typedef uint16_t kvpb_size_t; +typedef uint8_t kvpb_keyid_t; +#else /*KVPB_MINIMALIZED*/ +typedef uint32_t kvpb_sum_t; +typedef uint32_t kvpb_size_t; +typedef uint32_t kvpb_keyid_t; +#endif /*KVPB_MINIMALIZED*/ + +/** + * struct kvpb_block - Key-value parameter block access information + * @base: Pointer to the start of physically mapped key-value block data + * @size: Size of one region (one data copy) of parameter block + * @flags: Block state flags: + * %KVPB_DESC_DOUBLE - the information is stored in two consecutive redundant copies/regions; + * %KVPB_DESC_USE2ND - data will be read from the second copy because first one is damaged; + * %KVPB_DESC_VALID - at least one region is valid; + * %KVPB_DESC_RO - because of some problems, only read access is allowed + * %KVPB_DESC_CHUNKWO - chunk can be written only once between erase operations + * %KVPB_DESC_ALIGN4 - data has to be aligned to four bytes + * %KVPB_DESC_FLASH - flash memory is used for data storage + * @psum1: Pointer to the control checksum of the first data region + * @psum2: Pointer to the control checksum of the second data region + * @erase: Function to erase some range of the storage region + * @copy: Function to copy data into or between storage regions + * @flush: Function to finish pending copy operations + * @chunk_size: Minimal store chunk size which can be independently modified + * + * File: keyvalpb.h + */ +typedef struct kvpb_block { + KVPB_DPTRTYPE uint8_t *base; + kvpb_size_t size; + short flags; + KVPB_DPTRTYPE kvpb_sum_t *psum1; + KVPB_DPTRTYPE kvpb_sum_t *psum2; + #ifndef KVPB_MINIMALIZED + int (*erase)(struct kvpb_block *store, void *base,int size); + int (*copy)(struct kvpb_block *store, void *des,const void *src,int len); + int (*flush)(struct kvpb_block *store); + unsigned chunk_size; + #endif /* KVPB_MINIMALIZED */ +} kvpb_block_t; + + +#define kvpb_region_base(block,regidx) (((block)->base+(regidx*(block)->size))) + +#ifndef KVPB_MINIMALIZED + #ifndef kvpb_chunk_size + #define kvpb_chunk_size(store) ((store)->chunk_size<4?4:(store)->chunk_size) + #endif /*kvpb_chunk_size*/ + #define kvpb_chunk_size_mask(store) (kvpb_chunk_size(store)-1) + +/** + * kvpb_chunk_align - Round up KVPB size to minimal store chunk size multiple + * @store: Pointer to the KVPB access information/state structure + * @size: Unaligned size + * + * Return Value: Minimal aligned size to hold unaligned size. + * File: keyvalpb.h + */ + static inline unsigned kvpb_chunk_align(struct kvpb_block *store, unsigned size) + { + return ((size)+kvpb_chunk_size_mask(store))&~kvpb_chunk_size_mask(store); + } + +/** + * kvpb_psum_align - Round up KVPB size to minimal store chunk size multiple + * @store: Pointer to the KVPB access information/state structure + * @psum: Pointer to proposed location of next check sum location + * + * Return Value: Pointer to next check sum location rounded down to next slot. + * File: keyvalpb.h + */ + static inline kvpb_sum_t* kvpb_psum_align(struct kvpb_block *store, kvpb_sum_t *psum) + { + unsigned long mask=~kvpb_chunk_size_mask(store); + if(store->flags&KVPB_DESC_CHUNKWO) + mask<<=1; + return (kvpb_sum_t*)(((unsigned long)(psum))&mask); + } + +/** + * kvpb_psum_valid_loc - Return pointer to check sum validity info location + * @store: Pointer to the KVPB access information/state structure + * @psum: Pointer to corectly aligned check sum location + * + * Return Value: Pointer to location which indicates by zero value, that check sum + * is invalidated. + * File: keyvalpb.h + */ + static inline kvpb_sum_t* kvpb_psum_valid_loc(struct kvpb_block *store, kvpb_sum_t *psum) + { + if(!(store->flags&KVPB_DESC_CHUNKWO)) + return psum; + else + return (kvpb_sum_t*)(((char *)(psum))+kvpb_chunk_size(store)); + } + +/** + * kvpb_block_erase - Wrapper function to call KVPB specific data erase function + * @store: Pointer to the KVPB access information/state structure + * @base: Base address of erased region inside parameter block data region + * @size: Number of bytes to erase + * + * The KVPB mechanism is intended for FLASH type memories and it expect + * that only whole data region can be erased at time. The expected erase state + * is all bits set to the ones. + * + * Return Value: Negative value indicates operation fault. + * File: keyvalpb.h + */ + static inline int kvpb_block_erase(struct kvpb_block *store, void *base,int size) + { + return store->erase(store, base,size) ; + } + +/** + * kvpb_block_copy - Wrapper function to call KVPB specific data copy function + * @store: Pointer to the KVPB access information/state structure + * @des: Address of data destination pointing inside mapped parameter block data region + * @src: Address of data source pointing inside mapped parameter block data or RAM memory + * @len: Number of bytes to transfer + * + * Return Value: Negative value indicates operation fault. + * File: keyvalpb.h + */ + static inline int kvpb_block_copy(struct kvpb_block *store, void *des,const void *src,int len) + { + return store->copy(store, des, src, len); + } + +/** + * kvpb_block_flush - Wrapper function to call KVPB specific flush function + * @store: Pointer to the KVPB access information/state structure + * + * Return Value: Negative value indicates operation fault. + * File: keyvalpb.h + */ + static inline int kvpb_block_flush(struct kvpb_block *store) + { + if(!(store->flush)) return 0; + return store->flush(store); + } + +#else /* KVPB_MINIMALIZED */ + #ifndef kvpb_chunk_size + #define kvpb_chunk_size(store) 1 + #endif /*kvpb_chunk_size*/ + #define kvpb_chunk_size_mask(store) (kvpb_chunk_size(store)-1) + #define kvpb_chunk_align(store,x) \ + (((x)+kvpb_chunk_size_mask(store))&~kvpb_chunk_size_mask(store)) + #define kvpb_psum_align(store,x) \ + ((KVPB_DPTRTYPE kvpb_sum_t*)((unsigned)(x)&~kvpb_chunk_size_mask(store))) + #define kvpb_psum_valid_loc(store,x) \ + ((kvpb_sum_t*)((char*)(x)+0*kvpb_chunk_size(store))) + #define kvpb_block_erase(store, base, size) flash_erase(base, size) + #define kvpb_block_copy(store, des, src, len) flash_copy(des, src, len) + #define kvpb_block_flush(store) flash_flush() + /* forward declarations for external procedures */ + int flash_erase(void *base,int size); + int flash_copy(void *des,const void *src,int len); +#ifndef flash_flush + int flash_flush(void); +#endif /* flash_flush */ +#endif /* KVPB_MINIMALIZED */ + +/** + * struct kvpb_key - Header of stored key value pair and structure for iteration over KVPB + * @size: Non-aligned byte size of the stored value + * @keyid: Ordinal value representing stored data key + * + * The header structure is followed by @size data bytes in the KVPB storage block. + * Because only word aligned write accesses are possible on some architectures + * and memory types the whole size of space occupied by one key-value pair is + * sum of rounded-up data size kvpb_chunk_align(@size) and size of header sizeof(kvpb_key_t). + */ +typedef struct kvpb_key { + kvpb_size_t size; + kvpb_keyid_t keyid; +} kvpb_key_t; + +#ifndef KVPB_WITHOUT_HADLE + static inline kvpb_keyid_t* kvpb_keyid_valid(struct kvpb_block *store, kvpb_key_t *key) + { + if(store->flags&KVPB_DESC_CHUNKWO) + return (kvpb_keyid_t*)((uint8_t*)key+(kvpb_chunk_align(store,key->size+sizeof(kvpb_key_t)))); + return &(key->keyid); + } +#else + #define kvpb_keyid_valid(store,key) (&((key)->keyid)) +#endif /*KVPB_WITHOUT_HADLE*/ + + +#ifndef KVPB_WITHOUT_HADLE +KVPB_DPTRTYPE kvpb_key_t *kvpb_first(kvpb_block_t *block, uint8_t mode); +KVPB_DPTRTYPE kvpb_key_t *kvpb_next(kvpb_block_t *block, KVPB_DPTRTYPE kvpb_key_t *key); +KVPB_DPTRTYPE kvpb_key_t *kvpb_find(kvpb_block_t *block, kvpb_keyid_t keyid, uint8_t mode, KVPB_DPTRTYPE kvpb_key_t *key); +int kvpb_get_key(kvpb_block_t *kvpb_block, kvpb_keyid_t keyid, kvpb_size_t size, void *buf); +int kvpb_set_key(kvpb_block_t *kvpb_block, kvpb_keyid_t keyid, kvpb_size_t size, const void *buf); +int kvpb_err_keys(kvpb_block_t *kvpb_block, kvpb_keyid_t keyid); +int kvpb_check(kvpb_block_t *kvpb_block, uint8_t mode); +#else +extern KVPB_BLOCK_LOC kvpb_block_t kvpb_block_global; +#define kvpb_block (&kvpb_block_global) +KVPB_DPTRTYPE kvpb_sum_t *__kvpb_get_psum(KVPB_DPTRTYPE uint8_t *base, kvpb_size_t size); +KVPB_DPTRTYPE kvpb_key_t *__kvpb_first(uint8_t mode); +KVPB_DPTRTYPE kvpb_key_t *__kvpb_next(KVPB_DPTRTYPE kvpb_key_t *key); +KVPB_DPTRTYPE kvpb_key_t *__kvpb_find(kvpb_keyid_t keyid, uint8_t mode, KVPB_DPTRTYPE kvpb_key_t *key); +int __kvpb_get_key(kvpb_keyid_t keyid, kvpb_size_t size, void *buf); +int __kvpb_set_key(kvpb_keyid_t keyid, kvpb_size_t size, const void *buf); +int __kvpb_check(uint8_t mode); +#define kvpb_get_psum(block, base, size) __kvpb_get_psum(base, size) +#define kvpb_first(block, mode) __kvpb_first(mode) +#define kvpb_next(block, key) __kvpb_next(key) +#define kvpb_find(block, keyid, mode, key) __kvpb_find(keyid, mode, key) +#define kvpb_get_key(block, keyid, size, buf) __kvpb_get_key(keyid, size, buf) +#define kvpb_set_key(block, keyid, size, buf) __kvpb_set_key(keyid, size, buf) +#define kvpb_err_keys(block,keyid) kvpb_set_key(block,keyid,0,NULL) +#define kvpb_check(block, mode) __kvpb_check(mode) +#define kvpb_compact_region(block, mode, keyid) __kvpb_compact_region(mode, keyid) +#define kvpb_get_cfk(block,mode,size) __kvpb_get_cfk(mode,size) +#endif + +/** + * kvpb_for_each - Iterate over all key value pairs + * @root: Pointer to the KVPB access information/state structure + * @key: Iterator of kvpb_key_t* type + * @mode: iteration mode modifier: 0 .. iterate over active/valid data region; + * 1 .. iterate over first copy, 2 .. iterate over second copy + * + * File: keyvalpb.h + */ +#define kvpb_for_each(root, key,mode) \ + for(key=kvpb_first(root,mode);key;\ + key=kvpb_next(key)) + +/** + * kvpb_for_each - Iterate over all key value pairs matching given key ID + * @root: Pointer to the KVPB access information/state structure + * @keyid: Ordinal value representing key ID + * @key: Iterator of kvpb_key_t* type + * @mode: iteration mode modifier: 0 .. iterate over active/valid data region; + * 1 .. iterate over first copy, 2 .. iterate over second copy + * + * File: keyvalpb.h + */ +#define kvpb_each_from(root, keyid, mode, key) \ + for(key=kvpb_find(root,keyid,mode,NULL);key;\ + key=kvpb_find(root,keyid,mode,key)) + +#ifdef KVPB_MINIMALIZED +#define kvpb_key2data(key) ((void*)(key+1)) +#else /*KVPB_MINIMALIZED*/ +static inline void* kvpb_key2data(kvpb_key_t *key) { return key+1; } +#endif /*KVPB_MINIMALIZED*/ + +#endif /* _KEYVALPB_H_ */ + diff --git a/embedded/libs4c/usb/Makefile b/embedded/libs4c/usb/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/libs4c/usb/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/libs4c/usb/Makefile.omk b/embedded/libs4c/usb/Makefile.omk new file mode 100644 index 0000000..71e412a --- /dev/null +++ b/embedded/libs4c/usb/Makefile.omk @@ -0,0 +1,3 @@ +# -*- makefile -*- + +SUBDIRS = base pdiusb more lpcusb diff --git a/embedded/libs4c/usb/base/Makefile b/embedded/libs4c/usb/base/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/libs4c/usb/base/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/libs4c/usb/base/Makefile.omk b/embedded/libs4c/usb/base/Makefile.omk new file mode 100644 index 0000000..01d6e0b --- /dev/null +++ b/embedded/libs4c/usb/base/Makefile.omk @@ -0,0 +1,21 @@ +# -*- makefile -*- + +default_CONFIG = CONFIG_USB_BASE=n + +ifeq ($(CONFIG_USB_BASE),y) +lib_LIBRARIES = usbbase + +#shared_LIBRARIES = + +#include_HEADERS = + +nobase_include_HEADERS = usb/usb.h usb/usb_spec.h usb/usb_srq.h usb/usbdebug.h + +usbbase_SOURCES = usb.c usbdebug.c + +#lib_LOADLIBES = +#bin_PROGRAMS = +endif #CONFIG_USB_BASE + + + diff --git a/embedded/libs4c/usb/base/usb.c b/embedded/libs4c/usb/base/usb.c new file mode 100644 index 0000000..2061c8c --- /dev/null +++ b/embedded/libs4c/usb/base/usb.c @@ -0,0 +1,335 @@ +/*****************************************************/ +/*** Module : USB module ***/ +/*** Author : Roman Bartosinski (C) 28.04.2002 ***/ +/*** Modify : 08.08.2002, 16.04.2003 ***/ +/*****************************************************/ + +//#include "hal.h" +#include +#include +#include +#include +#if __BYTE_ORDER == __BIG_ENDIAN + #include +#endif + +//#include /* to by tu pak nemelo bejt vubec ... */ +#include +#include + +#include /* temporary include - standard control request responses */ + +/* ep0 buffer */ + xdata unsigned char ep0_buffer[ MAX_CONTROL_XFER_DATA_SIZE]; + + +/* usb initialize */ + int usb_init( usb_device_t *udev) { + int ret = 0; + usb_debug_print( DEBUG_LEVEL_LOW, ("init_usb\r\n")); + /* create dynamic fields - endpoints */ + + udev->ep_events = 0; + udev->flags = 0; + udev->configuration = 0; + //udev->altinterface = 0; + udev->ep0.udev = udev; + udev->ep0.flags = USB_STATE_IDLE; + udev->ep0.epnum = 0; + +// usb_init_stdreq_fnc( udev); + + if ( usb_udev_is_fnc(udev,init)) { + ret = usb_udev_init( udev); + } + return ret; + } + + +// connecting to USB by SoftConnect + int usb_connect( usb_device_t *udev) { + int ret = 0; + usb_debug_print( DEBUG_LEVEL_LOW,("USB:ON\n")); + + udev->ep_events = 0; + udev->flags = 0; + udev->configuration = 0; + //udev->altinterface = 0; + udev->ep0.flags &= ~USB_STATE_MASK; //state = USB_STATE_IDLE; + + if ( usb_udev_is_fnc(udev,connect)) { + ret = usb_udev_connect( udev); + } + return ret; + } + + + int usb_disconnect( usb_device_t *udev) { + int ret = 0; + usb_debug_print( DEBUG_LEVEL_LOW,("USB:OFF\n")); + + udev->flags &= ~USB_FLAG_CONFIGURED; + udev->configuration = 0; + udev->ep_events = 0; + //udev->altinterface = 0; + udev->ep0.flags &= ~USB_STATE_MASK; //state = USB_STATE_IDLE; + + if ( usb_udev_is_fnc(udev,disconnect)) { + ret = usb_udev_disconnect( udev); + } + return ret; + } + + + void usb_stall( usb_ep_t *ep) { + usb_debug_print( DEBUG_LEVEL_HIGH, ("USB:STALL %1d\n", ep->epnum)); + if ( usb_udev_is_fnc(ep->udev,stall)) { + usb_udev_stall( ep); + } + } + + + int usb_check_events( usb_device_t *udev) + { + int ret = 0; + if ( usb_udev_is_fnc( udev, check_events)) { + ret = usb_udev_check_events( udev); + } + return ret; + } + + +// ************************************ +// *** Control transfer functions *** +// ************************************ + + void usb_complete_control_transfer(usb_ep_t *ep0, int status) { + usb_debug_print( DEBUG_LEVEL_HIGH, ( "CCT:st=%d", status)); + #ifdef USB_WITH_CB_FNC + if ( ep0->complete_fnc ) + ep0->complete_fnc( ep0, status); + ep0->next_pkt_fnc = NULL; + ep0->complete_fnc = NULL; + #endif /*USB_WITH_CB_FNC*/ + ep0->flags &= ~USB_STATE_MASK; //state = USB_STATE_IDLE; + } + +/* Send any data in the data phase of the control transfer */ + void usb_send_control_data( usb_device_t *udev, unsigned char *pData, unsigned short len) { + usb_ep_t *ep0 = &(udev->ep0); + usb_debug_print( DEBUG_LEVEL_HIGH, ( "SCD:ptr=%p,s=%d\n", pData, len)); + ep0->efnc = NULL; + ep0->ptr = pData; + ep0->actual = 0; + if ( ep0->size > len) ep0->size = len; + + /* Schedule TX processing for later execution */ + ep0->flags = (ep0->flags & ~USB_STATE_MASK) | USB_STATE_TRANSMIT; + udev->flags |= USB_FLAG_EVENT_TX0; + } + + void usb_set_control_endfnc( usb_device_t *udev, endfnc_t *efnc) { //REENTRANT_SIGN { + udev->ep0.efnc = efnc; + } + + void usb_ack_setup( usb_ep_t *ep) { + usb_udev_ack_setup(ep->udev); + } + + +/************************************************************* + *** Control endpoint0 responses + *************************************************************/ + int usb_control_response( usb_device_t *udev) { + int ret = 0; + usb_ep_t *ep0 = &(udev->ep0); + +/* response to interrupt BusReset */ + if ( udev->flags & USB_FLAG_BUS_RESET) { + udev->flags &= ~(USB_FLAG_BUS_RESET | USB_FLAG_SUSPEND); // usb_flags.bus_reset = 0; usb_flags.configured = 0; + usb_debug_print( DEBUG_LEVEL_MEDIUM, ( "USBreset\n")); + ret = 1; + } +/* response to interrupt Suspend */ + if ( udev->flags & USB_FLAG_SUSPEND) { + udev->flags &= ~(USB_FLAG_SUSPEND); //usb_flags.suspend = 0; + usb_debug_print( DEBUG_LEVEL_MEDIUM, ( "USBsuspend\n")); + ret = 1; + } + + +/* response to interrupt SetupPacket execute response to standard device request or vendor request */ + if ( udev->flags & USB_FLAG_SETUP) { + unsigned char type, req; + USB_DEVICE_REQUEST *preq = &(udev->request); + + ep0->ptr = NULL; + ep0->size = 0; + ep0->actual = 0; + ep0->efnc = NULL; + ep0->flags &= ~USB_STATE_MASK; //state = USB_STATE_IDLE; + udev->flags &= ~USB_FLAG_SETUP; // usb_flags.setup_packet = 0; + #ifdef USB_WITH_CB_FNC + ep0->next_pkt_fnc = NULL; + ep0->complete_fnc = NULL; + #endif /*USB_WITH_CB_FNC*/ + + if ( usb_udev_read_endpoint(ep0, preq, sizeof( USB_DEVICE_REQUEST)) + != sizeof( USB_DEVICE_REQUEST)) { + usb_udev_stall( ep0); + return -1; + } + #if __BYTE_ORDER == __BIG_ENDIAN + preq->wValue = bswap_16( preq->wValue); + preq->wIndex = bswap_16( preq->wIndex); + preq->wLength = bswap_16( preq->wLength); + #endif + usb_debug_print( DEBUG_LEVEL_MEDIUM,( "SePa:x%02X,x%02X,x%04X,x%04X,x%04X\n", preq->bmRequestType, preq->bRequest, preq->wValue, preq->wIndex, preq->wLength)); + + // acknowledge setup here + if(usb_udev_is_fnc( udev, ack_control_setup)) { + usb_udev_ack_control_setup(udev); + } + + ep0->size = preq->wLength; + if ((( preq->bmRequestType & USB_DATA_DIR_MASK) == USB_DATA_DIR_FROM_HOST) && preq->wLength) { + ep0->ptr = ep0_buffer; + ep0->flags = (ep0->flags & ~USB_STATE_MASK) | USB_STATE_RECEIVE; + } + + type = preq->bmRequestType & USB_REQUEST_TYPE_MASK; + req = preq->bRequest & USB_REQUEST_MASK; + if ( type == USB_STANDARD_REQUEST) { + int ret = -1; + usb_debug_print( DEBUG_LEVEL_HIGH, ( "StdReq-%d\n", req)); +/* + if ( (udev->stdreq[ req]) != NULL) { + ret = udev->stdreq[ req]( udev); + } + if( ret < 0) + udev->ack_setup( udev); +*/ + switch( req) { + case USB_REQUEST_GET_STATUS: ret=usb_stdreq_get_status( udev); break; + case USB_REQUEST_CLEAR_FEATURE: ret=usb_stdreq_clear_feature( udev); break; + case USB_REQUEST_SET_FEATURE: ret=usb_stdreq_set_feature( udev); break; + case USB_REQUEST_SET_ADDRESS: ret=usb_stdreq_set_address( udev); break; + + case USB_REQUEST_GET_DESCRIPTOR: ret=usb_stdreq_get_descriptor( udev); break; +// case USB_REQUEST_SET_DESCRIPTOR: break; + case USB_REQUEST_GET_CONFIGURATION: ret=usb_stdreq_get_configuration( udev); break; + case USB_REQUEST_SET_CONFIGURATION: ret=usb_stdreq_set_configuration( udev); break; + case USB_REQUEST_GET_INTERFACE: ret=usb_stdreq_get_interface( udev); break; + case USB_REQUEST_SET_INTERFACE: ret=usb_stdreq_set_interface( udev); break; +// case USB_REQUEST_SYNC_FRAME: break; +// default: ret=-1; break; + } + if (ret<0) + usb_udev_stall( ep0); + } else { + if ( type == USB_VENDOR_REQUEST) { +//putchar('#'); + #ifdef USB_WITH_CB_FNC + int ret = -1; +// if(USBVendorRequestCBFnc != NULL) +// ret = USBVendorRequestCBFnc(&usb_ep0, &dreq); + if ( udev->vendor_fnc != NULL) + ret = udev->vendor_fnc( udev); + if ( ret < 0) + usb_udev_stall( ep0); +// #else /*USB_WITH_CB_FNC*/ +// if ( USBVendorRequest(&dreq) == -1) +// udev->ack_setup( udev); + #endif /*USB_WITH_CB_FNC*/ + } else if ( type == USB_CLASS_REQUEST) { + #ifdef USB_WITH_CB_FNC + int ret = -1; +// if(USBClassRequestCBFnc != NULL) +// ret = USBClassRequestCBFnc(&usb_ep0, &dreq); + if( udev->class_fnc != NULL) + ret = udev->class_fnc( udev); + if( ret < 0) + usb_udev_stall( ep0); +// #else /*USB_WITH_CB_FNC*/ +// if ( USBClassRequest(&dreq) == -1) +// udev->ack_setup( udev); + #endif /*USB_WITH_CB_FNC*/ + } else + usb_udev_stall( ep0); + } + ret = 1; + } + +/* response to interrupt Ep0RxInt - receive data */ + if ( udev->flags & USB_FLAG_EVENT_RX0) { + int i; + udev->flags &= ~USB_FLAG_EVENT_RX0; + usb_debug_print( DEBUG_LEVEL_MEDIUM, ( "Ep0Rx\n")); + if (( ep0->flags & USB_STATE_MASK) == USB_STATE_RECEIVE) { + usb_debug_print( DEBUG_LEVEL_HIGH, ( "RCV:p=%04lX,s=%d\n", (unsigned long)ep0->ptr, ep0->size)); + + i = usb_udev_read_endpoint(ep0, ep0->ptr, ep0->max_packet_size); + ep0->actual += i; + ep0->ptr +=i; + + #ifdef USB_WITH_CB_FNC + if ( ep0->next_pkt_fnc ) { + if( ep0->next_pkt_fnc( ep0, i, USB_NEXT_PKT_REC) < 0) { + usb_udev_stall( ep0); + return -1; + } + } + #endif /*USB_WITH_CB_FNC*/ + + if (( i != ep0->max_packet_size) || ( ep0->actual >= ep0->size)) { + usb_complete_control_transfer( ep0, USB_COMPLETE_OK ); + if ( ep0->efnc) { + ep0->efnc(ep0); + } + } + } else { + ep0->flags &= ~USB_STATE_MASK; //state = USB_STATE_IDLE; + } + } + +/* response to interrupt Ep0TxInt */ + if ( udev->flags & USB_FLAG_EVENT_TX0) { + short i = ep0->size - ep0->actual; + udev->flags &= ~USB_FLAG_EVENT_TX0; +//usb_debug_print( DEBUG_LEVEL_LOW, ("0S-%d(%d){%d}\n", ep0->state, ep0->size, ep0->max_packet_size)); + usb_debug_print( DEBUG_LEVEL_MEDIUM, ( "EP0Tx:i=%d\n", i)); + + if (( ep0->flags & USB_STATE_MASK) == USB_STATE_TRANSMIT) { + + if(i > ep0->max_packet_size) i = ep0->max_packet_size; + + if ( i > 0 ) { + #ifdef USB_WITH_CB_FNC + if ( ep0->next_pkt_fnc) { + if( ep0->next_pkt_fnc( ep0, i, USB_NEXT_PKT_SEND) < 0) { + usb_udev_stall( ep0); + return -1; + } + } + #endif /*USB_WITH_CB_FNC*/ + usb_debug_print( DEBUG_LEVEL_HIGH, ("Wr(%d)\n",i)); + usb_udev_write_endpoint( ep0, ep0->ptr, i); + ep0->actual += i; + ep0->ptr +=i; + + if( i != ep0->max_packet_size) { + /* last packed without full size has been sent, state can change to idle */ + usb_complete_control_transfer( ep0, USB_COMPLETE_OK ); + } + } else { + usb_udev_ack_setup( udev); // Send zero packet at the end ??? + usb_complete_control_transfer( ep0, USB_COMPLETE_OK ); + } + } + ret = 1; + } + + return ret; + } + + diff --git a/embedded/libs4c/usb/base/usb/usb.h b/embedded/libs4c/usb/base/usb/usb.h new file mode 100644 index 0000000..40338a6 --- /dev/null +++ b/embedded/libs4c/usb/base/usb/usb.h @@ -0,0 +1,181 @@ +/**************************************************************/ +/*** Module : USB module - header file ***/ +/*** Author : Roman Bartosinski (C) 28.04.2002 ***/ +/*** Modify : 08.08.2002 ***/ +/*** Rewrite: 05.09.2002 ***/ +/**************************************************************/ + +#ifndef _USB_MODULE_ + #define _USB_MODULE_ + + #include "usb_spec.h" + +#if defined(SDCC) || defined(__KEIL__) || defined(__C51__) + /*8051 special handling*/ + #define REENTRANT_SIGN reentrant +#else + #define xdata /*nothing*/ + #define REENTRANT_SIGN /*nothing*/ +#endif + +#define USB_WITH_CB_FNC +//#define USB_WITH_UDEV_FNC + +#ifdef USB_WITH_UDEV_FNC + #define USB_UDEV_REENTRANT_SIGN REENTRANT_SIGN +#else /*USB_WITH_UDEV_FNC*/ + #define USB_UDEV_REENTRANT_SIGN /*nothing*/ +#endif /*USB_WITH_UDEV_FNC*/ + +/* control endpoint */ + #define MAX_CONTROL_XFER_DATA_SIZE 8 + + struct usb_ep_t; + + typedef void endfnc_t( struct usb_ep_t *ep) REENTRANT_SIGN; + + #define USB_NEXT_PKT_SEND 0 + #define USB_NEXT_PKT_REC 1 + + #define USB_COMPLETE_OK 0 + #define USB_COMPLETE_FAIL -1 + + typedef struct usb_ep_t { + struct usb_device_t *udev; /* pointer to parent device */ + unsigned short max_packet_size; /* max. size of endpoint package, e.g. PDI_EP0_PACKET_SIZE */ + unsigned char *ptr; /* pointer to current transmitted data */ + unsigned int size; /* full size of current transmitted data */ + unsigned int actual; /* transmitted data size */ + endfnc_t *efnc; /* ??? */ + unsigned char flags; /* endpoint flags & state - idle,receiving, transmitting ??? HERE ??? */ + unsigned char epnum; /* endpoint number (index) - endpoint0 must be set to 0 */ + unsigned short event_mask; /* event(interrupt) mask for this endpoint, e.g. PDI_INT_EP1_IN for pdiusbd1x */ + #ifdef USB_WITH_CB_FNC + int (*next_pkt_fnc)(struct usb_ep_t *ep, int len, int codeval) REENTRANT_SIGN; + int (*complete_fnc)(struct usb_ep_t *ep, int status) REENTRANT_SIGN; + long user_data; + #endif /*USB_WITH_CB_FNC*/ + } usb_ep_t; + + +/* Vendor & Class functions */ +/* + #ifdef USB_WITH_CB_FNC + typedef int usb_vendor_extension_fnc_t(usb_ep_t *ep, USB_DEVICE_REQUEST *dreq); + extern xdata usb_vendor_extension_fnc_t USBVendorRequestCBFnc; + + typedef int usb_class_extension_fnc_t(usb_ep_t *ep, USB_DEVICE_REQUEST *dreq); + extern xdata usb_class_extension_fnc_t USBClassRequestCBFnc; + #else //USB_WITH_CB_FNC + char USBVendorRequest( USB_DEVICE_REQUEST *dr); + char USBClassRequest( USB_DEVICE_REQUEST *dr); + #endif //USB_WITH_CB_FNC +*/ + + +/* USB device */ + typedef struct usb_device_t { + unsigned char id; /* device ID ??? */ + unsigned char flags; /* usb device flags + endpoint0 events */ + unsigned char ep_events; /* one bit for each endpoint (without ep0) event,(bit0 for udev->ep[0], bit1 for udev->ep[1], ...)*/ + unsigned char configuration; /* current configuration */ +// unsigned char interface; /* current interface */ +// unsigned char altinterface; /* current alternative interface */ + + //int (stdreq[13])( struct usb_device_t *udev) REENTRANT_SIGN; /* pointer to array of standard request processing functions */ + int (*vendor_fnc)( struct usb_device_t *udev) REENTRANT_SIGN; /* pointer to vendor request processing function */ + int (*class_fnc)( struct usb_device_t *udev) REENTRANT_SIGN; /* pointer to class request processing function */ + + #ifdef USB_WITH_UDEV_FNC + int (*init)( struct usb_device_t *udev) REENTRANT_SIGN; /* function for hw specific part of initialize usb device */ + int (*connect)( struct usb_device_t *udev) REENTRANT_SIGN; /* function for hw specific part of connecting device to usb */ + int (*disconnect)( struct usb_device_t *udev) REENTRANT_SIGN; /* function for hw specific part of disconnecting device to usb */ + void (*ack_setup)( struct usb_device_t *udev) REENTRANT_SIGN; /* function for hw specific part of control response acknowledge */ + void (*ack_control_setup)( struct usb_device_t *udev) REENTRANT_SIGN; /* function for hw specific part of control response acknowledge */ + int (*check_events)( struct usb_device_t *udev) REENTRANT_SIGN; /* hw specific part of function for checking events */ + void (*stall)( usb_ep_t *ep) REENTRANT_SIGN; /* hw specific function for stall endpoint */ + int (*read_endpoint)( usb_ep_t *ep, void *ptr, int size) REENTRANT_SIGN; + int (*write_endpoint)( usb_ep_t *ep, const void *ptr, int size) REENTRANT_SIGN; + #endif /*USB_WITH_UDEV_FNC*/ + +// USB_DEVICE_REQUEST *request; /* current usb request - only if there is a valid usb request in processing */ + USB_DEVICE_REQUEST request; /* usb device request */ + + unsigned char cntep; /* number of device endpoints in ep array without EP0 */ + usb_ep_t ep0; /* endpoint 0 */ + usb_ep_t *ep; /* others endpoints in array */ + } usb_device_t; + + +/* endpoint flags */ + /* endpoint state */ + #define USB_STATE_IDLE 0x00 + #define USB_STATE_TRANSMIT 0x01 + #define USB_STATE_RECEIVE 0x02 + #define USB_STATE_MASK 0x03 + +/* usb_device flags */ + #define USB_FLAG_CONFIGURED 0x01 + #define USB_FLAG_BUS_RESET 0x02 + #define USB_FLAG_SUSPEND 0x04 + #define USB_FLAG_SETUP 0x08 // setup_packet + #define USB_FLAG_REMOTE_WAKE 0x10 + + #define USB_FLAG_EVENT_RX0 0x40 + #define USB_FLAG_EVENT_TX0 0x80 + + + +/* device functions - inline ??? */ + int usb_init( usb_device_t *udev); + int usb_connect( usb_device_t *udev); + int usb_disconnect( usb_device_t *udev); + void usb_stall( usb_ep_t *ep); + + #define usb_stall_ep0( udev) \ + do { \ + usb_stall( &(udev->ep0)); \ + } while(0) + +/* check usb events(interrupts) */ + int usb_check_events( usb_device_t *udev); +/* response to standard constrol requests */ + int usb_control_response( usb_device_t *udev); +/* send control data */ + void usb_send_control_data( usb_device_t *udev, unsigned char *pData, unsigned short len); + void usb_set_control_endfnc( usb_device_t *udev, endfnc_t *efnc);// REENTRANT_SIGN; + void usb_ack_setup( usb_ep_t *ep); + + +/* Standard requests functions */ +// typedef int (*usb_stdreq_fnc_t)( usb_device_t *udev) REENTRANT_SIGN; +// extern xdata usb_stdreq_fnc_t usb_standard_requests[13]; + + +#ifdef USB_WITH_UDEV_FNC + + #define usb_udev_is_fnc(_M_udev, _M_fnc) (_M_udev->_M_fnc) + + #define usb_udev_init(_M_udev) (_M_udev->init(_M_udev)) + #define usb_udev_connect(_M_udev) (_M_udev->connect(_M_udev)) + #define usb_udev_disconnect(_M_udev) (_M_udev->disconnect(_M_udev)) + #define usb_udev_ack_setup(_M_udev) (_M_udev->ack_setup(_M_udev)) + #define usb_udev_ack_control_setup(_M_udev) (_M_udev->ack_control_setup(_M_udev)) + #define usb_udev_check_events(_M_udev) (_M_udev->check_events(_M_udev)) + + #define usb_udev_stall(_M_ep) ((_M_ep)->udev->stall(_M_ep)) + + #define usb_udev_read_endpoint(_M_ep, _M_ptr, _M_size) \ + ((_M_ep)->udev->read_endpoint(_M_ep, _M_ptr, _M_size)) + + #define usb_udev_write_endpoint(_M_ep, _M_ptr, _M_size) \ + ((_M_ep)->udev->write_endpoint(_M_ep, _M_ptr, _M_size)) + +#else /*USB_WITH_UDEV_FNC*/ + + #define USB_PDI_DIRECT_FNC + #include "pdi.h" + +#endif /*USB_WITH_UDEV_FNC*/ + +#endif diff --git a/embedded/libs4c/usb/base/usb/usb_spec.h b/embedded/libs4c/usb/base/usb/usb_spec.h new file mode 100644 index 0000000..7d6f87b --- /dev/null +++ b/embedded/libs4c/usb/base/usb/usb_spec.h @@ -0,0 +1,228 @@ +/*************************************************/ +/*** Module : USB specification ***/ +/*** Author : Roman Bartosinski 29.07.2002 ***/ +/*** Modify : 08.08.2002, 14.01.2003 ***/ +/*************************************************/ + +#ifndef _USB_SPECIFICATIONS_AND_DEFINITIONS_MODULE + #define _USB_SPECIFICATIONS_AND_DEFINITIONS_MODULE + +/*#include */ +#include + +#ifndef PACKED + #ifdef __GNUC__ + #define PACKED __attribute__((packed)) + #else /*__GNUC__*/ + #define PACKED /*nothing*/ + #endif /*__GNUC__*/ +#endif + +/* this section is from __USB100.H__ and __CHAP9.H__ and define USB constants and structs */ + +/* *** USB Device Request *** (spec. 9.3) */ + typedef struct _tag_usb_device_request { + uint8_t bmRequestType; + uint8_t bRequest; + uint16_t wValue; + uint16_t wIndex; + uint16_t wLength; + } USB_DEVICE_REQUEST; + +/****************************************************************************************/ +/*** definitions for USB tranfer standard packets described in USB secif. - chapter 9 ***/ +/****************************************************************************************/ + #define DEVICE_ADDRESS_MASK 0x7F + +/* bmRequestType D7 - Data transfer direction */ + #define USB_DATA_DIR_MASK (uint8_t)0x80 + #define USB_DATA_DIR_FROM_HOST (uint8_t)0x00 + #define USB_DATA_DIR_TO_HOST (uint8_t)0x80 +/* bmRequestType D4..D0 - Recipient */ + #define USB_RECIPIENT (uint8_t)0x1F + #define USB_RECIPIENT_DEVICE (uint8_t)0x00 + #define USB_RECIPIENT_INTERFACE (uint8_t)0x01 + #define USB_RECIPIENT_ENDPOINT (uint8_t)0x02 + #define USB_RECIPIENT_OTHER (uint8_t)0x03 +/* bmRequestType D6..D5 - Type */ + #define USB_REQUEST_TYPE_MASK (uint8_t)0x60 + #define USB_STANDARD_REQUEST (uint8_t)0x00 + #define USB_CLASS_REQUEST (uint8_t)0x20 + #define USB_VENDOR_REQUEST (uint8_t)0x40 +/* Standard request codes (spec. 9.4) */ + #define USB_REQUEST_MASK (uint8_t)0x0F + #define USB_REQUEST_GET_STATUS 0x00 + #define USB_REQUEST_CLEAR_FEATURE 0x01 + #define USB_REQUEST_SET_FEATURE 0x03 + #define USB_REQUEST_SET_ADDRESS 0x05 + #define USB_REQUEST_GET_DESCRIPTOR 0x06 + #define USB_REQUEST_SET_DESCRIPTOR 0x07 + #define USB_REQUEST_GET_CONFIGURATION 0x08 + #define USB_REQUEST_SET_CONFIGURATION 0x09 + #define USB_REQUEST_GET_INTERFACE 0x0A + #define USB_REQUEST_SET_INTERFACE 0x0B + #define USB_REQUEST_SYNC_FRAME 0x0C +/* Descriptor types (spec. 9.4) */ + #define USB_DESCRIPTOR_TYPE_DEVICE 0x01 + #define USB_DESCRIPTOR_TYPE_CONFIGURATION 0x02 + #define USB_DESCRIPTOR_TYPE_STRING 0x03 + #define USB_DESCRIPTOR_TYPE_INTERFACE 0x04 + #define USB_DESCRIPTOR_TYPE_ENDPOINT 0x05 + #define USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER 0x06 + #define USB_DESCRIPTOR_TYPE_OTHER_SPEED_CONFIGURATION 0x07 + #define USB_DESCRIPTOR_TYPE_POWER 0x08 + +/* values for the bits returned by the USB GET_STATUS command (spec. 9.4.5) */ + #define USB_GETSTATUS_SELF_POWERED 0x01 + #define USB_GETSTATUS_REMOTE_WAKEUP_ENABLED 0x02 + +/* values for standard request Clear Feature */ + #define USB_FEATURE_ENDPOINT_STALL 0x0000 + #define USB_FEATURE_REMOTE_WAKEUP 0x0001 + + +/*******************************************************/ +/*** Standard USB Descriptor Definitions (spec. 9.6) ***/ +/*******************************************************/ + +/* *** DEVICE *** (spec. 9.6.1) */ + struct _tag_usb_device_descriptor { + uint8_t bLength; + uint8_t bDescriptorType; + uint16_t bcdUSB; + uint8_t bDeviceClass; + uint8_t bDeviceSubClass; + uint8_t bDeviceProtocol; + uint8_t bMaxPacketSize0; + uint16_t idVendor; + uint16_t idProduct; + uint16_t bcdDevice; + uint8_t iManufacturer; + uint8_t iProduct; + uint8_t iSerialNumber; + uint8_t bNumConfigurations; + } PACKED; + typedef struct _tag_usb_device_descriptor + USB_DEVICE_DESCRIPTOR, *PUSB_DEVICE_DESCRIPTOR; + +/* *** DEVICE_QUALIFIER *** (spec. 9.6.2) */ + struct _tag_usb_device_qualifier_descriptor { + uint8_t bLength; + uint8_t bDescriptorType; + uint16_t bcdUSB; + uint8_t bDeviceClass; + uint8_t bDeviceSubClass; + uint8_t bDeviceProtocol; + uint8_t bMaxPacketSize0; + uint8_t bNumConfigurations; + uint8_t bReserved; + } PACKED; + typedef struct _tag_usb_device_qualifier_descriptor + USB_DEVICE_QUALIFIER_DESCRIPTOR, *PUSB_DEVICE_QUALIFIER_DESCRIPTOR; + +/* *** CONFIGURATION *** (spec. 9.6.3) */ + struct _tag_usb_configuration_descriptor { + uint8_t bLength; + uint8_t bDescriptorType; + uint16_t wTotalLength; + uint8_t bNumInterfaces; + uint8_t bConfigurationValue; + uint8_t iConfiguration; + uint8_t bmAttributes; + uint8_t MaxPower; + } PACKED; + typedef struct _tag_usb_configuration_descriptor + USB_CONFIGURATION_DESCRIPTOR, *PUSB_CONFIGURATION_DESCRIPTOR; +/* definitions for bits in the bmAttributes field of a configuration descriptor. (spec. 9.6.3) */ + #define USB_CONFIG_POWERED_MASK 0xc0 + #define USB_CONFIG_BUS_POWERED 0x80 + #define USB_CONFIG_SELF_POWERED 0x40 + #define USB_CONFIG_REMOTE_WAKEUP 0x20 + #define BUS_POWERED 0x80 + #define SELF_POWERED 0x40 + #define REMOTE_WAKEUP 0x20 + +/* *** OTHER_SPEED_CONFIGURATION *** (spec. 9.6.4) */ + struct _tag_usb_other_speed_configuration { + uint8_t bLength; + uint8_t bDescriptorType; + uint16_t wTotalLength; + uint8_t bNumInterfaces; + uint8_t bConfigurationValue; + uint8_t iConfiguration; + uint8_t bmAttributes; + uint8_t bMaxPower; + } PACKED; + typedef struct _tag_usb_other_speed_configuration + USB_OTHER_SPEED_CONFIGURATION_DESCRIPTOR, *PUSB_OTHER_SPEED_CONFIGURATION_DESCRIPTOR; + +/* *** INTERFACE *** (spec. 9.6.5) */ + struct _tag_usb_interface_descriptor { + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bInterfaceNumber; + uint8_t bAlternateSetting; + uint8_t bNumEndpoints; + uint8_t bInterfaceClass; + uint8_t bInterfaceSubClass; + uint8_t bInterfaceProtocol; + uint8_t iInterface; + } PACKED; + typedef struct _tag_usb_interface_descriptor + USB_INTERFACE_DESCRIPTOR, *PUSB_INTERFACE_DESCRIPTOR; + +/* *** ENDPOINT *** (spec. 9.6.6) */ + struct _tag_usb_endpoint_descriptor { + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bEndpointAddress; + uint8_t bmAttributes; + uint16_t wMaxPacketSize; + uint8_t bInterval; + } PACKED; + typedef struct _tag_usb_endpoint_descriptor + USB_ENDPOINT_DESCRIPTOR, *PUSB_ENDPOINT_DESCRIPTOR; + +/* Endpoint direction bit, stored in address (spec. 9.6.6) */ + #define USB_ENDPOINT_DIRECTION_MASK 0x80 +/* test direction bit in the bEndpointAddress field of an endpoint descriptor. */ + #define USB_ENDPOINT_DIRECTION_OUT(addr) (!((addr) & USB_ENDPOINT_DIRECTION_MASK)) + #define USB_ENDPOINT_DIRECTION_IN(addr) ((addr) & USB_ENDPOINT_DIRECTION_MASK) +/* Values for bmAttributes field of an endpoint descriptor (spec. 9.6.6) */ + #define USB_ENDPOINT_TYPE_MASK 0x03 + #define USB_ENDPOINT_TYPE_CONTROL 0x00 + #define USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01 + #define USB_ENDPOINT_TYPE_BULK 0x02 + #define USB_ENDPOINT_TYPE_INTERRUPT 0x03 + +/* *** STRING *** (spec. 9.6.7) */ + struct _tag_usb_string_descriptor { + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t *bString; + } PACKED; + typedef struct _tag_usb_string_descriptor + USB_STRING_DESCRIPTOR, *PUSB_STRING_DESCRIPTOR; + + +/*******************************************/ +/*** USB_IF - Defined USB device classes ***/ +/*******************************************/ + #define USB_DEVICE_CLASS_RESERVED 0x00 + #define USB_DEVICE_CLASS_AUDIO 0x01 + #define USB_DEVICE_CLASS_COMMUNICATIONS 0x02 + #define USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03 + #define USB_DEVICE_CLASS_MONITOR 0x04 + #define USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05 + #define USB_DEVICE_CLASS_POWER 0x06 + #define USB_DEVICE_CLASS_PRINTER 0x07 + #define USB_DEVICE_CLASS_STORAGE 0x08 + #define USB_DEVICE_CLASS_HUB 0x09 + #define USB_DEVICE_CLASS_APPLICATION_SPECIFIC 0xFE + #define USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF + + /* define application specific device class subclasses */ + #define USB_APPL_SUBCLASS_FIRMWARE_UPDATE 0x01 + #define USB_APPL_SUBCLASS_IRDA_USB_BRIDGE 0x02 + +#endif diff --git a/embedded/libs4c/usb/base/usb/usb_srq.h b/embedded/libs4c/usb/base/usb/usb_srq.h new file mode 100644 index 0000000..1821ab4 --- /dev/null +++ b/embedded/libs4c/usb/base/usb/usb_srq.h @@ -0,0 +1,23 @@ +#ifndef _USB_STDREQ_MODULE_ + #define _USB_STDREQ_MODULE_ + + int usb_stdreq_get_status( usb_device_t *udev); + + int usb_stdreq_clear_feature( usb_device_t *udev); + + int usb_stdreq_set_feature( usb_device_t *udev); + + int usb_stdreq_set_address( usb_device_t *udev); + + int usb_stdreq_get_configuration( usb_device_t *udev); + + int usb_stdreq_set_configuration( usb_device_t *udev); + + int usb_stdreq_get_interface( usb_device_t *udev); + + int usb_stdreq_set_interface( usb_device_t *udev); + + int usb_stdreq_get_descriptor( usb_device_t *udev); + +#endif /*_USB_STDREQ_MODULE_*/ + diff --git a/embedded/libs4c/usb/base/usb/usbdebug.h b/embedded/libs4c/usb/base/usb/usbdebug.h new file mode 100644 index 0000000..6a82e83 --- /dev/null +++ b/embedded/libs4c/usb/base/usb/usbdebug.h @@ -0,0 +1,81 @@ +/* Global debug macros, variables, functions - header file */ +/* R.B. - 23.4.2003 */ + +#ifndef _USB_DEBUG_H_ +#define _USB_DEBUG_H_ + +#if 1 + #include + #define usb_printf printf +#else + int simple_printf(const char *f, ...); + #define usb_printf simple_printf +#endif + +/* Debug levels */ +#define DEBUG_LEVEL_NONE 0 +#define DEBUG_LEVEL_LOW 1 +#define DEBUG_LEVEL_MEDIUM 2 +#define DEBUG_LEVEL_HIGH 3 +#define DEBUG_LEVEL_VERBOSE 4 + +#ifndef DEBUG_STATIC_LEVEL +/* Global static debug level */ +#define DEBUG_STATIC_LEVEL DEBUG_LEVEL_NONE +#endif + +/* If it is defined, current global debug level is + in 'global_debug_level' variable. Otherwise will + be used 'DEBUG_STATIC_LEVEL' as current global + debug level +*/ +/*#define DEBUG_USE_DYNAMIC_LEVEL*/ + +/* #define DEBUG */ + +/*****************************************************************************/ +/*****************************************************************************/ +/*****************************************************************************/ + +#ifdef DEBUG + +/* use static or dynamic global debug level */ +#if defined(DEBUG_USE_DYNAMIC_LEVEL) /* use dynamic debug level */ + extern unsigned char usb_debug_level; +#else /* use only static debug level */ + #define usb_debug_level DEBUG_STATIC_LEVEL +#endif + + +/* usb_debug_print( level, printargs) print debug info in printargs if + level is lower or equal to 'global_debug_level'/'DEBUG_STATIC_LEVEL'. + 'printargs' is with parenthesis. + usage : usb_debug_print( DEBUG_LEVEL_MEDIUM,("i=%d",i)); +*/ +#define usb_debug_print( _lvl_, _prnargs_) \ + do { \ + if ( usb_debug_level >= _lvl_) { \ + usb_printf _prnargs_; \ + } \ + } while(0) + +/* usb_debug_info( printargs) print debug info always + usage : usb_debug_info( "debug info"); +*/ +#define usb_debug_info usb_printf /* FIXME: this is not correct */ + +#else /* DEBUG */ + #define usb_debug_print( _lvl_, _prnargs_) + #define usb_debug_info(...) +#endif /* DEBUG */ + + + void usb_debug_set_level(int level); + + char *usb_debug_get_req_recipient( char rqt); + char *usb_debug_get_req_type( char rqt); + char *usb_debug_get_std_request( char req); + char *usb_debug_get_std_descriptor( unsigned char desc); + + +#endif /* _GLOBAL_DEBUG_H_ */ diff --git a/embedded/libs4c/usb/base/usbdebug.c b/embedded/libs4c/usb/base/usbdebug.c new file mode 100644 index 0000000..48bee80 --- /dev/null +++ b/embedded/libs4c/usb/base/usbdebug.c @@ -0,0 +1,76 @@ +/* Global debug macros, variables, functions - header file */ +/* R.B. - 23.4.2003 */ + +#include +#include + +#ifdef DEBUG + +/* debug can be enabled in run-time */ +#if defined(DEBUG_USE_DYNAMIC_LEVEL) /* use dynamic debug level */ + unsigned char usb_debug_level = DEBUG_LEVEL_NONE; +#endif + +/************************************************************* + *** Debug infos + *************************************************************/ + + void usb_debug_set_level(int level) { + #if defined(DEBUG_USE_DYNAMIC_LEVEL) /* use dynamic debug level */ + usb_debug_level = level; + #endif + } + + + char *usb_debug_get_req_recipient( char rqt) { + switch ( rqt & USB_RECIPIENT) { + case USB_RECIPIENT_DEVICE: return "DEVICE"; + case USB_RECIPIENT_INTERFACE: return "INTERFACE"; + case USB_RECIPIENT_ENDPOINT: return "ENDPOINT"; + } + return "OTHER"; + } + char *usb_debug_get_req_type( char rqt) { + switch ( rqt & USB_REQUEST_TYPE_MASK) { + case USB_STANDARD_REQUEST: return "STANDARD"; + case USB_CLASS_REQUEST: return "CLASS"; + case USB_VENDOR_REQUEST: return "VENDOR"; + } + return "RESERVED"; + } + char *usb_debug_get_std_request( char req) { + switch ( req & USB_REQUEST_MASK) { + case USB_REQUEST_GET_STATUS: return "GET STATUS"; + case USB_REQUEST_CLEAR_FEATURE: return "CLEAR FEATURE"; + case USB_REQUEST_SET_FEATURE: return "SET FEATURE"; + case USB_REQUEST_SET_ADDRESS: return "SET ADDRESS"; + + case USB_REQUEST_GET_DESCRIPTOR: return "GET DESCRIPTOR"; + case USB_REQUEST_SET_DESCRIPTOR: return "SET DESCRIPTOR"; + case USB_REQUEST_GET_CONFIGURATION: return "GET CONFIGURATION"; + case USB_REQUEST_SET_CONFIGURATION: return "SET CONFIGURATION"; + case USB_REQUEST_GET_INTERFACE: return "GET INTERFACE"; + case USB_REQUEST_SET_INTERFACE: return "SET INTERFACE"; + case USB_REQUEST_SYNC_FRAME: return "SYNC FRAME"; + } + return "UNKNOWN"; + } + char *usb_debug_get_std_descriptor( unsigned char desc) { + + switch ( desc) { + case USB_DESCRIPTOR_TYPE_DEVICE: return "DEVICE"; + case USB_DESCRIPTOR_TYPE_CONFIGURATION: return "CONFIGURATION"; + case USB_DESCRIPTOR_TYPE_STRING: return "STRING"; + case USB_DESCRIPTOR_TYPE_INTERFACE: return "INTERFACE"; + case USB_DESCRIPTOR_TYPE_ENDPOINT: return "ENDPOINT"; + case USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER: return "DEVICE_QUALIFIER"; + case USB_DESCRIPTOR_TYPE_OTHER_SPEED_CONFIGURATION: return "OTHER_SPEED_CONFIG"; + case USB_DESCRIPTOR_TYPE_POWER: return "POWER"; + } + return "UNKNOWN"; + } + +#else /*DEBUG*/ + void usb_debug_set_level(int level) { + } +#endif /* DEBUG */ diff --git a/embedded/libs4c/usb/lpcusb/Makefile b/embedded/libs4c/usb/lpcusb/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/libs4c/usb/lpcusb/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/libs4c/usb/lpcusb/Makefile.omk b/embedded/libs4c/usb/lpcusb/Makefile.omk new file mode 100644 index 0000000..00a4c72 --- /dev/null +++ b/embedded/libs4c/usb/lpcusb/Makefile.omk @@ -0,0 +1,11 @@ +# -*- makefile -*- + +default_CONFIG = CONFIG_USB_LPCUSB=n + +ifeq ($(CONFIG_USB_LPCUSB),y) +lib_LIBRARIES = lpcusb + +nobase_include_HEADERS = usb/lpcusb.h usb/lpc.h + +lpcusb_SOURCES = lpcusb.c lpc.c +endif #CONFIG_USB_LPCUSB diff --git a/embedded/libs4c/usb/lpcusb/lpc.c b/embedded/libs4c/usb/lpcusb/lpc.c new file mode 100644 index 0000000..7d9f20c --- /dev/null +++ b/embedded/libs4c/usb/lpcusb/lpc.c @@ -0,0 +1,162 @@ +/*****************************************************/ +/*** Module : USB PDI ***/ +/*** Author : Roman Bartosinski (C) 28.04.2002 ***/ +/*** Modify : 08.08.2002, 16.04.2003 ***/ +/*****************************************************/ + +#include +#include +#include + +/* connect usb */ +int usb_lpc_connect( usb_device_t *udev) { + lpc_write_cmd_data(USB_CMD_SET_DEV_STAT,USB_DAT_WR_BYTE(USBC_DEV_CON)); + return 0; +} + +/* disconnect usb */ +int usb_lpc_disconnect( usb_device_t *udev) { + lpc_write_cmd_data(USB_CMD_SET_DEV_STAT,USB_DAT_WR_BYTE(0)); + return 0; +} + +/* acknowledge control transfer */ +void usb_lpc_ack_setup( usb_device_t *udev) { + lpc_usb_write_endpoint(0x80|0x00, NULL, 0); +} + +/* stall endpoint X */ +void usb_lpc_stall( usb_ep_t *ep) { + if ( ep->epnum) { + lpc_write_cmd_data(USB_CMD_SEL_EP_CLRI(lpc_ep2addr(ep->epnum)),USB_DAT_WR_BYTE(USBC_EP_STAT_ST)); + } else { // endpoint0 + lpc_write_cmd_data(USB_CMD_SEL_EP_CLRI(lpc_ep2addr(0x80|ep->epnum)),USB_DAT_WR_BYTE(USBC_EP_STAT_ST)); + lpc_write_cmd_data(USB_CMD_SEL_EP_CLRI(lpc_ep2addr(ep->epnum)),USB_DAT_WR_BYTE(USBC_EP_STAT_ST)); + } +} + +/** + * usb_lpc_check events + * function reads interrupt register and sets event flags + * function returns 1 if there is some new event. + * function returns 0 if there isn't new event but all is OK + * function returns -1 if there is any error +*/ +int usb_lpc_check_events( usb_device_t *udev) +{ + unsigned int disr,val,last_int; + int ret=0,n,m,i; + + disr=USBDevIntSt; + + /* Device Status Interrupt (Reset, Connect change, Suspend/Resume) */ + if (disr & USBDevInt_DEV_STAT) { + USBDevIntClr = USBDevInt_DEV_STAT; + disr&=~USBDevInt_DEV_STAT; + lpc_write_cmd(USB_CMD_GET_DEV_STAT); + val=lpc_read_cmd_data(USB_DAT_GET_DEV_STAT); + if (val & USBC_DEV_RST) { /* Reset */ + lpc_usb_reset(); + udev->flags |= USB_FLAG_BUS_RESET; + ret = 1; + } + if (val & USBC_DEV_SUS_CH) { /* Suspend/Resume */ + if (val & USBC_DEV_SUS) { /* Suspend */ + udev->flags |= USB_FLAG_SUSPEND; + ret = 1; + } else { /* Resume */ + /* todo */ + } + } + } + + /* Endpoint's Slow Interrupt */ + if (disr & USBDevInt_EP_SLOW) { + USBDevIntClr = USBDevInt_EP_SLOW; + disr&=~USBDevInt_EP_SLOW; + + last_int = USBEpIntSt; + + /* EP0_OUT */ + if (last_int & (1 << 0)) { + last_int &= ~(1 << 0); + USBEpIntClr = 1 << 0; + lpc_wait4devint(USBDevInt_CDFULL); + val = USBCmdData; + /* Setup Packet */ + if (val & USBC_EP_SEL_STP) + udev->flags |= USB_FLAG_SETUP; + else + udev->flags |= USB_FLAG_EVENT_RX0; + ret = 1; + } + + /* EP0_IN */ + if (last_int & (1 << 1)) { + last_int &= ~(1 << 1); + USBEpIntClr = 1 << 1; + lpc_wait4devint(USBDevInt_CDFULL); + val = USBCmdData; + udev->flags |= USB_FLAG_EVENT_TX0; + ret = 1; + } + + /* user endpoints */ + for( i=0; icntep; i++) { + if ( last_int & (udev->ep+i)->event_mask) { + last_int &= ~((udev->ep+i)->event_mask); + USBEpIntClr = (udev->ep+i)->event_mask; + lpc_wait4devint(USBDevInt_CDFULL); + val = USBCmdData; + udev->ep_events |= 1<> 1; + if (n&1) m|=0x80; + lpc_wait4devint(USBDevInt_CDFULL); + val = USBCmdData; + lpc_usb_setstallEP(m); + } + } + } + } + if (!disr) + USBDevIntClr = disr; + return ret; +} + +int usb_lpc_read_endpoint( usb_ep_t *ep, void *ptr, int size) +{ + return lpc_usb_read_endpoint(ep->epnum, ptr, size); +} + +int usb_lpc_write_endpoint( usb_ep_t *ep, const void *ptr, int size) +{ + return lpc_usb_write_endpoint(0x80|ep->epnum, ptr, size); +} + + +/* init usb structures and chip */ +int usb_lpc_init( usb_device_t *udev) { + + udev->connect = usb_lpc_connect; + udev->disconnect = usb_lpc_disconnect; + udev->ack_setup = usb_lpc_ack_setup; + udev->ack_control_setup = NULL; + udev->stall = usb_lpc_stall; + udev->check_events = usb_lpc_check_events; + udev->read_endpoint = usb_lpc_read_endpoint; + udev->write_endpoint = usb_lpc_write_endpoint; + + udev->ep0.max_packet_size = USB_MAX_PACKET0; + + lpc_usb_hw_init(); + return 0; +} diff --git a/embedded/libs4c/usb/lpcusb/lpcusb.c b/embedded/libs4c/usb/lpcusb/lpcusb.c new file mode 100644 index 0000000..1cf130d --- /dev/null +++ b/embedded/libs4c/usb/lpcusb/lpcusb.c @@ -0,0 +1,195 @@ +/*****************************************************/ +/*** Module : USB PDI ***/ +/*** Author : Roman Bartosinski (C) 28.04.2002 ***/ +/*** Modify : 08.08.2002, 16.04.2003 ***/ +/*****************************************************/ + +#include +#include +#include + +unsigned int lpc_ep2addr(unsigned int ep_num) +{ + unsigned int val; + val = (ep_num & 0x0F) << 1; + if (ep_num & 0x80) + val += 1; + return val; +} + +void lpc_wait4devint(unsigned int intrs) +{ + while ((USBDevIntSt & intrs) != intrs); + USBDevIntClr = intrs; +} + + +void lpc_write_cmd(unsigned int cmd) +{ + USBDevIntClr = USBDevInt_CCEMTY | USBDevInt_CDFULL; + USBCmdCode = cmd; + lpc_wait4devint(USBDevInt_CCEMTY); +} + +void lpc_write_cmd_data (unsigned int cmd, unsigned int val) +{ + lpc_write_cmd(cmd); + USBCmdCode = val; + lpc_wait4devint(USBDevInt_CCEMTY); +} + +unsigned int lpc_read_cmd_data (unsigned int cmd) +{ + lpc_write_cmd(cmd); + lpc_wait4devint(USBDevInt_CDFULL); + return USBCmdData; +} + +void lpc_usb_realizeEP(unsigned int idx,unsigned int wmaxpsize) +{ + USBReEp |= (1 << idx); + USBEpInd = idx; + USBMaxPSize = wmaxpsize; + lpc_wait4devint(USBDevInt_EP_RLZED); +} + +void lpc_usb_configEP(unsigned int ep_num,unsigned int wmaxpsize) +{ + lpc_usb_realizeEP(lpc_ep2addr(ep_num),wmaxpsize); + lpc_usb_enableEP(ep_num); +} + +void lpc_usb_setstallEP(unsigned int ep_num) +{ + lpc_write_cmd_data(USB_CMD_SET_EP_STAT(lpc_ep2addr(ep_num)),USB_DAT_WR_BYTE(USBC_EP_STAT_ST)); +} + +void lpc_usb_clrstallEP(unsigned int ep_num) +{ + lpc_write_cmd_data(USB_CMD_SET_EP_STAT(lpc_ep2addr(ep_num)),USB_DAT_WR_BYTE(0)); +} + +void lpc_usb_enableEP(unsigned int ep_num) +{ + lpc_write_cmd_data(USB_CMD_SET_EP_STAT(lpc_ep2addr(ep_num)),USB_DAT_WR_BYTE(0)); +} + +void lpc_usb_disableEP(unsigned int ep_num) +{ + lpc_write_cmd_data(USB_CMD_SET_EP_STAT(lpc_ep2addr(ep_num)),USB_DAT_WR_BYTE(USBC_EP_STAT_DA)); +} + +void lpc_usb_set_addr(unsigned int adr) +{ + lpc_write_cmd_data(USB_CMD_SET_ADDR,USB_DAT_WR_BYTE(USBC_DEV_EN | adr)); /* Setup Status Phase */ +} + +void lpc_usb_config_device(int fConfigured) +{ + lpc_write_cmd_data(USB_CMD_CFG_DEV,USB_DAT_WR_BYTE(fConfigured ? USBC_CONF_DEVICE : 0)); /* Setup Status Phase */ +} + +void lpc_usb_reset(void) +{ + USBEpIntClr = 0xFFFFFFFF; + USBEpIntEn = 0xFFFFFFFF ^ USB_DMA_EP; + USBDevIntClr = 0xFFFFFFFF; + USBDevIntEn = USBDevInt_DEV_STAT | USBDevInt_EP_SLOW; + + lpc_usb_configEP(0x00, USB_MAX_PACKET0); + lpc_usb_configEP(0x80, USB_MAX_PACKET0); +} + +void lpc_usb_hw_init (void) +{ + + PINSEL1 &= ~0xC000C000; +// PINSEL1 |= 0x40004000; /* Select USB Link, VBUS */ + PINSEL1 |= 0x80000000; /* Select USB Link, VBUS */ + + PCONP |= 0x80000000; /* Turn On USB PCLK */ + + /* Configure 48MHz USB Clock; FOsc = 12MHz, M = 4, P = 2 */ + PLLCFG48 = 0x23; /* M = 4, P = 2 */ + PLLCON48 = PLLCON_PLLE; /* PLL Enable */ + PLLFEED48 = 0xAA; /* Feed Sequence 1 */ + PLLFEED48 = 0x55; /* Feed Sequence 2 */ + + while ((PLLSTAT48 & PLLSTAT_LOCK) == 0); /* Wait for PLL Lock */ + + PLLCON48 = PLLCON_PLLE | PLLCON_PLLC; /* PLL Enable & Connect */ + PLLFEED48 = 0xAA; /* Feed Sequence 1 */ + PLLFEED48 = 0x55; /* Feed Sequence 2 */ + + USBDevIntEn = USBDevInt_DEV_STAT; /* Enable Device Status Interrupt */ + + /* Partial Manual Reset since Automatic Bus Reset is not working */ + lpc_usb_reset(); + lpc_usb_set_addr(0); +} + +/* + * lpc_usb_read_endpoint: Read USB Endpoint Data + * @EPNum: Endpoint Number - EPNum.0..3: Address, EPNum.7: Dir + * @ptr: Pointer to Data Buffer + * @size: + * Return Value: Number of bytes read + */ +int lpc_usb_read_endpoint( unsigned int ep_num, void *ptr, int size) +{ + unsigned int cnt,i,dwData; + unsigned char *p=ptr; + + USBCtrl = ((ep_num & 0x0F) << 2) | USBCtrl_RD_EN; + do { + cnt = USBRxPLen; + } while ((cnt & USBRxPLen_PKT_RDY) == 0); + cnt &= USBRxPLen_PKT_LNGTH; + + // get data + while (USBCtrl & USBCtrl_RD_EN) { + dwData = USBRxData; + if (p != NULL) { + for (i = 0; i < 4; i++) { + if (size-- != 0) { + *p = dwData & 0xFF; + p++; + } + dwData >>= 8; + } + } + } + + lpc_write_cmd(USB_CMD_SEL_EP(lpc_ep2addr(ep_num))); + lpc_write_cmd(USB_CMD_CLR_BUF); + + return cnt; +} + +/* + * lpc_usb_write_endpoint: Write USB Endpoint Data + * @ep_num: Endpoint Number - ep_num.0..3: Address, ep_num.7: Dir + * @ptr: Pointer to Data Buffer + * @size: Number of bytes to write + * Return Value: Number of bytes written + */ +int lpc_usb_write_endpoint( unsigned int ep_num, const void *ptr, int size) +{ + unsigned int n; + const unsigned char *p=ptr; + + USBCtrl = ((ep_num & 0x0F) << 2) | USBCtrl_WR_EN; + USBTxPLen = size; + + for (n = 0; n < (size + 3) / 4; n++) { + USBTxData = (p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]; + p += 4; + } + + USBCtrl=0; + + lpc_write_cmd(USB_CMD_SEL_EP(lpc_ep2addr(ep_num))); + lpc_write_cmd(USB_CMD_VALID_BUF); + + return size; +} diff --git a/embedded/libs4c/usb/lpcusb/usb/lpc.h b/embedded/libs4c/usb/lpcusb/usb/lpc.h new file mode 100644 index 0000000..c693182 --- /dev/null +++ b/embedded/libs4c/usb/lpcusb/usb/lpc.h @@ -0,0 +1,9 @@ +#ifndef _USB_LPC_SUBMODULE_HEADER_FILE_ +#define _USB_LPC_SUBMODULE_HEADER_FILE_ + +#include + +int usb_lpc_init( usb_device_t *udev); + +#endif /* _USB_LPC_SUBMODULE_HEADER_FILE_ */ + diff --git a/embedded/libs4c/usb/lpcusb/usb/lpcusb.h b/embedded/libs4c/usb/lpcusb/usb/lpcusb.h new file mode 100644 index 0000000..0f111bb --- /dev/null +++ b/embedded/libs4c/usb/lpcusb/usb/lpcusb.h @@ -0,0 +1,27 @@ +#ifndef _LPCUSB_BASE_MODULE +#define _PLCUSB_BASE_MODULE + +/*********************************************************/ +// Function prototypes +// +// LPCUSB common commands + +unsigned int lpc_ep2addr(unsigned int ep_num); +void lpc_wait4devint(unsigned int intrs); +void lpc_write_cmd(unsigned int cmd); +void lpc_write_cmd_data (unsigned int cmd, unsigned int val); +unsigned int lpc_read_cmd_data (unsigned int cmd); +void lpc_usb_realizeEP(unsigned int idx,unsigned int wmaxpsize); +void lpc_usb_configEP(unsigned int ep_num,unsigned int wmaxpsize); +void lpc_usb_setstallEP (unsigned int ep_num); +void lpc_usb_clrstallEP (unsigned int ep_num); +void lpc_usb_enableEP(unsigned int ep_num); +void lpc_usb_disableEP(unsigned int ep_num); +void lpc_usb_config_device(int fConfigured); +void lpc_usb_reset(void); +void lpc_usb_set_addr(unsigned int adr); +void lpc_usb_hw_init (void); +int lpc_usb_read_endpoint( unsigned int ep_num, void *ptr, int size); +int lpc_usb_write_endpoint( unsigned int ep_num, const void *ptr, int size); + +#endif // from _LPC_BASE_MODULE diff --git a/embedded/libs4c/usb/more/Makefile b/embedded/libs4c/usb/more/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/libs4c/usb/more/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/libs4c/usb/more/Makefile.omk b/embedded/libs4c/usb/more/Makefile.omk new file mode 100644 index 0000000..c28fbda --- /dev/null +++ b/embedded/libs4c/usb/more/Makefile.omk @@ -0,0 +1,18 @@ +# -*- makefile -*- + +default_CONFIG = CONFIG_USB_MORE=n + +ifeq ($(CONFIG_USB_MORE),y) +lib_LIBRARIES = usbmore + +#shared_LIBRARIES = + +#include_HEADERS = + +usbmore_SOURCES = usb_srq.c + +#lib_LOADLIBES = +#bin_PROGRAMS = + +endif #CONFIG_USB_MORE + diff --git a/embedded/libs4c/usb/more/usb/msc_loader.h b/embedded/libs4c/usb/more/usb/msc_loader.h new file mode 100644 index 0000000..f912d2b --- /dev/null +++ b/embedded/libs4c/usb/more/usb/msc_loader.h @@ -0,0 +1,8 @@ +#ifndef _MSC_LOADER_H +#define _MSC_LOADER_H + +#include + +int usb_msc1210_loader(usb_device_t *udev); + +#endif /*_MSC_LOADER_H*/ diff --git a/embedded/libs4c/usb/more/usb/usb_com.h b/embedded/libs4c/usb/more/usb/usb_com.h new file mode 100644 index 0000000..1f87b9b --- /dev/null +++ b/embedded/libs4c/usb/more/usb/usb_com.h @@ -0,0 +1,17 @@ + +#ifndef _USB_COM_H + #define _USB_COM_H + +/* Queued USB Module */ + extern int usb_tm_snd; + extern int usb_tm_snded; + extern int usb_tm_rcv; + + int usb_com_init( void); + void usb_com_start_send( void); + + int usb_com_sendch(int c); + int usb_com_recch(); + int usb_com_sendstr(const char *s); + +#endif /* _USB_COM_H */ diff --git a/embedded/libs4c/usb/more/usb/usb_loader.h b/embedded/libs4c/usb/more/usb/usb_loader.h new file mode 100644 index 0000000..5c215e4 --- /dev/null +++ b/embedded/libs4c/usb/more/usb/usb_loader.h @@ -0,0 +1,31 @@ +#include + +#ifndef _USB_LOADER_H +#define _USB_LOADER_H + +#define USB_VENDOR_GET_CAPABILITIES 0x00 // get capabilities +#define USB_VENDOR_RESET_DEVICE 0x08 +// #define USB_VENDOR_SET_BYTE 0x10 +// #define USB_VENDOR_SET_WORD 0x20 +#define USB_VENDOR_GET_SET_MEMORY 0x30 +#define USB_VENDOR_ERASE_MEMORY 0x40 // erase memory for 1 Byte +#define USB_VENDOR_ERASE_1KB_MEMORY 0x48 // erase memory for 1 KB +#define USB_VENDOR_MASS_ERASE 0x50 // erase all device memory +#define USB_VENDOR_GOTO 0x60 +#define USB_VENDOR_CALL 0x70 +#define USB_VENDOR_GET_STATUS 0xF0 +#define USB_VENDOR_MASK 0xF8 // mask for vendor commands + +#define USB_VENDOR_MEMORY_BY_BULK 0x80 + +#if 0 /* MSP430 */ +#define USB_VENDOR_TARGET_ADAPTER 0x01 +#define USB_VENDOR_TARGET_MSP430 0x02 +#else /* MSC1210 */ +#define USB_VENDOR_TARGET_DATA 0x01 +#define USB_VENDOR_TARGET_XDATA 0x02 +#endif + +#define USB_VENDOR_TARGET_MASK 0x07 + +#endif /*_USB_LOADER_H*/ diff --git a/embedded/libs4c/usb/more/usb_com.c b/embedded/libs4c/usb/more/usb_com.c new file mode 100644 index 0000000..71991ba --- /dev/null +++ b/embedded/libs4c/usb/more/usb_com.c @@ -0,0 +1,1061 @@ +/*********************************************************/ +/*** Module : USB communication ***/ +/*** Author : Roman Bartosinski (bartosr@centrum.cz) ***/ +/*** Modify : 14.01.2003 ***/ +/*********************************************************/ + +#include +#include +#include +#include "pdiusb.h" +#include +/*#include */ +#include "usb_defs.h" +#include +#include + + +/* Queued USB Module */ +typedef volatile struct{ + unsigned char *first; + unsigned char *last; + unsigned char *begin; + unsigned char *end; +} usb_com_que_t; + +#define USB_COM_BUF_LEN 80 //(80*8) + +usb_com_que_t usb_com_que_in; /* input queue */ +unsigned char usb_com_buf_in[USB_COM_BUF_LEN]; +usb_com_que_t usb_com_que_out; /* output queue */ +unsigned char usb_com_buf_out[USB_COM_BUF_LEN]; + +int usb_com_init( void); +int usb_com_put(usb_com_que_t *q, int c); +int usb_com_get(usb_com_que_t *q); + +usb_vendor_extension_fnc_t *usb_vendor_extension=0; + +#ifdef PDIUSB_WITH_ADD_IRQ_HANDLER +/* usb irq handler struct */ +irq_handler_t usb_irq_handler; +#elif defined(PDIUSB_WITH_EXCPTVECT_SET) +void usb_isr(void) __attribute__ ((interrupt_handler)); +#endif /*PDIUSB_WITH_EXCPTVECT_SET*/ + +int usb_irq_cnt; + +/* common external function for pdiusb module */ + void pdiSendCommand( unsigned char byCmd) { + writeb( byCmd, PDIUSB_COMMAND_ADDR); + } + unsigned char pdiReadData( unsigned char byCount, unsigned char *pbyData) { + unsigned char out = byCount; + + while (byCount--) { + *pbyData = readb( PDIUSB_READ_DATA_ADDR); + pbyData++; + } + + return out; + } + void pdiWriteData( unsigned char byCount, unsigned char *pbyData) { + while (byCount--) { + writeb( *pbyData++, PDIUSB_WRITE_DATA_ADDR); + } + } + + +/* usb communication module */ + /* data */ + usb_flags_t usb_flags; + unsigned char usb_address; + unsigned char usb_interface; + usb_control_ep_t usb_rxtx_control; + usb_bulk_ep_t usb_rx_bulk, usb_tx_bulk; + + volatile unsigned int usb_last_irq; + // internal buffer for data from/to control req. - must be global + unsigned char ctrl_data[PDI_EP0_PACKET_SIZE]; + + typeof(msec_time) usb_start = 0, usb_stop = 0; + + + +/* functions */ + int usb_run( void) { + int ret = 0; + if ( usb_flags.running) { +#ifdef USE_USB_WITH_IRQ + if (!usb_flags.bits.was_int) return ret; + usb_flags.was_int = 0; +#else + ret = usb_test_interrupt(); + if ( usb_flags.request == 1) { + usb_answer_to_request(); + } + if ( usb_flags.request == 2) { // request is set in usb_answer_to_request() + if (( usb_rxtx_control.dreq.bmRequestType & USB_DATA_DIR_MASK)==USB_DATA_DIR_TO_HOST) { + unsigned int now = usb_rxtx_control.bytes; + if ( now > PDI_EP0_PACKET_SIZE) now = PDI_EP0_PACKET_SIZE; + if ( usb_rxtx_control.next_pkt_fnc ) + if( usb_rxtx_control.next_pkt_fnc(&usb_rxtx_control, now, USB_NEXT_PKT_SEND) ) { + usb_stall_ep0(); + return -1; + } + debugPrint( DBG_HIGH, ("CNTR send 1.data (%d)\n", now)); + pdiWriteEndpoint( PDI_EP0_TX, now, usb_rxtx_control.data); + usb_rxtx_control.data += now; + if ( !(usb_rxtx_control.bytes -= now)) { + usb_flags.request = 3; + } + } + } + if ( usb_flags.request == 3) { + if ( !usb_rxtx_control.dreq.wLength || + (usb_rxtx_control.dreq.bmRequestType & USB_DATA_DIR_MASK)==USB_DATA_DIR_FROM_HOST) { + pdiWriteEndpoint( PDI_EP0_TX, 0, 0); + if ( usb_rxtx_control.complete_fnc ) + usb_rxtx_control.complete_fnc(&usb_rxtx_control, USB_COMPLETE_OK); + usb_rxtx_control.next_pkt_fnc = NULL; + usb_rxtx_control.complete_fnc = NULL; + } + } +#endif + } + return ret; + } + + int usb_test_interrupt( void) { //_naked { + unsigned char usb_last_status; + int ret = 0; +// INTERRUPT_PRE(0); +// LEDr = 1; +// EA=0; + usb_last_irq = pdiGetInterrupt(); + if ( usb_last_irq) { + ret = 1; + debugPrint( DBG_MEDIUM, ("USB Interrupt 0x%X\n",usb_last_irq)); + if ( usb_last_irq & PDI_INT_BUSRESET) { // D12 - Bus reset reached + usb_flags.configured = 0; + if ( usb_flags.running && usb_flags.stop_request) { + usb_flags.running = 0; + usb_flags.stop_request = 0; + } + debugPrint( DBG_HIGH, ("Bus Reset\n")); + } else { + if ( usb_last_irq & PDI_INT_SUSPEND) { // D12 - Suspend flag changed + debugPrint( DBG_HIGH, ("Suspend Changed\n")); + } + // it must be first b/c tx and rx can be sended all together + if ( usb_last_irq & PDI_INT_EP0_IN) { // D12 - Ep0TxDone - data in EP0 was sended + usb_last_status = pdiGetLastTransStatus( PDI_EP0_TX); + debugPrint( DBG_HIGH, ("Ep0-Tx LTS=0x%X\n", usb_last_status)); + if (( usb_last_status & PDI_LTSTAT_RXTX_OK) && usb_flags.request > 1) { + if ( usb_flags.request == 2) { + unsigned int now = usb_rxtx_control.bytes; + if ( now > PDI_EP0_PACKET_SIZE) now = PDI_EP0_PACKET_SIZE; + + if ( usb_rxtx_control.next_pkt_fnc ) + if( usb_rxtx_control.next_pkt_fnc(&usb_rxtx_control, now, USB_NEXT_PKT_SEND) ) { + usb_stall_ep0(); + return -1; + } + + debugPrint( DBG_HIGH, ("CNTR data\n")); + pdiWriteEndpoint( PDI_EP0_TX, now, usb_rxtx_control.data); + usb_rxtx_control.data += now; + if ( !(usb_rxtx_control.bytes -= now)) { + usb_flags.request = 3; + } + } else if ( usb_flags.request == 3) { + debugPrint( DBG_HIGH, ("CNTR ack\n")); + usb_flags.request = 0; + + if ( usb_rxtx_control.complete_fnc ) + usb_rxtx_control.complete_fnc(&usb_rxtx_control, USB_COMPLETE_OK); + usb_rxtx_control.next_pkt_fnc = NULL; + usb_rxtx_control.complete_fnc = NULL; + + } else { + debugPrint( DBG_LOW, ("tx ... ???\n")); + } + } + } + + if ( usb_last_irq & PDI_INT_EP0_OUT) { // D12 - Ep0RxDone - some data was received in EP0 + usb_last_status = pdiGetLastTransStatus( PDI_EP0_RX); + debugPrint( DBG_HIGH, ("Ep0-Rx LTS=0x%X\n", usb_last_status)); + if ( usb_last_status & PDI_LTSTAT_RXTX_OK) { + if ( usb_last_status & PDI_LTSTAT_SETUP) { + if ( usb_flags.request) { + debugPrint( DBG_HIGH, ("!!! New setup, but last not ack ...\n")); + } + usb_flags.request = 1; // Standard_requests(); + if ( usb_rxtx_control.complete_fnc ) + usb_rxtx_control.complete_fnc(&usb_rxtx_control, USB_COMPLETE_FAIL); + usb_rxtx_control.next_pkt_fnc = NULL; + usb_rxtx_control.complete_fnc = NULL; + } else { + if ( usb_flags.request == 2) { + unsigned int now = usb_rxtx_control.bytes; + if ( now > PDI_EP0_PACKET_SIZE) now = PDI_EP0_PACKET_SIZE; + debugPrint( DBG_HIGH, ("CNTR data\n")); + ret = pdiReadEndpoint( PDI_EP0_RX, now, usb_rxtx_control.data); + + if(ret>usb_rxtx_control.bytes) + ret = usb_rxtx_control.bytes; + + usb_rxtx_control.data += ret; + + if ( usb_rxtx_control.next_pkt_fnc ) { + if( usb_rxtx_control.next_pkt_fnc(&usb_rxtx_control, ret, USB_NEXT_PKT_REC) ) { + usb_stall_ep0(); + return -1; + } + } + + if (!(usb_rxtx_control.bytes -= ret)) { + usb_rxtx_control.data -= usb_rxtx_control.dreq.wLength; + usb_flags.request = 3; + } + } else if ( usb_flags.request == 3) { + debugPrint( DBG_HIGH, ("CNTR ack\n")); + usb_flags.request = 0; + pdiReadEndpoint( PDI_EP0_RX, 0, 0); + if ( usb_rxtx_control.complete_fnc ) + usb_rxtx_control.complete_fnc(&usb_rxtx_control, USB_COMPLETE_OK); + usb_rxtx_control.next_pkt_fnc = NULL; + usb_rxtx_control.complete_fnc = NULL; + } else { + pdiReadEndpoint( PDI_EP0_RX, 0, 0); + } + } + } + } + if ( usb_last_irq & PDI_INT_EP1_OUT) { // D12 - Ep1RxDone - some data was received in EP1 + usb_last_status = pdiGetLastTransStatus( PDI_EP1_RX); + debugPrint( DBG_HIGH, ("Ep1-Rx LTS=0x%X\n", usb_last_status)); + if ( usb_last_status & PDI_LTSTAT_RXTX_OK) { + pdiSetEpStatus( PDI_EP1_OUT, PDI_SET_EP_STALLED); + } + } + if ( usb_last_irq & PDI_INT_EP1_IN) { // D12 - Ep1TxDone - data in EP1 was sended + usb_last_status = pdiGetLastTransStatus( PDI_EP1_TX); + debugPrint( DBG_HIGH, ("Ep1-Tx LTS=0x%X\n", usb_last_status)); + if ( usb_last_status & PDI_LTSTAT_RXTX_OK) { + pdiSetEpStatus( PDI_EP1_IN, PDI_SET_EP_STALLED); + } + } + + if ( usb_last_irq & PDI_INT_EP2_OUT) { // D12 - Ep2RxDone - some data was received in EP2 + usb_last_status = pdiGetLastTransStatus( PDI_EP2_RX); + debugPrint( DBG_HIGH, ("Ep2-Rx LTS=0x%X\n", usb_last_status)); + if ( usb_last_status & PDI_LTSTAT_RXTX_OK) { + if ( usb_flags.terminal_mode) { + unsigned char hlpbfr[PDI_EP2_PACKET_SIZE], now = PDI_EP2_PACKET_SIZE, i; + MoreRead: + now = pdiReadEndpoint( PDI_EP2_RX, now, hlpbfr); + for(i=0;i PDI_EP2_PACKET_SIZE) now = PDI_EP2_PACKET_SIZE; + + if ( !usb_flags.bits.bulk_rx_data) { + usb_flags.bulk_rx_data = 1; + usb_start = msec_time; + } + + ReadAgain: + ret = pdiReadEndpoint( PDI_EP2_RX, now, usb_rx_bulk.data); + usb_rx_bulk.data += now; + if ( !( usb_rx_bulk.remain -= now)) { + //usb_rx_bulk.data -= usb_rx_bulk.bytes; /* read again */ + usb_stop = msec_time; + usb_flags.bulk_rx_data = 0; + // complete_func or set flag(event) + } + if ( usb_rx_bulk.remain > 0 && usb_rx_bulk.remain <= PDI_EP2_PACKET_SIZE) + goto ReadAgain; + } + } + } + if ( usb_last_irq & PDI_INT_EP2_IN) { // D12 - Ep2TxDone - data in EP2 was sended + usb_last_status = pdiGetLastTransStatus( PDI_EP2_TX); + debugPrint( DBG_HIGH, ("Ep2-Tx LTS=0x%X\n", usb_last_status)); + if ( usb_last_status & PDI_LTSTAT_RXTX_OK) { + if ( usb_flags.terminal_mode) { + int ch = usb_com_get( &usb_com_que_out); + usb_tm_snded++; + if ( ch < 0) { + usb_flags.bulk_tx_data = 0; + } else { + unsigned char uchr = ch; + usb_flags.bulk_tx_data = 1; + pdiWriteEndpoint( PDI_EP2_TX, 1, &uchr); + } + } else { + if ( usb_tx_bulk.remain) { + unsigned int now = usb_tx_bulk.remain; + if ( now > PDI_EP2_PACKET_SIZE) now = PDI_EP2_PACKET_SIZE; + pdiWriteEndpoint( PDI_EP2_TX, now, usb_tx_bulk.data); + usb_tx_bulk.data += now; + if (!(usb_tx_bulk.remain -= now)) { + // complete_func or set flag(event) + } + } + } + } + } + ret = 0; + } + } +// EA=1; +// LEDr = 0; +// INTERRUPT_POST(); + return ret; + } + + +// ************************************ + void usb_init( void) { + usb_last_irq = 0; usb_address = 0; usb_interface = 0; + usb_flags.word = 0; + + usb_com_init(); + +#ifdef USE_USB_WITH_IRQ + usb_irq_cnt=0; + #ifdef PDIUSB_WITH_ADD_IRQ_HANDLER + if( test_irq_handler( ISR_USB_INTV, &usb_irq_handler)==0) + add_irq_handler( ISR_USB_INTV, &usb_irq_handler); + #elif defined(PDIUSB_WITH_EXCPTVECT_SET) + excptvec_set(ISR_USB_INTV,&usb_isr); + #endif /*PDIUSB_WITH_ADD_IRQ_HANDLER*/ + //*((char*)0xfffa1f) |= 0x04; /* It must be here for pull-up INT signal in usb_isr function */ +#endif + debugPrint(DBG_MEDIUM,("# Usb Inited\n")); + } + + void usb_connect_bus( void) { + debugPrint(DBG_MEDIUM,("Usb connect to bus\n")); + usb_flags.running = 1; + usb_last_irq = 0; + pdiSetDMA( PDI_DMA_EP4_INT | PDI_DMA_EP5_INT); // ??? + pdiSetMode( PDI_MODE_NO_LAZY_CLOCK | PDI_MODE_CLOCK_RUNNING | PDI_MODE_SOFT_CONNECT | PDI_CLOCK_SET_TO_ONE | PDI_CLOCK_4M); + } + void usb_disconnect_bus( void) { + debugPrint(DBG_MEDIUM,("Usb disconnect from bus\n")); + pdiSetMode( PDI_MODE_NO_LAZY_CLOCK | PDI_MODE_CLOCK_RUNNING | PDI_CLOCK_SET_TO_ONE | PDI_CLOCK_4M); + usb_flags.configured = 0; + usb_flags.stop_request = 1; + } + + void usb_stall_ep0( void) { + pdiSetEpStatus( PDI_EP0_TX, PDI_SET_EP_STALLED); pdiSetEpStatus( PDI_EP0_RX, PDI_SET_EP_STALLED); + } + + +// ************************************ +// *** Common send/receive fncs *** +// ************************************ +/* + void usb_send_to_usb( unsigned char idx, unsigned char maxb) { + debugPrint( DBG_HIGH,("USB Send EP#%d (max=%d) <- buff 0x%lX, cnt %d\n",usb_ep[idx].ep, maxb, (unsigned long)usb_ep[idx].buff,usb_ep[idx].bytes)); + if ( !usb_ep[idx].bytes) pdiWriteEndpoint( usb_ep[idx].ep, 0, 0); + else { + if ( usb_ep[idx].bytes > maxb) { + pdiWriteEndpoint( usb_ep[idx].ep, maxb, usb_ep[idx].buff); + usb_ep[idx].bytes -= maxb; + usb_ep[idx].buff += maxb; + } else { + pdiWriteEndpoint( usb_ep[idx].ep, usb_ep[idx].bytes, usb_ep[idx].buff); + usb_ep[idx].buff += usb_ep[idx].bytes; + usb_ep[idx].bytes = 0; +// if ( usending) usending = 0; + } + } + } + + unsigned char usb_receive_from_usb( unsigned char idx, unsigned char maxb) { + unsigned char ret = 0; + + ret = (unsigned char)usb_ep[idx].bytes; + if ( !ret || ret > maxb) ret = maxb; + debugPrint( DBG_HIGH,("USB Receive EP#%d ->buff 0x%lX,cnt %d,(max %d)\n",usb_ep[idx].ep,(unsigned long)usb_ep[idx].buff,usb_ep[idx].bytes,ret)); + if ( !usb_ep[idx].bytes) { +// ureceiving = 0; + pdiReadEndpoint( usb_ep[idx].ep, 0, 0); + return 0xff; // too_small_buffer error + } + do { + ret = pdiReadEndpoint( usb_ep[idx].ep, ret, usb_ep[idx].buff); + debugPrint( DBG_HIGH,(" - really readed %d\n", ret)); + usb_ep[idx].buff += ret; + usb_ep[idx].bytes -= ret; + } while (( ret == maxb) && usb_ep[idx].bytes); + return ret; + } +*/ + + +#ifdef DEBUG + char *ReqRecipient( char rqt) { + switch ( rqt & USB_RECIPIENT) { + case USB_RECIPIENT_DEVICE: return "DEVICE"; + case USB_RECIPIENT_INTERFACE: return "INTERFACE"; + case USB_RECIPIENT_ENDPOINT: return "ENDPOINT"; + } + return "OTHER"; + } + char *ReqType( char rqt) { + switch ( rqt & USB_REQUEST_TYPE_MASK) { + case USB_STANDARD_REQUEST: return "STANDARD"; + case USB_CLASS_REQUEST: return "CLASS"; + case USB_VENDOR_REQUEST: return "VENDOR"; + } + return "RESERVED"; + } + char *ReqName( char req) { + switch ( req & USB_REQUEST_MASK) { + case USB_REQUEST_GET_STATUS: return "GET STATUS"; + case USB_REQUEST_CLEAR_FEATURE: return "CLEAR FEATURE"; + case USB_REQUEST_SET_FEATURE: return "SET FEATURE"; + case USB_REQUEST_SET_ADDRESS: return "SET ADDRESS"; + case USB_REQUEST_GET_DESCRIPTOR: return "GET DESCRIPTOR"; + case USB_REQUEST_SET_DESCRIPTOR: return "SET DESCRIPTOR"; + case USB_REQUEST_GET_CONFIGURATION: return "GET CONFIGURATION"; + case USB_REQUEST_SET_CONFIGURATION: return "SET CONFIGURATION"; + case USB_REQUEST_GET_INTERFACE: return "GET INTERFACE"; + case USB_REQUEST_SET_INTERFACE: return "SET INTERFACE"; + case USB_REQUEST_SYNC_FRAME: return "SYNC FRAME"; + } + return "UNKNOWN"; + } +#endif + + + void usb_set_control_data(usb_control_ep_t *ep, void *buff, int size) + { + ep->data = (unsigned char *) buff; + ep->bytes = size; + usb_flags.request = 2; + debugPrint( DBG_HIGH,("usb_set_control_data buff=0x%lx, len=%d\n", (long)buff, size)); + } + + void usb_set_control_ack(usb_control_ep_t *ep) + { + ep->data = NULL; + ep->bytes = 0; + usb_flags.request = 3; + debugPrint( DBG_HIGH,("usb_set_control_ack\n")); + } + + + /* + *********************************** + *** Execute device requests *** + *********************************** + */ + void usb_answer_to_request( void) { + USB_DEVICE_REQUEST *pdreq = &usb_rxtx_control.dreq; + + debugPrint( DBG_MEDIUM,("Process usb setup packet\n")); + usb_rxtx_control.req_size=pdiReadEndpoint( PDI_EP0_RX, 255, (unsigned char *)pdreq); + if ( usb_rxtx_control.req_size == 0xff) { + /*LEDr = 1; SetLeds( hlp[0]);*/ + debugPrint( DBG_LOW,("! BIG Setup packet\n")); + usb_stall_ep0(); + return; + } + pdiAckSetupControl(); + /* !!! it must be here !!! */ + pdreq->wValue = SWAP( pdreq->wValue); + pdreq->wIndex = SWAP( pdreq->wIndex); + pdreq->wLength = SWAP( pdreq->wLength); + + usb_rxtx_control.next_pkt_fnc = NULL; + usb_rxtx_control.complete_fnc = NULL; + + ctrl_data[0] = ctrl_data[1] = 0; // we need only 2 bytes + + #ifdef DEBUG + debugPrint( DBG_HIGH, ("Receive (0x%X) %s req. for %s , data %s host\n", + pdreq->bmRequestType, ReqType( pdreq->bmRequestType), + ReqRecipient(pdreq->bmRequestType), + ((pdreq->bmRequestType & USB_DATA_DIR_MASK) ? "TO":"FROM"))); + debugPrint( DBG_HIGH, (" Request (0x%X) %s\n", pdreq->bRequest, + ((!(pdreq->bmRequestType&USB_REQUEST_TYPE_MASK))? ReqName( pdreq->bRequest):"UNKNOWN"))); + #endif + + switch( pdreq->bmRequestType & USB_RECIPIENT) { + case USB_RECIPIENT_DEVICE: + switch( pdreq->bmRequestType & USB_REQUEST_TYPE_MASK) { + case USB_STANDARD_REQUEST: + switch( pdreq->bRequest) { + case USB_REQUEST_GET_STATUS: + #ifdef USB_MY_SELF_POWER + ctrl_data[0]=1; + #else + ctrl_data[0]=0; + #endif + USB_SET_CONTROL_DATA( &ctrl_data, 2); + //pdiWriteEndpoint( PDI_EP0_TX, 2, hlp); + break; + case USB_REQUEST_SET_ADDRESS: + usb_address = ( unsigned char)( pdreq->wValue & DEVICE_ADDRESS_MASK); + pdiSetAddressEnable( usb_address | PDI_ENAD_ENABLE); + USB_SET_CONTROL_ACK; + //pdiWriteEndpoint( PDI_EP0_TX, 0, 0); + break; + case USB_REQUEST_GET_DESCRIPTOR: + usb_get_descriptor(); + break; + case USB_REQUEST_GET_CONFIGURATION: + if ( usb_flags.configured) ctrl_data[0] = 1; + USB_SET_CONTROL_DATA( &ctrl_data, 1); + //pdiWriteEndpoint( PDI_EP0_TX, 1, hlp); + break; + case USB_REQUEST_SET_CONFIGURATION: + if (LSB( pdreq->wValue) < 2) { + if ( LSB( pdreq->wValue)) { + pdiSetEndpointEnable( usb_flags.configured=1); + } else { + pdiSetEndpointEnable( usb_flags.configured=0); + } + USB_SET_CONTROL_ACK; + //pdiWriteEndpoint( PDI_EP0_TX, 0, 0); + } else + usb_stall_ep0(); + break; + default: + usb_stall_ep0(); + break; + } + + break; + case USB_VENDOR_REQUEST: + if(usb_vendor_extension) { + int ret; + ret = usb_vendor_extension(&usb_rxtx_control, pdreq); + if (ret<0) { + usb_stall_ep0(); + break; + } + if (ret>0) { + break; + } + } + + switch ( pdreq->bRequest) { + case USB_VENDOR_START_TRANSFER: + { + unsigned long max = ((long)pdreq->wIndex << 16)+pdreq->wValue; + usb_rx_bulk.remain = ( usb_rx_bulk.bytes < max) ? usb_rx_bulk.bytes : max; + } + USB_SET_CONTROL_ACK; + break; + case USB_VENDOR_CONTROL_TERMINAL_MODE: + if ( pdreq->wValue == 1) usb_flags.terminal_mode = 1; + else usb_flags.terminal_mode = 0; + USB_SET_CONTROL_ACK; + break; + default: + USB_SET_CONTROL_ACK; + //pdiWriteEndpoint( PDI_EP0_TX, 0, 0); + break; + } + break; + case USB_CLASS_REQUEST: + usb_stall_ep0(); + default: + usb_stall_ep0(); + break; + } + break; + case USB_RECIPIENT_INTERFACE: + if (( pdreq->bmRequestType & USB_REQUEST_TYPE_MASK) == USB_STANDARD_REQUEST) { + switch( pdreq->bRequest) { + case USB_REQUEST_GET_STATUS: + USB_SET_CONTROL_DATA( &ctrl_data, 2); + //pdiWriteEndpoint( PDI_EP0_TX, 2, hlp); + break; + case USB_REQUEST_GET_INTERFACE: + debugPrint( DBG_HIGH,("ReqIfc=%d Now ifc=%d\n", pdreq->wIndex, usb_interface)); + USB_SET_CONTROL_DATA( &ctrl_data, 1); // alternate interface + //pdiWriteEndpoint( PDI_EP0_TX, 1, hlp); + break; + case USB_REQUEST_SET_INTERFACE: + //if (( dreq.wValue == 0) && ( dreq.wIndex == 0)) + if ( pdreq->wIndex < 1) { // mame jen 2 pokusne interface + usb_interface = (unsigned char) pdreq->wIndex; + USB_SET_CONTROL_ACK; + //pdiWriteEndpoint( PDI_EP0_TX, 0, 0); + } else + usb_stall_ep0(); + break; + default: + usb_stall_ep0(); + } + } else + usb_stall_ep0(); + break; + case USB_RECIPIENT_ENDPOINT: + if (( pdreq->bmRequestType & USB_REQUEST_TYPE_MASK) == USB_STANDARD_REQUEST) { + switch( pdreq->bRequest) { + case USB_REQUEST_GET_STATUS: + case USB_REQUEST_CLEAR_FEATURE: + case USB_REQUEST_SET_FEATURE: + { + ctrl_data[0] = ( unsigned char)(( pdreq->wIndex & PDI_CNT_EP)<<1); + if ( pdreq->wIndex & ( unsigned char) USB_ENDPOINT_DIRECTION_MASK) + ctrl_data[0]++; + if ( pdreq->bRequest == USB_REQUEST_GET_STATUS) { + ctrl_data[0] = pdiSelectEp( ctrl_data[0]); // endpoint in + ctrl_data[0] = (( ctrl_data[0] & PDI_SELEP_STALL) == PDI_SELEP_STALL); + USB_SET_CONTROL_DATA( &ctrl_data, 2); + //pdiWriteEndpoint( PDI_EP0_TX, 2, hlp); + } else { + if ( pdreq->bRequest == USB_REQUEST_CLEAR_FEATURE) { + pdiSetEpStatus( ctrl_data[0], 0); + //pdiWriteEndpoint( PDI_EP0_TX, 0, 0); + } else { + pdiSetEpStatus( ctrl_data[0], 1); + //pdiWriteEndpoint( PDI_EP0_TX, 0, 0); + } + USB_SET_CONTROL_ACK; + } + } + break; + default: + usb_stall_ep0(); + } + } else + usb_stall_ep0(); + break; +// case USB_RECIPIENT_OTHER: + default: + usb_stall_ep0(); + break; + } +// usb_flags.command = 0; // ??? data or ack stage ??? + +#ifdef USE_USB_WITH_IRQ +// send data if it is needed + if ( usb_flags.request == 2) { // request is set to data stage + if (( usb_rxtx_control.dreq.bmRequestType & USB_DATA_DIR_MASK)==USB_DATA_DIR_TO_HOST) { + unsigned int now = usb_rxtx_control.bytes; + if ( now > PDI_EP0_PACKET_SIZE) now = PDI_EP0_PACKET_SIZE; + if ( usb_rxtx_control.next_pkt_fnc ) + if( usb_rxtx_control.next_pkt_fnc(&usb_rxtx_control, now, USB_NEXT_PKT_SEND) ) { + usb_stall_ep0(); + return; + } + debugPrint( DBG_HIGH, ("CNTR send 1.data (%d)\n", now)); + pdiWriteEndpoint( PDI_EP0_TX, now, usb_rxtx_control.data); + usb_rxtx_control.data += now; + if ( !(usb_rxtx_control.bytes -= now)) { + usb_flags.request = 3; + } + } + } + if ( usb_flags.request == 3) { + if ( !usb_rxtx_control.dreq.wLength || + (usb_rxtx_control.dreq.bmRequestType & USB_DATA_DIR_MASK)==USB_DATA_DIR_FROM_HOST) { + pdiWriteEndpoint( PDI_EP0_TX, 0, 0); + if ( usb_rxtx_control.complete_fnc ) + usb_rxtx_control.complete_fnc(&usb_rxtx_control, USB_COMPLETE_OK); + usb_rxtx_control.next_pkt_fnc = NULL; + usb_rxtx_control.complete_fnc = NULL; + } + } +#endif + } + +#ifdef DEBUG + char *DescType( unsigned char desc) { + switch ( desc) { + case USB_DESCRIPTOR_TYPE_DEVICE: return"DEVICE"; + case USB_DESCRIPTOR_TYPE_CONFIGURATION: return"CONFIGURATION"; + case USB_DESCRIPTOR_TYPE_STRING: return"STRING"; + case USB_DESCRIPTOR_TYPE_INTERFACE: return"INTERFACE"; + case USB_DESCRIPTOR_TYPE_ENDPOINT: return"ENDPOINT"; + case USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER: return"DEVICE_QUALIFIER"; + case USB_DESCRIPTOR_TYPE_OTHER_SPEED_CONFIGURATION: return"OTHER_SPEED_CONFIG"; + case USB_DESCRIPTOR_TYPE_POWER: return"POWER"; + } + return "UNKNOWN"; + } +#endif + + void usb_get_descriptor( void) { + unsigned int size; + unsigned short wVal = usb_rxtx_control.dreq.wValue; + debugPrint( DBG_MEDIUM, (" - %s descriptor\n", DescType(MSB( wVal)))); + switch ( MSB( wVal)) { + case USB_DESCRIPTOR_TYPE_DEVICE: + usb_rxtx_control.data = (unsigned char *) &usb_device_descriptor; + size = sizeof( USB_DEVICE_DESCRIPTOR); + break; + case USB_DESCRIPTOR_TYPE_CONFIGURATION: + usb_rxtx_control.data = (unsigned char *) &usb_config_0; + size = CONFIG_0_DESCRIPTOR_LENGTH; + break; + case USB_DESCRIPTOR_TYPE_STRING: + if ( LSB( wVal) < USB_CNT_STRINGS) { + usb_rxtx_control.data = (unsigned char *) StringDescriptors[ LSB( wVal)]; + size = *usb_rxtx_control.data; + } else { + usb_stall_ep0(); + return; + } + break; + default: + usb_stall_ep0(); + return; + } + usb_rxtx_control.bytes = ( usb_rxtx_control.dreq.wLength < size) ? usb_rxtx_control.dreq.wLength : size; + usb_flags.request = 2; + //usb_send_to_usb( SEND_EP0, PDI_EP0_PACKET_SIZE); + } + + +/*****************************************************************************/ +/*****************************************************************************/ +/*****************************************************************************/ +/*** ***/ +/*** USB with IRQ ***/ +/*** ***/ +/*****************************************************************************/ +/*****************************************************************************/ +/*****************************************************************************/ + + #ifdef PDIUSB_WITH_EXCPTVECT_SET + void usb_isr(void) + #else /*PDIUSB_WITH_EXCPTVECT_SET*/ + void usb_isr(int intno, void *dev_id, struct pt_regs *regs) + #endif /*PDIUSB_WITH_EXCPTVECT_SET*/ + { + unsigned char usb_last_status; + + usb_irq_cnt++; + usb_last_irq = pdiGetInterrupt(); + if ( usb_last_irq) { + usb_flags.was_int = 1; + + debugPrint( DBG_INT, ("USB Interrupt 0x%X\n",usb_last_irq)); + if ( usb_last_irq & PDI_INT_BUSRESET) { // D12 - Bus reset reached + usb_flags.configured = 0; + if ( usb_flags.running && usb_flags.stop_request) { + usb_flags.running = 0; + usb_flags.stop_request = 0; + } + debugPrint( DBG_INT, ("Bus Reset\n")); + } else { + if ( usb_last_irq & PDI_INT_SUSPEND) { // D12 - Suspend flag changed + debugPrint( DBG_INT, ("Suspend Changed\n")); + } + // it must be first b/c tx and rx can be sended all together + if ( usb_last_irq & PDI_INT_EP0_IN) { // D12 - Ep0TxDone - data in EP0 was sended + usb_last_status = pdiGetLastTransStatus( PDI_EP0_TX); + debugPrint( DBG_INT, ("Ep0-Tx LTS=0x%X\n", usb_last_status)); + if (( usb_last_status & PDI_LTSTAT_RXTX_OK) && usb_flags.request > 1) { + if ( usb_flags.request == 2) { + unsigned int now = usb_rxtx_control.bytes; + if ( now > PDI_EP0_PACKET_SIZE) now = PDI_EP0_PACKET_SIZE; + debugPrint( DBG_INT, ("CNTR data\n")); + pdiWriteEndpoint( PDI_EP0_TX, now, usb_rxtx_control.data); + usb_rxtx_control.data += now; + if ( !(usb_rxtx_control.bytes -= now)) { + usb_flags.request = 3; + } + } else if ( usb_flags.request == 3) { + debugPrint( DBG_INT, ("CNTR ack\n")); + usb_flags.request = 0; + } else { + debugPrint( DBG_INT, ("tx 0 ... ???\n")); + } + } + } + + if ( usb_last_irq & PDI_INT_EP0_OUT) { // D12 - Ep0RxDone - some data was received in EP0 + usb_last_status = pdiGetLastTransStatus( PDI_EP0_RX); + debugPrint( DBG_INT, ("Ep0-Rx LTS=0x%X\n", usb_last_status)); + if ( usb_last_status & PDI_LTSTAT_RXTX_OK) { + if ( usb_last_status & PDI_LTSTAT_SETUP) { + if ( usb_flags.request) { + debugPrint( DBG_INT, ("!!! New setup, but last not ack ...\n")); + } + usb_flags.request = 1; // Standard_requests(); + usb_answer_to_request(); + } else { + if ( usb_flags.request == 2) { + unsigned int now = usb_rxtx_control.bytes, ret; + if ( now > PDI_EP0_PACKET_SIZE) now = PDI_EP0_PACKET_SIZE; + debugPrint( DBG_INT, ("CNTR data\n")); + ret = pdiReadEndpoint( PDI_EP0_RX, now, usb_rxtx_control.data); + + if(ret>usb_rxtx_control.bytes) + ret = usb_rxtx_control.bytes; + + usb_rxtx_control.data += ret; + + if ( usb_rxtx_control.next_pkt_fnc ) { + if( usb_rxtx_control.next_pkt_fnc(&usb_rxtx_control, ret, USB_NEXT_PKT_REC) ) { + usb_stall_ep0(); + } + } + + if (!(usb_rxtx_control.bytes -= ret)) { + usb_rxtx_control.data -= usb_rxtx_control.dreq.wLength; + usb_flags.request = 3; + } + } else if ( usb_flags.request == 3) { + debugPrint( DBG_INT, ("CNTR ack\n")); + usb_flags.request = 0; + pdiReadEndpoint( PDI_EP0_RX, 0, 0); + if ( usb_rxtx_control.complete_fnc ) + usb_rxtx_control.complete_fnc(&usb_rxtx_control, USB_COMPLETE_OK); + usb_rxtx_control.next_pkt_fnc = NULL; + usb_rxtx_control.complete_fnc = NULL; + } else { + pdiReadEndpoint( PDI_EP0_RX, 0, 0); + } + } + } + } + if ( usb_last_irq & PDI_INT_EP1_OUT) { // D12 - Ep1RxDone - some data was received in EP1 + usb_last_status = pdiGetLastTransStatus( PDI_EP1_RX); + debugPrint( DBG_INT, ("Ep1-Rx LTS=0x%X\n", usb_last_status)); + if ( usb_last_status & PDI_LTSTAT_RXTX_OK) { + pdiSetEpStatus( PDI_EP1_OUT, PDI_SET_EP_STALLED); + } + } + if ( usb_last_irq & PDI_INT_EP1_IN) { // D12 - Ep1TxDone - data in EP1 was sended + usb_last_status = pdiGetLastTransStatus( PDI_EP1_TX); + debugPrint( DBG_INT, ("Ep1-Tx LTS=0x%X\n", usb_last_status)); + if ( usb_last_status & PDI_LTSTAT_RXTX_OK) { + pdiSetEpStatus( PDI_EP1_IN, PDI_SET_EP_STALLED); + } + } + + if ( usb_last_irq & PDI_INT_EP2_OUT) { // D12 - Ep2RxDone - some data was received in EP2 + usb_last_status = pdiGetLastTransStatus( PDI_EP2_RX); + debugPrint( DBG_INT, ("Ep2-Rx LTS=0x%X\n", usb_last_status)); + if ( usb_last_status & PDI_LTSTAT_RXTX_OK) { + if ( usb_flags.terminal_mode) { + unsigned char hlpbfr[PDI_EP2_PACKET_SIZE], now = PDI_EP2_PACKET_SIZE, i; + MoreRead: + now = pdiReadEndpoint( PDI_EP2_RX, now, hlpbfr); + for(i=0;i (unsigned long)PDI_EP2_PACKET_SIZE)?PDI_EP2_PACKET_SIZE:(unsigned char)usb_rx_bulk.remain; + // unsigned char hlp[2]; + + if ( !usb_flags.bits.bulk_rx_data) { + usb_flags.bulk_rx_data = 1; + usb_start = msec_time; + } + // if ( now > PDI_EP2_PACKET_SIZE) now = PDI_EP2_PACKET_SIZE; + ReadAgain: + now = pdiReadEndpoint( PDI_EP2_RX, now, usb_rx_bulk.data); + usb_rx_bulk.data += now; + if ( !( usb_rx_bulk.remain -= now)) { + usb_stop = msec_time; + usb_flags.bulk_rx_data = 0; + // complete_func or set flag(event) + } + if ( usb_rx_bulk.remain > 0 && usb_rx_bulk.remain <= PDI_EP2_PACKET_SIZE) + goto ReadAgain; + } + } + } + if ( usb_last_irq & PDI_INT_EP2_IN) { // D12 - Ep2TxDone - data in EP2 was sended + usb_last_status = pdiGetLastTransStatus( PDI_EP2_TX); + debugPrint( DBG_INT, ("Ep2-Tx LTS=0x%X\n", usb_last_status)); + if ( usb_last_status & PDI_LTSTAT_RXTX_OK) { + if ( usb_flags.terminal_mode) { + int ch; + usb_tm_snded++; + ch = usb_com_get( &usb_com_que_out); + if ( ch < 0) { + usb_flags.bulk_tx_data = 0; + } else { + unsigned char uchr = ch; + usb_flags.bulk_tx_data = 1; + pdiWriteEndpoint( PDI_EP2_TX, 1, &uchr); + } + } else { + if ( usb_tx_bulk.remain) { + unsigned int now = usb_tx_bulk.remain; + if ( now > PDI_EP2_PACKET_SIZE) now = PDI_EP2_PACKET_SIZE; + pdiWriteEndpoint( PDI_EP2_TX, now, usb_tx_bulk.data); + usb_tx_bulk.data += now; + if (!(usb_tx_bulk.remain -= now)) { + // complete_func or set flag(event) + } + } + } + } + } + } + } + } + +#ifdef PDIUSB_WITH_ADD_IRQ_HANDLER + irq_handler_t usb_irq_handler = { + handler: usb_isr, + flags: 0, + dev_id: 0, + devname: "usb", + next: 0 + }; +#endif /*PDIUSB_WITH_ADD_IRQ_HANDLER*/ + + +/*****************************************************************************/ +/*****************************************************************************/ +/*****************************************************************************/ +/*** ***/ +/*** USB COM Emulator Module ***/ +/*** ***/ +/*****************************************************************************/ +/*****************************************************************************/ +/*****************************************************************************/ + int usb_tm_snd; + int usb_tm_snded; + int usb_tm_rcv; + + int usb_com_init( void) { + usb_tm_snd = 0; + usb_tm_snded = 0; + usb_tm_rcv = 0; + + usb_com_que_in.begin=usb_com_buf_in; + usb_com_que_in.end=usb_com_que_in.begin+sizeof(usb_com_buf_in); + usb_com_que_in.first=usb_com_que_in.begin; + usb_com_que_in.last=usb_com_que_in.begin; + + usb_com_que_out.begin=usb_com_buf_out; + usb_com_que_out.end=usb_com_que_out.begin+sizeof(usb_com_buf_out); + usb_com_que_out.first=usb_com_que_out.begin; + usb_com_que_out.last=usb_com_que_out.begin; + + return 1; + } + + /* put character c into queue, if full return -1 */ + int usb_com_put(usb_com_que_t *q, int c) + { + unsigned char *p=q->last; + *(p++)=(unsigned char)c; + if (p==q->end) p=q->begin; + if (p==q->first) return -1; + q->last=p; + return c; + } + /* get character from queue, if empty return -1 */ + int usb_com_get(usb_com_que_t *q) + { + unsigned char *p; + int c; + p=q->first; + if(p==q->last) return -1; + c=*(p++); + if(p==q->end) p=q->begin; + q->first=p; + return c; + } + +/* + int usb_com_sendch(int c) { + if ( usb_flags.terminal_mode) { + usb_tm_snd++; + if ( !usb_flags.bits.bulk_tx_data) { // hned poslat - atomicke nastaveni flagu ... + unsigned char byte = c; + pdiWriteEndpoint( PDI_EP2_TX, 1, (unsigned char *)&byte); + usb_flags.bulk_tx_data = 1; + } else { + if( usb_com_put(&usb_com_que_out,c)<0){ // nevejde se +#ifdef USE_USB_WITH_IRQ + while( usb_com_que_out.last == usb_com_que_out.first-1); // Wait if buffer is full !@#$%^&* + if( usb_com_put(&usb_com_que_out,c)<0) // case (last==end and first==begin) not respected +#endif + c=-1; + } + } + } + return c; + } +*/ + void usb_com_start_send( void) { + if ( !usb_flags.bits.bulk_tx_data && + usb_com_que_out.first != usb_com_que_out.last) { + int ch; + ch = usb_com_get( &usb_com_que_out); + if ( ch >= 0) { + unsigned char byte = ch; + usb_flags.bulk_tx_data = 1; + pdiWriteEndpoint( PDI_EP2_TX, 1, &byte); + } + } + } + + int usb_com_sendch(int c) { + if ( usb_flags.terminal_mode) { + usb_tm_snd++; +#ifndef USE_USB_WITH_IRQ + if( !usb_flags.bits.bulk_tx_data) { + unsigned char byte = c; + usb_flags.bulk_tx_data = 1; + pdiWriteEndpoint( PDI_EP2_TX, 1, &byte); + return c; + } +#endif + if( usb_com_put(&usb_com_que_out,c)<0){ /* nevejde se */ + +#ifdef USE_USB_WITH_IRQ + if ( !usb_flags.bits.bulk_tx_data) { + usb_com_start_send(); + } else { + while( usb_com_que_out.last == usb_com_que_out.first-1); /* Wait if buffer is full !@#$%^&* */ + } + if( usb_com_put(&usb_com_que_out,c)<0) /* case (last==end and first==begin) isn't respected */ +#endif + c=-1; + } + } + return c; + } + + + + int usb_com_recch() { + int val; + if ( !usb_flags.bits.terminal_mode) return -1; + val=usb_com_get(&usb_com_que_in); + return val; + } + + int usb_com_sendstr(const char *s) { + int cnt=0; + while(*s) + { + if(usb_com_sendch((unsigned char)(*(s++)))<0) break; + cnt++; + } + return cnt; + } + diff --git a/embedded/libs4c/usb/more/usb_srq.c b/embedded/libs4c/usb/more/usb_srq.c new file mode 100644 index 0000000..463f039 --- /dev/null +++ b/embedded/libs4c/usb/more/usb_srq.c @@ -0,0 +1,224 @@ +/*****************************************************/ +/*** Module : USB module ***/ +/*** Author : Roman Bartosinski (C) 28.04.2002 ***/ +/*** Modify : 08.08.2002, 16.04.2003 ***/ +/*****************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + + // **************************** + int usb_stdreq_get_status( usb_device_t *udev) + { + unsigned char c, buf[2] = { 0, 0}; + unsigned char epid = (unsigned char) udev->request.wIndex; + + usb_debug_print( DEBUG_LEVEL_HIGH, ("GetStatus\n")); + switch( udev->request.bmRequestType & USB_RECIPIENT) { + case USB_RECIPIENT_DEVICE: + if ( udev->flags & USB_FLAG_REMOTE_WAKE) //.remote_wake_up == 1) + buf[0] = USB_GETSTATUS_REMOTE_WAKEUP_ENABLED | USB_GETSTATUS_SELF_POWERED; + else + buf[0] = USB_GETSTATUS_SELF_POWERED; + break; + case USB_RECIPIENT_INTERFACE: + break; + case USB_RECIPIENT_ENDPOINT: + if ( epid & USB_ENDPOINT_DIRECTION_MASK) + c = pdiSelectEp(pdiEp2Idx(epid)); // endpoint in + else + c = pdiSelectEp(pdiEp2Idx(epid)); // endpoint Out + #ifdef PDIUSBD12 + buf[0] = (( c & PDI_SELEP_STALL) == PDI_SELEP_STALL); + #else + buf[0] = 0; + #endif + break; + default: + return USB_COMPLETE_FAIL; + } + pdiWriteEndpoint( PDI_EP0_TX, 2, buf); + return USB_COMPLETE_OK; + } + + int usb_stdreq_clear_feature( usb_device_t *udev) + { + USB_DEVICE_REQUEST *dreq = &(udev->request); + unsigned char epid = (unsigned char) dreq->wIndex; + + usb_debug_print( DEBUG_LEVEL_HIGH, ("ClearFeature\n")); + switch( dreq->bmRequestType & USB_RECIPIENT) { + case USB_RECIPIENT_DEVICE: + if ( dreq->wValue == USB_FEATURE_REMOTE_WAKEUP) { + udev->flags &= ~USB_FLAG_REMOTE_WAKE; //.remote_wake_up = 0; + usb_udev_ack_setup( udev); + return USB_COMPLETE_OK; + } + break; + case USB_RECIPIENT_ENDPOINT: + if ( dreq->wValue == USB_FEATURE_ENDPOINT_STALL) { + if ( epid & USB_ENDPOINT_DIRECTION_MASK) + pdiSetEpStatus(pdiEp2Idx(epid), 0); // clear TX stall for IN on EPn + else + pdiSetEpStatus(pdiEp2Idx(epid), 0); // clear RX stall for OUT on EPn + usb_udev_ack_setup( udev); + return USB_COMPLETE_OK; + } + break; + } + return USB_COMPLETE_FAIL; + } + + int usb_stdreq_set_feature( usb_device_t *udev) + { + USB_DEVICE_REQUEST *dreq = &(udev->request); + unsigned char epid = (unsigned char) dreq->wIndex; + + usb_debug_print( DEBUG_LEVEL_HIGH, ("SetFeature\n")); + switch( dreq->bmRequestType & USB_RECIPIENT) { + case USB_RECIPIENT_DEVICE: + if ( dreq->wValue == USB_FEATURE_REMOTE_WAKEUP) { + udev->flags |= USB_FLAG_REMOTE_WAKE; //.remote_wake_up = 1; + usb_udev_ack_setup( udev); + return USB_COMPLETE_OK; + } + break; + case USB_RECIPIENT_ENDPOINT: + if ( dreq->wValue == USB_FEATURE_ENDPOINT_STALL) { + if ( epid & USB_ENDPOINT_DIRECTION_MASK) + pdiSetEpStatus( pdiEp2Idx(epid), 1); // set TX stall for IN on EPn + else + pdiSetEpStatus( pdiEp2Idx(epid), 1); // set RX stall for OUT on EPn + usb_udev_ack_setup( udev); + return USB_COMPLETE_OK; + } + break; + } + return USB_COMPLETE_FAIL; + } + + int usb_stdreq_set_address( usb_device_t *udev) + { + USB_DEVICE_REQUEST *dreq = &(udev->request); + usb_debug_print( DEBUG_LEVEL_HIGH, ("SetAddr\n")); + usb_udev_ack_setup( udev); + pdiSetAddressEnable( (dreq->wValue & DEVICE_ADDRESS_MASK) + PDI_ENAD_ENABLE); + return USB_COMPLETE_OK; + } + + int usb_stdreq_get_configuration( usb_device_t *udev) + { + unsigned char buf = udev->configuration; //usb_flags.configured; + usb_debug_print( DEBUG_LEVEL_HIGH, ("GetConfig\n")); + pdiWriteEndpoint( PDI_EP0_TX, 1, &buf); + return USB_COMPLETE_OK; + } + + int usb_stdreq_set_configuration( usb_device_t *udev) + { + USB_DEVICE_REQUEST *dreq = &(udev->request); + unsigned char iCfg = dreq->wValue & 0xff; + usb_debug_print( DEBUG_LEVEL_HIGH, ("SetConfig\n")); + if ( iCfg < 2) { // put device in unconfigured state or set configuration 1 ( no else) + usb_udev_ack_setup( udev); + pdiSetEndpointEnable( 0); // USBInitUnconfig(); + if ( iCfg) { + pdiSetEndpointEnable( PDI_EPEN_ENABLE); //USBInitConfig(); + udev->flags |= USB_FLAG_CONFIGURED; + } else { + udev->flags &= ~USB_FLAG_CONFIGURED; + } + udev->configuration = iCfg; //usb_flags.configured = iCfg; + return USB_COMPLETE_OK; + } else + return USB_COMPLETE_FAIL; + } + + int usb_stdreq_get_interface( usb_device_t *udev) + { + unsigned char buf = 0; /// udev->interface + usb_debug_print( DEBUG_LEVEL_HIGH, ("GetIface\n")); + pdiWriteEndpoint( PDI_EP0_TX, 1, &buf); + return USB_COMPLETE_OK; + } + + int usb_stdreq_set_interface( usb_device_t *udev) + { + USB_DEVICE_REQUEST *dreq = &(udev->request); + + usb_debug_print( DEBUG_LEVEL_HIGH, ("SetIface\n")); + if (( dreq->wValue == 0) && ( dreq->wIndex == 0)) { + usb_udev_ack_setup( udev); + return USB_COMPLETE_OK; + } else { + return USB_COMPLETE_FAIL; + } + } + + int usb_stdreq_get_descriptor( usb_device_t *udev) + { + unsigned char *pDesc; + unsigned short Len = 0; + USB_DEVICE_REQUEST *dreq = &(udev->request); + int i; + + i = (dreq->wValue >> 8) & 0xff; /* MSB part of wValue */ + usb_debug_print( DEBUG_LEVEL_HIGH, ("GetDesc\n")); + usb_debug_print( DEBUG_LEVEL_VERBOSE, ( " - %s desc.\n", /*(unsigned int)*/ usb_debug_get_std_descriptor(i))); + + switch (i) { + case USB_DESCRIPTOR_TYPE_DEVICE: + pDesc = (unsigned char *)&DeviceDescription; + Len = sizeof( USB_DEVICE_DESCRIPTOR); + break; + case USB_DESCRIPTOR_TYPE_CONFIGURATION: + pDesc = (unsigned char *)&ConfigDescription; + Len = CONFIG_DESCRIPTOR_LENGTH; + break; + case USB_DESCRIPTOR_TYPE_INTERFACE: + pDesc = (unsigned char *)&ConfigDescription.interface; + Len = sizeof( USB_INTERFACE_DESCRIPTOR); + break; + case USB_DESCRIPTOR_TYPE_STRING: + i = dreq->wValue & 0xff; /* LSB part of wValue */ + /*printf("Get descriptor indx=0x%02x\n", i);*/ + if ( i < CNT_STRINGS) { + pDesc = (unsigned char *) StringDescriptors[ i]; + Len = *pDesc; + /*usb_debug_print(0,("indx=0x%02x ptr=%p len=%d : '%c'\n", i, pDesc, Len, pDesc[2]));*/ + } else { + return USB_COMPLETE_FAIL; + } + break; + default: + return USB_COMPLETE_FAIL; + } + if ( dreq->wLength < Len) Len = dreq->wLength; + usb_send_control_data( udev, pDesc, Len); + return USB_COMPLETE_OK; + } + + +/* + void usb_init_stdreq_fnc( usb_device_t *udev) + { + // memset( udev->stdreq, 0, sizeof(udev->stdreq)); + + udev->stdreq[USB_REQUEST_GET_STATUS] = usb_stdreq_get_status; + udev->stdreq[USB_REQUEST_CLEAR_FEATURE] = usb_stdreq_clear_feature; + udev->stdreq[USB_REQUEST_SET_FEATURE] = usb_stdreq_set_feature; + udev->stdreq[USB_REQUEST_SET_ADDRESS] = usb_stdreq_set_address; + udev->stdreq[USB_REQUEST_GET_DESCRIPTOR] = usb_stdreq_get_descriptor; + udev->stdreq[USB_REQUEST_GET_CONFIGURATION] = usb_stdreq_get_configuration; + udev->stdreq[USB_REQUEST_SET_CONFIGURATION] = usb_stdreq_set_configuration; + udev->stdreq[USB_REQUEST_GET_INTERFACE] = usb_stdreq_get_interface; + udev->stdreq[USB_REQUEST_SET_INTERFACE] = usb_stdreq_set_interface; + } +*/ diff --git a/embedded/libs4c/usb/pdiusb/Makefile b/embedded/libs4c/usb/pdiusb/Makefile new file mode 100644 index 0000000..f595272 --- /dev/null +++ b/embedded/libs4c/usb/pdiusb/Makefile @@ -0,0 +1,14 @@ +# Generic directory or leaf node makefile for OCERA make framework + +ifndef MAKERULES_DIR +MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) ) +endif + +ifeq ($(MAKERULES_DIR),) +all : default +.DEFAULT:: + @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n" +else +include $(MAKERULES_DIR)/Makefile.rules +endif + diff --git a/embedded/libs4c/usb/pdiusb/Makefile.omk b/embedded/libs4c/usb/pdiusb/Makefile.omk new file mode 100644 index 0000000..40b9dfd --- /dev/null +++ b/embedded/libs4c/usb/pdiusb/Makefile.omk @@ -0,0 +1,12 @@ +# -*- makefile -*- + +default_CONFIG = CONFIG_USB_PDIUSB=n + +ifeq ($(CONFIG_USB_PDIUSB),y) +lib_LIBRARIES = usbpdi + +nobase_include_HEADERS = usb/pdi.h usb/pdiusb.h + +usbpdi_SOURCES = pdi.c pdiusb.c +#usbpdi_SOURCES += pdi4rtems.c +endif #CONFIG_USB_PDIUSB diff --git a/embedded/libs4c/usb/pdiusb/pdi.c b/embedded/libs4c/usb/pdiusb/pdi.c new file mode 100644 index 0000000..3229d36 --- /dev/null +++ b/embedded/libs4c/usb/pdiusb/pdi.c @@ -0,0 +1,201 @@ +/*****************************************************/ +/*** Module : USB PDI ***/ +/*** Author : Roman Bartosinski (C) 28.04.2002 ***/ +/*** Modify : 08.08.2002, 16.04.2003 ***/ +/*****************************************************/ + +#include +#include +#include + +#define USB_PDI_EXPORT_FNC + +#include +#include +#include + + +/* init chip state */ + void pdiInitChipState( void) { + #ifdef PDIUSBD11 + pdiSetHUBAddressEnable( 0, 0); + #endif /*PDIUSBD11*/ + pdiSetAddressEnable( PDI_ENAD_ENABLE); + pdiSetEndpointEnable( PDI_EPEN_ENABLE); + } + +#ifdef PDIUSBD11 + + #define PDI_MODE_BASE_VALUE (PDI_MODE_MUSTBEONE | \ + PDI_MODE_REMOTE_WAKEUP | PDI_MODE_NO_LAZY_CLOCK | \ + PDI_MODE_CLOCK_RUNNING | PDI_CLOCK_4M) + +#else /*PDIUSBD11*/ + + #define PDI_MODE_BASE_VALUE (PDI_CLOCK_SET_TO_ONE | \ + PDI_MODE_NO_LAZY_CLOCK | PDI_MODE_CLOCK_RUNNING | \ + PDI_CLOCK_4M) + +#endif /*PDIUSBD11*/ + + +/* connect usb */ + int usb_pdi_connect( usb_device_t *udev) { + pdiSetMode( PDI_MODE_BASE_VALUE | PDI_MODE_SOFT_CONNECT ); + return 0; + } + +/* disconnect usb */ + int usb_pdi_disconnect( usb_device_t *udev) { + pdiSetMode( PDI_MODE_BASE_VALUE & ~PDI_MODE_SOFT_CONNECT ); + return 0; + } + +/* acknowledge control transfer */ + void usb_pdi_ack_setup( usb_device_t *udev) { + pdiWriteEndpoint( PDI_EP0_TX, 0, 0); + } + + +/* acknowledge control transfer */ + void usb_pdi_ack_control_setup( usb_device_t *udev) { + pdiAckSetupControl(); + } + + +/** + * usb_pdi_check events + * function reads interrupt register and sets event flags + * function returns 1 if there is some new event. + * function returns 0 if there isn't new event but all is OK + * function returns -1 if there is any error +*/ + int usb_pdi_check_events( usb_device_t *udev) { + volatile unsigned char LastTrans = 0; + volatile unsigned int LastInt; + int ret = 0, i; + + LastInt = pdiGetInterrupt(); +if ( LastInt) { + usb_debug_print( DEBUG_LEVEL_LOW, ("PI=0x%04X\n", LastInt)); +} + usb_debug_print( DEBUG_LEVEL_HIGH, ("PDI Int=0x%04X\n", LastInt)); + + if ( LastInt & PDI_INT_BUSRESET) { // D12 - Bus reset reached + pdiInitChipState(); + udev->flags |= USB_FLAG_BUS_RESET; + ret = 1; + } else { + #ifdef PDIUSBD12 + if ( LastInt & PDI_INT_SUSPEND) { // D12 - Suspend flag changed + udev->flags |= USB_FLAG_SUSPEND; + ret = 1; + } + #endif + + + if ( LastInt & PDI_INT_EP0_OUT) { // D12 - Ep0RxDone - some data was received in EP0 + LastTrans = pdiGetLastTransStatus( PDI_EP0_RX); + if ( LastTrans & PDI_LTSTAT_SETUP) { // setup packet + udev->flags |= USB_FLAG_SETUP; + } else { + udev->flags |= USB_FLAG_EVENT_RX0; + } + ret = 1; + } + if ( LastInt & PDI_INT_EP0_IN) { // D12 - Ep0TxDone - data in EP0 was sended + LastTrans = pdiGetLastTransStatus( PDI_EP0_TX); + udev->flags |= USB_FLAG_EVENT_TX0; + ret = 1; + } + + + for( i=0; icntep; i++) { + if ( LastInt & (udev->ep+i)->event_mask) { + LastTrans = pdiGetLastTransStatus( (udev->ep+i)->epnum); + udev->ep_events |= 1<ep+i)->event_mask); + ret = 1; + } + } + + /* check unsupported endpoints */ + if ( LastInt & PDI_INT_EP1_OUT) { // D12 - Ep1RxDone - some data was received in EP1 + LastTrans = pdiGetLastTransStatus( PDI_EP1_RX); + pdiSetEpStatus( PDI_EP1_RX, PDI_SET_EP_STALLED); + } + if ( LastInt & PDI_INT_EP1_IN) { // D12 - Ep1TxDone - data in EP1 was sended + LastTrans = pdiGetLastTransStatus( PDI_EP1_TX); + pdiSetEpStatus( PDI_EP1_TX, PDI_SET_EP_STALLED); + } + if ( LastInt & PDI_INT_EP2_OUT) { // D12 - Ep2RxDone - some data was received in EP2 + LastTrans = pdiGetLastTransStatus( PDI_EP2_RX); + pdiSetEpStatus( PDI_EP2_RX, PDI_SET_EP_STALLED); + } + if ( LastInt & PDI_INT_EP2_IN) { // D12 - Ep2TxDone - data in EP2 was sended + LastTrans = pdiGetLastTransStatus( PDI_EP2_TX); + pdiSetEpStatus( PDI_EP2_TX, PDI_SET_EP_STALLED); + } + #if defined(PDIUSBD11) || defined(PDIUSBH11A_SINGLE) // D11,H11_S + if ( LastInt & PDI_INT_EP3_OUT) { // D11 - Ep3RxDone - some data was received in EP3 + LastTrans = pdiGetLastTransStatus( PDI_EP3_RX); + pdiSetEpStatus( PDI_EP3_RX, PDI_SET_EP_STALLED); + } + if ( LastInt & PDI_INT_EP3_IN) { // D11 - Ep3TxDone - data in EP3 was sended + LastTrans = pdiGetLastTransStatus( PDI_EP3_TX); + pdiSetEpStatus( PDI_EP3_TX, PDI_SET_EP_STALLED); + } + #endif /* D11,H11_S */ + } + return ret; + } + + +/* stall endpoint X */ + void usb_pdi_stall( usb_ep_t *ep) { + if ( ep->epnum) { + pdiSetEpStatus( ep->epnum, PDI_SET_EP_STALLED); + } else { // endpoint0 + pdiSetEpStatus( PDI_EP0_TX, PDI_SET_EP_STALLED); + pdiSetEpStatus( PDI_EP0_RX, PDI_SET_EP_STALLED); + } + } + + int usb_pdi_read_endpoint( usb_ep_t *ep, void *ptr, int size) USB_UDEV_REENTRANT_SIGN + { + if(!ep->epnum) + return pdiReadEndpoint( PDI_EP0_RX, size, ptr); + else + return pdiReadEndpoint( ep->epnum, size, ptr); + } + + int usb_pdi_write_endpoint( usb_ep_t *ep, const void *ptr, int size) USB_UDEV_REENTRANT_SIGN + { + if(!ep->epnum) + pdiWriteEndpoint( PDI_EP0_TX, size, ptr); + else + pdiWriteEndpoint( ep->epnum, size, ptr); + return size; + } + + +/* init usb structures and chip */ + int usb_pdi_init( usb_device_t *udev) { + + #ifndef USB_PDI_DIRECT_FNC + udev->connect = usb_pdi_connect; + udev->disconnect = usb_pdi_disconnect; + udev->ack_setup = usb_pdi_ack_setup; + udev->ack_control_setup = usb_pdi_ack_control_setup; + udev->stall = usb_pdi_stall; + udev->check_events = usb_pdi_check_events; + udev->read_endpoint = usb_pdi_read_endpoint; + udev->write_endpoint = usb_pdi_write_endpoint; + #endif /*USB_PDI_DIRECT_FNC*/ + + udev->ep0.max_packet_size = PDI_EP0_PACKET_SIZE; + + pdiInitChipState(); + pdiSetMode( PDI_MODE_BASE_VALUE); + return 0; + } diff --git a/embedded/libs4c/usb/pdiusb/pdiusb.c b/embedded/libs4c/usb/pdiusb/pdiusb.c new file mode 100644 index 0000000..280717c --- /dev/null +++ b/embedded/libs4c/usb/pdiusb/pdiusb.c @@ -0,0 +1,527 @@ +/*********************************************************/ +/*** Module : PDIUSB D11,H11,H11A,D12 - implement. ***/ +/*** Author : Roman Bartosinski (C) 03.10.2002 ***/ +/*** Description : Integrate common functions for ***/ +/*** PDIUSBD11,PDIUSBD12,PDIUSBH11(old) ***/ +/*** PDIUSBH11A in Single/Multiple mode ***/ +/*** to one common file. ***/ +/*** Modify : 10.10.2002 - add H11 ***/ +/*** 13.10.2002 - add spec.fnc for 'using' ***/ +/*********************************************************/ + +#include +#include +#if __BYTE_ORDER == __BIG_ENDIAN + #include +#endif +#include +#include + + #ifdef PDI_CMD_RWD_INTERNAL + #ifndef PDIUSBD12 + #include + #endif + #endif + + #ifndef SDCC + #define xdata + #endif + + +/*********************************************************/ +// Function for read and write from/into chip + + #if defined(PDI_CMD_RWD_INTERNAL) + #if defined(PDIUSBD12) // parallel interface + + void pdiSendCommand( unsigned char byCmd) { + *((volatile xdata unsigned char *) PDIUSB_COMMAND_ADDR) = byCmd; + } + unsigned char pdiReadData( unsigned char byCount, void *pbyData) { + unsigned char out = byCount; + while (byCount) { + byCount--; + *(unsigned char*)pbyData++ = *((volatile xdata unsigned char *) PDIUSB_READ_DATA_ADDR); + } + return out; + } + void pdiWriteData( unsigned char byCount, const void *pbyData) { + while (byCount) { + byCount--; + *((volatile xdata unsigned char *) PDIUSB_WRITE_DATA_ADDR) = *(unsigned char*)pbyData++; + } + } + + #if defined(PDI_USE_USING) + unsigned short pdiIntCmdReadData( unsigned char byCmd, unsigned char byShort) _PDI_USING { + unsigned char i[2]; + *((volatile xdata unsigned char *) PDIUSB_COMMAND_ADDR) = byCmd; + i[0] = *((volatile xdata unsigned char *) PDIUSB_READ_DATA_ADDR); + if ( !byShort) { + i[1] = 0; + return i[0]; + } + i[1] = *((volatile xdata unsigned char *) PDIUSB_READ_DATA_ADDR); + return (((unsigned short) i[1]) << 8) + i[0]; + } + #endif + + #else // serial interface iic + #ifndef D11_REG_CMD + #define D11_REG_CMD PDIUSB_COMMAND_ADDR + #endif + #ifndef D11_REG_DATA_WRITE + #define D11_REG_DATA_WRITE PDIUSB_WRITE_DATA_ADDR + #endif + #ifndef D11_REG_DATA_READ + #define D11_REG_DATA_READ PDIUSB_READ_DATA_ADDR + #endif + + void pdiSendCommand( unsigned char byCmd) { + I2C_Write( D11_REG_CMD, &byCmd, 1); + } + unsigned char pdiReadData( unsigned char byCount, void *pbyData) { + I2C_Read( D11_REG_DATA_READ, pbyData, byCount); + return byCount; + } + void pdiWriteData( unsigned char byCount, const void *pbyData) { + I2C_Write( D11_REG_DATA_WRITE, pbyData, byCount); + } + #if defined(PDI_USE_USING) + unsigned short pdiIntCmdReadData( unsigned char byCmd, unsigned char byShort) _PDI_USING { + } + #endif + + #endif + #endif + + +/*********************************************************/ +/*********************************************************/ +// PDIUSB common commands + +#if defined(PDIUSBH11) || defined(PDIUSBH11A) || defined(PDIUSBD11) + + /*********************************************************/ + // pdiSetHUBAddressEnable + // enable HUB function and set address (byAddress is 0-0x7F, byEnable is 0 or 1) + void pdiSetHUBAddressEnable( unsigned char byAddress, unsigned char byEnable) { +// usb_debug_print( DEBUG_LEVEL_HIGH, ("H ")); + byAddress = (byAddress & 0x7F) | (byEnable << 7); + pdiSendCommand( PDI_CMD_HUB_ENB_ADDR); + pdiWriteData( 1, &byAddress); + } + +#endif +#if !defined(PDIUSBH11A_MULTPLE) // D11,D12,H11,H11A_S(emb.fnc) + + /*********************************************************/ + // pdiSetAddressEnable + // Enable function and set address (byAddress is 0-0x7F, byEnable is 0 or 1) + void pdiSetAddressEnable( unsigned char byAddr_Enb) { +// usb_debug_print( DEBUG_LEVEL_HIGH, ("A ")); + pdiSendCommand( PDI_CMD_FNC_ENB_ADDR); + pdiWriteData( 1, &byAddr_Enb); + } + +#else + + /*********************************************************/ + // pdiSetEmbFncAddressEnable + // Enable Embedded function and set address (byAddress is 0-0x7F, byEnable is 0 or 1) + // byFnc - function index (zero based) 0-3 + void pdiSetEmbFncAddressEnable( unsigned char byFnc, unsigned char byAddress, unsigned char byEnable) { + byAddress = (byAddress & 0x7F) | (byEnable << 7); + pdiSendCommand( PDI_CMD_FNC1_ENB_ADDR + byFnc); + pdiWriteData( 1, &byAddress); + } + +#endif + + + + /*********************************************************/ + // pdiSetEndpointEnable + // enable/disable endpoints (PDI_EPEN_xxx) + void pdiSetEndpointEnable( unsigned char byEnable) { +// usb_debug_print( DEBUG_LEVEL_HIGH, ("E ")); + pdiSendCommand( PDI_CMD_EPEN); + pdiWriteData( 1, &byEnable); + } + + +#if !defined(PDIUSBH11) // H11 has not it + + /*********************************************************/ + // pdiSetMode + // set chip mode (PDI_MODE_xxx) and clock division factor (PDI_CLOCK_xxx) + void pdiSetMode( unsigned short wMode_Clock) { + unsigned char sm[2]; +// usb_debug_print( DEBUG_LEVEL_HIGH, ("M%04X ",wMode_Clock)); + sm[0] = (unsigned char) (wMode_Clock & 0xff); + sm[1] = (unsigned char) (wMode_Clock >> 8); + pdiSendCommand( PDI_CMD_SET_MODE); + pdiWriteData( 2, sm); + } + +#endif + + #if defined(PDIUSBD12) + + /*********************************************************/ + // pdiSetDMA + // set DMA mode (PDI_DMA_xxx) + void pdiSetDMA( unsigned char byDma) { + pdiSendCommand( PDI_CMD_SET_DMA); + pdiWriteData( 1, &byDma); + } + + /*********************************************************/ + // pdiGetDMA + // get current DMA mode + unsigned char pdiGetDMA( void) { + unsigned char dma; + pdiSendCommand( PDI_CMD_GET_DMA); + pdiReadData( 1, &dma); + return dma; + } + + #endif + + + #if defined(PDIUSBH11) + + /*********************************************************/ + + // pdiGetInterrupt - H11 return only one byte + // get interrupt register (PDI_INT_xxx) + unsigned char pdiGetInterrupt( void) _PDI_USING { + unsigned char gin; +#if defined(PDI_USE_USING) + return pdiIntCmdReadData( PDI_CMD_GET_INT_REG, 0); +#else + pdiSendCommand( PDI_CMD_GET_INT_REG); + pdiReadData( 1, &gin); + return gin; +#endif + } + + #else + + /*********************************************************/ + // pdiGetInterrupt + // get interrupt register (PDI_INT_xxx) + unsigned short pdiGetInterrupt( void) _PDI_USING { + unsigned short gin; +#if defined(PDI_USE_USING) + return pdiIntCmdReadData( PDI_CMD_GET_INT_REG, 1); +#else + pdiSendCommand( PDI_CMD_GET_INT_REG); + pdiReadData( 2, &gin); + #if __BYTE_ORDER == __BIG_ENDIAN + gin=bswap_16(gin); + #endif + return gin; //pdiData[0] + (((unsigned short)pdiData[1])<<8); +#endif + } + + #endif + + /*********************************************************/ + // pdiSelectEp + // set internal buffer pointer to selected endpoint (zero based) (PDI_SELEP_xxx) + unsigned char pdiSelectEp( unsigned char byEpIdx) { + unsigned char sep; +// usb_debug_print( DEBUG_LEVEL_HIGH, ("e%1d ",byEpIdx)); + pdiSendCommand( PDI_CMD_SELECT_EP + byEpIdx); + pdiReadData( 1, &sep); + return sep; + } + + /*********************************************************/ + // pdiGetLastTransStatus + // get Last transaction status (PDI_LTSTAT_xxx and PDI_ERR_xxx) + unsigned char pdiGetLastTransStatus( unsigned char byEpIdx) _PDI_USING { + unsigned char lts; +// usb_debug_print( DEBUG_LEVEL_HIGH, ("L ")); +#if defined(PDI_USE_USING) + return pdiIntCmdReadData( PDI_CMD_GET_LAST_STAT + byEpIdx, 0); +#else + pdiSendCommand( PDI_CMD_GET_LAST_STAT + byEpIdx); + pdiReadData( 1, <s); + return lts; +#endif + } + + + #if defined(PDIUSBD11) || defined(PDIUSBH11) || defined(PDIUSBH11A) + + /*********************************************************/ + // pdiGetEpStatus + // get Endpoint Status (PDI_EPSTAT_xxx) + unsigned char pdiGetEpStatus( unsigned char byEpIdx) { + unsigned char ges; +// usb_debug_print( DEBUG_LEVEL_HIGH, ("G ")); + pdiSendCommand( PDI_CMD_GET_EP_STAT + byEpIdx); + pdiReadData( 1, &ges); + return ges; + } + + #endif + + /*********************************************************/ + // pdiReadFromEpBuffer - raw reading + // read data from selected internal chip buffer + // if byLength < length of buffer data, so we read only byLength data) + unsigned char pdiReadFromEpBuffer( unsigned char byLength, unsigned char *pToBuff) { + unsigned char rdep[2]; +// usb_debug_print( DEBUG_LEVEL_HIGH, ("R ")); + pdiSendCommand( PDI_CMD_READ_BUFFER); + pdiReadData( 2, rdep); + if ( rdep[1]) { // there is some data + if ( byLength < rdep[1]) // we need less data then is received + rdep[1] = byLength; + pdiReadData( rdep[1], pToBuff); + } + return rdep[1]; + } + + /*********************************************************/ + // pdiWriteToEpBuffer - raw writing + // write data to selected internal chip buffer + void pdiWriteToEpBuffer( unsigned char byLength, const unsigned char *pFromBuff) { + unsigned char hd[2]; +// usb_debug_print( DEBUG_LEVEL_HIGH, ("W ")); + pdiSendCommand( PDI_CMD_WRITE_BUFFER); + hd[0] = 0; hd[1] = byLength; + pdiWriteData( 2, hd); + if ( byLength) { + pdiWriteData( byLength, pFromBuff); + } + } + + /*********************************************************/ + // pdiSetEpStatus + // set endpoint stall flag + void pdiSetEpStatus( unsigned char byEpIdx, unsigned char byStatus) { +// usb_debug_print( DEBUG_LEVEL_HIGH, ("T ")); + pdiSendCommand( PDI_CMD_SET_EP_STAT + byEpIdx); + pdiWriteData( 1, &byStatus); + } + + /*********************************************************/ + // pdiAcknowledgeSetup + // chip disable fncs Validate and Clear after SETUP packet, + // this cmd re-enable these fncs + void pdiAcknowledgeSetup( void) { +// usb_debug_print( DEBUG_LEVEL_HIGH, ("C ")); + pdiSendCommand( PDI_CMD_ACK_SETUP); + } + + /*********************************************************/ + // pdiClearBuffer + // set endpoint flag 'empty' and next data can be receive + void pdiClearBuffer( void) { +// usb_debug_print( DEBUG_LEVEL_HIGH, ("B ")); + pdiSendCommand( PDI_CMD_CLEAR_BUFFER); + } + + + /*********************************************************/ + // pdiValidateBuffer + // set endpoint flag 'full' and data can be send + void pdiValidateBuffer( void) { +// usb_debug_print( DEBUG_LEVEL_HIGH, ("V ")); + pdiSendCommand( PDI_CMD_VALID_BUFFER); + } + + /*********************************************************/ + // pdiSendResume + // send an upstream resume signal for 10ms + void pdiSendResume( void) { +// usb_debug_print( DEBUG_LEVEL_HIGH, ("M ")); + pdiSendCommand( PDI_CMD_SEND_RESUME); + } + + /*********************************************************/ + // pdiGetFrameNumber + // return frame number of last successfully received SOF + unsigned short pdiGetFrameNumber( void) { + unsigned short gfn; + pdiSendCommand( PDI_CMD_GET_FRAME); + pdiReadData( 2, &gfn); + #if __BYTE_ORDER == __BIG_ENDIAN + gfn=bswap_16(gfn); + #endif + return gfn; //pdiData[0] + (((unsigned short)pdiData[1])<<8); + } + + /*********************************************************/ + // pdiGetChipID - this function is undocumented + // read chip ID (not documented function) ( LSB is maybe type of chip in hex (0x12,0x11)) + unsigned short pdiGetChipID( void) { + unsigned short gid; + pdiSendCommand( PDI_CMD_GET_CHIP_ID); + pdiReadData( 2, &gid); + #if __BYTE_ORDER == __BIG_ENDIAN + gid=bswap_16(gid); + #endif + return gid; //pdiData[0] + (((unsigned short)pdiData[1])<<8); + } + + + /*********************************************************/ + /*********************************************************/ + // HUB command +#if defined(PDIUSBH11) || defined(PDIUSBH11A) + /*********************************************************/ + // pdiClearPortFeature + // clear feature 'byFeature' in downstream port 2-5 'byEpIdx' (zero based) + void pdiClearPortFeature( unsigned char byEpIdx, unsigned char byFeature) { + pdiSendCommand( PDI_CMD_P2_CLR_FEATURE + byEpIdx); + pdiWriteData( 1, &byFeature); + } + + /*********************************************************/ + // pdiSetPortFeature + // set feature 'byFeature' in downstream port 2-5 'byEpIdx' (zero based) + void pdiSetPortFeature( unsigned char byEpIdx, unsigned char byFeature) { + pdiSendCommand( PDI_CMD_P2_SET_FEATURE + byEpIdx); + pdiWriteData( 1, &byFeature); + } + + /*********************************************************/ + // pdiGetPortFeature + // get port status (port status byte and port status change byte) + unsigned short pdiGetPortFeature( unsigned char byEpIdx) { + unsigned short gpf; + pdiSendCommand( PDI_CMD_P2_GET_STATUS + byEpIdx); + pdiReadData( 2, &gpf); + #if __BYTE_ORDER == __BIG_ENDIAN + gpf=bswap_16(gpf); + #endif + return gpf; //pdiData[0] + (((unsigned short)pdiData[1])<<8); + } + + /*********************************************************/ + // pdiSetStatusChangeBits + // set local power change bits status + void pdiSetStatusChangeBits( unsigned char byBits) { + pdiSendCommand( PDI_CMD_SET_CHNG_BITS); + pdiWriteData( 1, &byBits); + } + +#endif + + + +/*********************************************************/ +/*********************************************************/ +// PDIUSB other commands + + // complex function for select endpoint, write data and validate data in endpoint buffer + void pdiWriteEndpoint( unsigned char byEpIdx, unsigned char byLength, const unsigned char *pbyData) { + pdiSelectEp( byEpIdx); + pdiWriteToEpBuffer( byLength, pbyData); + pdiValidateBuffer(); + } + + // complex function for select endpoint, read data and clear endpoint buffer + // byMaxLength means how many bytes will be maximally read. + unsigned char pdiReadEndpoint( unsigned char byEpIdx, unsigned char byMaxLength, unsigned char *pbyData) { + unsigned char cnt = 0, sep; + sep = pdiSelectEp( byEpIdx); + if ( sep & PDI_SELEP_FULL) { + cnt = pdiReadFromEpBuffer( byMaxLength, pbyData); + pdiClearBuffer(); + } + return cnt; + } + + // complex universal function for select command and read/write data to/from PDIUSB + unsigned char pdiCmdData( unsigned char byCmd, unsigned char *pbyData, + unsigned char byCount, unsigned char byRead) { + pdiSendCommand( byCmd); + if ( byCount) { + if( byRead) byCount = pdiReadData( byCount, pbyData); // Read Data + else pdiWriteData( byCount, pbyData); // Write Data + } + return byCount; + } + +#if !defined(PDIUSBH11A_MULTIPLE) + // complex function for acknowledge control endpoint + void pdiAckSetupControl( void) { + pdiSendCommand( PDI_CMD_SELECT_EP + PDI_EP0_RX); + pdiSendCommand( PDI_CMD_ACK_SETUP); + pdiSendCommand( PDI_CMD_CLEAR_BUFFER); + pdiSendCommand( PDI_CMD_SELECT_EP + PDI_EP0_TX); + pdiSendCommand( PDI_CMD_ACK_SETUP); + } +#else + // complex function for acknowledge control endpoint ( for one emb.fnc. 1,6,7) (zero-based 0,1,2) + void pdiAckSetupFncControl( unsigned char Fnc) { + unsigned char FncTab[3] = { PDI_F1_EP0_RX, PDI_F6_EP0_RX, PDI_F7_EP0_RX}; + pdiSendCommand( PDI_CMD_SELECT_EP + FncTab[Fnc]); + pdiSendCommand( PDI_CMD_ACK_SETUP); + pdiSendCommand( PDI_CMD_CLEAR_BUFFER); + pdiSendCommand( PDI_CMD_SELECT_EP + FncTab[Fnc] + 1); + pdiSendCommand( PDI_CMD_ACK_SETUP); + } +#endif + +#if defined(PDIUSBD12) // parallel interface + void pdiInit( void) { + pdiSetAddressEnable( PDI_ENAD_ENABLE); + pdiSetEndpointEnable( PDI_EPEN_ENABLE); + pdiSetDMA( PDI_DMA_EP4_INT | PDI_DMA_EP5_INT); + pdiSetMode( PDI_MODE_NO_LAZY_CLOCK | PDI_MODE_CLOCK_RUNNING | + PDI_MODE_SOFT_CONNECT | PDI_CLOCK_12M); + } +#endif + +#if defined(PDIUSBH11A_SINGLE) // serial interface + void pdiInit( void) { + pdiSetHUBAddressEnable( 0, 0); // disable HUB + pdiSetAddressEnable( PDI_ENAD_ENABLE); // enable emb.function + pdiSetEndpointEnable( PDI_EPEN_FNC_ENB); + pdiSetMode( PDI_MODE_REMOTE_WAKEUP | PDI_MODE_NO_LAZY_CLOCK | PDI_MODE_CLOCK_RUNNING | + PDI_MODE_SOFT_CONNECT | PDI_MODE_SINGLE_FNC | PDI_CLOCK_12M); + } +#endif + +/*********************************************************/ + + static const unsigned char epin2idx[]={ + PDI_EP0_IN, + PDI_EP1_IN, + #if PDI_CNT_EP > 1 + PDI_EP2_IN, + #if PDI_CNT_EP > 2 + PDI_EP3_IN, + #endif + #endif + }; + + static const unsigned char epout2idx[]={ + PDI_EP0_OUT, + PDI_EP1_OUT, + #if PDI_CNT_EP > 1 + PDI_EP2_OUT, + #if PDI_CNT_EP > 2 + PDI_EP3_OUT, + #endif + #endif + }; + + // pdiEp2Idx + // convert endpoint number to pdi index number + unsigned char pdiEp2Idx(unsigned char ep) { + if(ep & USB_ENDPOINT_DIRECTION_MASK) + return epin2idx[ep & 0xf]; + else + return epout2idx[ep & 0xf]; + } + + /*********************************************************/ + /*********************************************************/ diff --git a/embedded/libs4c/usb/pdiusb/usb/pdi.h b/embedded/libs4c/usb/pdiusb/usb/pdi.h new file mode 100644 index 0000000..21bb5db --- /dev/null +++ b/embedded/libs4c/usb/pdiusb/usb/pdi.h @@ -0,0 +1,49 @@ +/*****************************************************/ +/*** Module : USB PDI - header file ***/ +/*** Author : Roman Bartosinski (C) 28.04.2002 ***/ +/*** Modify : 08.08.2002, 16.04.2003 ***/ +/*****************************************************/ + +#ifndef _USB_PDI_SUBMODULE_HEADER_FILE_ + #define _USB_PDI_SUBMODULE_HEADER_FILE_ + + #include + +// int usb_pdi_init( usb_device_t *udev) REENTRANT_SIGN; + int usb_pdi_init( usb_device_t *udev); + + #ifdef USB_PDI_DIRECT_FNC + #define USB_PDI_EXPORT_FNC + + #define usb_udev_is_fnc(_M_udev, _M_fnc) (1) + + #define usb_udev_init usb_pdi_init + #define usb_udev_connect usb_pdi_connect + #define usb_udev_disconnect usb_pdi_disconnect + #define usb_udev_ack_setup usb_pdi_ack_setup + #define usb_udev_ack_control_setup usb_pdi_ack_control_setup + #define usb_udev_check_events usb_pdi_check_events + + #define usb_udev_stall usb_pdi_stall + #define usb_udev_read_endpoint usb_pdi_read_endpoint + #define usb_udev_write_endpoint usb_pdi_write_endpoint + + #endif /*USB_PDI_DIRECT_FNC*/ + + #ifdef USB_PDI_EXPORT_FNC + + int usb_pdi_init( usb_device_t *udev); + int usb_pdi_connect( usb_device_t *udev); + int usb_pdi_disconnect( usb_device_t *udev); + void usb_pdi_ack_setup( usb_device_t *udev); + void usb_pdi_ack_control_setup( usb_device_t *udev); + int usb_pdi_check_events( usb_device_t *udev); + + void usb_pdi_stall( usb_ep_t *ep); + int usb_pdi_read_endpoint( usb_ep_t *ep, void *ptr, int size) USB_UDEV_REENTRANT_SIGN; + int usb_pdi_write_endpoint( usb_ep_t *ep, const void *ptr, int size) USB_UDEV_REENTRANT_SIGN; + + #endif /*USB_PDI_EXPORT_FNC*/ + +#endif /* _USB_PDI_SUBMODULE_HEADER_FILE_ */ + diff --git a/embedded/libs4c/usb/pdiusb/usb/pdiusb.h b/embedded/libs4c/usb/pdiusb/usb/pdiusb.h new file mode 100644 index 0000000..14ce3ab --- /dev/null +++ b/embedded/libs4c/usb/pdiusb/usb/pdiusb.h @@ -0,0 +1,674 @@ +/*********************************************************/ +/*** Module : PDIUSB D11,H11,H11A,D12 - header file ***/ +/*** Author : Roman Bartosinski (C) 03.10.2002 ***/ +/*** Description : Integrate common functions for ***/ +/*** PDIUSBD11,PDIUSBD12,PDIUSBH11(old) ***/ +/*** PDIUSBH11A in Single/Multiple mode ***/ +/*** to one common file. ***/ +/*** Modify : 10.10.2002 - add H11 ***/ +/*** 13.10.2002 - add spec.fnc for 'using' ***/ +/*** 22.12.2002 - rebuild for smaller out ***/ +/*********************************************************/ + +#ifndef _PDIUSB_BASE_MODULE + #define _PDIUSB_BASE_MODULE + +/*********************************************************/ +// Comments - !!! Please, read this section !!! +// +// +// If you can use included functions for read and write +// byte from/to PDIUSB, please uncomment defined PDI_CMD_RWD_INTERNAL +// and check defined addresses for communication with PDIUSB. +// Else you must uncomment defined PDI_CMD_RWD_EXTERNAL and declare +// and implement next functions : +// void pdiSendCommand( unsigned char byCmd); +// unsigned char pdiReadData( unsigned char byCount, void *pbyData); +// void pdiWriteData( unsigned char byCount, const void *pbyData); +// - if you want use 'using' (see below), you must implement next function(on i51 is NEEDED). +// unsigned short pdiIntCmdReadData( unsigned char byCmd, unsigned char byShort) _PDI_USING; +// -- all in section 'External functions' +// +// +// Next you must select type of chip.(uncomment line with defined type) +// -- in section 'Type of PDIUSB' +// +// +// If you want use functions 'pdiGetInterrupt' and 'pdiGetLastTransStatus' +// with keyword 'using' (for i51 it means using spec.reg.bank), uncomment +// define 'USING'. Only these two functions need pdiIntCmdReadData. +// -- in section 'Use using in interrupt functions' +// +// *** External choice *** +// Or you can make all previous choises externally before including this file +// by defining one of PDIUSBD11,PDIUSBD12,PDIUSBH11,PDIUSBH11A_SINGLE,PDIUSBH11A_MULTIPLE +// +// defining one of PDI_CMD_RWD_INTERNAL,PDI_CMD_RWD_EXTERNAL +// (you can define externally PDIUSB_COMMAND_ADDR, PDIUSB_READ_DATA_ADDR, PDIUSB_WRITE_DATA_ADDR) +// +// and defining one of PDI_USE_USING,PDI_DONTUSE_USING +// (you can define externally _PDI_USING_NUMBER) + + + +/*********************************************************/ +// Type of PDIUSB + + +// +// PDIUSBD11 - USB device with serial interface +// PDIUSBH11 - USB hub with one embedded fnc and serial interface +// PDIUSBH11A_SINGLE - USB hub with one embedded fnc, serial interface and additional functions +// PDIUSBH11A_MULTIPLE - USB hub with multiple(3) embedded fncs, serial interface and add.fncs +// - H11A_SINGLE and H11A_MULTIPLE is divided by pdiusb command SetMode (bit is set automatically) +// PDIUSBD12 - USB device with parallel interface +// + +// uncomment right chip type below + +#define PDIUSBD11 +//#define PDIUSBH11 +//#define PDIUSBH11A_SINGLE +//#define PDIUSBH11A_MULTIPLE +//#define PDIUSBD12 + + +/*********************************************************/ +// Create common type PDIUSBH11A for SINGLE and MULTIPLE +// for mux H11A_S & H11A_M +#if defined(PDIUSBH11A_SINGLE) || defined(PDIUSBH11A_MULTIPLE) + #define PDIUSBH11A +#else + #undef PDIUSBH11A +#endif + + + +/*********************************************************/ +// Use using in interrupt functions + + // If you want use keyword 'using' in function + // 'pdiGetInterrupt' and 'pdiGetLastTransStatus', + // uncomment next line.(and check and correct number in _PDI_USING_NUMBER) +//#define PDI_USE_USING + // If you don't want use keyword 'using', + // uncomment next line. +#define PDI_DONTUSE_USING + + #if defined(PDI_USE_USING) + #if !defined(_PDI_USING_NUMBER) + #define _PDI_USING_NUMBER 2 + #endif + #define _PDI_USING using _PDI_USING_NUMBER + #else + #define _PDI_USING + #endif + + +/*********************************************************/ +// External functions + + // If you want use internal functions, uncomment next line. +//#define PDI_CMD_RWD_INTERNAL + // If you want use your own external functions, uncomment next line. +//#define PDI_CMD_RWD_EXTERNAL + +// this is automatically selected by your choice + + #if defined(PDI_CMD_RWD_INTERNAL) + #if !defined(PDIUSB_COMMAND_ADDR) // if not defined address for select command + #if defined(PDIUSBD12) + #define PDIUSB_COMMAND_ADDR 0x7001 // sel.cmd address for D12 (this is address for my application) + #else + #define PDIUSB_COMMAND_ADDR 0x36 // sel.cmd address for all other + #endif + #endif + #if !defined(PDIUSB_READ_DATA_ADDR) // if not defined address for read data from chip + #if defined(PDIUSBD12) + #define PDIUSB_READ_DATA_ADDR 0x7000 // read data address for D12 + #else + #define PDIUSB_READ_DATA_ADDR 0x35 // read data address for all other + #endif + #endif + #if !defined(PDIUSB_WRITE_DATA_ADDR) // if not defined address for write data to chip + #if defined(PDIUSBD12) + #define PDIUSB_WRITE_DATA_ADDR 0x7000 // write data address for D12 + #else + #define PDIUSB_WRITE_DATA_ADDR 0x34 // write data address for all other + #endif + #endif + + #endif + +/* Build internal version of functions, but do not define addresses */ +#define PDI_CMD_RWD_INTERNAL + + extern void pdiSendCommand( unsigned char byCmd); + extern unsigned char pdiReadData( unsigned char byCount, void *pbyData); + extern void pdiWriteData( unsigned char byCount, const void *pbyData); +#if defined(PDI_USE_USING) + extern unsigned short pdiIntCmdReadData( unsigned char byCmd, unsigned char byShort) _PDI_USING; +#endif + + +/*********************************************************/ +// Check chip selection, int/ext rw functions, using + +#if !defined(PDIUSBD11) && !defined(PDIUSBH11) && !defined(PDIUSBH11A) && !defined(PDIUSBD12) + #define _PDI_ERROR_NO_CONTINUE + #error "!!! Any type of PDIUSB wasn't selected !!!" + #error "Please select one of PDIUSB in file pdiusb.h in section 'Type of PDIUSB'." +#endif +#if !defined(PDI_CMD_RWD_INTERNAL) && !defined(PDI_CMD_RWD_EXTERNAL) + #define _PDI_ERROR_NO_CONTINUE + #error "!!! You must select if you want use internal or external basic fncs for PDIUSB !!!" + #error "Please select your choice in file pdiusb.h in section 'External functions'." +#endif +#if !defined(PDI_USE_USING) && !defined(PDI_DONTUSE_USING) + #define _PDI_ERROR_NO_CONTINUE + #error "!!! You must choose if you want keyword 'using' !!!" + #error "Please see into file pdiusb.h in section 'Use using in interrupt functions'." +#endif + +#if defined(_PDI_ERROR_NO_CONTINUE) + #error " For help ... read in file pdiusb.h section 'Comments'." +#endif + + +/*********************************************************/ +/*********************************************************/ +#if !defined(_PDI_ERROR_NO_CONTINUE) + +/*********************************************************/ +// Endpoints - size and index defines + + // PDI_CNT_EP - number of endpoints without control endpoints +#if defined(PDIUSBD11) || defined(PDIUSBH11A_SINGLE) // D11, H11A_S + #define PDI_CNT_EP 0x03 +#elif defined(PDIUSBH11) || defined(PDIUSBH11A_MULTIPLE) // H11, H11A_M + #define PDI_CNT_EP 0x01 +#elif defined(PDIUSBD12) // D12 + #define PDI_CNT_EP 0x02 +#endif + + // PDI_EPx_yyyy_SIZE - max packet size for endpoint x +#if defined(PDIUSBH11) || defined(PDIUSBH11A) // H11, H11A + #define PDI_HUB_TX_SIZE 8 + #define PDI_HUB_RX_SIZE 8 + #define PDI_HUB_PACKET_SIZE 8 + #if defined(PDIUSBH11) + #define PDI_HUB_INT_SIZE 1 + #endif +#endif + + +#if !defined(PDIUSBD12) // D11,H11,H11A + #define PDI_EP0_TX_SIZE 8 + #define PDI_EP0_RX_SIZE 8 + #define PDI_EP0_PACKET_SIZE 8 + #define PDI_EP1_TX_SIZE 8 + #define PDI_EP1_RX_SIZE 8 + #define PDI_EP1_PACKET_SIZE 8 + #if defined(PDIUSBD11) || defined(PDIUSBH11A_SINGLE) + #define PDI_EP2_TX_SIZE 8 + #define PDI_EP2_RX_SIZE 8 + #define PDI_EP2_PACKET_SIZE 8 + #define PDI_EP3_TX_SIZE 8 + #define PDI_EP3_RX_SIZE 8 + #define PDI_EP3_PACKET_SIZE 8 + #endif +#else // D12 + #define PDI_EP0_TX_SIZE 16 + #define PDI_EP0_RX_SIZE 16 + #define PDI_EP0_PACKET_SIZE 16 + #define PDI_EP1_TX_SIZE 16 + #define PDI_EP1_RX_SIZE 16 + #define PDI_EP1_PACKET_SIZE 16 + #define PDI_EP2_TX_SIZE 64 + #define PDI_EP2_RX_SIZE 64 + #define PDI_EP2_PACKET_SIZE 64 +#endif + + // PDI_EPx_TX, PDI_EPx_RX - index for endpoint x (write/read) +#if defined(PDIUSBH11) || defined(PDIUSBH11A) // H11 + #define PDI_HUB_EP0_RX 0 + #define PDI_HUB_EP0_TX 1 + // another index names + #define PDI_HUB_EP0_OUT PDI_HUB_EP0_RX + #define PDI_HUB_EP0_IN PDI_HUB_EP0_TX +#endif + +#if defined(PDIUSBH11) + #define PDI_EP0_RX 2 + #define PDI_EP0_TX 3 + #define PDI_EP1_TX 4 + // another index names + #define PDI_EP0_OUT PDI_EP0_RX + #define PDI_EP0_IN PDI_EP0_TX + #define PDI_EP1_IN PDI_EP1_TX +#elif defined(PDIUSBD11) || defined(PDIUSBH11A_SINGLE) // D11,H11A_S + #define PDI_EP0_RX 2 + #define PDI_EP0_TX 3 + #define PDI_EP1_RX 5 + #define PDI_EP1_TX 4 + #define PDI_EP2_RX 6 + #define PDI_EP2_TX 7 + #define PDI_EP3_RX 8 + #define PDI_EP3_TX 9 + // another index names + #define PDI_EP0_OUT PDI_EP0_RX + #define PDI_EP0_IN PDI_EP0_TX + #define PDI_EP1_OUT PDI_EP1_RX + #define PDI_EP1_IN PDI_EP1_TX + #define PDI_EP2_OUT PDI_EP2_RX + #define PDI_EP2_IN PDI_EP2_TX + #define PDI_EP3_OUT PDI_EP3_RX + #define PDI_EP3_IN PDI_EP3_TX +#elif defined(PDIUSBH11A_MULTIPLE) // H11_M + #define PDI_F1_EP0_RX 2 + #define PDI_F1_EP0_TX 3 + #define PDI_F1_EP1_RX 5 + #define PDI_F1_EP1_TX 4 + #define PDI_F6_EP0_RX 10 + #define PDI_F6_EP0_TX 11 + #define PDI_F6_EP1_RX 6 + #define PDI_F6_EP1_TX 7 + #define PDI_F7_EP0_RX 12 + #define PDI_F7_EP0_TX 13 + #define PDI_F7_EP1_RX 8 + #define PDI_F7_EP1_TX 9 + // another index names + #define PDI_F1_EP0_OUT PDI_F1_EP0_RX + #define PDI_F1_EP0_IN PDI_F1_EP0_TX + #define PDI_F1_EP1_OUT PDI_F1_EP1_RX + #define PDI_F1_EP1_IN PDI_F1_EP1_TX + #define PDI_F6_EP0_OUT PDI_F6_EP0_RX + #define PDI_F6_EP0_IN PDI_F6_EP0_TX + #define PDI_F6_EP1_OUT PDI_F6_EP1_RX + #define PDI_F6_EP1_IN PDI_F6_EP1_TX + #define PDI_F7_EP0_OUT PDI_F7_EP0_RX + #define PDI_F7_EP0_IN PDI_F7_EP0_TX + #define PDI_F7_EP1_OUT PDI_F7_EP1_RX + #define PDI_F7_EP1_IN PDI_F7_EP1_TX +#elif defined(PDIUSBD12) // D12 + #define PDI_EP0_RX 0 + #define PDI_EP0_TX 1 + #define PDI_EP1_RX 2 + #define PDI_EP1_TX 3 + #define PDI_EP2_RX 4 + #define PDI_EP2_TX 5 + // another index names + #define PDI_EP0_OUT PDI_EP0_RX + #define PDI_EP0_IN PDI_EP0_TX + #define PDI_EP1_OUT PDI_EP1_RX + #define PDI_EP1_IN PDI_EP1_TX + #define PDI_EP2_OUT PDI_EP2_RX + #define PDI_EP2_IN PDI_EP2_TX +#endif + +/*********************************************************/ +// Commands - index and bits, description + + // Set Address/Enable +#if defined(PDIUSBH11) || defined(PDIUSBH11A) || defined(PDIUSBD11) // only H11 or H11A + #define PDI_CMD_HUB_ENB_ADDR 0x00D0 + #if defined(PDIUSBH11) || defined(PDIUSBH11A_SINGLE) // for H11 and H11A_SINGLE + #define PDI_CMD_FNC_ENB_ADDR 0x00D1 + #else // for H11A_MULTIPLE + #define PDI_CMD_FNC1_ENB_ADDR 0x00D1 + #define PDI_CMD_FNC6_ENB_ADDR 0x00D2 + #define PDI_CMD_FNC7_ENB_ADDR 0x00D3 +// for compatible with H11A_SINGLE and other + #define PDI_CMD_FNC_ENB_ADDR PDI_CMD_FNC1_ENB_ADDR + #endif +#elif defined(PDIUSBD11) // for D11 + #define PDI_CMD_FNC_ENB_ADDR 0x00D1 +#elif defined(PDIUSBD12) // for D12 + #define PDI_CMD_FNC_ENB_ADDR 0x00D0 +#endif + // set address/enable bits - for all + #define PDI_ENAD_ENABLE 0x0080 + #define PDI_ENAD_ADDRMASK 0x007F + + // Set Endpoint enable + #define PDI_CMD_EPEN 0x00D8 + // set endpoint enable bits + #if defined(PDIUSBD12) // D12 - generic ep + #define PDI_EPEN_ENABLE 0x0001 + #elif defined(PDIUSBD11) // D11 - generic ep + #define PDI_EPEN_ENABLE 0x0002 + #elif defined(PDIUSBH11A) || defined(PDIUSBH11) // H11,H11A + #define PDI_EPEN_HUB_ENB 0x0001 + #if defined(PDIUSBH11A_MULTIPLE) // H11A_M + #define PDI_EPEN_FNC1_ENB 0x0002 + #define PDI_EPEN_FNC6_ENB 0x0004 + #define PDI_EPEN_FNC7_ENB 0x0008 + #else // H11,H11A_S + #define PDI_EPEN_FNC_ENB 0x0002 + #endif + #endif + + #if !defined(PDIUSBH11) + // Set Mode + #define PDI_CMD_SET_MODE 0x00F3 + // set mode bits - configuration + #if !defined(PDIUSBD12) + #define PDI_MODE_REMOTE_WAKEUP 0x0001 // D11,H11A + #endif + #define PDI_MODE_NO_LAZY_CLOCK 0x0002 // all + #define PDI_MODE_CLOCK_RUNNING 0x0004 // all + #if defined(PDIUSBD12) + #define PDI_MODE_INTERRUPT_MODE 0x0008 // D12 + #else + #define PDI_MODE_DEBUG_MODE 0x0008 // D11,H11A + #endif + #define PDI_MODE_SOFT_CONNECT 0x0010 // all + #if defined(PDIUSBH11A) + #define PDI_MODE_DWN_RESISTORS 0x0020 // H11A + #define PDI_MODE_NONBLINK_LED 0x0040 // H11A + #define PDI_MODE_SINGLE_FNC 0x0080 // H11A + #elif defined(PDIUSBD11) + #define PDI_MODE_MUSTBEONE 0x0080 // D11 + #else + #define PDI_MODE_EP_NONISO 0x0000 // D12 + #define PDI_MODE_EP_ISOOUT 0x0040 + #define PDI_MODE_EP_ISOIN 0x0080 + #define PDI_MODE_EP_ISOIO 0x00C0 + + #endif + // set mode bits - clock div factor [48Mhz/(N+1)] + #if defined(PDIUSBH11A) + #define PDI_CLOCK_CRYSTAL_12M 0x3000 // for 12Mhz crystal + #define PDI_CLOCK_CRYSTAL_48M 0x0000 // for 48Mhz crystal + #endif + #if defined(PDIUSBD12) // D12 + #define PDI_CLOCK_48M 0x0000 // 48 Mhz + #endif // all + #define PDI_CLOCK_24M 0x0100 // 24 Mhz + #define PDI_CLOCK_16M 0x0200 // 16 Mhz + #define PDI_CLOCK_12M 0x0300 // 12 Mhz + #define PDI_CLOCK_9M6 0x0400 // 9.6 Mhz + #define PDI_CLOCK_8M 0x0500 // 8 Mhz + #define PDI_CLOCK_6M8 0x0600 // 6.857142857 Mhz + #define PDI_CLOCK_6M 0x0700 // 6 Mhz + #define PDI_CLOCK_5M3 0x0800 // 5.333333333 Mhz + #define PDI_CLOCK_4M8 0x0900 // 4.8 Mhz + #define PDI_CLOCK_4M3 0x0A00 // 4.363636364 Mhz + #define PDI_CLOCK_4M 0x0B00 // 4 Mhz + #if defined(PDIUSBD12) // D12 + #define PDI_CLOCK_SET_TO_ONE 0x4000 + #define PDI_CLOCK_SOF_ONLY 0x8000 + #endif + #endif + + // Set DMA + #if defined(PDIUSBD12) + #define PDI_CMD_SET_DMA 0x00FB + #define PDI_CMD_GET_DMA 0x00FB + // set dma bits + #define PDI_DMA_SINGLE_DMA 0x0000 + #define PDI_DMA_BURST_4 0x0001 + #define PDI_DMA_BURST_8 0x0002 + #define PDI_DMA_BURST_16 0x0003 + #define PDI_DMA_ENABLE 0x0004 + #define PDI_DMA_DIRECTION 0x0008 + #define PDI_DMA_AUTOLOAD 0x0010 + #define PDI_DMA_INT_SOF 0x0020 + #define PDI_DMA_EP4_INT 0x0040 + #define PDI_DMA_EP5_INT 0x0080 + #endif + + // Read Interrupt Register + // be careful with PDIUSBH11 - you must read only 1 byte + #define PDI_CMD_GET_INT_REG 0x00F4 + // read interrupt register bits + #if defined(PDIUSBD11) || defined(PDIUSBH11) || defined(PDIUSBH11A) // D11,H11,H11A + #if defined(PDIUSBH11) || defined(PDIUSBH11A) + #define PDI_INT_HUB_OUT 0x0001 + #define PDI_INT_HUB_IN 0x0002 + #endif + #if defined(PDIUSBH11) + #define PDI_INT_EP0_OUT 0x0004 + #define PDI_INT_EP0_IN 0x0008 + #define PDI_INT_EP1_IN 0x0010 + #elif defined(PDIUSBD11) || defined(PDIUSBH11A_SINGLE) // D11,H11_S + #define PDI_INT_EP0_OUT 0x0004 + #define PDI_INT_EP0_IN 0x0008 + #define PDI_INT_EP1_OUT 0x0020 + #define PDI_INT_EP1_IN 0x0010 + #define PDI_INT_EP2_OUT 0x0040 + #define PDI_INT_EP2_IN 0x0080 + #define PDI_INT_EP3_OUT 0x0100 + #define PDI_INT_EP3_IN 0x0200 + #else // H11_M + #define PDI_INT_F1_EP0_OUT 0x0004 + #define PDI_INT_F1_EP0_IN 0x0008 + #define PDI_INT_F1_EP1_OUT 0x0020 + #define PDI_INT_F1_EP1_IN 0x0010 + #define PDI_INT_F6_EP0_OUT 0x0400 + #define PDI_INT_F6_EP0_IN 0x0800 + + #define PDI_INT_F6_EP1_OUT 0x0040 + #define PDI_INT_F6_EP1_IN 0x0080 + #define PDI_INT_F7_EP0_OUT 0x1000 + #define PDI_INT_F7_EP0_IN 0x2000 + #define PDI_INT_F7_EP1_OUT 0x0100 + #define PDI_INT_F7_EP1_IN 0x0200 + #endif + #define PDI_INT_BUSRESET 0x4000 + #elif defined(PDIUSBD12) + #define PDI_INT_EP0_OUT 0x0001 + #define PDI_INT_EP0_IN 0x0002 + #define PDI_INT_EP1_OUT 0x0004 + #define PDI_INT_EP1_IN 0x0008 + #define PDI_INT_EP2_OUT 0x0010 + #define PDI_INT_EP2_IN 0x0020 + #define PDI_INT_BUSRESET 0x0040 + #define PDI_INT_SUSPEND 0x0080 + #define PDI_INT_DMA_EOT 0x0100 + #endif + + // Select Endpoint + #define PDI_CMD_SELECT_EP 0x0000 // base index for select endpoint + // select endpoint bits + #define PDI_SELEP_FULL 0x0001 + #if defined(PDIUSBD12) + #define PDI_SELEP_STALL 0x0002 + #endif + + // Read Last Transaction Status Register + #define PDI_CMD_GET_LAST_STAT 0x0040 // base index for read last transaction + // read last transaction bits and errors + #define PDI_LTSTAT_RXTX_OK 0x0001 + #define PDI_LTSTAT_ERR_MASK 0x001E + #define PDI_LTSTAT_SETUP 0x0020 + #define PDI_LTSTAT_DATA1 0x0040 + #define PDI_LTSTAT_PREV_NRD 0x0080 + // error codes + #define PDI_ERR_NO_ERROR 0x0000 + #define PDI_ERR_PID_ENCODING 0x0001 + #define PDI_ERR_PID_UNKNOWN 0x0002 + #define PDI_ERR_UNEXPECT_PKT 0x0003 + + #define PDI_ERR_TOKEN_CRC 0x0004 + #define PDI_ERR_DATA_CRC 0x0005 + #define PDI_ERR_TIME_OUT 0x0006 + #define PDI_ERR_NEVER_HAPPENS 0x0007 + #define PDI_ERR_UNEXPECT_EOP 0x0008 + #define PDI_ERR_NAK 0x0009 + #define PDI_ERR_STALL 0x000A + #define PDI_ERR_OVERFLOW 0x000B + #define PDI_ERR_BITSTUFF 0x000D + #define PDI_ERR_DATA_PID 0x000F + + // Read Endpoint Status + #if defined(PDIUSBD11) || defined(PDIUSBH11) || defined(PDIUSBH11A) + #define PDI_CMD_GET_EP_STAT 0x0080 // base index for read ep status + // read ep status bits + #define PDI_EPSTAT_SETUP 0x0004 + #define PDI_EPSTAT_STALL 0x0008 + #define PDI_EPSTAT_DATA1 0x0010 + #define PDI_EPSTAT_FULL 0x0020 + #endif + + // Read Buffer + #define PDI_CMD_READ_BUFFER 0x00F0 + + // Write Buffer + #define PDI_CMD_WRITE_BUFFER 0x00F0 + + // Clear Buffer + #define PDI_CMD_CLEAR_BUFFER 0x00F2 + + // Validate Buffer + #define PDI_CMD_VALID_BUFFER 0x00FA + + + // Set Endpoint Status + #define PDI_CMD_SET_EP_STAT 0x0040 // base index for endpoint status + // set endpoint status bits + #define PDI_SET_EP_STALLED 0x0001 + + // Acknowledge Setup + #define PDI_CMD_ACK_SETUP 0x00F1 + + // Send Resume + #define PDI_CMD_SEND_RESUME 0x00F6 + + // Read Current Frame Number + #define PDI_CMD_GET_FRAME 0x00F5 + + // Get Chip ID + #define PDI_CMD_GET_CHIP_ID 0x00FD + +// HUB commands +#if defined(PDIUSBH11) || defined(PDIUSBH11A) + // Clear Port Feature + #define PDI_CMD_P2_CLR_FEATURE 0x00E0 + #define PDI_CMD_P3_CLR_FEATURE 0x00E1 + #define PDI_CMD_P4_CLR_FEATURE 0x00E2 + #define PDI_CMD_P5_CLR_FEATURE 0x00E3 + // Set Port Feature + #define PDI_CMD_P2_SET_FEATURE 0x00E8 + #define PDI_CMD_P3_SET_FEATURE 0x00E9 + #define PDI_CMD_P4_SET_FEATURE 0x00EA + #define PDI_CMD_P5_SET_FEATURE 0x00EB + // Feature code + #define PDI_F_PORT_ENABLE 0 + #define PDI_F_PORT_SUSPEND 1 + #define PDI_FC_PORT_RESET 2 + #define PDI_F_PORT_POWER 3 + #define PDI_C_PORT_CONNECTION 4 + #define PDI_C_PORT_ENABLE 5 + #define PDI_C_PORT_SUSPEND 6 + #define PDI_C_PORT_OVERCURRENT 7 + + // Get Port Status + #define PDI_CMD_P2_GET_STATUS 0x00E0 + #define PDI_CMD_P3_GET_STATUS 0x00E1 + #define PDI_CMD_P4_GET_STATUS 0x00E2 + #define PDI_CMD_P5_GET_STATUS 0x00E3 + // get port status bits - port status byte + #define PDI_PSTAT_CONNECT 0x0001 + #define PDI_PSTAT_ENABLED 0x0002 + #define PDI_PSTAT_SUSPEND 0x0004 + #define PDI_PSTAT_OVERCUR 0x0008 + #define PDI_PSTAT_RESET 0x0010 + #define PDI_PSTAT_POWER 0x0020 + #define PDI_PSTAT_LOWSPEED 0x0040 + // get port status bits - port status change byte + #define PDI_PSTAT_CHANGE_CONNECT 0x0100 + #define PDI_PSTAT_CHANGE_ENABLED 0x0200 + #define PDI_PSTAT_CHANGE_SUSPEND 0x0400 + #define PDI_PSTAT_CHANGE_OVERCUR 0x0800 + #define PDI_PSTAT_CHANGE_RESET 0x1000 + // Set Status Change Bits + #define PDI_CMD_SET_CHNG_BITS 0x00F7 + // set status change bits - bits + #define PDI_SCHB_LOCAL_POWER 0x0001 + #define PDI_SCHB_FNC1 0x0002 + #if !defined(PDIUSBH11) && !defined(PDIUSBH11A_SINGLE) + #define PDI_SCHB_FNC6 0x0004 + #define PDI_SCHB_FNC7 0x0008 + #endif +#endif + + +/*********************************************************/ +// Function prototypes +// +// PDIUSB common commands + + #if defined(PDIUSBH11) || defined(PDIUSBH11A) || defined(PDIUSBD11) + void pdiSetHUBAddressEnable( unsigned char byAddress, unsigned char byEnable); + #endif + + #if !defined(PDIUSBH11A_MULTIPLE) // D11,D12,H11,H11A_S(emb.fnc) + void pdiSetAddressEnable( unsigned char byAddr_Enb); +// void pdiSetAddressEnable( unsigned char byAddress, unsigned char byEnable); + #else + void pdiSetEmbFncAddressEnable( unsigned char byFnc, unsigned char byAddress, unsigned char byEnable); + #endif + + void pdiSetEndpointEnable( unsigned char byEnable); + + #if !defined(PDIUSBH11) // H11 has not it ( !!! is great - try give single quote mark into comments ;-) + void pdiSetMode( unsigned short wMode_Clock); + #endif + + #if defined(PDIUSBD12) + void pdiSetDMA( unsigned char byDma); + unsigned char pdiGetDMA( void); + #endif + + #if defined(PDIUSBH11) + unsigned char pdiGetInterrupt( void) _PDI_USING; + #else + unsigned short pdiGetInterrupt( void) _PDI_USING; + #endif + + unsigned char pdiSelectEp( unsigned char byEpIdx); + unsigned char pdiGetLastTransStatus( unsigned char byEpIdx) _PDI_USING; + + #if defined(PDIUSBD11) || defined(PDIUSBH11) || defined(PDIUSBH11A) + unsigned char pdiGetEpStatus( unsigned char byEpIdx); + #endif + + unsigned char pdiReadFromEpBuffer( unsigned char byLength, unsigned char *pToBuff); + void pdiWriteToEpBuffer( unsigned char byLength, const unsigned char *pFromBuff); + void pdiSetEpStatus( unsigned char byEpIdx, unsigned char byStatus); + void pdiAcknowledgeSetup( void); + void pdiClearBuffer( void); + void pdiValidateBuffer( void); + + void pdiSendResume( void); + unsigned short pdiGetFrameNumber( void); + unsigned short pdiGetChipID( void); // this function is undocumented + + // HUB command + #if defined(PDIUSBH11) || defined(PDIUSBH11A) + void pdiClearPortFeature( unsigned char byEpIdx, unsigned char byFeature); + void pdiSetPortFeature( unsigned char byEpIdx, unsigned char byFeature); + unsigned short pdiGetPortFeature( unsigned char byEpIdx); + void pdiSetStatusChangeBits( unsigned char byBits); + #endif + +// PDIUSB other commands + void pdiWriteEndpoint( unsigned char byEpIdx, unsigned char byLength, const unsigned char *pbyData); + unsigned char pdiReadEndpoint( unsigned char byEpIdx, unsigned char byMaxLength, unsigned char *pbyData); + + unsigned char pdiCmdData( unsigned char byCmd, unsigned char *pbyData, + unsigned char byCount, unsigned char byRead); + void pdiInit( void); +#if !defined(PDIUSBH11A_MULTIPLE) + void pdiAckSetupControl( void); +#else + void pdiAckSetupFncControl( unsigned char Fnc); +#endif + +unsigned char pdiEp2Idx(unsigned char ep); + +/*********************************************************/ +#endif // from _PDI_ERROR_NO_CONTINUE +/*********************************************************/ +#endif // from _PDI_BASE_MODULE