From: ppisa Date: Tue, 11 Oct 2005 13:41:00 +0000 (+0200) Subject: Merge: SJA1000 driver interrupts processing modified to not rely on interrupt registe... X-Git-Tag: CLT_COMM_CAN_usb_can1_kriz_bp~46 X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/commitdiff_plain/04a9b8d27daef11dd130bc58acbaf7eb7910bd64?hp=57a9f2211025914d417c9593b5a0be8574b6a8cd Merge: SJA1000 driver interrupts processing modified to not rely on interrupt register for Rx and Tx. Merge commit 'remotes/sf-ocera-lincan/master' --- diff --git a/lincan/include/constants.h b/lincan/include/constants.h index 5559da0..b777cad 100644 --- a/lincan/include/constants.h +++ b/lincan/include/constants.h @@ -50,6 +50,7 @@ #define MSGOBJ_FILTCH_REQUEST_b 5 #define MSGOBJ_RX_MODE_b 6 #define MSGOBJ_RX_MODE_EXT_b 7 +#define MSGOBJ_TX_PENDING_b 8 #define MSGOBJ_OPENED (1<obj_flags) diff --git a/lincan/src/sja1000p.c b/lincan/src/sja1000p.c index 216a9b9..59fa68d 100644 --- a/lincan/src/sja1000p.c +++ b/lincan/src/sja1000p.c @@ -96,6 +96,10 @@ int sja1000p_chip_config(struct canchip_t *chip) /* Set mode, clock out, comparator */ can_write_reg(chip,sjaCDR_PELICAN|chip->sja_cdr_reg,SJACDR); + + /* Ensure, that interrupts are disabled even on the chip level now */ + can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER); + /* Set driver output configuration */ can_write_reg(chip,chip->sja_ocr_reg,SJAOCR); @@ -599,9 +603,11 @@ void sja1000p_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj) obj->tx_slot=NULL; } + can_msgobj_clear_fl(obj,TX_PENDING); cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot); if(cmd<0) return; + can_msgobj_set_fl(obj,TX_PENDING); if (chip->chipspecops->pre_write_config(chip, obj, &obj->tx_slot->msg)) { obj->ret = -1; @@ -653,6 +659,8 @@ int sja1000p_irq_handler(int irq, struct canchip_t *chip) return CANCHIP_IRQ_NONE; } + status=can_read_reg(chip,SJASR); + do { if(!loop_cnt--) { @@ -660,13 +668,18 @@ int sja1000p_irq_handler(int irq, struct canchip_t *chip) return CANCHIP_IRQ_STUCK; } - if ((irq_register & sjaIR_RI) != 0) { - DEBUGMSG("sja1000_irq_handler: RI\n"); + /* (irq_register & sjaIR_RI) */ + /* old variant using SJAIR, collides with intended use with irq_accept */ + if (status & sjaSR_RBS) { + DEBUGMSG("sja1000_irq_handler: RI or RBS\n"); sja1000p_read(chip,obj); obj->ret = 0; } - if ((irq_register & sjaIR_TI) != 0) { - DEBUGMSG("sja1000_irq_handler: TI\n"); + + /* (irq_register & sjaIR_TI) */ + /* old variant using SJAIR, collides with intended use with irq_accept */ + if ((status & sjaSR_TBS) && can_msgobj_test_fl(obj,TX_PENDING)) { + DEBUGMSG("sja1000_irq_handler: TI or TX_PENDING and TBS\n"); obj->ret = 0; can_msgobj_set_fl(obj,TX_REQUEST); while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){ @@ -682,7 +695,6 @@ int sja1000p_irq_handler(int irq, struct canchip_t *chip) } if ((irq_register & (sjaIR_EI|sjaIR_BEI|sjaIR_EPI|sjaIR_DOI)) != 0) { // Some error happened - status=can_read_reg(chip,SJASR); error_code=can_read_reg(chip,SJAECC); CANMSG("Error: status register: 0x%x irq_register: 0x%02x error: 0x%02x\n", status, irq_register, error_code); @@ -715,7 +727,11 @@ int sja1000p_irq_handler(int irq, struct canchip_t *chip) irq_register=can_read_reg(chip,SJAIR); - } while(irq_register & (sjaIR_BEI|sjaIR_EPI|sjaIR_DOI|sjaIR_EI|sjaIR_TI|sjaIR_RI)); + status=can_read_reg(chip,SJASR); + + } while((irq_register & (sjaIR_BEI|sjaIR_EPI|sjaIR_DOI|sjaIR_EI|sjaIR_TI|sjaIR_RI)) || + ((status & sjaSR_TBS) && can_msgobj_test_fl(obj,TX_PENDING)) || + (status & sjaSR_RBS)); return CANCHIP_IRQ_HANDLED; } @@ -736,6 +752,7 @@ int sja1000p_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj) can_preempt_disable(); + can_msgobj_set_fl(obj,TX_PENDING); can_msgobj_set_fl(obj,TX_REQUEST); while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){ can_msgobj_clear_fl(obj,TX_REQUEST);