int aim104_reset(struct candevice_t *candev);
int aim104_init_hw_data(struct candevice_t *candev);
int aim104_init_chip_data(struct candevice_t *candev, int chipnr);
-int aim104_init_obj_data(struct chip_t *chip, int objnr);
+int aim104_init_obj_data(struct canchip_t *chip, int objnr);
void aim104_write_register(unsigned data, unsigned long address);
unsigned aim104_read_register(unsigned long address);
int aim104_program_irq(struct candevice_t *candev);
/*
* optimized inline version, may it be, that it can be too fast for the chip
*/
-extern inline void c_can_write_reg_w(const struct chip_t *pchip, u16 data, unsigned reg)
+extern inline void c_can_write_reg_w(const struct canchip_t *pchip, u16 data, unsigned reg)
{
u32 address = pchip->chip_base_addr + reg;
#ifndef CONFIG_OC_LINCAN_DYNAMICIO
#endif /*CONFIG_OC_LINCAN_DYNAMICIO*/
}
-extern inline u16 c_can_read_reg_w(const struct chip_t *pchip, unsigned reg)
+extern inline u16 c_can_read_reg_w(const struct canchip_t *pchip, unsigned reg)
{
u32 address = pchip->chip_base_addr + reg;
#ifndef CONFIG_OC_LINCAN_DYNAMICIO
extern can_spinlock_t c_can_if1lock; // spin lock for the if1 register
extern can_spinlock_t c_can_if2lock; // spin lcok for the if2 register
-int c_can_if1_busycheck(struct chip_t *pchip);
-int c_can_if2_busycheck(struct chip_t *pchip);
+int c_can_if1_busycheck(struct canchip_t *pchip);
+int c_can_if2_busycheck(struct canchip_t *pchip);
-int c_can_enable_configuration(struct chip_t *pchip);
-int c_can_disable_configuration(struct chip_t *pchip);
-int c_can_chip_config(struct chip_t *pchip);
-int c_can_baud_rate(struct chip_t *chip, int rate, int clock,
+int c_can_enable_configuration(struct canchip_t *pchip);
+int c_can_disable_configuration(struct canchip_t *pchip);
+int c_can_chip_config(struct canchip_t *pchip);
+int c_can_baud_rate(struct canchip_t *chip, int rate, int clock,
int sjw, int sampl_pt, int flags);
int c_can_mask(struct msgobj_t *pmsgobj,
u32 mask,
u16 usedirbit);
int c_can_use_mask(struct msgobj_t *pmsgobj,
u16 useflag);
-int c_can_clear_objects(struct chip_t *pchip);
-int c_can_config_irqs(struct chip_t *pchip,
+int c_can_clear_objects(struct canchip_t *pchip);
+int c_can_config_irqs(struct canchip_t *pchip,
u16 irqs);
-int c_can_pre_read_config(struct chip_t *chip, struct msgobj_t *obj);
-int c_can_send_msg(struct chip_t *pchip, struct msgobj_t *pmsgobj,
+int c_can_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj);
+int c_can_send_msg(struct canchip_t *pchip, struct msgobj_t *pmsgobj,
struct canmsg_t *pmsg);
-int c_can_remote_request(struct chip_t *pchip, struct msgobj_t *pmsgobj );
-int c_can_set_btregs(struct chip_t *chip,
+int c_can_remote_request(struct canchip_t *pchip, struct msgobj_t *pmsgobj );
+int c_can_set_btregs(struct canchip_t *chip,
u16 btr0,
u16 btr1);
-int c_can_start_chip(struct chip_t *pchip);
-int c_can_stop_chip(struct chip_t *pchip);
-int c_can_check_tx_stat(struct chip_t *pchip);
+int c_can_start_chip(struct canchip_t *pchip);
+int c_can_stop_chip(struct canchip_t *pchip);
+int c_can_check_tx_stat(struct canchip_t *pchip);
int c_can_register(struct chipspecops_t *chipspecops);
-void c_can_registerdump(struct chip_t *pchip);
+void c_can_registerdump(struct canchip_t *pchip);
-void c_can_irq_sync_activities(struct chip_t *chip, struct msgobj_t *obj);
+void c_can_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj);
-int c_can_irq_handler(int irq, struct chip_t *chip);
+int c_can_irq_handler(int irq, struct canchip_t *chip);
-int c_can_fill_chipspecops(struct chip_t *chip);
+int c_can_fill_chipspecops(struct canchip_t *chip);
/* BasicCAN mode address map */
#define CCCR 0x0000 /* Control Register */
/* Forward declarations for external types */
struct msgobj_t;
-struct chip_t;
+struct canchip_t;
/**
* struct canque_edge_t - CAN message delivery subsystem graph edge
#endif /*CAN_WITH_RTL*/
struct {
struct msgobj_t *msgobj;
- struct chip_t *chip;
+ struct canchip_t *chip;
#ifndef CAN_WITH_RTL
wait_queue_head_t daemonq;
#else /*CAN_WITH_RTL*/
int cc104_reset(struct candevice_t *candev);
int cc104_init_hw_data(struct candevice_t *candev);
int cc104_init_chip_data(struct candevice_t *candev, int chipnr);
-int cc104_init_obj_data(struct chip_t *chip, int objnr);
+int cc104_init_obj_data(struct canchip_t *chip, int objnr);
void cc104_write_register(unsigned data, unsigned long address);
unsigned cc104_read_register(unsigned long address);
int cc104_program_irq(struct candevice_t *candev);
test_and_clear_bit(MSGOBJ_##obj_fl##_b,&(obj)->obj_flags)
-/* These flags can be used for the chip_t structure flags data entry */
+/* These flags can be used for the canchip_t structure flags data entry */
#define CHIP_CONFIGURED (1<<0)
#define CHIP_SEGMENTED (1<<1)
#define CHIP_IRQ_SETUP (1<<2)
#include "./constants.h"
#include "./can_queue.h"
-int canqueue_ends_init_chip(struct canque_ends_t *qends, struct chip_t *chip, struct msgobj_t *obj);
+int canqueue_ends_init_chip(struct canque_ends_t *qends, struct canchip_t *chip, struct msgobj_t *obj);
int canqueue_ends_done_chip(struct canque_ends_t *qends);
*/
void msgobj_done(struct msgobj_t *obj);
-void canchip_done(struct chip_t *chip);
+void canchip_done(struct canchip_t *chip);
void candevice_done(struct candevice_t *candev);
void canhardware_done(struct canhardware_t *candev);
\r
\r
\r
-int hms30c7202_init_obj_data(struct chip_t *chip, int objnr);\r
+int hms30c7202_init_obj_data(struct canchip_t *chip, int objnr);\r
int hms30c7202_program_irq(struct candevice_t *candev);\r
\r
#endif /* __HMS30C7202_CAN__ */\r
* Version lincan-0.3 17 Jun 2004
*/
-int i82527_enable_configuration(struct chip_t *chip);
-int i82527_disable_configuration(struct chip_t *chip);
-int i82527_chip_config(struct chip_t *chip);
-int i82527_baud_rate(struct chip_t *chip, int rate, int clock, int sjw,
+int i82527_enable_configuration(struct canchip_t *chip);
+int i82527_disable_configuration(struct canchip_t *chip);
+int i82527_chip_config(struct canchip_t *chip);
+int i82527_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
int sampl_pt, int flags);
-int i82527_standard_mask(struct chip_t *chip, unsigned short code,
+int i82527_standard_mask(struct canchip_t *chip, unsigned short code,
unsigned short mask);
-int i82527_extended_mask(struct chip_t *chip, unsigned long code,
+int i82527_extended_mask(struct canchip_t *chip, unsigned long code,
unsigned long mask);
-int i82527_message15_mask(struct chip_t *chip, unsigned long code,
+int i82527_message15_mask(struct canchip_t *chip, unsigned long code,
unsigned long mask);
-int i82527_clear_objects(struct chip_t *chip);
-int i82527_config_irqs(struct chip_t *chip, short irqs);
-int i82527_pre_read_config(struct chip_t *chip, struct msgobj_t *obj);
-int i82527_pre_write_config(struct chip_t *chip, struct msgobj_t *obj,
+int i82527_clear_objects(struct canchip_t *chip);
+int i82527_config_irqs(struct canchip_t *chip, short irqs);
+int i82527_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj);
+int i82527_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg);
-int i82527_send_msg(struct chip_t *chip, struct msgobj_t *obj,
+int i82527_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg);
-int i82527_remote_request(struct chip_t *chip, struct msgobj_t *obj);
-int i82527_set_btregs(struct chip_t *chip, unsigned short btr0,
+int i82527_remote_request(struct canchip_t *chip, struct msgobj_t *obj);
+int i82527_set_btregs(struct canchip_t *chip, unsigned short btr0,
unsigned short btr1);
-int i82527_start_chip(struct chip_t *chip);
-int i82527_stop_chip(struct chip_t *chip);
-int i82527_check_tx_stat(struct chip_t *chip);
-int i82527_irq_handler(int irq, struct chip_t *chip);
-int i82527_fill_chipspecops(struct chip_t *chip);
+int i82527_start_chip(struct canchip_t *chip);
+int i82527_stop_chip(struct canchip_t *chip);
+int i82527_check_tx_stat(struct canchip_t *chip);
+int i82527_irq_handler(int irq, struct canchip_t *chip);
+int i82527_fill_chipspecops(struct canchip_t *chip);
#define MSG_OFFSET(object) ((object)*0x10)
MCFG_DIR = 1<<3 // Direction is Transmit
};
-void i82527_seg_write_reg(const struct chip_t *chip, unsigned char data, unsigned address);
-unsigned i82527_seg_read_reg(const struct chip_t *chip, unsigned address);
+void i82527_seg_write_reg(const struct canchip_t *chip, unsigned char data, unsigned address);
+unsigned i82527_seg_read_reg(const struct canchip_t *chip, unsigned address);
* Version lincan-0.3 17 Jun 2004
*/
-int i82527_irq_handler(int irq, struct chip_t *chip);
-int sja1000_irq_handler(int irq, struct chip_t *chip);
-int sja1000p_irq_handler(int irq, struct chip_t *chip);
-int dummy_irq_handler(int irq, struct chip_t *chip);
+int i82527_irq_handler(int irq, struct canchip_t *chip);
+int sja1000_irq_handler(int irq, struct canchip_t *chip);
+int sja1000p_irq_handler(int irq, struct canchip_t *chip);
+int dummy_irq_handler(int irq, struct canchip_t *chip);
int m437_reset(struct candevice_t *candev);
int m437_init_hw_data(struct candevice_t *candev);
int m437_init_chip_data(struct candevice_t *candev, int chipnr);
-int m437_init_obj_data(struct chip_t *chip, int objnr);
+int m437_init_obj_data(struct canchip_t *chip, int objnr);
void m437_write_register(unsigned data, unsigned long address);
unsigned m437_read_register(unsigned long address);
int m437_program_irq(struct candevice_t *candev);
int nr_all_chips;
int nr_82527_chips;
int nr_sja1000_chips;
- struct chip_t *chip[MAX_HW_CHIPS];
+ struct canchip_t *chip[MAX_HW_CHIPS];
struct hwspecops_t *hwspecops;
};
/**
- * struct chip_t - CAN chip state and type information
+ * struct canchip_t - CAN chip state and type information
* @chip_type: text string describing chip type
* @chip_idx: index of the chip in candevice_t.chip[] array
* @chip_irq: chip interrupt number if any
* chip->hostdevice->hwspecops->read_register)
* to speedup can_write_reg() and can_read_reg() functions.
*/
-struct chip_t {
+struct canchip_t {
char *chip_type;
int chip_idx; /* chip index in candevice_t.chip[] */
int chip_irq;
* struct msgobj_t - structure holding communication object state
* @obj_base_addr:
* @minor: associated device minor number
- * @object: object number in chip_t structure +1
+ * @object: object number in canchip_t structure +1
* @flags: message object flags
* @ret: field holding status of the last Tx operation
* @qends: pointer to message object corresponding ends structure
* @tx_timeout: can be used by chip driver to check for the transmission timeout
* @rx_msg: temporary storage to hold received messages before
* calling to canque_filter_msg2edges()
- * @hostchip: pointer to the &chip_t structure this object belongs to
+ * @hostchip: pointer to the &canchip_t structure this object belongs to
* @obj_used: counter of users (associated file structures for Linux
* userspace clients) of this object
* @obj_users: list of user structures of type &canuser_t.
struct msgobj_t {
unsigned long obj_base_addr;
unsigned int minor; /* associated device minor number */
- unsigned int object; /* object number in chip_t +1 for debug printk */
+ unsigned int object; /* object number in canchip_t +1 for debug printk */
unsigned long obj_flags;
int ret;
struct canmsg_t rx_msg;
- struct chip_t *hostchip;
+ struct canchip_t *hostchip;
unsigned long rx_preconfig_id;
* @init_hw_data: called to initialize &candevice_t structure, mainly
* @res_add, @nr_all_chips, @nr_82527_chips, @nr_sja1000_chips
* and @flags fields
- * @init_chip_data: called initialize each &chip_t structure, mainly
+ * @init_chip_data: called initialize each &canchip_t structure, mainly
* @chip_type, @chip_base_addr, @clock and chip specific registers.
- * It is responsible to setup &chip_t->@chipspecops functions
+ * It is responsible to setup &canchip_t->@chipspecops functions
* for non-standard chip types (type other than "i82527", "sja1000" or "sja1000p")
* @init_obj_data: called initialize each &msgobj_t structure,
* mainly @obj_base_addr field.
int (*reset)(struct candevice_t *candev);
int (*init_hw_data)(struct candevice_t *candev);
int (*init_chip_data)(struct candevice_t *candev, int chipnr);
- int (*init_obj_data)(struct chip_t *chip, int objnr);
+ int (*init_obj_data)(struct canchip_t *chip, int objnr);
int (*program_irq)(struct candevice_t *candev);
void (*write_register)(unsigned data,unsigned long address);
unsigned (*read_register)(unsigned long address);
* @irq_handler: interrupt service routine
*/
struct chipspecops_t {
- int (*chip_config)(struct chip_t *chip);
- int (*baud_rate)(struct chip_t *chip, int rate, int clock, int sjw,
+ int (*chip_config)(struct canchip_t *chip);
+ int (*baud_rate)(struct canchip_t *chip, int rate, int clock, int sjw,
int sampl_pt, int flags);
- int (*standard_mask)(struct chip_t *chip, unsigned short code,
+ int (*standard_mask)(struct canchip_t *chip, unsigned short code,
unsigned short mask);
- int (*extended_mask)(struct chip_t *chip, unsigned long code,
+ int (*extended_mask)(struct canchip_t *chip, unsigned long code,
unsigned long mask);
- int (*message15_mask)(struct chip_t *chip, unsigned long code,
+ int (*message15_mask)(struct canchip_t *chip, unsigned long code,
unsigned long mask);
- int (*clear_objects)(struct chip_t *chip);
- int (*config_irqs)(struct chip_t *chip, short irqs);
- int (*pre_read_config)(struct chip_t *chip, struct msgobj_t *obj);
- int (*pre_write_config)(struct chip_t *chip, struct msgobj_t *obj,
+ int (*clear_objects)(struct canchip_t *chip);
+ int (*config_irqs)(struct canchip_t *chip, short irqs);
+ int (*pre_read_config)(struct canchip_t *chip, struct msgobj_t *obj);
+ int (*pre_write_config)(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg);
- int (*send_msg)(struct chip_t *chip, struct msgobj_t *obj,
+ int (*send_msg)(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg);
- int (*remote_request)(struct chip_t *chip, struct msgobj_t *obj);
- int (*check_tx_stat)(struct chip_t *chip);
- int (*wakeup_tx)(struct chip_t *chip, struct msgobj_t *obj);
- int (*filtch_rq)(struct chip_t *chip, struct msgobj_t *obj);
- int (*enable_configuration)(struct chip_t *chip);
- int (*disable_configuration)(struct chip_t *chip);
- int (*set_btregs)(struct chip_t *chip, unsigned short btr0,
+ int (*remote_request)(struct canchip_t *chip, struct msgobj_t *obj);
+ int (*check_tx_stat)(struct canchip_t *chip);
+ int (*wakeup_tx)(struct canchip_t *chip, struct msgobj_t *obj);
+ int (*filtch_rq)(struct canchip_t *chip, struct msgobj_t *obj);
+ int (*enable_configuration)(struct canchip_t *chip);
+ int (*disable_configuration)(struct canchip_t *chip);
+ int (*set_btregs)(struct canchip_t *chip, unsigned short btr0,
unsigned short btr1);
- int (*start_chip)(struct chip_t *chip);
- int (*stop_chip)(struct chip_t *chip);
- int (*irq_handler)(int irq, struct chip_t *chip);
+ int (*start_chip)(struct canchip_t *chip);
+ int (*stop_chip)(struct canchip_t *chip);
+ int (*irq_handler)(int irq, struct canchip_t *chip);
};
struct mem_addr {
extern int processlocal;
extern struct canhardware_t *hardware_p;
-extern struct chip_t *chips_p[MAX_TOT_CHIPS];
+extern struct canchip_t *chips_p[MAX_TOT_CHIPS];
extern struct msgobj_t *objects_p[MAX_TOT_MSGOBJS];
extern struct mem_addr *mem_head;
#if defined(CONFIG_OC_LINCAN_PORTIO_ONLY)
-extern inline void can_write_reg(const struct chip_t *chip, unsigned char data, unsigned address)
+extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned address)
{
outb(data, chip->chip_base_addr+address);
}
-extern inline unsigned can_read_reg(const struct chip_t *chip, unsigned address)
+extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned address)
{
return inb(chip->chip_base_addr+address);
}
-extern inline void canobj_write_reg(const struct chip_t *chip, const struct msgobj_t *obj,
+extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
unsigned char data, unsigned address)
{
outb(data, obj->obj_base_addr+address);
}
-extern inline unsigned canobj_read_reg(const struct chip_t *chip, const struct msgobj_t *obj,
+extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
unsigned address)
{
return inb(obj->obj_base_addr+address);
}
#elif defined(CONFIG_OC_LINCAN_MEMIO_ONLY)
-extern inline void can_write_reg(const struct chip_t *chip, unsigned char data, unsigned address)
+extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned address)
{
writeb(data, chip->chip_base_addr+address);
}
-extern inline unsigned can_read_reg(const struct chip_t *chip, unsigned address)
+extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned address)
{
return readb(chip->chip_base_addr+address);
}
-extern inline void canobj_write_reg(const struct chip_t *chip, const struct msgobj_t *obj,
+extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
unsigned char data, unsigned address)
{
writeb(data, obj->obj_base_addr+address);
}
-extern inline unsigned canobj_read_reg(const struct chip_t *chip, const struct msgobj_t *obj,
+extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
unsigned address)
{
return readb(obj->obj_base_addr+address);
/* Inline function to write to the hardware registers. The argument address is
* relative to the memory map of the chip and not the absolute memory address.
*/
-extern inline void can_write_reg(const struct chip_t *chip, unsigned char data, unsigned address)
+extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned address)
{
unsigned long address_to_write;
address_to_write = chip->chip_base_addr+address;
chip->write_register(data, address_to_write);
}
-extern inline unsigned can_read_reg(const struct chip_t *chip, unsigned address)
+extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned address)
{
unsigned long address_to_read;
address_to_read = chip->chip_base_addr+address;
return chip->read_register(address_to_read);
}
-extern inline void canobj_write_reg(const struct chip_t *chip, const struct msgobj_t *obj,
+extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
unsigned char data, unsigned address)
{
unsigned long address_to_write;
chip->write_register(data, address_to_write);
}
-extern inline unsigned canobj_read_reg(const struct chip_t *chip, const struct msgobj_t *obj,
+extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
unsigned address)
{
unsigned long address_to_read;
int msmcan_reset(struct candevice_t *candev);
int msmcan_init_hw_data(struct candevice_t *candev);
int msmcan_init_chip_data(struct candevice_t *candev, int chipnr);
-int msmcan_init_obj_data(struct chip_t *chip, int objnr);
+int msmcan_init_obj_data(struct canchip_t *chip, int objnr);
void msmcan_write_register(unsigned data, unsigned long address);
unsigned msmcan_read_register(unsigned long address);
int msmcan_program_irq(struct candevice_t *candev);
int nsi_reset(struct candevice_t *candev);
int nsi_init_hw_data(struct candevice_t *candev);
int nsi_init_chip_data(struct candevice_t *candev, int chipnr);
-int nsi_init_obj_data(struct chip_t *chip, int objnr);
+int nsi_init_obj_data(struct canchip_t *chip, int objnr);
void nsi_write_register(unsigned data, unsigned long address);
unsigned nsi_read_register(unsigned long address);
int nsi_program_irq(struct candevice_t *candev);
int pci03_reset(struct candevice_t *candev);
int pci03_init_hw_data(struct candevice_t *candev);
int pci03_init_chip_data(struct candevice_t *candev, int chipnr);
-int pci03_init_obj_data(struct chip_t *chip, int objnr);
+int pci03_init_obj_data(struct canchip_t *chip, int objnr);
void pci03_write_register(unsigned data, unsigned long address);
unsigned pci03_read_register(unsigned long address);
int pci03_program_irq(struct candevice_t *candev);
int nMinor; // the associated minor
char *type; // the literal type of the device, info only
- struct chip_t *chip;
+ struct canchip_t *chip;
};
int pcan_dongle_reset(struct candevice_t *candev);
int pcan_dongle_init_hw_data(struct candevice_t *candev);
int pcan_dongle_init_chip_data(struct candevice_t *candev, int chipnr);
-int pcan_dongle_init_obj_data(struct chip_t *chip, int objnr);
+int pcan_dongle_init_obj_data(struct canchip_t *chip, int objnr);
void pcan_dongle_write_register(unsigned data, unsigned long address);
unsigned pcan_dongle_read_register(unsigned long address);
int pcan_dongle_program_irq(struct candevice_t *candev);
int pccanq_reset(struct candevice_t *candev);
int pccan_init_hw_data(struct candevice_t *candev);
int pccan_init_chip_data(struct candevice_t *candev, int chipnr);
-int pccan_init_obj_data(struct chip_t *chip, int objnr);
+int pccan_init_obj_data(struct canchip_t *chip, int objnr);
void pccan_write_register(unsigned data, unsigned long address);
unsigned pccan_read_register(unsigned long address);
int pccan_program_irq(struct candevice_t *candev);
int pcccan_reset(struct candevice_t *candev);
int pcccan_init_hw_data(struct candevice_t *candev);
int pcccan_init_chip_data(struct candevice_t *candev, int chipnr);
-int pcccan_init_obj_data(struct chip_t *chip, int objnr);
+int pcccan_init_obj_data(struct canchip_t *chip, int objnr);
void pcccan_write_register(unsigned data, unsigned long address);
unsigned pcccan_read_register(unsigned long address);
int pcccan_program_irq(struct candevice_t *candev);
int pcm3680_reset(struct candevice_t *candev);
int pcm3680_init_hw_data(struct candevice_t *candev);
int pcm3680_init_chip_data(struct candevice_t *candev, int chipnr);
-int pcm3680_init_obj_data(struct chip_t *chip, int objnr);
+int pcm3680_init_obj_data(struct canchip_t *chip, int objnr);
void pcm3680_write_register(unsigned data, unsigned long address);
unsigned pcm3680_read_register(unsigned long address);
int pcm3680_program_irq(struct candevice_t *candev);
int pikronisa_reset(struct candevice_t *candev);
int pikronisa_init_hw_data(struct candevice_t *candev);
int pikronisa_init_chip_data(struct candevice_t *candev, int chipnr);
-int pikronisa_init_obj_data(struct chip_t *chip, int objnr);
+int pikronisa_init_obj_data(struct canchip_t *chip, int objnr);
int pikronisa_program_irq(struct candevice_t *candev);
void pikronisa_write_register(unsigned data, unsigned long address);
unsigned pikronisa_read_register(unsigned long address);
int pip5_reset(struct candevice_t *candev);
int pip5_init_hw_data(struct candevice_t *candev);
int pip5_init_chip_data(struct candevice_t *candev, int chipnr);
-int pip5_init_obj_data(struct chip_t *chip, int objnr);
+int pip5_init_obj_data(struct canchip_t *chip, int objnr);
void pip5_write_register(unsigned data, unsigned long address);
unsigned pip5_read_register(unsigned long address);
int pip5_program_irq(struct candevice_t *candev);
void *can_checked_malloc(size_t size);
int can_checked_free(void *address_p);
int can_del_mem_list(void);
-int can_chip_setup_irq(struct chip_t *chip);
-void can_chip_free_irq(struct chip_t *chip);
+int can_chip_setup_irq(struct canchip_t *chip);
+void can_chip_free_irq(struct canchip_t *chip);
* Version lincan-0.3 17 Jun 2004
*/
-int sja1000_enable_configuration(struct chip_t *chip);
-int sja1000_disable_configuration(struct chip_t *chip);
-int sja1000_chip_config(struct chip_t *chip);
-int sja1000_standard_mask(struct chip_t *chip, unsigned short code, unsigned short mask);
-int sja1000_baud_rate(struct chip_t *chip, int rate, int clock, int sjw,
+int sja1000_enable_configuration(struct canchip_t *chip);
+int sja1000_disable_configuration(struct canchip_t *chip);
+int sja1000_chip_config(struct canchip_t *chip);
+int sja1000_standard_mask(struct canchip_t *chip, unsigned short code, unsigned short mask);
+int sja1000_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
int sampl_pt, int flags);
-int sja1000_pre_read_config(struct chip_t *chip, struct msgobj_t *obj);
-int sja1000_pre_write_config(struct chip_t *chip, struct msgobj_t *obj,
+int sja1000_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj);
+int sja1000_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg);
-int sja1000_send_msg(struct chip_t *chip, struct msgobj_t *obj,
+int sja1000_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg);
-int sja1000_check_tx_stat(struct chip_t *chip);
-int sja1000_set_btregs(struct chip_t *chip, unsigned short btr0,
+int sja1000_check_tx_stat(struct canchip_t *chip);
+int sja1000_set_btregs(struct canchip_t *chip, unsigned short btr0,
unsigned short btr1);
-int sja1000_start_chip(struct chip_t *chip);
-int sja1000_stop_chip(struct chip_t *chip);
-int sja1000_irq_handler(int irq, struct chip_t *chip);
-int sja1000_fill_chipspecops(struct chip_t *chip);
+int sja1000_start_chip(struct canchip_t *chip);
+int sja1000_stop_chip(struct canchip_t *chip);
+int sja1000_irq_handler(int irq, struct canchip_t *chip);
+int sja1000_fill_chipspecops(struct canchip_t *chip);
/* BasicCAN mode address map */
#define SJACR 0x00 /* Control register */
* Version lincan-0.3 17 Jun 2004
*/
-int sja1000p_chip_config(struct chip_t *chip);
-int sja1000p_extended_mask(struct chip_t *chip, unsigned long code, unsigned long mask);
-int sja1000p_baud_rate(struct chip_t *chip, int rate, int clock, int sjw,
+int sja1000p_chip_config(struct canchip_t *chip);
+int sja1000p_extended_mask(struct canchip_t *chip, unsigned long code, unsigned long mask);
+int sja1000p_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
int sampl_pt, int flags);
-int sja1000p_pre_read_config(struct chip_t *chip, struct msgobj_t *obj);
-int sja1000p_pre_write_config(struct chip_t *chip, struct msgobj_t *obj,
+int sja1000p_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj);
+int sja1000p_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg);
-int sja1000p_send_msg(struct chip_t *chip, struct msgobj_t *obj,
+int sja1000p_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg);
-int sja1000p_fill_chipspecops(struct chip_t *chip);
-int sja1000p_irq_handler(int irq, struct chip_t *chip);
+int sja1000p_fill_chipspecops(struct canchip_t *chip);
+int sja1000p_irq_handler(int irq, struct canchip_t *chip);
/* PeliCAN mode */
int smartcan_reset(struct candevice_t *candev);
int smartcan_init_hw_data(struct candevice_t *candev);
int smartcan_init_chip_data(struct candevice_t *candev, int chipnr);
-int smartcan_init_obj_data(struct chip_t *chip, int objnr);
+int smartcan_init_obj_data(struct canchip_t *chip, int objnr);
void smartcan_write_register(unsigned data, unsigned long address);
unsigned smartcan_read_register(unsigned long address);
int ssv_reset(struct candevice_t *candev);
int ssv_init_hw_data(struct candevice_t *candev);
int ssv_init_chip_data(struct candevice_t *candev, int chipnr);
-int ssv_init_obj_data(struct chip_t *chip, int objnr);
+int ssv_init_obj_data(struct canchip_t *chip, int objnr);
void ssv_write_register(unsigned data, unsigned long address);
unsigned ssv_read_register(unsigned long address);
int ssv_program_irq(struct candevice_t *candev);
int template_reset(struct candevice_t *candev);
int template_init_hw_data(struct candevice_t *candev);
int template_init_chip_data(struct candevice_t *candev, int chipnr);
-int template_init_obj_data(struct chip_t *chip, int objnr);
+int template_init_obj_data(struct canchip_t *chip, int objnr);
void template_write_register(unsigned data, unsigned long address);
unsigned template_read_register(unsigned long address);
int template_program_irq(struct candevice_t *candev);
SUPPORTED_CARDS = pip pccan smartcan nsi cc_can104 \
pc_i03 pcm3680 aim104 m437 pcccan ssv \
bfadcan pikronisa kv_pcican msmcan virtual template \
- unican unican_cl2
-# ems_cpcpci # compiles only for 2.6 kernels now
+ unican unican_cl2 ems_cpcpci
# hms30c7202_can c_can c_can_irq
# pcan_dongle
* Return Value: The function always returns zero
* File: src/template.c
*/
-int aim104_init_obj_data(struct chip_t *chip, int objnr)
+int aim104_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
chip->msgobj[objnr]->obj_flags=0;
{
int i;
- struct chip_t *chip=candev->chip[0];
+ struct canchip_t *chip=candev->chip[0];
unsigned cdr;
bfadcan_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
* Return Value: The function always returns zero
* File: src/bfadcan.c
*/
-int bfadcan_init_obj_data(struct chip_t *chip, int objnr)
+int bfadcan_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr+(objnr+1)*0x10;
* c_can_enable_configuration - enable chip configuration mode
* @pchip: pointer to chip state structure
*/
-int c_can_enable_configuration(struct chip_t *pchip)
+int c_can_enable_configuration(struct canchip_t *pchip)
{
int i=0;
u16 flags;
}
///////////////////////////////////////////////////////////////////////
-int c_can_disable_configuration(struct chip_t *pchip)
+int c_can_disable_configuration(struct canchip_t *pchip)
{
int i=0;
u16 flags;
}
///////////////////////////////////////////////////////////////////////
-int c_can_chip_config(struct chip_t *pchip)
+int c_can_chip_config(struct canchip_t *pchip)
{
DEBUGMSG("(c%d)calling c_can_chip_config(...)\n", pchip->chip_idx);
/*
* Checks if the Busy-Bit in the IF1-Command-Request Register is set
*/
-int c_can_if1_busycheck(struct chip_t *pchip)
+int c_can_if1_busycheck(struct canchip_t *pchip)
{
int i=0;
/*
* Checks if the Busy-Bit in the IF2-Command-Request Register is set
*/
-int c_can_if2_busycheck(struct chip_t *pchip)
+int c_can_if2_busycheck(struct canchip_t *pchip)
{
int i=0;
* param sampl_pt sample point in % (0-100) sets (TSEG1+2)/(TSEG1+TSEG2+3) ratio
* param flags fields BTR1_SAM, OCMODE, OCPOL, OCTP, OCTN, CLK_OFF, CBP
*/
-int c_can_baud_rate(struct chip_t *pchip, int rate, int clock,
+int c_can_baud_rate(struct canchip_t *pchip, int rate, int clock,
int sjw, int sampl_pt, int flags)
{
int best_error = 1000000000, error;
}
///////////////////////////////////////////////////////////////////////
-int c_can_clear_objects(struct chip_t *pchip)
+int c_can_clear_objects(struct canchip_t *pchip)
{
unsigned short i = 0;
unsigned short tempreg = 0;
}
///////////////////////////////////////////////////////////////////////
-int c_can_config_irqs(struct chip_t *pchip,
+int c_can_config_irqs(struct canchip_t *pchip,
u16 irqs)
{
u16 tempreg;
}
///////////////////////////////////////////////////////////////////////
-int c_can_pre_read_config(struct chip_t *pchip, struct msgobj_t *pmsgobj)
+int c_can_pre_read_config(struct canchip_t *pchip, struct msgobj_t *pmsgobj)
{
unsigned short readMaskCM = IFXCM_CNTRL | IFXCM_ARB;
unsigned short writeMaskCM = IFXCM_CNTRL | IFXCM_ARB | IFXCM_WRRD;
}
///////////////////////////////////////////////////////////////////////
-int c_can_pre_write_config(struct chip_t *chip, struct msgobj_t *obj,
+int c_can_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
return 0;
*In this version the method also sends the message.
*/
-int c_can_send_msg(struct chip_t *pchip, struct msgobj_t *pmsgobj,
+int c_can_send_msg(struct canchip_t *pchip, struct msgobj_t *pmsgobj,
struct canmsg_t *pmsg)
{
unsigned short readMaskCM = IFXCM_CNTRL | IFXCM_ARB | IFXCM_DA | IFXCM_DB;
}
//////////////////////////////////////////////////////////////////////
-int c_can_remote_request(struct chip_t *pchip, struct msgobj_t *pmsgobj )
+int c_can_remote_request(struct canchip_t *pchip, struct msgobj_t *pmsgobj )
{
unsigned short readMaskCM = IFXCM_CNTRL;// | IFXCM_ARB;
//unsigned short writeMaskCM = IFXCM_CNTRL | IFXCM_ARB | IFXCM_WRRD;
}
///////////////////////////////////////////////////////////////////////
-int c_can_set_btregs(struct chip_t *pchip,
+int c_can_set_btregs(struct canchip_t *pchip,
u16 btr0,
u16 btr1)
{
/*
* Starts the Chip, by setting the CAN Enable Bit
*/
-int c_can_start_chip(struct chip_t *pchip)
+int c_can_start_chip(struct canchip_t *pchip)
{
u16 flags = 0;
/*
* Stops the Chip, by deleting the CAN Enable Bit
*/
-int c_can_stop_chip(struct chip_t *pchip)
+int c_can_stop_chip(struct canchip_t *pchip)
{
u16 flags = 0;
/*
*Check the TxOK bit of the Status Register and resets it afterwards.
*/
-int c_can_check_tx_stat(struct chip_t *pchip)
+int c_can_check_tx_stat(struct canchip_t *pchip)
{
unsigned long tempstat = 0;
///////////////////////////////////////////////////////////////////////
-int c_can_wakeup_tx(struct chip_t *chip, struct msgobj_t *obj)
+int c_can_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
{
can_preempt_disable();
}
///////////////////////////////////////////////////////////////////////
-int c_can_filtch_rq(struct chip_t *chip, struct msgobj_t *obj)
+int c_can_filtch_rq(struct canchip_t *chip, struct msgobj_t *obj)
{
can_preempt_disable();
///////////////////////////////////////////////////////////////////////
-void c_can_registerdump(struct chip_t *pchip)
+void c_can_registerdump(struct canchip_t *pchip)
{
CANMSG("------------------------------------\n");
CANMSG("---------C-CAN Register Dump--------\n");
return 0;
}
-int c_can_fill_chipspecops(struct chip_t *chip)
+int c_can_fill_chipspecops(struct canchip_t *chip)
{
chip->chip_type="c_can";
chip->max_objects = 32;
// prototypes
-inline void c_can_irq_read_handler( struct chip_t *pchip, int idxobj, u32 msgid );
+inline void c_can_irq_read_handler( struct canchip_t *pchip, int idxobj, u32 msgid );
-inline void c_can_irq_write_handler( struct chip_t *pchip, int idxobj);
+inline void c_can_irq_write_handler( struct canchip_t *pchip, int idxobj);
-void c_can_irq_rtr_handler( struct chip_t *pchip, int idxobj, u32 msgid );
+void c_can_irq_rtr_handler( struct canchip_t *pchip, int idxobj, u32 msgid );
u16 readMaskCM = IFXCM_ARB | IFXCM_CNTRL | IFXCM_CLRINTPND
| IFXCM_TRND | IFXCM_DA | IFXCM_DB;
// Send a message from the output fifo ( if any ).
//
-inline void c_can_irq_write_handler( struct chip_t *pchip, int idxobj)
+inline void c_can_irq_write_handler( struct canchip_t *pchip, int idxobj)
{
int cmd;
struct msgobj_t *pmsgobj = pchip->msgobj[idxobj];
// Message received form the line. Write it in the input fifo->
//
-inline void c_can_irq_read_handler( struct chip_t *pchip,
+inline void c_can_irq_read_handler( struct canchip_t *pchip,
int idxobj, u32 msgid )
{
int i=0;
// while
}
-void c_can_irq_sync_activities(struct chip_t *chip, struct msgobj_t *obj)
+void c_can_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj)
{
while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)) {
// c_can_irq_handler
//
-int c_can_irq_handler(int irq, struct chip_t *chip)
+int c_can_irq_handler(int irq, struct canchip_t *chip)
{
struct rtr_id *rtr_search = hardware_p->rtr_queue;
u16 chip_status;
// c_can_irq_rtr_handler
//
-void c_can_irq_rtr_handler( struct chip_t *pchip, int idxobj, u32 msgid )
+void c_can_irq_rtr_handler( struct canchip_t *pchip, int idxobj, u32 msgid )
{
short int i=0;
struct rtr_id *prtr_search = hardware_p->rtr_queue;
unsigned int can_rtl_isr( unsigned int irq_num, struct pt_regs *r )
{
- struct chip_t *chip;
+ struct canchip_t *chip;
struct candevice_t *candev;
int board_nr;
int chip_nr;
void * can_chip_worker_thread(void *arg)
{
- struct chip_t *chip = (struct chip_t *) arg;
+ struct canchip_t *chip = (struct canchip_t *) arg;
struct msgobj_t *obj;
int ret, i;
int loop_cnt;
}
-int can_chip_setup_irq(struct chip_t *chip)
+int can_chip_setup_irq(struct canchip_t *chip)
{
int ret;
struct sched_param sched_param;
}
-void can_chip_free_irq(struct chip_t *chip)
+void can_chip_free_irq(struct canchip_t *chip)
{
if(chip->worker_thread)
pthread_delete_np(chip->worker_thread);
* Return Value: The function always returns zero
* File: src/template.c
*/
-int cc104_init_obj_data(struct chip_t *chip, int objnr)
+int cc104_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
#ifdef CAN_WITH_RTL
static inline
-void canqueue_wake_chip_worker(struct canque_ends_t *qends, struct chip_t *chip, struct msgobj_t *obj)
+void canqueue_wake_chip_worker(struct canque_ends_t *qends, struct canchip_t *chip, struct msgobj_t *obj)
{
if(qends->endinfo.chipinfo.worker_thread){
can_msgobj_set_fl(obj,WORKER_WAKE);
*/
void canqueue_notify_chip(struct canque_ends_t *qends, struct canque_edge_t *qedge, int what)
{
- struct chip_t *chip=qends->endinfo.chipinfo.chip;
+ struct canchip_t *chip=qends->endinfo.chipinfo.chip;
struct msgobj_t *obj=qends->endinfo.chipinfo.msgobj;
DEBUGMSG("canqueue_notify_chip for edge %d and event %d\n",qedge->edge_num,what);
* @chip: pointer to the corresponding CAN chip structure
* @obj: pointer to the corresponding message object structure
*/
-int canqueue_ends_init_chip(struct canque_ends_t *qends, struct chip_t *chip, struct msgobj_t *obj)
+int canqueue_ends_init_chip(struct canque_ends_t *qends, struct canchip_t *chip, struct msgobj_t *obj)
{
int ret;
ret=canqueue_ends_init_gen(qends);
* can change when resources are temporarily released
*/
for(i=0;i<candev->nr_all_chips;i++) {
- struct chip_t *chip=candev->chip[i];
+ struct canchip_t *chip=candev->chip[i];
if(!chip) continue;
chip->chip_base_addr = candev->io_addr+
0x400 + i*EMS_CPCPCI_BYTES_PER_CIRCUIT;
return readb(address);
}
-int ems_cpcpci_irq_handler(int irq, struct chip_t *chip)
+int ems_cpcpci_irq_handler(int irq, struct canchip_t *chip)
{
- //struct chip_t *chip=(struct chip_t *)dev_id;
+ //struct canchip_t *chip=(struct canchip_t *)dev_id;
struct candevice_t *candev=chip->hostdevice;
int i;
unsigned long icr;
int ems_cpcpci_reset(struct candevice_t *candev)
{
int i=0,chip_nr;
- struct chip_t *chip;
+ struct canchip_t *chip;
unsigned cdr;
DEBUGMSG("Resetting EMS_CPCPCI hardware ...\n");
return 0;
}
-int ems_cpcpci_init_obj_data(struct chip_t *chip, int objnr)
+int ems_cpcpci_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
return 0;
if(obj->hostchip->msgobj[obj->object-1] == obj)
obj->hostchip->msgobj[obj->object-1]=NULL;
else
- CANMSG("msgobj_done: not registered in the chip_t\n");
+ CANMSG("msgobj_done: not registered in the canchip_t\n");
obj->hostchip=NULL;
}
* canchip_done - destroys one CAN chip representation
* @chip: pointer to CAN chip structure
*/
-void canchip_done(struct chip_t *chip)
+void canchip_done(struct canchip_t *chip)
{
int i;
void candevice_done(struct candevice_t *candev)
{
int i;
- struct chip_t *chip;
+ struct canchip_t *chip;
for(i=0; i<candev->nr_all_chips; i++){
if((chip=candev->chip[i])==NULL)
{
int i=0;
int enableTest=0, disableTest=0;
- struct chip_t *pchip = candev->chip[0];
+ struct canchip_t *pchip = candev->chip[0];
enableTest = pchip->chipspecops->enable_configuration(pchip);
disableTest = pchip->chipspecops->disable_configuration(pchip);
* File: src/template.c
*/
int hms30c7202_init_hw_data(struct candevice_t *candev)
-/*( struct chip_t *pchip, u16 chip_nr, u16 startminor, u32 baseaddr, u8 irq )*/
+/*( struct canchip_t *pchip, u16 chip_nr, u16 startminor, u32 baseaddr, u8 irq )*/
{
// u32 intCntrVAddr = 0;
u32 gpioVAddr = 0;
* Return Value: The function always returns zero
* File: src/template.c
*/
-int hms30c7202_init_obj_data(struct chip_t *chip, int objnr)
+int hms30c7202_init_obj_data(struct canchip_t *chip, int objnr)
{
DEBUGMSG("(c%d)calling hms30c7202_init_obj_data( ...)\n", chip->chip_idx);
#include "../include/main.h"
#include "../include/i82527.h"
-void i82527_irq_rtr_handler(struct chip_t *chip, struct msgobj_t *obj,
+void i82527_irq_rtr_handler(struct canchip_t *chip, struct msgobj_t *obj,
struct rtr_id *rtr_search, unsigned long message_id);
/* helper functions for segmented cards read and write configuration and status registers
above 0xf offset */
-void i82527_seg_write_reg(const struct chip_t *chip, unsigned char data, unsigned address)
+void i82527_seg_write_reg(const struct canchip_t *chip, unsigned char data, unsigned address)
{
if((address > 0xf) && (chip->flags & CHIP_SEGMENTED))
canobj_write_reg(chip, chip->msgobj[(address>>4)-1],data, address & 0xf);
can_write_reg(chip, data, address);
}
-unsigned i82527_seg_read_reg(const struct chip_t *chip, unsigned address)
+unsigned i82527_seg_read_reg(const struct canchip_t *chip, unsigned address)
{
if((address > 0xf) && (chip->flags & CHIP_SEGMENTED))
return canobj_read_reg(chip, chip->msgobj[(address>>4)-1], address & 0xf);
return can_read_reg(chip, address);
}
-int i82527_enable_configuration(struct chip_t *chip)
+int i82527_enable_configuration(struct canchip_t *chip)
{
unsigned short flags=0;
return 0;
}
-int i82527_disable_configuration(struct chip_t *chip)
+int i82527_disable_configuration(struct canchip_t *chip)
{
unsigned short flags=0;
return 0;
}
-int i82527_chip_config(struct chip_t *chip)
+int i82527_chip_config(struct canchip_t *chip)
{
can_write_reg(chip,chip->int_cpu_reg,iCPU); // Configure cpu interface
can_write_reg(chip,(iCTL_CCE|iCTL_INI),iCTL); // Enable configuration
* param sampl_pt sample point in % (0-100) sets (TSEG1+2)/(TSEG1+TSEG2+3) ratio
* param flags fields BTR1_SAM, OCMODE, OCPOL, OCTP, OCTN, CLK_OFF, CBP
*/
-int i82527_baud_rate(struct chip_t *chip, int rate, int clock, int sjw,
+int i82527_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
int sampl_pt, int flags)
{
int best_error = 1000000000, error;
return 0;
}
-int i82527_standard_mask(struct chip_t *chip, unsigned short code, unsigned short mask)
+int i82527_standard_mask(struct canchip_t *chip, unsigned short code, unsigned short mask)
{
unsigned char mask0, mask1;
return 0;
}
-int i82527_extended_mask(struct chip_t *chip, unsigned long code, unsigned long mask)
+int i82527_extended_mask(struct canchip_t *chip, unsigned long code, unsigned long mask)
{
unsigned char mask0, mask1, mask2, mask3;
return 0;
}
-int i82527_message15_mask(struct chip_t *chip, unsigned long code, unsigned long mask)
+int i82527_message15_mask(struct canchip_t *chip, unsigned long code, unsigned long mask)
{
unsigned char mask0, mask1, mask2, mask3;
}
-int i82527_clear_objects(struct chip_t *chip)
+int i82527_clear_objects(struct canchip_t *chip)
{
int i=0,id=0,data=0;
struct msgobj_t *obj;
return 0;
}
-int i82527_config_irqs(struct chip_t *chip, short irqs)
+int i82527_config_irqs(struct canchip_t *chip, short irqs)
{
can_write_reg(chip,irqs,iCTL);
DEBUGMSG("Configured hardware interrupt delivery\n");
return 0;
}
-int i82527_pre_read_config(struct chip_t *chip, struct msgobj_t *obj)
+int i82527_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj)
{
unsigned long id=obj->rx_preconfig_id;
return 0;
}
-int i82527_pre_write_config(struct chip_t *chip, struct msgobj_t *obj,
+int i82527_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
int i=0,id0=0,id1=0,id2=0,id3=0;
return 0;
}
-int i82527_send_msg(struct chip_t *chip, struct msgobj_t *obj,
+int i82527_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
canobj_write_reg(chip,obj,(MVAL_SET|TXIE_SET|RXIE_RES|INTPD_RES),iMSGCTL0);
return 0;
}
-int i82527_check_tx_stat(struct chip_t *chip)
+int i82527_check_tx_stat(struct canchip_t *chip)
{
if (can_read_reg(chip,iSTAT) & iSTAT_TXOK) {
can_write_reg(chip,0x0,iSTAT);
}
}
-int i82527_remote_request(struct chip_t *chip, struct msgobj_t *obj)
+int i82527_remote_request(struct canchip_t *chip, struct msgobj_t *obj)
{
canobj_write_reg(chip,obj,(MVAL_SET|TXIE_RES|RXIE_SET|INTPD_RES),iMSGCTL0);
canobj_write_reg(chip,obj,(RMPD_RES|TXRQ_SET|MLST_RES|NEWD_RES),iMSGCTL1);
return 0;
}
-int i82527_set_btregs(struct chip_t *chip, unsigned short btr0,
+int i82527_set_btregs(struct canchip_t *chip, unsigned short btr0,
unsigned short btr1)
{
if (i82527_enable_configuration(chip))
return 0;
}
-int i82527_start_chip(struct chip_t *chip)
+int i82527_start_chip(struct canchip_t *chip)
{
unsigned short flags = 0;
return 0;
}
-int i82527_stop_chip(struct chip_t *chip)
+int i82527_stop_chip(struct canchip_t *chip)
{
unsigned short flags = 0;
}
static inline
-void i82527_irq_write_handler(struct chip_t *chip, struct msgobj_t *obj)
+void i82527_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
{
int cmd;
}
static inline
-void i82527_irq_read_handler(struct chip_t *chip, struct msgobj_t *obj, int objnum)
+void i82527_irq_read_handler(struct canchip_t *chip, struct msgobj_t *obj, int objnum)
{
int i;
unsigned long message_id;
static inline
-void i82527_irq_update_filter(struct chip_t *chip, struct msgobj_t *obj)
+void i82527_irq_update_filter(struct canchip_t *chip, struct msgobj_t *obj)
{
struct canfilt_t filt;
}
-void i82527_irq_sync_activities(struct chip_t *chip, struct msgobj_t *obj)
+void i82527_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj)
{
while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)) {
}
}
-int i82527_irq_handler(int irq, struct chip_t *chip)
+int i82527_irq_handler(int irq, struct canchip_t *chip)
{
unsigned char msgcfg;
return CANCHIP_IRQ_HANDLED;
}
-void i82527_irq_rtr_handler(struct chip_t *chip, struct msgobj_t *obj,
+void i82527_irq_rtr_handler(struct canchip_t *chip, struct msgobj_t *obj,
struct rtr_id *rtr_search, unsigned long message_id)
{
short int i=0;
* Return Value: negative value reports error.
* File: src/i82527.c
*/
-int i82527_wakeup_tx(struct chip_t *chip, struct msgobj_t *obj)
+int i82527_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
{
can_preempt_disable();
return 0;
}
-int i82527_filtch_rq(struct chip_t *chip, struct msgobj_t *obj)
+int i82527_filtch_rq(struct canchip_t *chip, struct msgobj_t *obj)
{
can_preempt_disable();
return 0;
}
-int i82527_fill_chipspecops(struct chip_t *chip)
+int i82527_fill_chipspecops(struct canchip_t *chip)
{
chip->chip_type="i82527";
chip->max_objects=15;
unsigned btr0=0, btr1=0;
struct canuser_t *canuser = (struct canuser_t*)(file->private_data);
struct msgobj_t *obj;
- struct chip_t *chip;
+ struct canchip_t *chip;
struct canque_ends_t *qends;
if(!canuser || (canuser->magic != CAN_USER_MAGIC)){
unsigned short channel=0;
unsigned btr0=0, btr1=0;
struct msgobj_t *obj;
- struct chip_t *chip;
+ struct canchip_t *chip;
struct canque_ends_t *qends;
if(!canuser || (canuser->magic != CAN_USER_MAGIC)){
#include "../include/irq.h"
-int dummy_irq_handler(int irq, struct chip_t *chip) {
+int dummy_irq_handler(int irq, struct canchip_t *chip) {
CANMSG("dummy_irq_handler called irq %d \n", irq);
return CANCHIP_IRQ_NONE;
}
int kv_pcican_reset(struct candevice_t *candev)
{
int i=0,chip_nr;
- struct chip_t *chip;
+ struct canchip_t *chip;
unsigned cdr;
DEBUGMSG("Resetting kv_pcican hardware ...\n");
return 0;
}
-int kv_pcican_init_obj_data(struct chip_t *chip, int objnr)
+int kv_pcican_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
return 0;
* Return Value: The function always returns zero
* File: src/m437.c
*/
-int m437_init_obj_data(struct chip_t *chip, int objnr)
+int m437_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr+(objnr+1)*0x10;
/* Global structures, used to describe the installed hardware. */
struct canhardware_t canhardware;
struct canhardware_t *hardware_p=&canhardware;
-struct chip_t *chips_p[MAX_TOT_CHIPS];
+struct canchip_t *chips_p[MAX_TOT_CHIPS];
struct msgobj_t *objects_p[MAX_TOT_MSGOBJS];
#ifdef CONFIG_DEVFS_FS
#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,60))
{
int res=0,i=0, j;
struct candevice_t *candev;
- struct chip_t *chip;
+ struct canchip_t *chip;
if (parse_mod_parms())
return -EINVAL;
*/
int msmcan_reset(struct candevice_t *candev)
{
- struct chip_t *chip=candev->chip[0];
+ struct canchip_t *chip=candev->chip[0];
DEBUGMSG("Resetting msmcan hardware ...\n");
/* we don't use template_write_register because we don't use the two first
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
*/
-int msmcan_init_obj_data(struct chip_t *chip, int objnr)
+int msmcan_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
*/
-int nsi_init_obj_data(struct chip_t *chip, int objnr)
+int nsi_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=
int can_open(struct inode *inode, struct file *file)
{
struct msgobj_t *obj;
- struct chip_t *chip;
+ struct canchip_t *chip;
struct canuser_t *canuser;
struct canque_ends_t *qends;
struct canque_edge_t *edge;
int can_open_rtl_common(struct canuser_t *canuser, int open_flags)
{
struct msgobj_t *obj=canuser->msgobj;
- struct chip_t *chip;
+ struct canchip_t *chip;
struct canque_ends_t *qends;
struct canque_edge_t *edge;
can_spin_irqflags_t iflags;
{
int ret;
struct msgobj_t *obj;
- struct chip_t *chip;
+ struct canchip_t *chip;
struct canuser_t *canuser;
int minor_nr = RTL_MINOR_FROM_FILEPTR(fptr);
* Return Value: The function always returns zero
* File: src/pc-i03.c
*/
-int pci03_init_obj_data(struct chip_t *chip, int objnr)
+int pci03_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
int pcan_dongle_reset(struct candevice_t *candev)
{
int i=0;
- struct chip_t *chip;
+ struct canchip_t *chip;
int chipnr;
unsigned cdr;
* Return Value: The function always returns zero
* File: src/template.c
*/
-int pcan_dongle_init_obj_data(struct chip_t *chip, int objnr)
+int pcan_dongle_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
chip->msgobj[objnr]->obj_flags=0;
return 0;
}
-int pccan_init_obj_data(struct chip_t *chip, int objnr)
+int pccan_init_obj_data(struct canchip_t *chip, int objnr)
{
if (!strcmp(chip->chip_type,"sja1000")) {
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
* Return Value: The function always returns zero
* File: src/pcccan.c
*/
-int pcccan_init_obj_data(struct chip_t *chip, int objnr)
+int pcccan_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=(objnr+1)*0x10;
int pcm3680_reset(struct candevice_t *candev)
{
int i=0;
- struct chip_t *chip;
+ struct canchip_t *chip;
int chipnr;
DEBUGMSG("Resetting pcm3680 hardware ...\n");
* Return Value: The function always returns zero
* File: src/template.c
*/
-int pcm3680_init_obj_data(struct chip_t *chip, int objnr)
+int pcm3680_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
int pikronisa_reset(struct candevice_t *candev)
{
int i;
- struct chip_t *chip=candev->chip[0];
+ struct canchip_t *chip=candev->chip[0];
unsigned cdr;
pikronisa_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
* Return Value: The function always returns zero
* File: src/pikronisa.c
*/
-int pikronisa_init_obj_data(struct chip_t *chip, int objnr)
+int pikronisa_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
return 0;
return 0;
}
-int pip_init_obj_data(struct chip_t *chip, int objnr)
+int pip_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr+(objnr+1)*0x10;
}
/* This is the 'RTR' read handler for remote transmission request messages */
-inline ssize_t can_rtr_read(struct chip_t *chip, struct msgobj_t *obj,
+inline ssize_t can_rtr_read(struct canchip_t *chip, struct msgobj_t *obj,
char *buffer)
{
can_spin_irqflags_t flags;
{
struct canuser_t *canuser = (struct canuser_t*)(file->private_data);
struct msgobj_t *obj;
- struct chip_t *chip;
+ struct canchip_t *chip;
struct canmsg_t read_msg;
struct canque_ends_t *qends;
int ret=0;
int init_hwspecops(struct candevice_t *candev, int *irqnum_p);
int init_device_struct(int card, int *chan_param_idx_p, int *irq_param_idx_p);
int init_chip_struct(struct candevice_t *candev, int chipnr, int irq, long baudrate);
-int init_obj_struct(struct candevice_t *candev, struct chip_t *hostchip, int objnr);
+int init_obj_struct(struct candevice_t *candev, struct canchip_t *hostchip, int objnr);
/**
* can_checked_malloc - memory allocation with registering of requested blocks
*
* Return Value: returns negative number in the case of fail
*/
-int register_chip_struct(struct chip_t *chip, int minorbase)
+int register_chip_struct(struct canchip_t *chip, int minorbase)
{
static int next_chip_slot=0;
int i;
for (chipnr=0; chipnr < candev->nr_all_chips; chipnr++) {
int m=minor[*chan_param_idx_p+chipnr];
- struct chip_t *chip=candev->chip[chipnr];
+ struct canchip_t *chip=candev->chip[chipnr];
int objnr;
register_chip_struct(chip, m);
*/
int init_chip_struct(struct candevice_t *candev, int chipnr, int irq, long baudrate)
{
- struct chip_t *chip;
+ struct canchip_t *chip;
int objnr;
int ret;
- candev->chip[chipnr]=(struct chip_t *)can_checked_malloc(sizeof(struct chip_t));
+ candev->chip[chipnr]=(struct canchip_t *)can_checked_malloc(sizeof(struct canchip_t));
if ((chip=candev->chip[chipnr])==NULL)
return -ENOMEM;
- memset(chip, 0, sizeof(struct chip_t));
+ memset(chip, 0, sizeof(struct canchip_t));
chip->write_register=candev->hwspecops->write_register;
chip->read_register=candev->hwspecops->read_register;
*
* Return Value: returns negative number in the case of fail
*/
-int init_obj_struct(struct candevice_t *candev, struct chip_t *hostchip, int objnr)
+int init_obj_struct(struct candevice_t *candev, struct canchip_t *hostchip, int objnr)
{
struct canque_ends_t *qends;
struct msgobj_t *obj;
can_irqreturn_t can_default_irq_dispatch(int irq, void *dev_id, struct pt_regs *regs)
{
int retval;
- struct chip_t *chip=(struct chip_t *)dev_id;
+ struct canchip_t *chip=(struct canchip_t *)dev_id;
retval=chip->chipspecops->irq_handler(irq, chip);
return CAN_IRQ_RETVAL(retval);
*
* Return Value: returns negative number in the case of fail
*/
-int can_chip_setup_irq(struct chip_t *chip)
+int can_chip_setup_irq(struct canchip_t *chip)
{
if(chip==NULL)
return -1;
* can_chip_free_irq - unregisters chip interrupt handler from the system
* @chip: pointer to CAN chip structure
*/
-void can_chip_free_irq(struct chip_t *chip)
+void can_chip_free_irq(struct canchip_t *chip)
{
if((chip->flags & CHIP_IRQ_SETUP) && (chip->chip_irq>=0)) {
if ((chip->flags & CHIP_IRQ_VME) == 0)
#include "../include/main.h"
#include "../include/sja1000.h"
-void sja1000_irq_read_handler(struct chip_t *chip, struct msgobj_t *obj);
-void sja1000_irq_write_handler(struct chip_t *chip, struct msgobj_t *obj);
+void sja1000_irq_read_handler(struct canchip_t *chip, struct msgobj_t *obj);
+void sja1000_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj);
-int sja1000_enable_configuration(struct chip_t *chip)
+int sja1000_enable_configuration(struct canchip_t *chip)
{
int i=0;
unsigned flags;
return 0;
}
-int sja1000_disable_configuration(struct chip_t *chip)
+int sja1000_disable_configuration(struct canchip_t *chip)
{
int i=0;
unsigned flags;
return 0;
}
-int sja1000_chip_config(struct chip_t *chip)
+int sja1000_chip_config(struct canchip_t *chip)
{
if (sja1000_enable_configuration(chip))
return -ENODEV;
return 0;
}
-int sja1000_standard_mask(struct chip_t *chip, unsigned short code, unsigned short mask)
+int sja1000_standard_mask(struct canchip_t *chip, unsigned short code, unsigned short mask)
{
unsigned char write_code, write_mask;
* param sampl_pt sample point in % (0-100) sets (TSEG1+2)/(TSEG1+TSEG2+3) ratio
* param flags fields BTR1_SAM, OCMODE, OCPOL, OCTP, OCTN, CLK_OFF, CBP
*/
-int sja1000_baud_rate(struct chip_t *chip, int rate, int clock, int sjw,
+int sja1000_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
int sampl_pt, int flags)
{
int best_error = 1000000000, error;
return 0;
}
-int sja1000_pre_read_config(struct chip_t *chip, struct msgobj_t *obj)
+int sja1000_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj)
{
int i;
#define MAX_TRANSMIT_WAIT_LOOPS 10
-int sja1000_pre_write_config(struct chip_t *chip, struct msgobj_t *obj,
+int sja1000_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
int i=0, id=0;
return 0;
}
-int sja1000_send_msg(struct chip_t *chip, struct msgobj_t *obj,
+int sja1000_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
can_write_reg(chip, sjaCMR_TR, SJACMR);
return 0;
}
-int sja1000_check_tx_stat(struct chip_t *chip)
+int sja1000_check_tx_stat(struct canchip_t *chip)
{
if (can_read_reg(chip,SJASR) & sjaSR_TCS)
return 0;
return 1;
}
-int sja1000_set_btregs(struct chip_t *chip, unsigned short btr0,
+int sja1000_set_btregs(struct canchip_t *chip, unsigned short btr0,
unsigned short btr1)
{
if (sja1000_enable_configuration(chip))
return 0;
}
-int sja1000_start_chip(struct chip_t *chip)
+int sja1000_start_chip(struct canchip_t *chip)
{
unsigned short flags = 0;
return 0;
}
-int sja1000_stop_chip(struct chip_t *chip)
+int sja1000_stop_chip(struct canchip_t *chip)
{
unsigned short flags = 0;
return 0;
}
-int sja1000_remote_request(struct chip_t *chip, struct msgobj_t *obj)
+int sja1000_remote_request(struct canchip_t *chip, struct msgobj_t *obj)
{
CANMSG("sja1000_remote_request not implemented\n");
return -ENOSYS;
}
-int sja1000_extended_mask(struct chip_t *chip, unsigned long code,
+int sja1000_extended_mask(struct canchip_t *chip, unsigned long code,
unsigned long mask)
{
CANMSG("sja1000_extended_mask not implemented\n");
return -ENOSYS;
}
-int sja1000_clear_objects(struct chip_t *chip)
+int sja1000_clear_objects(struct canchip_t *chip)
{
CANMSG("sja1000_clear_objects not implemented\n");
return -ENOSYS;
}
-int sja1000_config_irqs(struct chip_t *chip, short irqs)
+int sja1000_config_irqs(struct canchip_t *chip, short irqs)
{
CANMSG("sja1000_config_irqs not implemented\n");
return -ENOSYS;
}
-int sja1000_irq_handler(int irq, struct chip_t *chip)
+int sja1000_irq_handler(int irq, struct canchip_t *chip)
{
unsigned irq_register;
struct msgobj_t *obj=chip->msgobj[0];
return CANCHIP_IRQ_HANDLED;
}
-void sja1000_irq_read_handler(struct chip_t *chip, struct msgobj_t *obj)
+void sja1000_irq_read_handler(struct canchip_t *chip, struct msgobj_t *obj)
{
int i=0, id=0, len;
} while(can_read_reg(chip, SJASR) & sjaSR_RBS);
}
-void sja1000_irq_write_handler(struct chip_t *chip, struct msgobj_t *obj)
+void sja1000_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
{
int cmd;
* Return Value: negative value reports error.
* File: src/sja1000.c
*/
-int sja1000_wakeup_tx(struct chip_t *chip, struct msgobj_t *obj)
+int sja1000_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
{
can_preempt_disable();
return 0;
}
-int sja1000_fill_chipspecops(struct chip_t *chip)
+int sja1000_fill_chipspecops(struct canchip_t *chip)
{
chip->chip_type="sja1000";
chip->max_objects=1;
* sja1000p_enable_configuration - enable chip configuration mode
* @chip: pointer to chip state structure
*/
-int sja1000p_enable_configuration(struct chip_t *chip)
+int sja1000p_enable_configuration(struct canchip_t *chip)
{
int i=0;
enum sja1000_PeliCAN_MOD flags;
* sja1000p_disable_configuration - disable chip configuration mode
* @chip: pointer to chip state structure
*/
-int sja1000p_disable_configuration(struct chip_t *chip)
+int sja1000p_disable_configuration(struct canchip_t *chip)
{
int i=0;
enum sja1000_PeliCAN_MOD flags;
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
-int sja1000p_chip_config(struct chip_t *chip)
+int sja1000p_chip_config(struct canchip_t *chip)
{
int i;
unsigned char n, r;
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
-int sja1000p_extended_mask(struct chip_t *chip, unsigned long code, unsigned long mask)
+int sja1000p_extended_mask(struct canchip_t *chip, unsigned long code, unsigned long mask)
{
int i;
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
-int sja1000p_baud_rate(struct chip_t *chip, int rate, int clock, int sjw,
+int sja1000p_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
int sampl_pt, int flags)
{
int best_error = 1000000000, error;
*
* File: src/sja1000p.c
*/
-void sja1000p_read(struct chip_t *chip, struct msgobj_t *obj) {
+void sja1000p_read(struct canchip_t *chip, struct msgobj_t *obj) {
int i, flags, len, datastart;
do {
flags = can_read_reg(chip,SJAFRM);
* Positive value indicates immediate reception of message.
* File: src/sja1000p.c
*/
-int sja1000p_pre_read_config(struct chip_t *chip, struct msgobj_t *obj)
+int sja1000p_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj)
{
int status;
status=can_read_reg(chip,SJASR);
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
-int sja1000p_pre_write_config(struct chip_t *chip, struct msgobj_t *obj,
+int sja1000p_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
int i=0;
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
-int sja1000p_send_msg(struct chip_t *chip, struct msgobj_t *obj,
+int sja1000p_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
can_write_reg(chip, sjaCMR_TR, SJACMR);
* Zero value indicates finishing of all issued transmission requests.
* File: src/sja1000p.c
*/
-int sja1000p_check_tx_stat(struct chip_t *chip)
+int sja1000p_check_tx_stat(struct canchip_t *chip)
{
if (can_read_reg(chip,SJASR) & sjaSR_TCS)
return 0;
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
-int sja1000p_set_btregs(struct chip_t *chip, unsigned short btr0,
+int sja1000p_set_btregs(struct canchip_t *chip, unsigned short btr0,
unsigned short btr1)
{
if (sja1000p_enable_configuration(chip))
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
-int sja1000p_start_chip(struct chip_t *chip)
+int sja1000p_start_chip(struct canchip_t *chip)
{
enum sja1000_PeliCAN_MOD flags;
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
-int sja1000p_stop_chip(struct chip_t *chip)
+int sja1000p_stop_chip(struct canchip_t *chip)
{
enum sja1000_PeliCAN_MOD flags;
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
-int sja1000p_remote_request(struct chip_t *chip, struct msgobj_t *obj)
+int sja1000p_remote_request(struct canchip_t *chip, struct msgobj_t *obj)
{
CANMSG("sja1000p_remote_request not implemented\n");
return -ENOSYS;
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
-int sja1000p_standard_mask(struct chip_t *chip, unsigned short code,
+int sja1000p_standard_mask(struct canchip_t *chip, unsigned short code,
unsigned short mask)
{
CANMSG("sja1000p_standard_mask not implemented\n");
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
-int sja1000p_clear_objects(struct chip_t *chip)
+int sja1000p_clear_objects(struct canchip_t *chip)
{
CANMSG("sja1000p_clear_objects not implemented\n");
return -ENOSYS;
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
-int sja1000p_config_irqs(struct chip_t *chip, short irqs)
+int sja1000p_config_irqs(struct canchip_t *chip, short irqs)
{
CANMSG("sja1000p_config_irqs not implemented\n");
return -ENOSYS;
* sja1000p_irq_write_handler() for transmit events.
* File: src/sja1000p.c
*/
-void sja1000p_irq_write_handler(struct chip_t *chip, struct msgobj_t *obj)
+void sja1000p_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
{
int cmd;
* @irq: interrupt vector number, this value is system specific
* @dev_id: driver private pointer registered at time of request_irq() call.
* The CAN driver uses this pointer to store relationship of interrupt
- * to chip state structure - @struct chip_t
+ * to chip state structure - @struct canchip_t
* @regs: system dependent value pointing to registers stored in exception frame
*
* Interrupt handler is activated when state of CAN controller chip changes,
* message queues.
* File: src/sja1000p.c
*/
-int sja1000p_irq_handler(int irq, struct chip_t *chip)
+int sja1000p_irq_handler(int irq, struct canchip_t *chip)
{
int irq_register, status, error_code;
struct msgobj_t *obj=chip->msgobj[0];
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
-int sja1000p_wakeup_tx(struct chip_t *chip, struct msgobj_t *obj)
+int sja1000p_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
{
can_preempt_disable();
*
* Return Value: returns negative number in the case of fail
*/
-int sja1000p_fill_chipspecops(struct chip_t *chip)
+int sja1000p_fill_chipspecops(struct canchip_t *chip)
{
chip->chip_type="sja1000p";
chip->max_objects=1;
return 0;
}
-int smartcan_init_obj_data(struct chip_t *chip, int objnr)
+int smartcan_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=(objnr+1)*0x10;
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
*/
-int ssv_init_obj_data(struct chip_t *chip, int objnr)
+int ssv_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=
* Return Value: The function always returns zero
* File: src/template.c
*/
-int template_init_obj_data(struct chip_t *chip, int objnr)
+int template_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr+(objnr+1)*0x10;
/* * * unican Chip Functionality * * */
-int unican_enable_configuration(struct chip_t *chip)
+int unican_enable_configuration(struct canchip_t *chip)
{
return 0;
}
-int unican_disable_configuration(struct chip_t *chip)
+int unican_disable_configuration(struct canchip_t *chip)
{
return 0;
}
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_chip_config(struct chip_t *chip)
+int unican_chip_config(struct canchip_t *chip)
{
int ret;
sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_extended_mask(struct chip_t *chip, unsigned long code, unsigned long mask)
+int unican_extended_mask(struct canchip_t *chip, unsigned long code, unsigned long mask)
{
return 0;
}
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_baud_rate(struct chip_t *chip, int rate, int clock, int sjw,
+int unican_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
int sampl_pt, int flags)
{
int ret;
*
* File: src/unican.c
*/
-void unican_read(struct chip_t *chip, struct msgobj_t *obj) {
+void unican_read(struct canchip_t *chip, struct msgobj_t *obj) {
sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
__u16 *ptr16;
__u16 u;
* Positive value indicates immediate reception of message.
* File: src/unican.c
*/
-int unican_pre_read_config(struct chip_t *chip, struct msgobj_t *obj)
+int unican_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj)
{
return 0;
}
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_pre_write_config(struct chip_t *chip, struct msgobj_t *obj,
+int unican_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
return 0;
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_send_msg(struct chip_t *chip, struct msgobj_t *obj,
+int unican_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
return 0;
* Zero value indicates finishing of all issued transmission requests.
* File: src/unican.c
*/
-int unican_check_tx_stat(struct chip_t *chip)
+int unican_check_tx_stat(struct canchip_t *chip)
{
return 0;
}
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_set_btregs(struct chip_t *chip, unsigned short btr0,
+int unican_set_btregs(struct canchip_t *chip, unsigned short btr0,
unsigned short btr1)
{
int ret;
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_start_chip(struct chip_t *chip)
+int unican_start_chip(struct canchip_t *chip)
{
return 0;
}
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_stop_chip(struct chip_t *chip)
+int unican_stop_chip(struct canchip_t *chip)
{
return 0;
}
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_remote_request(struct chip_t *chip, struct msgobj_t *obj)
+int unican_remote_request(struct canchip_t *chip, struct msgobj_t *obj)
{
CANMSG("unican_remote_request not implemented\n");
return -ENOSYS;
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_standard_mask(struct chip_t *chip, unsigned short code,
+int unican_standard_mask(struct canchip_t *chip, unsigned short code,
unsigned short mask)
{
CANMSG("unican_standard_mask not implemented\n");
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_clear_objects(struct chip_t *chip)
+int unican_clear_objects(struct canchip_t *chip)
{
CANMSG("unican_clear_objects not implemented\n");
return -ENOSYS;
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_config_irqs(struct chip_t *chip, short irqs)
+int unican_config_irqs(struct canchip_t *chip, short irqs)
{
CANMSG("unican_config_irqs not implemented\n");
* unican_irq_write_handler() for transmit events.
* File: src/unican.c
*/
-void unican_irq_write_handler(struct chip_t *chip, struct msgobj_t *obj)
+void unican_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
{
int cmd;
sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
}
-void unican_irq_sync_activities(struct chip_t *chip, struct msgobj_t *obj)
+void unican_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj)
{
while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)) {
* @irq: interrupt vector number, this value is system specific
* @dev_id: driver private pointer registered at time of request_irq() call.
* The CAN driver uses this pointer to store relationship of interrupt
- * to chip state structure - @struct chip_t
+ * to chip state structure - @struct canchip_t
* @regs: system dependent value pointing to registers stored in exception frame
*
* Interrupt handler is activated when state of CAN controller chip changes,
* message queues.
* File: src/unican.c
*/
-int unican_irq_handler(int irq, struct chip_t *chip)
+int unican_irq_handler(int irq, struct canchip_t *chip)
{
sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
struct msgobj_t *obj=chip->msgobj[0];
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_wakeup_tx(struct chip_t *chip, struct msgobj_t *obj)
+int unican_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
{
can_preempt_disable();
{
int ret;
int i;
- struct chip_t *chip = candev->chip[0];
+ struct canchip_t *chip = candev->chip[0];
sCAN_CARD *chipext;
*/
int unican_init_chip_data(struct candevice_t *candev, int chipnr)
{
- struct chip_t *chip = candev->chip[chipnr];
+ struct canchip_t *chip = candev->chip[chipnr];
chip->chip_type = "unican";
chip->chip_base_addr = 0;
chip->clock = 10000000;
* Return Value: The function always returns zero
* File: src/unican.c
*/
-int unican_init_obj_data(struct chip_t *chip, int objnr)
+int unican_init_obj_data(struct canchip_t *chip, int objnr)
{
struct msgobj_t *obj=chip->msgobj[objnr];
obj->obj_base_addr=chip->chip_base_addr;
int unican_vme_reset(struct candevice_t *candev)
{
int ret;
- struct chip_t *chip = candev->chip[0];
+ struct canchip_t *chip = candev->chip[0];
ret = unican_reset(candev);
*/
int unican_vme_init_chip_data(struct candevice_t *candev, int chipnr)
{
- struct chip_t *chip = candev->chip[chipnr];
+ struct canchip_t *chip = candev->chip[chipnr];
unican_init_chip_data(candev, chipnr);
/* * * Virtual Chip Functionality * * */
-int virtual_enable_configuration(struct chip_t *chip)
+int virtual_enable_configuration(struct canchip_t *chip)
{
return 0;
}
-int virtual_disable_configuration(struct chip_t *chip)
+int virtual_disable_configuration(struct canchip_t *chip)
{
return 0;
}
* Return Value: negative value reports error.
* File: src/virtual.c
*/
-int virtual_chip_config(struct chip_t *chip)
+int virtual_chip_config(struct canchip_t *chip)
{
return 0;
}
* Return Value: negative value reports error.
* File: src/virtual.c
*/
-int virtual_extended_mask(struct chip_t *chip, unsigned long code, unsigned long mask)
+int virtual_extended_mask(struct canchip_t *chip, unsigned long code, unsigned long mask)
{
return 0;
}
* Return Value: negative value reports error.
* File: src/virtual.c
*/
-int virtual_baud_rate(struct chip_t *chip, int rate, int clock, int sjw,
+int virtual_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
int sampl_pt, int flags)
{
return 0;
*
* File: src/virtual.c
*/
-void virtual_read(struct chip_t *chip, struct msgobj_t *obj) {
+void virtual_read(struct canchip_t *chip, struct msgobj_t *obj) {
}
* Positive value indicates immediate reception of message.
* File: src/virtual.c
*/
-int virtual_pre_read_config(struct chip_t *chip, struct msgobj_t *obj)
+int virtual_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj)
{
return 0;
}
* Return Value: negative value reports error.
* File: src/virtual.c
*/
-int virtual_pre_write_config(struct chip_t *chip, struct msgobj_t *obj,
+int virtual_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
return 0;
* Return Value: negative value reports error.
* File: src/virtual.c
*/
-int virtual_send_msg(struct chip_t *chip, struct msgobj_t *obj,
+int virtual_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
return 0;
* Zero value indicates finishing of all issued transmission requests.
* File: src/virtual.c
*/
-int virtual_check_tx_stat(struct chip_t *chip)
+int virtual_check_tx_stat(struct canchip_t *chip)
{
return 0;
}
* Return Value: negative value reports error.
* File: src/virtual.c
*/
-int virtual_set_btregs(struct chip_t *chip, unsigned short btr0,
+int virtual_set_btregs(struct canchip_t *chip, unsigned short btr0,
unsigned short btr1)
{
return 0;
* Return Value: negative value reports error.
* File: src/virtual.c
*/
-int virtual_start_chip(struct chip_t *chip)
+int virtual_start_chip(struct canchip_t *chip)
{
return 0;
}
* Return Value: negative value reports error.
* File: src/virtual.c
*/
-int virtual_stop_chip(struct chip_t *chip)
+int virtual_stop_chip(struct canchip_t *chip)
{
return 0;
}
* Return Value: negative value reports error.
* File: src/virtual.c
*/
-int virtual_remote_request(struct chip_t *chip, struct msgobj_t *obj)
+int virtual_remote_request(struct canchip_t *chip, struct msgobj_t *obj)
{
CANMSG("virtual_remote_request not implemented\n");
return -ENOSYS;
* Return Value: negative value reports error.
* File: src/virtual.c
*/
-int virtual_standard_mask(struct chip_t *chip, unsigned short code,
+int virtual_standard_mask(struct canchip_t *chip, unsigned short code,
unsigned short mask)
{
CANMSG("virtual_standard_mask not implemented\n");
* Return Value: negative value reports error.
* File: src/virtual.c
*/
-int virtual_clear_objects(struct chip_t *chip)
+int virtual_clear_objects(struct canchip_t *chip)
{
CANMSG("virtual_clear_objects not implemented\n");
return -ENOSYS;
* Return Value: negative value reports error.
* File: src/virtual.c
*/
-int virtual_config_irqs(struct chip_t *chip, short irqs)
+int virtual_config_irqs(struct canchip_t *chip, short irqs)
{
CANMSG("virtual_config_irqs not implemented\n");
return -ENOSYS;
* virtual_irq_write_handler() for transmit events.
* File: src/virtual.c
*/
-void virtual_irq_write_handler(struct chip_t *chip, struct msgobj_t *obj)
+void virtual_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
{
}
* @irq: interrupt vector number, this value is system specific
* @dev_id: driver private pointer registered at time of request_irq() call.
* The CAN driver uses this pointer to store relationship of interrupt
- * to chip state structure - @struct chip_t
+ * to chip state structure - @struct canchip_t
* @regs: system dependent value pointing to registers stored in exception frame
*
* Interrupt handler is activated when state of CAN controller chip changes,
* message queues.
* File: src/virtual.c
*/
-int virtual_irq_handler(int irq, struct chip_t *chip)
+int virtual_irq_handler(int irq, struct canchip_t *chip)
{
return CANCHIP_IRQ_HANDLED;
}
* Return Value: negative value reports error.
* File: src/virtual.c
*/
-int virtual_wakeup_tx(struct chip_t *chip, struct msgobj_t *obj)
+int virtual_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
{
/* can_msgobj_set_fl(obj,TX_REQUEST); */
*/
int virtual_init_chip_data(struct candevice_t *candev, int chipnr)
{
- struct chip_t *chip = candev->chip[chipnr];
+ struct canchip_t *chip = candev->chip[chipnr];
chip->chip_type = CHIP_TYPE;
chip->chip_base_addr = 0;
chip->clock = 10000000;
* Return Value: The function always returns zero
* File: src/virtual.c
*/
-int virtual_init_obj_data(struct chip_t *chip, int objnr)
+int virtual_init_obj_data(struct canchip_t *chip, int objnr)
{
struct msgobj_t *obj=chip->msgobj[objnr];
obj->obj_base_addr=chip->chip_base_addr;
projects / lincan.git / commitdiff