Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
87 files changed:
int aim104_request_io(struct candevice_t *candev);
int aim104_release_io(struct candevice_t *candev);
int aim104_request_io(struct candevice_t *candev);
int aim104_release_io(struct candevice_t *candev);
-int aim104_reset(struct candevice_t *candev);
+int aim104_reset(struct candevice_t *candev);
int aim104_init_hw_data(struct candevice_t *candev);
int aim104_init_chip_data(struct candevice_t *candev, int chipnr);
int aim104_init_obj_data(struct canchip_t *chip, int objnr);
int aim104_init_hw_data(struct candevice_t *candev);
int aim104_init_chip_data(struct candevice_t *candev, int chipnr);
int aim104_init_obj_data(struct canchip_t *chip, int objnr);
/* Publication of enhanced or derived LinCAN files is required although. */
/**************************************************************************/
/* Publication of enhanced or derived LinCAN files is required although. */
/**************************************************************************/
* optimized inline version, may it be, that it can be too fast for the chip
*/
extern inline void c_can_write_reg_w(const struct canchip_t *pchip, u16 data, unsigned reg)
* optimized inline version, may it be, that it can be too fast for the chip
*/
extern inline void c_can_write_reg_w(const struct canchip_t *pchip, u16 data, unsigned reg)
typedef unsigned short channel_t;
/**
typedef unsigned short channel_t;
/**
- * struct can_baudparams_t - datatype for calling CONF_BAUDPARAMS IOCTL
+ * struct can_baudparams_t - datatype for calling CONF_BAUDPARAMS IOCTL
* @flags: reserved for additional flags for chip configuration, should be written -1 or 0
* @baudrate: baud rate in Hz
* @sjw: synchronization jump width (0-3) prescaled clock cycles
* @sampl_pt: sample point in % (0-100) sets (TSEG1+1)/(TSEG1+TSEG2+2) ratio
* @flags: reserved for additional flags for chip configuration, should be written -1 or 0
* @baudrate: baud rate in Hz
* @sjw: synchronization jump width (0-3) prescaled clock cycles
* @sampl_pt: sample point in % (0-100) sets (TSEG1+1)/(TSEG1+TSEG2+2) ratio
* The structure is used to configure new set of parameters into CAN controller chip.
* If default value of some field should be preserved, fill field by value -1.
*/
* The structure is used to configure new set of parameters into CAN controller chip.
* If default value of some field should be preserved, fill field by value -1.
*/
#include "./can_sysdep.h"
/**
#include "./can_sysdep.h"
/**
- * struct canque_slot_t - one CAN message slot in the CAN FIFO queue
+ * struct canque_slot_t - one CAN message slot in the CAN FIFO queue
* @next: pointer to the next/younger slot
* @slot_flags: space for flags and optional command describing action
* associated with slot data
* @next: pointer to the next/younger slot
* @slot_flags: space for flags and optional command describing action
* associated with slot data
* @fifo_flags: this field holds global flags describing state of the FIFO.
* %CAN_FIFOF_ERROR is set when some error condition occurs.
* %CAN_FIFOF_ERR2BLOCK defines, that error should lead to the FIFO block state.
* @fifo_flags: this field holds global flags describing state of the FIFO.
* %CAN_FIFOF_ERROR is set when some error condition occurs.
* %CAN_FIFOF_ERR2BLOCK defines, that error should lead to the FIFO block state.
- * %CAN_FIFOF_BLOCK state blocks insertion of the next messages.
- * %CAN_FIFOF_OVERRUN attempt to acquire new slot, when FIFO is full.
- * %CAN_FIFOF_FULL indicates FIFO full state.
+ * %CAN_FIFOF_BLOCK state blocks insertion of the next messages.
+ * %CAN_FIFOF_OVERRUN attempt to acquire new slot, when FIFO is full.
+ * %CAN_FIFOF_FULL indicates FIFO full state.
* %CAN_FIFOF_EMPTY indicates no allocated slot in the FIFO.
* %CAN_FIFOF_DEAD condition indication. Used when FIFO is beeing destroyed.
* @error_code: futher description of error condition
* %CAN_FIFOF_EMPTY indicates no allocated slot in the FIFO.
* %CAN_FIFOF_DEAD condition indication. Used when FIFO is beeing destroyed.
* @error_code: futher description of error condition
* @fifo_lock: the lock to ensure atomicity of slot manipulation operations.
* @slotsnr: number of allocated slots
*
* @fifo_lock: the lock to ensure atomicity of slot manipulation operations.
* @slotsnr: number of allocated slots
*
- * This structure represents CAN FIFO queue. It is implemented as
+ * This structure represents CAN FIFO queue. It is implemented as
* a single linked list of slots prepared for processing. The empty slots
* are stored in single linked list (@flist).
*/
* a single linked list of slots prepared for processing. The empty slots
* are stored in single linked list (@flist).
*/
- * canque_fifo_get_inslot - allocate slot for the input of one CAN message
+ * canque_fifo_get_inslot - allocate slot for the input of one CAN message
* @fifo: pointer to the FIFO structure
* @slotp: pointer to location to store pointer to the allocated slot.
* @cmd: optional command associated with allocated slot.
* @fifo: pointer to the FIFO structure
* @slotp: pointer to location to store pointer to the allocated slot.
* @cmd: optional command associated with allocated slot.
* @pending_inops: bitmask of pending operations
* @pending_outops: bitmask of pending operations
*
* @pending_inops: bitmask of pending operations
* @pending_outops: bitmask of pending operations
*
- * This structure represents one direction connection from messages source
+ * This structure represents one direction connection from messages source
* (@inends) to message consumer (@outends) fifo ends hub. The edge contains
* &struct canque_fifo_t for message fifo implementation.
*/
* (@inends) to message consumer (@outends) fifo ends hub. The edge contains
* &struct canque_fifo_t for message fifo implementation.
*/
* struct canque_ends_t - CAN message delivery subsystem graph vertex (FIFO ends)
* @ends_flags: this field holds flags describing state of the ENDS structure.
* @active: the array of the lists of active edges directed to the ends structure
* struct canque_ends_t - CAN message delivery subsystem graph vertex (FIFO ends)
* @ends_flags: this field holds flags describing state of the ENDS structure.
* @active: the array of the lists of active edges directed to the ends structure
- * with ready messages. The array is indexed by the edges priorities.
+ * with ready messages. The array is indexed by the edges priorities.
* @idle: the list of the edges directed to the ends structure with empty FIFOs.
* @inlist: the list of outgoing edges input sides.
* @outlist: the list of all incoming edges output sides. Each of there edges
* @idle: the list of the edges directed to the ends structure with empty FIFOs.
* @inlist: the list of outgoing edges input sides.
* @outlist: the list of all incoming edges output sides. Each of there edges
* @ends_lock: the lock synchronizing operations between threads accessing
* same ends structure.
* @notify: pointer to notify procedure. The next state changes are notified.
* @ends_lock: the lock synchronizing operations between threads accessing
* same ends structure.
* @notify: pointer to notify procedure. The next state changes are notified.
- * %CANQUEUE_NOTIFY_EMPTY (out->in call) - all slots are processed by FIFO out side.
+ * %CANQUEUE_NOTIFY_EMPTY (out->in call) - all slots are processed by FIFO out side.
* %CANQUEUE_NOTIFY_SPACE (out->in call) - full state negated => there is space for new message.
* %CANQUEUE_NOTIFY_PROC (in->out call) - empty state negated => out side is requested to process slots.
* %CANQUEUE_NOTIFY_NOUSR (both) - notify, that the last user has released the edge usage
* %CANQUEUE_NOTIFY_SPACE (out->in call) - full state negated => there is space for new message.
* %CANQUEUE_NOTIFY_PROC (in->out call) - empty state negated => out side is requested to process slots.
* %CANQUEUE_NOTIFY_NOUSR (both) - notify, that the last user has released the edge usage
int canque_get_inslot(struct canque_ends_t *qends,
struct canque_edge_t **qedgep, struct canque_slot_t **slotp, int cmd);
int canque_get_inslot(struct canque_ends_t *qends,
struct canque_edge_t **qedgep, struct canque_slot_t **slotp, int cmd);
int canque_get_inslot4id(struct canque_ends_t *qends,
struct canque_edge_t **qedgep, struct canque_slot_t **slotp,
int cmd, unsigned long id, int prio);
int canque_get_inslot4id(struct canque_ends_t *qends,
struct canque_edge_t **qedgep, struct canque_slot_t **slotp,
int cmd, unsigned long id, int prio);
int canque_put_inslot(struct canque_ends_t *qends,
struct canque_edge_t *qedge, struct canque_slot_t *slot);
int canque_put_inslot(struct canque_ends_t *qends,
struct canque_edge_t *qedge, struct canque_slot_t *slot);
int canque_set_filt(struct canque_edge_t *qedge,
unsigned long filtid, unsigned long filtmask, int flags);
int canque_set_filt(struct canque_edge_t *qedge,
unsigned long filtid, unsigned long filtmask, int flags);
int canque_flush(struct canque_edge_t *qedge);
int canqueue_disconnect_edge(struct canque_edge_t *qedge);
int canque_flush(struct canque_edge_t *qedge);
int canqueue_disconnect_edge(struct canque_edge_t *qedge);
can_spin_lock_irqsave(&outends->ends_lock, flags);
if(outends!=inends) can_spin_lock(&inends->ends_lock);
}
can_spin_lock_irqsave(&outends->ends_lock, flags);
if(outends!=inends) can_spin_lock(&inends->ends_lock);
}
int dead_fl=0;
struct canque_ends_t *inends=edge->inends;
struct canque_ends_t *outends=edge->outends;
int dead_fl=0;
struct canque_ends_t *inends=edge->inends;
struct canque_ends_t *outends=edge->outends;
flags=canque_edge_lock_both_ends(inends, outends);
if(atomic_dec_and_test(&edge->edge_used)) {
dead_fl=!canque_fifo_test_and_set_fl(&edge->fifo,DEAD);
flags=canque_edge_lock_both_ends(inends, outends);
if(atomic_dec_and_test(&edge->edge_used)) {
dead_fl=!canque_fifo_test_and_set_fl(&edge->fifo,DEAD);
- /* Because of former evolution of edge references
+ /* Because of former evolution of edge references
management notify of CANQUEUE_NOTIFY_NOUSR could
be moved to canque_edge_do_dead :-) */
}
management notify of CANQUEUE_NOTIFY_NOUSR could
be moved to canque_edge_do_dead :-) */
}
void canque_edge_decref(struct canque_edge_t *edge)
{
int x, y;
void canque_edge_decref(struct canque_edge_t *edge)
{
int x, y;
x = atomic_read(&edge->edge_used);
do{
if(x<=1)
x = atomic_read(&edge->edge_used);
do{
if(x<=1)
can_spin_irqflags_t flags;
struct list_head *entry;
struct canque_edge_t *edge;
can_spin_irqflags_t flags;
struct list_head *entry;
struct canque_edge_t *edge;
can_spin_lock_irqsave(&qends->ends_lock, flags);
entry=qends->inlist.next;
skip_dead:
can_spin_lock_irqsave(&qends->ends_lock, flags);
entry=qends->inlist.next;
skip_dead:
can_spin_irqflags_t flags;
struct list_head *entry;
struct canque_edge_t *next;
can_spin_irqflags_t flags;
struct list_head *entry;
struct canque_edge_t *next;
can_spin_lock_irqsave(&qends->ends_lock, flags);
entry=edge->inpeers.next;
skip_dead:
can_spin_lock_irqsave(&qends->ends_lock, flags);
entry=edge->inpeers.next;
skip_dead:
can_spin_irqflags_t flags;
struct list_head *entry;
struct canque_edge_t *edge;
can_spin_irqflags_t flags;
struct list_head *entry;
struct canque_edge_t *edge;
can_spin_lock_irqsave(&qends->ends_lock, flags);
entry=qends->outlist.next;
skip_dead:
can_spin_lock_irqsave(&qends->ends_lock, flags);
entry=qends->outlist.next;
skip_dead:
can_spin_irqflags_t flags;
struct list_head *entry;
struct canque_edge_t *next;
can_spin_irqflags_t flags;
struct list_head *entry;
struct canque_edge_t *next;
can_spin_lock_irqsave(&qends->ends_lock, flags);
entry=edge->outpeers.next;
skip_dead:
can_spin_lock_irqsave(&qends->ends_lock, flags);
entry=edge->outpeers.next;
skip_dead:
* CAN_MSG_VERSION_2 enables new canmsg_t layout compatible with
* can4linux project from http://www.port.de/
* CAN_MSG_VERSION_2 enables new canmsg_t layout compatible with
* can4linux project from http://www.port.de/
*/
#define CAN_MSG_VERSION_2
*/
#define CAN_MSG_VERSION_2
* struct canmsg_t - structure representing CAN message
* @flags: message flags
* %MSG_RTR .. message is Remote Transmission Request,
* struct canmsg_t - structure representing CAN message
* @flags: message flags
* %MSG_RTR .. message is Remote Transmission Request,
- * %MSG_EXT .. message with extended ID,
+ * %MSG_EXT .. message with extended ID,
* %MSG_OVR .. indication of queue overflow condition,
* %MSG_LOCAL .. message originates from this node.
* @cob: communication object number (not used)
* %MSG_OVR .. indication of queue overflow condition,
* %MSG_LOCAL .. message originates from this node.
* @cob: communication object number (not used)
* struct canfilt_t - structure for acceptance filter setup
* @flags: message flags
* %MSG_RTR .. message is Remote Transmission Request,
* struct canfilt_t - structure for acceptance filter setup
* @flags: message flags
* %MSG_RTR .. message is Remote Transmission Request,
- * %MSG_EXT .. message with extended ID,
+ * %MSG_EXT .. message with extended ID,
* %MSG_OVR .. indication of queue overflow condition,
* %MSG_LOCAL .. message originates from this node.
* there are corresponding mask bits
* %MSG_OVR .. indication of queue overflow condition,
* %MSG_LOCAL .. message originates from this node.
* there are corresponding mask bits
int cc104_request_io(struct candevice_t *candev);
int cc104_release_io(struct candevice_t *candev);
int cc104_request_io(struct candevice_t *candev);
int cc104_release_io(struct candevice_t *candev);
-int cc104_reset(struct candevice_t *candev);
+int cc104_reset(struct candevice_t *candev);
int cc104_init_hw_data(struct candevice_t *candev);
int cc104_init_chip_data(struct candevice_t *candev, int chipnr);
int cc104_init_obj_data(struct canchip_t *chip, int objnr);
int cc104_init_hw_data(struct candevice_t *candev);
int cc104_init_chip_data(struct candevice_t *candev, int chipnr);
int cc104_init_obj_data(struct canchip_t *chip, int objnr);
int eb8245_request_io(struct candevice_t *candev);
int eb8245_release_io(struct candevice_t *candev);
int eb8245_request_io(struct candevice_t *candev);
int eb8245_release_io(struct candevice_t *candev);
-int eb8245_reset(struct candevice_t *candev);
+int eb8245_reset(struct candevice_t *candev);
int eb8245_init_hw_data(struct candevice_t *candev);
int eb8245_init_chip_data(struct candevice_t *candev, int chipnr);
int eb8245_init_obj_data(struct canchip_t *chip, int objnr);
int eb8245_init_hw_data(struct candevice_t *candev);
int eb8245_init_chip_data(struct candevice_t *candev, int chipnr);
int eb8245_init_obj_data(struct canchip_t *chip, int objnr);
int gensja1000io_request_io(struct candevice_t *candev);
int gensja1000io_release_io(struct candevice_t *candev);
int gensja1000io_request_io(struct candevice_t *candev);
int gensja1000io_release_io(struct candevice_t *candev);
-int gensja1000io_reset(struct candevice_t *candev);
+int gensja1000io_reset(struct candevice_t *candev);
int gensja1000io_init_hw_data(struct candevice_t *candev);
int gensja1000io_init_chip_data(struct candevice_t *candev, int chipnr);
int gensja1000io_init_obj_data(struct canchip_t *chip, int objnr);
int gensja1000io_init_hw_data(struct candevice_t *candev);
int gensja1000io_init_chip_data(struct candevice_t *candev, int chipnr);
int gensja1000io_init_obj_data(struct canchip_t *chip, int objnr);
int gensja1000mm_request_io(struct candevice_t *candev);
int gensja1000mm_release_io(struct candevice_t *candev);
int gensja1000mm_request_io(struct candevice_t *candev);
int gensja1000mm_release_io(struct candevice_t *candev);
-int gensja1000mm_reset(struct candevice_t *candev);
+int gensja1000mm_reset(struct candevice_t *candev);
int gensja1000mm_init_hw_data(struct candevice_t *candev);
int gensja1000mm_init_chip_data(struct candevice_t *candev, int chipnr);
int gensja1000mm_init_obj_data(struct canchip_t *chip, int objnr);
int gensja1000mm_init_hw_data(struct candevice_t *candev);
int gensja1000mm_init_chip_data(struct candevice_t *candev, int chipnr);
int gensja1000mm_init_obj_data(struct canchip_t *chip, int objnr);
#define HCAN2_MB_CTRL1 0x00000002 /* Control 1 */
#define HCAN2_MB_CTRL2 0x00000004 /* Control 2 */
#define HCAN2_MB_TSTP 0x00000006 /* Time stamp */
#define HCAN2_MB_CTRL1 0x00000002 /* Control 1 */
#define HCAN2_MB_CTRL2 0x00000004 /* Control 2 */
#define HCAN2_MB_TSTP 0x00000006 /* Time stamp */
-#define HCAN2_MB_DATA0 0x00000009 /* Data 0 */
+#define HCAN2_MB_DATA0 0x00000009 /* Data 0 */
#define HCAN2_MB_DATA1 0x00000008 /* Data 1 */
#define HCAN2_MB_DATA2 0x0000000b /* Data 2 */
#define HCAN2_MB_DATA3 0x0000000a /* Data 3 */
#define HCAN2_MB_DATA1 0x00000008 /* Data 1 */
#define HCAN2_MB_DATA2 0x0000000b /* Data 2 */
#define HCAN2_MB_DATA3 0x0000000a /* Data 3 */
int i82527_enable_configuration(struct canchip_t *chip);
int i82527_disable_configuration(struct canchip_t *chip);
int i82527_chip_config(struct canchip_t *chip);
int i82527_enable_configuration(struct canchip_t *chip);
int i82527_disable_configuration(struct canchip_t *chip);
int i82527_chip_config(struct canchip_t *chip);
-int i82527_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
+int i82527_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
int sampl_pt, int flags);
int sampl_pt, int flags);
-int i82527_standard_mask(struct canchip_t *chip, unsigned short code,
+int i82527_standard_mask(struct canchip_t *chip, unsigned short code,
-int i82527_extended_mask(struct canchip_t *chip, unsigned long code,
+int i82527_extended_mask(struct canchip_t *chip, unsigned long code,
-int i82527_message15_mask(struct canchip_t *chip, unsigned long code,
+int i82527_message15_mask(struct canchip_t *chip, unsigned long code,
unsigned long mask);
int i82527_clear_objects(struct canchip_t *chip);
int i82527_config_irqs(struct canchip_t *chip, short irqs);
unsigned long mask);
int i82527_clear_objects(struct canchip_t *chip);
int i82527_config_irqs(struct canchip_t *chip, short irqs);
int i82527_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg);
int i82527_remote_request(struct canchip_t *chip, struct msgobj_t *obj);
int i82527_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg);
int i82527_remote_request(struct canchip_t *chip, struct msgobj_t *obj);
-int i82527_set_btregs(struct canchip_t *chip, unsigned short btr0,
+int i82527_set_btregs(struct canchip_t *chip, unsigned short btr0,
unsigned short btr1);
int i82527_start_chip(struct canchip_t *chip);
int i82527_stop_chip(struct canchip_t *chip);
unsigned short btr1);
int i82527_start_chip(struct canchip_t *chip);
int i82527_stop_chip(struct canchip_t *chip);
int m437_request_io(struct candevice_t *candev);
int m437_release_io(struct candevice_t *candev);
int m437_request_io(struct candevice_t *candev);
int m437_release_io(struct candevice_t *candev);
-int m437_reset(struct candevice_t *candev);
+int m437_reset(struct candevice_t *candev);
int m437_init_hw_data(struct candevice_t *candev);
int m437_init_chip_data(struct candevice_t *candev, int chipnr);
int m437_init_obj_data(struct canchip_t *chip, int objnr);
int m437_init_hw_data(struct candevice_t *candev);
int m437_init_chip_data(struct candevice_t *candev, int chipnr);
int m437_init_obj_data(struct canchip_t *chip, int objnr);
int mpc5200_request_io(struct candevice_t *candev);
int mpc5200_release_io(struct candevice_t *candev);
int mpc5200_request_io(struct candevice_t *candev);
int mpc5200_release_io(struct candevice_t *candev);
-int mpc5200_reset(struct candevice_t *candev);
+int mpc5200_reset(struct candevice_t *candev);
int mpc5200_init_hw_data(struct candevice_t *candev);
int mpc5200_init_chip_data(struct candevice_t *candev, int chipnr);
int mpc5200_init_obj_data(struct canchip_t *chip, int objnr);
int mpc5200_init_hw_data(struct candevice_t *candev);
int mpc5200_init_chip_data(struct candevice_t *candev, int chipnr);
int mpc5200_init_obj_data(struct canchip_t *chip, int objnr);
/* standard LinCAN core debug - used only for MPC5200 driver part */
#define DEBUGMSG(fmt,args...) can_printk(KERN_ERR "lincan (debug): " fmt,##args)
/* standard LinCAN core debug - used only for MPC5200 driver part */
#define DEBUGMSG(fmt,args...) can_printk(KERN_ERR "lincan (debug): " fmt,##args)
- /* dump specific parts of chip memory */
+ /* dump specific parts of chip memory */
#define DUMPREGS(canchip) dump_regs(canchip)
#define DUMPBUFF(canchip, offset) dump_buff(canchip, offset)
#define DUMPFLT(canchip) dump_filter(canchip)
#define DUMPREGS(canchip) dump_regs(canchip)
#define DUMPBUFF(canchip, offset) dump_buff(canchip, offset)
#define DUMPFLT(canchip) dump_filter(canchip)
int msmcan_request_io(struct candevice_t *candev);
int msmcan_release_io(struct candevice_t *candev);
int msmcan_request_io(struct candevice_t *candev);
int msmcan_release_io(struct candevice_t *candev);
-int msmcan_reset(struct candevice_t *candev);
+int msmcan_reset(struct candevice_t *candev);
int msmcan_init_hw_data(struct candevice_t *candev);
int msmcan_init_chip_data(struct candevice_t *candev, int chipnr);
int msmcan_init_obj_data(struct canchip_t *chip, int objnr);
int msmcan_init_hw_data(struct candevice_t *candev);
int msmcan_init_chip_data(struct candevice_t *candev, int chipnr);
int msmcan_init_obj_data(struct canchip_t *chip, int objnr);
int nsi_request_io(struct candevice_t *candev);
int nsi_release_io(struct candevice_t *candev);
int nsi_request_io(struct candevice_t *candev);
int nsi_release_io(struct candevice_t *candev);
-int nsi_reset(struct candevice_t *candev);
+int nsi_reset(struct candevice_t *candev);
int nsi_init_hw_data(struct candevice_t *candev);
int nsi_init_chip_data(struct candevice_t *candev, int chipnr);
int nsi_init_obj_data(struct canchip_t *chip, int objnr);
int nsi_init_hw_data(struct candevice_t *candev);
int nsi_init_chip_data(struct candevice_t *candev, int chipnr);
int nsi_init_obj_data(struct canchip_t *chip, int objnr);
int nsi_canpci_request_io(struct candevice_t *candev);
int nsi_canpci_release_io(struct candevice_t *candev);
int nsi_canpci_request_io(struct candevice_t *candev);
int nsi_canpci_release_io(struct candevice_t *candev);
-int nsi_canpci_reset(struct candevice_t *candev);
+int nsi_canpci_reset(struct candevice_t *candev);
int nsi_canpci_init_hw_data(struct candevice_t *candev);
int nsi_canpci_init_chip_data(struct candevice_t *candev, int chipnr);
int nsi_canpci_init_obj_data(struct canchip_t *chip, int objnr);
int nsi_canpci_init_hw_data(struct candevice_t *candev);
int nsi_canpci_init_chip_data(struct candevice_t *candev, int chipnr);
int nsi_canpci_init_obj_data(struct canchip_t *chip, int objnr);
int oscar_request_io(struct candevice_t *candev);
int oscar_release_io(struct candevice_t *candev);
int oscar_request_io(struct candevice_t *candev);
int oscar_release_io(struct candevice_t *candev);
-int oscar_reset(struct candevice_t *candev);
+int oscar_reset(struct candevice_t *candev);
int oscar_init_hw_data(struct candevice_t *candev);
int oscar_init_chip_data(struct candevice_t *candev, int chipnr);
int oscar_init_obj_data(struct canchip_t *chip, int objnr);
int oscar_init_hw_data(struct candevice_t *candev);
int oscar_init_chip_data(struct candevice_t *candev, int chipnr);
int oscar_init_obj_data(struct canchip_t *chip, int objnr);
int pci03_request_io(struct candevice_t *candev);
int pci03_release_io(struct candevice_t *candev);
int pci03_request_io(struct candevice_t *candev);
int pci03_release_io(struct candevice_t *candev);
-int pci03_reset(struct candevice_t *candev);
+int pci03_reset(struct candevice_t *candev);
int pci03_init_hw_data(struct candevice_t *candev);
int pci03_init_chip_data(struct candevice_t *candev, int chipnr);
int pci03_init_obj_data(struct canchip_t *chip, int objnr);
int pci03_init_hw_data(struct candevice_t *candev);
int pci03_init_chip_data(struct candevice_t *candev, int chipnr);
int pci03_init_obj_data(struct canchip_t *chip, int objnr);
/****************************************************************************/
/****************************************************************************/
/****************************************************************************/
/****************************************************************************/
-// parameter wHardwareType, used by open
-#define HW_ISA 1 // not supported with LINUX, 82C200 chip
+// parameter wHardwareType, used by open
+#define HW_ISA 1 // not supported with LINUX, 82C200 chip
-#define HW_DONGLE_SJA_EPP 6
+#define HW_DONGLE_SJA_EPP 6
#define HW_DONGLE_PRO 7 // not yet supported with LINUX
#define HW_DONGLE_PRO_EPP 8 // not yet supported with LINUX
#define HW_ISA_SJA 9 // use this also for PC/104
#define HW_DONGLE_PRO 7 // not yet supported with LINUX
#define HW_DONGLE_PRO_EPP 8 // not yet supported with LINUX
#define HW_ISA_SJA 9 // use this also for PC/104
struct DONGLE_PORT
{
u32 dwPort; // the port of the transport layer
struct DONGLE_PORT
{
u32 dwPort; // the port of the transport layer
- u16 wIrq; // the associated irq
+ u16 wIrq; // the associated irq
struct pardevice *pardev; // points to the associated parallel port (PARPORT subsytem)
u16 wEcr; // ECR register in case of EPP
u8 ucOldDataContent; // the overwritten contents of the port registers
struct pardevice *pardev; // points to the associated parallel port (PARPORT subsytem)
u16 wEcr; // ECR register in case of EPP
u8 ucOldDataContent; // the overwritten contents of the port registers
int pcan_dongle_request_io(struct candevice_t *candev);
int pcan_dongle_release_io(struct candevice_t *candev);
int pcan_dongle_request_io(struct candevice_t *candev);
int pcan_dongle_release_io(struct candevice_t *candev);
-int pcan_dongle_reset(struct candevice_t *candev);
+int pcan_dongle_reset(struct candevice_t *candev);
int pcan_dongle_init_hw_data(struct candevice_t *candev);
int pcan_dongle_init_chip_data(struct candevice_t *candev, int chipnr);
int pcan_dongle_init_obj_data(struct canchip_t *chip, int objnr);
int pcan_dongle_init_hw_data(struct candevice_t *candev);
int pcan_dongle_init_chip_data(struct candevice_t *candev, int chipnr);
int pcan_dongle_init_obj_data(struct canchip_t *chip, int objnr);
int pccanq_release_io(struct candevice_t *candev);
int pccanf_reset(struct candevice_t *candev);
int pccand_reset(struct candevice_t *candev);
int pccanq_release_io(struct candevice_t *candev);
int pccanf_reset(struct candevice_t *candev);
int pccand_reset(struct candevice_t *candev);
-int pccanq_reset(struct candevice_t *candev);
+int pccanq_reset(struct candevice_t *candev);
int pccan_init_hw_data(struct candevice_t *candev);
int pccan_init_chip_data(struct candevice_t *candev, int chipnr);
int pccan_init_obj_data(struct canchip_t *chip, int objnr);
int pccan_init_hw_data(struct candevice_t *candev);
int pccan_init_chip_data(struct candevice_t *candev, int chipnr);
int pccan_init_obj_data(struct canchip_t *chip, int objnr);
int pcccan_request_io(struct candevice_t *candev);
int pcccan_release_io(struct candevice_t *candev);
int pcccan_request_io(struct candevice_t *candev);
int pcccan_release_io(struct candevice_t *candev);
-int pcccan_reset(struct candevice_t *candev);
+int pcccan_reset(struct candevice_t *candev);
int pcccan_init_hw_data(struct candevice_t *candev);
int pcccan_init_chip_data(struct candevice_t *candev, int chipnr);
int pcccan_init_obj_data(struct canchip_t *chip, int objnr);
int pcccan_init_hw_data(struct candevice_t *candev);
int pcccan_init_chip_data(struct candevice_t *candev, int chipnr);
int pcccan_init_obj_data(struct canchip_t *chip, int objnr);
int pcm3680_request_io(struct candevice_t *candev);
int pcm3680_release_io(struct candevice_t *candev);
int pcm3680_request_io(struct candevice_t *candev);
int pcm3680_release_io(struct candevice_t *candev);
-int pcm3680_reset(struct candevice_t *candev);
+int pcm3680_reset(struct candevice_t *candev);
int pcm3680_init_hw_data(struct candevice_t *candev);
int pcm3680_init_chip_data(struct candevice_t *candev, int chipnr);
int pcm3680_init_obj_data(struct canchip_t *chip, int objnr);
int pcm3680_init_hw_data(struct candevice_t *candev);
int pcm3680_init_chip_data(struct candevice_t *candev, int chipnr);
int pcm3680_init_obj_data(struct canchip_t *chip, int objnr);
int pip_request_io(struct candevice_t *candev);
int pip_release_io(struct candevice_t *candev);
int pip_request_io(struct candevice_t *candev);
int pip_release_io(struct candevice_t *candev);
-int pip_reset(struct candevice_t *candev);
+int pip_reset(struct candevice_t *candev);
int pip_init_hw_data(struct candevice_t *candev);
int pip_init_chip_data(struct candevice_t *candev, int chipnr);
int pip_init_obj_data(struct canchip_t *chip, int objnr);
int pip_init_hw_data(struct candevice_t *candev);
int pip_init_chip_data(struct candevice_t *candev, int chipnr);
int pip_init_obj_data(struct canchip_t *chip, int objnr);
int sh7760_request_io(struct candevice_t *candev);
int sh7760_release_io(struct candevice_t *candev);
int sh7760_request_io(struct candevice_t *candev);
int sh7760_release_io(struct candevice_t *candev);
-int sh7760_reset(struct candevice_t *candev);
+int sh7760_reset(struct candevice_t *candev);
int sh7760_init_hw_data(struct candevice_t *candev);
int sh7760_init_chip_data(struct candevice_t *candev, int chipnr);
int sh7760_init_obj_data(struct canchip_t *chip, int objnr);
int sh7760_init_hw_data(struct candevice_t *candev);
int sh7760_init_chip_data(struct candevice_t *candev, int chipnr);
int sh7760_init_obj_data(struct canchip_t *chip, int objnr);
int sja1000_disable_configuration(struct canchip_t *chip);
int sja1000_chip_config(struct canchip_t *chip);
int sja1000_standard_mask(struct canchip_t *chip, unsigned short code, unsigned short mask);
int sja1000_disable_configuration(struct canchip_t *chip);
int sja1000_chip_config(struct canchip_t *chip);
int sja1000_standard_mask(struct canchip_t *chip, unsigned short code, unsigned short mask);
-int sja1000_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
+int sja1000_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
int sampl_pt, int flags);
int sja1000_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj);
int sampl_pt, int flags);
int sja1000_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj);
-int sja1000_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
+int sja1000_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
-int sja1000_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
+int sja1000_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg);
int sja1000_check_tx_stat(struct canchip_t *chip);
struct canmsg_t *msg);
int sja1000_check_tx_stat(struct canchip_t *chip);
-int sja1000_set_btregs(struct canchip_t *chip, unsigned short btr0,
+int sja1000_set_btregs(struct canchip_t *chip, unsigned short btr0,
unsigned short btr1);
int sja1000_start_chip(struct canchip_t *chip);
int sja1000_stop_chip(struct canchip_t *chip);
unsigned short btr1);
int sja1000_start_chip(struct canchip_t *chip);
int sja1000_stop_chip(struct canchip_t *chip);
sjaCDR_CLK_OFF = 1<<3, // Clock Off
sjaCDR_RXINPEN = 1<<5, // TX1 output is RX irq output
sjaCDR_CBP = 1<<6, // Input Comparator By-Pass
sjaCDR_CLK_OFF = 1<<3, // Clock Off
sjaCDR_RXINPEN = 1<<5, // TX1 output is RX irq output
sjaCDR_CBP = 1<<6, // Input Comparator By-Pass
- sjaCDR_PELICAN = 1<<7 // PeliCAN Mode
+ sjaCDR_PELICAN = 1<<7 // PeliCAN Mode
};
/* Output Control Register */
};
/* Output Control Register */
/// Transmit Buffer (write) Receive Buffer (read) Frame Information
SJAFRM = 0x10,
/// ID bytes (11 bits in 0 and 1 or 16 bits in 0,1 and 13 bits in 2,3 (extended))
/// Transmit Buffer (write) Receive Buffer (read) Frame Information
SJAFRM = 0x10,
/// ID bytes (11 bits in 0 and 1 or 16 bits in 0,1 and 13 bits in 2,3 (extended))
- SJAID0 = 0x11, SJAID1 = 0x12,
+ SJAID0 = 0x11, SJAID1 = 0x12,
/// ID cont. for extended frames
SJAID2 = 0x13, SJAID3 = 0x14,
/// Data start standard frame
/// ID cont. for extended frames
SJAID2 = 0x13, SJAID3 = 0x14,
/// Data start standard frame
/// Acceptance Mask (4 bytes) in RESET mode
SJAAMR0 = 0x14,
/// 4 bytes
/// Acceptance Mask (4 bytes) in RESET mode
SJAAMR0 = 0x14,
/// 4 bytes
- SJA_PeliCAN_AC_LEN = 4,
+ SJA_PeliCAN_AC_LEN = 4,
/// Clock Divider
SJACDR = 0x1f
};
/// Clock Divider
SJACDR = 0x1f
};
};
/** Command Register 0x01 */
};
/** Command Register 0x01 */
-enum sja1000_PeliCAN_CMR {
+enum sja1000_PeliCAN_CMR {
sjaCMR_SRR= 1<<4, // Self Reception Request (GoToSleep in BASIC mode)
sjaCMR_CDO= 1<<3, // Clear Data Overrun
sjaCMR_RRB= 1<<2, // Release Receive Buffer
sjaCMR_SRR= 1<<4, // Self Reception Request (GoToSleep in BASIC mode)
sjaCMR_CDO= 1<<3, // Clear Data Overrun
sjaCMR_RRB= 1<<2, // Release Receive Buffer
sjaIER_RIE = 1, // Receive Interrupt Enable
sjaENABLE_INTERRUPTS = sjaIER_BEIE|sjaIER_EPIE|sjaIER_DOIE|sjaIER_EIE|sjaIER_TIE|sjaIER_RIE,
sjaDISABLE_INTERRUPTS = 0
sjaIER_RIE = 1, // Receive Interrupt Enable
sjaENABLE_INTERRUPTS = sjaIER_BEIE|sjaIER_EPIE|sjaIER_DOIE|sjaIER_EIE|sjaIER_TIE|sjaIER_RIE,
sjaDISABLE_INTERRUPTS = 0
-// WARNING: the chip automatically enters RESET (bus off) mode when
+// WARNING: the chip automatically enters RESET (bus off) mode when
// error counter > 255
};
// error counter > 255
};
int template_request_io(struct candevice_t *candev);
int template_release_io(struct candevice_t *candev);
int template_request_io(struct candevice_t *candev);
int template_release_io(struct candevice_t *candev);
-int template_reset(struct candevice_t *candev);
+int template_reset(struct candevice_t *candev);
int template_init_hw_data(struct candevice_t *candev);
int template_init_chip_data(struct candevice_t *candev, int chipnr);
int template_init_obj_data(struct canchip_t *chip, int objnr);
int template_init_hw_data(struct candevice_t *candev);
int template_init_chip_data(struct candevice_t *candev, int chipnr);
int template_init_obj_data(struct canchip_t *chip, int objnr);
-You need to know the following:
-" RX1 is connected to ground.
-" TX1 is not connected.
-" CLKO is not connected.
-" Setting the OCR register to 0xFA is a good idea.
- This means normal output mode , push-pull and the correct polarity.
-" In the CDR register, you should set CBP to 1.
+You need to know the following:
+" RX1 is connected to ground.
+" TX1 is not connected.
+" CLKO is not connected.
+" Setting the OCR register to 0xFA is a good idea.
+ This means normal output mode , push-pull and the correct polarity.
+" In the CDR register, you should set CBP to 1.
You will probably also want to set the clock divider value to 0 (meaning divide-by-2),
the Pelican bit, and the clock-off bit (you have no need for CLKOUT anyway.)
You will probably also want to set the clock divider value to 0 (meaning divide-by-2),
the Pelican bit, and the clock-off bit (you have no need for CLKOUT anyway.)
error_io:
pci_release_region(candev->sysdevptr.pcidev, 1);
#endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
error_io:
pci_release_region(candev->sysdevptr.pcidev, 1);
#endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
void adlink7841_write_register(unsigned data, can_ioptr_t address)
{
void adlink7841_write_register(unsigned data, can_ioptr_t address)
{
- can_outb(data,address);
+ can_outb(data,address);
}
unsigned adlink7841_read_register(can_ioptr_t address)
}
unsigned adlink7841_read_register(can_ioptr_t address)
adlink7841_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
adlink7841_write_register(0, chip->chip_base_addr+SJAIER);
adlink7841_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
adlink7841_write_register(0, chip->chip_base_addr+SJAIER);
adlink7841_read_register(chip->chip_base_addr+SJAIR);
}
adlink7841_read_register(chip->chip_base_addr+SJAIR);
}
adlink7841_connect_irq(candev);
return 0;
adlink7841_connect_irq(candev);
return 0;
int adlink7841_init_hw_data(struct candevice_t *candev)
{
int adlink7841_init_hw_data(struct candevice_t *candev)
{
pcidev = can_pci_get_next_untaken_device(ADLINK7841_PCI_VENDOR_ID, ADLINK7841_PCI_PRODUCT_ID);
if(pcidev == NULL)
return -ENODEV;
pcidev = can_pci_get_next_untaken_device(ADLINK7841_PCI_VENDOR_ID, ADLINK7841_PCI_PRODUCT_ID);
if(pcidev == NULL)
return -ENODEV;
if (pci_enable_device (pcidev)){
printk(KERN_CRIT "Setup of ADLINK7841 failed\n");
can_pci_dev_put(pcidev);
return -EIO;
}
candev->sysdevptr.pcidev=pcidev;
if (pci_enable_device (pcidev)){
printk(KERN_CRIT "Setup of ADLINK7841 failed\n");
can_pci_dev_put(pcidev);
return -EIO;
}
candev->sysdevptr.pcidev=pcidev;
for(i=1;i<3;i++){
if(!(pci_resource_flags(pcidev,i)&IORESOURCE_IO)){
printk(KERN_CRIT "ADLINK7841 region %d is not IO\n",i);
for(i=1;i<3;i++){
if(!(pci_resource_flags(pcidev,i)&IORESOURCE_IO)){
printk(KERN_CRIT "ADLINK7841 region %d is not IO\n",i);
candev->dev_base_addr=pci_resource_start(pcidev,1); /* PLX 9050 BASE*/
candev->io_addr=pci_resource_start(pcidev,2); /*IO window for SJA1000 chips*/
candev->res_addr=pci_resource_start(pcidev,1); /*reserved*/
candev->dev_base_addr=pci_resource_start(pcidev,1); /* PLX 9050 BASE*/
candev->io_addr=pci_resource_start(pcidev,2); /*IO window for SJA1000 chips*/
candev->res_addr=pci_resource_start(pcidev,1); /*reserved*/
/*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/
candev->nr_82527_chips=0;
/*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/
candev->nr_82527_chips=0;
if(candev->sysdevptr.pcidev==NULL)
return -ENODEV;
if(candev->sysdevptr.pcidev==NULL)
return -ENODEV;
candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
sja1000p_fill_chipspecops(candev->chip[chipnr]);
candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
sja1000p_fill_chipspecops(candev->chip[chipnr]);
candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;
return 0;
candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;
return 0;
int adlink7841_init_obj_data(struct canchip_t *chip, int objnr)
{
int adlink7841_init_obj_data(struct canchip_t *chip, int objnr)
{
*
* The function template_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
*
* The function template_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
- * will have to add the code to reserve this memory as well.
+ * will have to add the code to reserve this memory as well.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* template_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
* template_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
- * The function template_reset() is used to give a hardware reset. This is
- * rather hardware specific so I haven't included example code. Don't forget to
+ * The function template_reset() is used to give a hardware reset. This is
+ * rather hardware specific so I haven't included example code. Don't forget to
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
DEBUGMSG("Resetting aim104 hardware ...\n");
aim104_write_register(0x00, candev->io_addr + SJACR);
DEBUGMSG("Resetting aim104 hardware ...\n");
aim104_write_register(0x00, candev->io_addr + SJACR);
/* Check hardware reset status chip 0 */
i=0;
/* Check hardware reset status chip 0 */
i=0;
- while ( (aim104_read_register(candev->io_addr + SJACR)
+ while ( (aim104_read_register(candev->io_addr + SJACR)
& sjaCR_RR) && (i<=15) ) {
udelay(20000);
i++;
& sjaCR_RR) && (i<=15) ) {
udelay(20000);
i++;
* Return Value: The function always returns zero
* File: src/template.c
*/
* Return Value: The function always returns zero
* File: src/template.c
*/
-int aim104_init_hw_data(struct candevice_t *candev)
+int aim104_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=0;
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=0;
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
- * The entry @int_bus_reg holds hardware specific options for the Bus
+ * The entry @int_bus_reg holds hardware specific options for the Bus
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* Return Value: The function always returns zero
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* Return Value: The function always returns zero
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
- * The entry @obj_base_addr represents the first memory address of the message
+ * The entry @obj_base_addr represents the first memory address of the message
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
chip->msgobj[objnr]->obj_flags=0;
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
chip->msgobj[objnr]->obj_flags=0;
* template_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
* template_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
- * The function template_program_irq() is used for hardware that uses
+ * The function template_program_irq() is used for hardware that uses
* programmable interrupts. If your hardware doesn't use programmable interrupts
* programmable interrupts. If your hardware doesn't use programmable interrupts
- * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
- * leave this function unedited. Again this function is hardware specific so
+ * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
+ * leave this function unedited. Again this function is hardware specific so
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
if(can_msgobj_test_and_clear_fl(obj,TX_REQUEST)) {
int cctreqx;
int idxobj = obj->object-1;
if(can_msgobj_test_and_clear_fl(obj,TX_REQUEST)) {
int cctreqx;
int idxobj = obj->object-1;
if(idxobj<0) {
DEBUGMSG("c_can_irq_sync_activities wrong idxobj\n");
break;
if(idxobj<0) {
DEBUGMSG("c_can_irq_sync_activities wrong idxobj\n");
break;
pthread_t thread=NULL;
DEBUGMSG("can_rtl_isr invoked for irq %d\n",irq_num);
pthread_t thread=NULL;
DEBUGMSG("can_rtl_isr invoked for irq %d\n",irq_num);
/* I hate next loop, but RT-Linux does not provide context to ISR */
for (board_nr=hardware_p->nr_boards; board_nr--; ) {
if((candev=hardware_p->candevice[board_nr])==NULL)
/* I hate next loop, but RT-Linux does not provide context to ISR */
for (board_nr=hardware_p->nr_boards; board_nr--; ) {
if((candev=hardware_p->candevice[board_nr])==NULL)
RTL_MARK_SUSPENDED(pthread_self());
return rtl_schedule();
can_enable_irq
RTL_MARK_SUSPENDED(pthread_self());
return rtl_schedule();
can_enable_irq
rtl_critical( state )
rtl_end_critical( state )
rtl_critical( state )
rtl_end_critical( state )
-rtl_request_global_irq( irq, isr );
+rtl_request_global_irq( irq, isr );
rtl_free_global_irq( irq )
*/
rtl_free_global_irq( irq )
*/
int ret, i;
int loop_cnt;
rtl_irqstate_t flags;
int ret, i;
int loop_cnt;
rtl_irqstate_t flags;
if (!(chip->flags & CHIP_CONFIGURED)){
if (chip->chipspecops->chip_config(chip))
CANMSG("Error configuring chip.\n");
else
if (!(chip->flags & CHIP_CONFIGURED)){
if (chip->chipspecops->chip_config(chip))
CANMSG("Error configuring chip.\n");
else
- chip->flags |= CHIP_CONFIGURED;
+ chip->flags |= CHIP_CONFIGURED;
if((chip->msgobj[0])!=NULL)
if (chip->chipspecops->pre_read_config(chip,chip->msgobj[0])<0)
CANMSG("Error initializing chip for receiving\n");
if((chip->msgobj[0])!=NULL)
if (chip->chipspecops->pre_read_config(chip,chip->msgobj[0])<0)
CANMSG("Error initializing chip for receiving\n");
} /* End of chip configuration */
set_bit(MSGOBJ_IRQ_REQUEST_b,&chip->pend_flags);
} /* End of chip configuration */
set_bit(MSGOBJ_IRQ_REQUEST_b,&chip->pend_flags);
while (1) {
DEBUGMSG("Worker thread for chip %d active\n",chip->chip_idx);
while (1) {
DEBUGMSG("Worker thread for chip %d active\n",chip->chip_idx);
*
* irq_accept added to the LinCAN driver now,
* and above workaround should not be required.
*
* irq_accept added to the LinCAN driver now,
* and above workaround should not be required.
- * Enable rtl_hard_enable_irq() at line
+ * Enable rtl_hard_enable_irq() at line
* ca91c042.c:1045
*/
#endif /*CAN_ENABLE_VME_SUPPORT*/
* ca91c042.c:1045
*/
#endif /*CAN_ENABLE_VME_SUPPORT*/
struct sched_param sched_param;
pthread_attr_t attrib;
pthread_attr_t *attrib_p=NULL;
struct sched_param sched_param;
pthread_attr_t attrib;
pthread_attr_t *attrib_p=NULL;
if(chip==NULL)
return -1;
if(chip==NULL)
return -1;
if(can_rtl_priority>=0){
pthread_attr_init(&attrib);
sched_param.sched_priority = can_rtl_priority;
if(can_rtl_priority>=0){
pthread_attr_init(&attrib);
sched_param.sched_priority = can_rtl_priority;
/* pthread_attr_setschedpolicy(&attrib, SCHED_FIFO); */
attrib_p=&attrib;
}
/* pthread_attr_setschedpolicy(&attrib, SCHED_FIFO); */
attrib_p=&attrib;
}
if(chip->chipspecops->irq_handler && !(chip->flags & CHIP_IRQ_CUSTOM)){
int (*my_request_irq)(unsigned int vector, unsigned int (*rtl_handler)(unsigned int irq, struct pt_regs *regs));
#ifdef CAN_ENABLE_VME_SUPPORT
if(chip->chipspecops->irq_handler && !(chip->flags & CHIP_IRQ_CUSTOM)){
int (*my_request_irq)(unsigned int vector, unsigned int (*rtl_handler)(unsigned int irq, struct pt_regs *regs));
#ifdef CAN_ENABLE_VME_SUPPORT
}
ret=pthread_create(&chip->worker_thread, attrib_p, can_chip_worker_thread, chip);
if(ret<0) chip->worker_thread=NULL;
}
ret=pthread_create(&chip->worker_thread, attrib_p, can_chip_worker_thread, chip);
if(ret<0) chip->worker_thread=NULL;
-/*
- * Modifies Tx message processing
+/*
+ * Modifies Tx message processing
* 0 .. local message processing disabled
* 1 .. local messages disabled by default but can be enabled by canque_set_filt
* 2 .. local messages enabled by default, can be disabled by canque_set_filt
* 0 .. local message processing disabled
* 1 .. local messages disabled by default but can be enabled by canque_set_filt
* 2 .. local messages enabled by default, can be disabled by canque_set_filt
canque_fifo_done_kern(&qedge->fifo);
kfree(qedge);
}
canque_fifo_done_kern(&qedge->fifo);
kfree(qedge);
}
can_spin_lock_irqsave(&canque_dead_func_lock, flags);
entry=canque_dead_ends.next;
can_spin_unlock_irqrestore(&canque_dead_func_lock,flags);
can_spin_lock_irqsave(&canque_dead_func_lock, flags);
entry=canque_dead_ends.next;
can_spin_unlock_irqrestore(&canque_dead_func_lock,flags);
void canque_edge_do_dead(struct canque_edge_t *edge)
{
can_spin_irqflags_t flags;
void canque_edge_do_dead(struct canque_edge_t *edge)
{
can_spin_irqflags_t flags;
canque_notify_bothends(edge,CANQUEUE_NOTIFY_NOUSR);
#ifdef CAN_WITH_RTL
/* The problem of the above call is, that in RT-Linux to Linux notify
canque_notify_bothends(edge,CANQUEUE_NOTIFY_NOUSR);
#ifdef CAN_WITH_RTL
/* The problem of the above call is, that in RT-Linux to Linux notify
can_spin_unlock_irqrestore(&edge->inends->ends_lock, flags);
}
#endif /*CAN_WITH_RTL*/
can_spin_unlock_irqrestore(&edge->inends->ends_lock, flags);
}
#endif /*CAN_WITH_RTL*/
if(canqueue_disconnect_edge(edge)<0){
ERRMSGQUE("canque_edge_do_dead: canqueue_disconnect_edge failed !!!\n");
return;
if(canqueue_disconnect_edge(edge)<0){
ERRMSGQUE("canque_edge_do_dead: canqueue_disconnect_edge failed !!!\n");
return;
/**
* canqueue_notify_kern - notification callback handler for Linux userspace clients
* @qends: pointer to the callback side ends structure
/**
* canqueue_notify_kern - notification callback handler for Linux userspace clients
* @qends: pointer to the callback side ends structure
- * @qedge: edge which invoked notification
+ * @qedge: edge which invoked notification
* @what: notification type
*
* The notification event is handled directly by call of this function except case,
* when called from RT-Linux context in mixed mode Linux/RT-Linux compilation.
* It is not possible to directly call Linux kernel synchronization primitives
* in such case. The notification request is postponed and signaled by @pending_inops flags
* @what: notification type
*
* The notification event is handled directly by call of this function except case,
* when called from RT-Linux context in mixed mode Linux/RT-Linux compilation.
* It is not possible to directly call Linux kernel synchronization primitives
* in such case. The notification request is postponed and signaled by @pending_inops flags
- * by call canqueue_rtl2lin_check_and_pend() function.
+ * by call canqueue_rtl2lin_check_and_pend() function.
* The edge reference count is increased until until all pending notifications are processed.
*/
void canqueue_notify_kern(struct canque_ends_t *qends, struct canque_edge_t *qedge, int what)
* The edge reference count is increased until until all pending notifications are processed.
*/
void canqueue_notify_kern(struct canque_ends_t *qends, struct canque_edge_t *qedge, int what)
DEBUGQUE("canqueue_notify_kern postponed\n");
return;
}
DEBUGQUE("canqueue_notify_kern postponed\n");
return;
}
switch(what){
case CANQUEUE_NOTIFY_EMPTY:
wake_up(&qends->endinfo.fileinfo.emptyq);
switch(what){
case CANQUEUE_NOTIFY_EMPTY:
wake_up(&qends->endinfo.fileinfo.emptyq);
wake_up(&qends->endinfo.fileinfo.writeq);
#ifdef CAN_ENABLE_KERN_FASYNC
/* Asynchronous I/O processing */
wake_up(&qends->endinfo.fileinfo.writeq);
#ifdef CAN_ENABLE_KERN_FASYNC
/* Asynchronous I/O processing */
- kill_fasync(&qends->endinfo.fileinfo.fasync, SIGIO, POLL_OUT);
+ kill_fasync(&qends->endinfo.fileinfo.fasync, SIGIO, POLL_OUT);
#endif /*CAN_ENABLE_KERN_FASYNC*/
break;
case CANQUEUE_NOTIFY_PROC:
wake_up(&qends->endinfo.fileinfo.readq);
#ifdef CAN_ENABLE_KERN_FASYNC
/* Asynchronous I/O processing */
#endif /*CAN_ENABLE_KERN_FASYNC*/
break;
case CANQUEUE_NOTIFY_PROC:
wake_up(&qends->endinfo.fileinfo.readq);
#ifdef CAN_ENABLE_KERN_FASYNC
/* Asynchronous I/O processing */
- kill_fasync(&qends->endinfo.fileinfo.fasync, SIGIO, POLL_IN);
+ kill_fasync(&qends->endinfo.fileinfo.fasync, SIGIO, POLL_IN);
#endif /*CAN_ENABLE_KERN_FASYNC*/
break;
case CANQUEUE_NOTIFY_NOUSR:
#endif /*CAN_ENABLE_KERN_FASYNC*/
break;
case CANQUEUE_NOTIFY_NOUSR:
#ifdef CAN_ENABLE_KERN_FASYNC
qends->endinfo.fileinfo.fasync=NULL;
#endif /*CAN_ENABLE_KERN_FASYNC*/
#ifdef CAN_ENABLE_KERN_FASYNC
qends->endinfo.fileinfo.fasync=NULL;
#endif /*CAN_ENABLE_KERN_FASYNC*/
qends->notify=canqueue_notify_kern;
DEBUGQUE("canqueue_ends_init_kern\n");
return 0;
qends->notify=canqueue_notify_kern;
DEBUGQUE("canqueue_ends_init_kern\n");
return 0;
{
int ret=-1;
DEBUGQUE("canque_get_inslot4id_wait_kern for cmd %d, id %ld, prio %d\n",cmd,id,prio);
{
int ret=-1;
DEBUGQUE("canque_get_inslot4id_wait_kern for cmd %d, id %ld, prio %d\n",cmd,id,prio);
- wait_event_interruptible((qends->endinfo.fileinfo.writeq),
+ wait_event_interruptible((qends->endinfo.fileinfo.writeq),
(ret=canque_get_inslot4id(qends,qedgep,slotp,cmd,id,prio))!=-1);
return ret;
}
(ret=canque_get_inslot4id(qends,qedgep,slotp,cmd,id,prio))!=-1);
return ret;
}
{
int ret=-1;
DEBUGQUE("canque_get_outslot_wait_kern\n");
{
int ret=-1;
DEBUGQUE("canque_get_outslot_wait_kern\n");
- wait_event_interruptible((qends->endinfo.fileinfo.readq),
+ wait_event_interruptible((qends->endinfo.fileinfo.readq),
(ret=canque_test_outslot(qends,qedgep,slotp))!=-1);
return ret;
}
(ret=canque_test_outslot(qends,qedgep,slotp))!=-1);
return ret;
}
{
int ret=-1;
DEBUGQUE("canque_sync_wait_kern\n");
{
int ret=-1;
DEBUGQUE("canque_sync_wait_kern\n");
- wait_event_interruptible((qends->endinfo.fileinfo.emptyq),
+ wait_event_interruptible((qends->endinfo.fileinfo.emptyq),
(ret=canque_fifo_test_fl(&qedge->fifo,EMPTY)?1:0));
return ret;
}
(ret=canque_fifo_test_fl(&qedge->fifo,EMPTY)?1:0));
return ret;
}
DEBUGQUE("canqueue_disconnect_edge_kern %d called\n",qedge->edge_num);
if(!canque_fifo_test_and_set_fl(&qedge->fifo,DEAD)){
canque_notify_bothends(qedge, CANQUEUE_NOTIFY_DEAD);
DEBUGQUE("canqueue_disconnect_edge_kern %d called\n",qedge->edge_num);
if(!canque_fifo_test_and_set_fl(&qedge->fifo,DEAD)){
canque_notify_bothends(qedge, CANQUEUE_NOTIFY_DEAD);
if(atomic_read(&qedge->edge_used)>0)
atomic_dec(&qedge->edge_used);
DEBUGQUE("canqueue_disconnect_edge_kern %d waiting\n",qedge->edge_num);
if(atomic_read(&qedge->edge_used)>0)
atomic_dec(&qedge->edge_used);
DEBUGQUE("canqueue_disconnect_edge_kern %d waiting\n",qedge->edge_num);
- wait_event((qends->endinfo.fileinfo.emptyq),
+ wait_event((qends->endinfo.fileinfo.emptyq),
(canqueue_disconnect_edge(qedge)>=0));
/*set_current_state(TASK_UNINTERRUPTIBLE);*/
(canqueue_disconnect_edge(qedge)>=0));
/*set_current_state(TASK_UNINTERRUPTIBLE);*/
int canqueue_ends_sync_all_kern(struct canque_ends_t *qends)
{
struct canque_edge_t *qedge;
int canqueue_ends_sync_all_kern(struct canque_ends_t *qends)
{
struct canque_edge_t *qedge;
canque_for_each_inedge(qends, qedge){
DEBUGQUE("canque_sync_wait_kern called for edge %d\n",qedge->edge_num);
canque_sync_wait_kern(qends, qedge);
canque_for_each_inedge(qends, qedge){
DEBUGQUE("canque_sync_wait_kern called for edge %d\n",qedge->edge_num);
canque_sync_wait_kern(qends, qedge);
/*Wait for sending of all pending messages in the output FIFOs*/
if(sync)
canqueue_ends_sync_all_kern(qends);
/*Wait for sending of all pending messages in the output FIFOs*/
if(sync)
canqueue_ends_sync_all_kern(qends);
/* Finish or kill all outgoing edges listed in inends */
delayed=canqueue_ends_kill_inlist(qends, 1);
/* Kill all incoming edges listed in outends */
/* Finish or kill all outgoing edges listed in inends */
delayed=canqueue_ends_kill_inlist(qends, 1);
/* Kill all incoming edges listed in outends */
-/*
- * Modifies Tx message processing
+/*
+ * Modifies Tx message processing
* 0 .. local message processing disabled
* 1 .. local messages disabled by default but can be enabled by canque_set_filt
* 2 .. local messages enabled by default, can be disabled by canque_set_filt
* 0 .. local message processing disabled
* 1 .. local messages disabled by default but can be enabled by canque_set_filt
* 2 .. local messages enabled by default, can be disabled by canque_set_filt
unsigned pending_inops;
unsigned pending_outops;
int i;
unsigned pending_inops;
unsigned pending_outops;
int i;
can_spin_lock_irqsave (&canque_pending_edges_lock, flags);
while(!list_empty(&canque_pending_edges_list)){
can_spin_lock_irqsave (&canque_pending_edges_lock, flags);
while(!list_empty(&canque_pending_edges_list)){
if(pending_inops&1)
canque_notify_inends(qedge,i);
}
if(pending_inops&1)
canque_notify_inends(qedge,i);
}
canque_edge_decref(qedge);
can_spin_lock_irqsave (&canque_pending_edges_lock, flags);
}
canque_edge_decref(qedge);
can_spin_lock_irqsave (&canque_pending_edges_lock, flags);
}
- * canqueue_rtl2lin_check_and_pend - postpones edge notification if called from RT-Linux
+ * canqueue_rtl2lin_check_and_pend - postpones edge notification if called from RT-Linux
* @qends: notification target ends
* @qedge: edge delivering notification
* @what: notification type
* @qends: notification target ends
* @qedge: edge delivering notification
* @what: notification type
if(rtl_rt_system_is_idle()) return 0;
can_spin_lock_irqsave (&canque_pending_edges_lock, flags);
if(rtl_rt_system_is_idle()) return 0;
can_spin_lock_irqsave (&canque_pending_edges_lock, flags);
if(what>CANQUE_PENDOPS_LIMIT) what=CANQUE_PENDOPS_LIMIT;
if(qends == qedge->inends) {
if(what>CANQUE_PENDOPS_LIMIT) what=CANQUE_PENDOPS_LIMIT;
if(qends == qedge->inends) {
}
can_spin_unlock_irqrestore (&canque_pending_edges_lock, flags);
}
can_spin_unlock_irqrestore (&canque_pending_edges_lock, flags);
int ret;
unsigned old_age;
rtl_sigset_t sigset;
int ret;
unsigned old_age;
rtl_sigset_t sigset;
old_age=atomic_read(&qends->endinfo.rtlinfo.rtl_writeq_age);
while((ret=canque_get_inslot4id(qends,qedgep,slotp,cmd,id,prio))==-1){
rtl_sigemptyset(&sigset);
old_age=atomic_read(&qends->endinfo.rtlinfo.rtl_writeq_age);
while((ret=canque_get_inslot4id(qends,qedgep,slotp,cmd,id,prio))==-1){
rtl_sigemptyset(&sigset);
return -1;
old_age=atomic_read(&qends->endinfo.rtlinfo.rtl_writeq_age);
}
return -1;
old_age=atomic_read(&qends->endinfo.rtlinfo.rtl_writeq_age);
}
int ret;
unsigned old_age;
rtl_sigset_t sigset;
int ret;
unsigned old_age;
rtl_sigset_t sigset;
old_age=atomic_read(&qends->endinfo.rtlinfo.rtl_readq_age);
while((ret=canque_test_outslot(qends,qedgep,slotp))==-1){
rtl_sigemptyset(&sigset);
old_age=atomic_read(&qends->endinfo.rtlinfo.rtl_readq_age);
while((ret=canque_test_outslot(qends,qedgep,slotp))==-1){
rtl_sigemptyset(&sigset);
int ret;
unsigned old_age;
rtl_sigset_t sigset;
int ret;
unsigned old_age;
rtl_sigset_t sigset;
old_age=atomic_read(&qends->endinfo.rtlinfo.rtl_emptyq_age);
while(!(ret=canque_fifo_test_fl(&qedge->fifo,EMPTY)?1:0)){
rtl_sigemptyset(&sigset);
old_age=atomic_read(&qends->endinfo.rtlinfo.rtl_emptyq_age);
while(!(ret=canque_fifo_test_fl(&qedge->fifo,EMPTY)?1:0)){
rtl_sigemptyset(&sigset);
return -1;
old_age=atomic_read(&qends->endinfo.rtlinfo.rtl_emptyq_age);
}
return -1;
old_age=atomic_read(&qends->endinfo.rtlinfo.rtl_emptyq_age);
}
/**
* canqueue_notify_rtl - notification callback handler for Linux userspace clients
* @qends: pointer to the callback side ends structure
/**
* canqueue_notify_rtl - notification callback handler for Linux userspace clients
* @qends: pointer to the callback side ends structure
- * @qedge: edge which invoked notification
+ * @qedge: edge which invoked notification
* @what: notification type
*/
void canqueue_notify_rtl(struct canque_ends_t *qends, struct canque_edge_t *qedge, int what)
{
rtl_irqstate_t flags;
* @what: notification type
*/
void canqueue_notify_rtl(struct canque_ends_t *qends, struct canque_edge_t *qedge, int what)
{
rtl_irqstate_t flags;
switch(what){
case CANQUEUE_NOTIFY_EMPTY:
rtl_spin_lock_irqsave(&qends->endinfo.rtlinfo.rtl_lock, flags);
switch(what){
case CANQUEUE_NOTIFY_EMPTY:
rtl_spin_lock_irqsave(&qends->endinfo.rtlinfo.rtl_lock, flags);
rtl_wait_init(&(qends->endinfo.rtlinfo.rtl_readq));
rtl_wait_init(&(qends->endinfo.rtlinfo.rtl_writeq));
rtl_wait_init(&(qends->endinfo.rtlinfo.rtl_emptyq));
rtl_wait_init(&(qends->endinfo.rtlinfo.rtl_readq));
rtl_wait_init(&(qends->endinfo.rtlinfo.rtl_writeq));
rtl_wait_init(&(qends->endinfo.rtlinfo.rtl_emptyq));
qends->notify=canqueue_notify_rtl;
qends->endinfo.rtlinfo.pend_flags=0;
return 0;
qends->notify=canqueue_notify_rtl;
qends->endinfo.rtlinfo.pend_flags=0;
return 0;
/*Wait for sending of all pending messages in the output FIFOs*/
/*if(sync)
canqueue_ends_sync_all_rtl(qends);*/
/*Wait for sending of all pending messages in the output FIFOs*/
/*if(sync)
canqueue_ends_sync_all_rtl(qends);*/
/* Finish or kill all outgoing edges listed in inends */
delayed=canqueue_ends_kill_inlist(qends, 1);
/* Kill all incoming edges listed in outends */
/* Finish or kill all outgoing edges listed in inends */
delayed=canqueue_ends_kill_inlist(qends, 1);
/* Kill all incoming edges listed in outends */
#include "../include/can_sysdep.h"
#include "../include/can_queue.h"
#include "../include/can_sysdep.h"
#include "../include/can_queue.h"
-/*
- * Modifies Tx message processing
+/*
+ * Modifies Tx message processing
* 0 .. local message processing disabled
* 1 .. local messages disabled by default but can be enabled by canque_set_filt
* 2 .. local messages enabled by default, can be disabled by canque_set_filt
* 0 .. local message processing disabled
* 1 .. local messages disabled by default but can be enabled by canque_set_filt
* 2 .. local messages enabled by default, can be disabled by canque_set_filt
{
int ret=-2;
struct canque_edge_t *edge;
{
int ret=-2;
struct canque_edge_t *edge;
edge=canque_first_inedge(qends);
if(edge){
if(!canque_fifo_test_fl(&edge->fifo,BLOCK)){
edge=canque_first_inedge(qends);
if(edge){
if(!canque_fifo_test_fl(&edge->fifo,BLOCK)){
{
int ret=-2;
struct canque_edge_t *edge, *bestedge=NULL;
{
int ret=-2;
struct canque_edge_t *edge, *bestedge=NULL;
canque_for_each_inedge(qends, edge){
if(canque_fifo_test_fl(&edge->fifo,BLOCK))
continue;
canque_for_each_inedge(qends, edge){
if(canque_fifo_test_fl(&edge->fifo,BLOCK))
continue;
unsigned long msgid;
struct canque_edge_t *edge;
struct canque_slot_t *slot;
unsigned long msgid;
struct canque_edge_t *edge;
struct canque_slot_t *slot;
DEBUGQUE("canque_filter_msg2edges for msg ID 0x%08lx and flags 0x%02x\n",
msg->id, msg->flags);
msgid = canque_filtid2internal(msg->id, msg->flags);
DEBUGQUE("canque_filter_msg2edges for msg ID 0x%08lx and flags 0x%02x\n",
msg->id, msg->flags);
msgid = canque_filtid2internal(msg->id, msg->flags);
int prio;
struct canque_edge_t *edge;
int ret;
int prio;
struct canque_edge_t *edge;
int ret;
can_spin_lock_irqsave(&qends->ends_lock, flags);
for(prio=CANQUEUE_PRIO_NR;--prio>=0;){
while(!list_empty(&qends->active[prio])){
can_spin_lock_irqsave(&qends->ends_lock, flags);
for(prio=CANQUEUE_PRIO_NR;--prio>=0;){
while(!list_empty(&qends->active[prio])){
can_spin_irqflags_t flags;
can_spin_lock_irqsave(&qedge->fifo.fifo_lock,flags);
can_spin_irqflags_t flags;
can_spin_lock_irqsave(&qedge->fifo.fifo_lock,flags);
if(!(filtflags&MSG_PROCESSLOCAL) && (processlocal<2))
filtflags |= MSG_LOCAL_MASK;
if(!(filtflags&MSG_PROCESSLOCAL) && (processlocal<2))
filtflags |= MSG_LOCAL_MASK;
qedge->filtid=canque_filtid2internal(filtid, filtflags);
qedge->filtmask=canque_filtid2internal(filtmask, filtflags>>MSG_FILT_MASK_SHIFT);
qedge->filtid=canque_filtid2internal(filtid, filtflags);
qedge->filtmask=canque_filtid2internal(filtmask, filtflags>>MSG_FILT_MASK_SHIFT);
if(canque_fifo_test_fl(&qedge->fifo,DEAD)) ret=-1;
else ret=canque_fifo_test_and_set_fl(&qedge->fifo,BLOCK)?1:0;
if(canque_fifo_test_fl(&qedge->fifo,DEAD)) ret=-1;
else ret=canque_fifo_test_and_set_fl(&qedge->fifo,BLOCK)?1:0;
can_spin_lock_irqsave(&qedge->fifo.fifo_lock,flags);
if(!ret) canque_fifo_clear_fl(&qedge->fifo,BLOCK);
can_spin_unlock_irqrestore(&qedge->fifo.fifo_lock,flags);
can_spin_lock_irqsave(&qedge->fifo.fifo_lock,flags);
if(!ret) canque_fifo_clear_fl(&qedge->fifo,BLOCK);
can_spin_unlock_irqrestore(&qedge->fifo.fifo_lock,flags);
DEBUGQUE("canque_set_filt for edge %d, ID %ld, mask %ld, flags %d returned %d\n",
qedge->edge_num,filtid,filtmask,filtflags,ret);
return ret;
DEBUGQUE("canque_set_filt for edge %d, ID %ld, mask %ld, flags %d returned %d\n",
qedge->edge_num,filtid,filtmask,filtflags,ret);
return ret;
if(outends) can_spin_lock(&outends->ends_lock);
flags=0;
}
if(outends) can_spin_lock(&outends->ends_lock);
flags=0;
}
can_spin_lock(&qedge->fifo.fifo_lock);
if(atomic_read(&qedge->edge_used)==0) {
if(qedge->outends){
can_spin_lock(&qedge->fifo.fifo_lock);
if(atomic_read(&qedge->edge_used)==0) {
if(qedge->outends){
- * canqueue_block_inlist - block slot allocation of all outgoing edges of specified ends
+ * canqueue_block_inlist - block slot allocation of all outgoing edges of specified ends
* @qends: pointer to ends structure
*/
void canqueue_block_inlist(struct canque_ends_t *qends)
* @qends: pointer to ends structure
*/
void canqueue_block_inlist(struct canque_ends_t *qends)
- * canqueue_block_outlist - block slot allocation of all incoming edges of specified ends
+ * canqueue_block_outlist - block slot allocation of all incoming edges of specified ends
* @qends: pointer to ends structure
*/
void canqueue_block_outlist(struct canque_ends_t *qends)
* @qends: pointer to ends structure
*/
void canqueue_block_outlist(struct canque_ends_t *qends)
int canqueue_ends_kill_inlist(struct canque_ends_t *qends, int send_rest)
{
struct canque_edge_t *edge;
int canqueue_ends_kill_inlist(struct canque_ends_t *qends, int send_rest)
{
struct canque_edge_t *edge;
canque_for_each_inedge(qends, edge){
canque_notify_bothends(edge, CANQUEUE_NOTIFY_DEAD_WANTED);
if(send_rest){
canque_for_each_inedge(qends, edge){
canque_notify_bothends(edge, CANQUEUE_NOTIFY_DEAD_WANTED);
if(send_rest){
int canqueue_ends_kill_outlist(struct canque_ends_t *qends)
{
struct canque_edge_t *edge;
int canqueue_ends_kill_outlist(struct canque_ends_t *qends)
{
struct canque_edge_t *edge;
canque_for_each_outedge(qends, edge){
canque_notify_bothends(edge, CANQUEUE_NOTIFY_DEAD_WANTED);
}
canque_for_each_outedge(qends, edge){
canque_notify_bothends(edge, CANQUEUE_NOTIFY_DEAD_WANTED);
}
filtid = edge->filtid;
else
filtmask &= ~(filtid ^ edge->filtid);
filtid = edge->filtid;
else
filtmask &= ~(filtid ^ edge->filtid);
filtmask &= edge->filtmask;
}
filtmask &= edge->filtmask;
}
filt->id = filtid & MSG_ID_MASK;
filt->mask = filtmask & MSG_ID_MASK;
filtid >>= 28;
filt->id = filtid & MSG_ID_MASK;
filt->mask = filtmask & MSG_ID_MASK;
filtid >>= 28;
int canqueue_ends_flush_inlist(struct canque_ends_t *qends)
{
struct canque_edge_t *edge;
int canqueue_ends_flush_inlist(struct canque_ends_t *qends)
{
struct canque_edge_t *edge;
canque_for_each_inedge(qends, edge){
canque_flush(edge);
}
canque_for_each_inedge(qends, edge){
canque_flush(edge);
}
int canqueue_ends_flush_outlist(struct canque_ends_t *qends)
{
struct canque_edge_t *edge;
int canqueue_ends_flush_outlist(struct canque_ends_t *qends)
{
struct canque_edge_t *edge;
canque_for_each_outedge(qends, edge){
canque_flush(edge);
}
canque_for_each_outedge(qends, edge){
canque_flush(edge);
}
*
* The function template_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
*
* The function template_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
- * will have to add the code to reserve this memory as well.
+ * will have to add the code to reserve this memory as well.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* template_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
* template_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
- * The function template_reset() is used to give a hardware reset. This is
- * rather hardware specific so I haven't included example code. Don't forget to
+ * The function template_reset() is used to give a hardware reset. This is
+ * rather hardware specific so I haven't included example code. Don't forget to
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
* Return Value: The function always returns zero
* File: src/template.c
*/
* Return Value: The function always returns zero
* File: src/template.c
*/
-int cc104_init_hw_data(struct candevice_t *candev)
+int cc104_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=0;
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=0;
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
- * The entry @int_bus_reg holds hardware specific options for the Bus
+ * The entry @int_bus_reg holds hardware specific options for the Bus
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* Return Value: The function always returns zero
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* Return Value: The function always returns zero
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
- * The entry @obj_base_addr represents the first memory address of the message
+ * The entry @obj_base_addr represents the first memory address of the message
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
int cc104_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
int cc104_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
* template_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
* template_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
- * The function template_program_irq() is used for hardware that uses
+ * The function template_program_irq() is used for hardware that uses
* programmable interrupts. If your hardware doesn't use programmable interrupts
* programmable interrupts. If your hardware doesn't use programmable interrupts
- * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
- * leave this function unedited. Again this function is hardware specific so
+ * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
+ * leave this function unedited. Again this function is hardware specific so
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
struct canque_ends_t *qends;
struct msgobj_t *obj;
can_spin_irqflags_t iflags;
struct canque_ends_t *qends;
struct msgobj_t *obj;
can_spin_irqflags_t iflags;
if(!canuser || (canuser->magic != CAN_USER_MAGIC)){
CANMSG("can_close: bad canuser magic\n");
return -ENODEV;
}
if(!canuser || (canuser->magic != CAN_USER_MAGIC)){
CANMSG("can_close: bad canuser magic\n");
return -ENODEV;
}
obj = canuser->msgobj;
qends = canuser->qends;
obj = canuser->msgobj;
qends = canuser->qends;
#ifdef CAN_ENABLE_KERN_FASYNC
can_fasync(-1, file, 0);
#ifdef CAN_ENABLE_KERN_FASYNC
can_fasync(-1, file, 0);
can_msgobj_clear_fl(obj,OPENED);
};
can_spin_unlock_irqrestore(&canuser_manipulation_lock, iflags);
can_msgobj_clear_fl(obj,OPENED);
};
can_spin_unlock_irqrestore(&canuser_manipulation_lock, iflags);
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,50))
MOD_DEC_USE_COUNT;
#endif
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,50))
MOD_DEC_USE_COUNT;
#endif
struct canuser_t *canuser =
(struct canuser_t *)can_get_rtl_file_private_data(fptr);
int ret;
struct canuser_t *canuser =
(struct canuser_t *)can_get_rtl_file_private_data(fptr);
int ret;
if(!canuser || (canuser->magic != CAN_USER_MAGIC)){
CANMSG("can_release_rtl_posix: bad canuser magic\n");
return -ENODEV;
if(!canuser || (canuser->magic != CAN_USER_MAGIC)){
CANMSG("can_release_rtl_posix: bad canuser magic\n");
return -ENODEV;
ret=can_release_rtl_common(canuser, fptr->f_flags);
rt_free(canuser);
ret=can_release_rtl_common(canuser, fptr->f_flags);
rt_free(canuser);
*
* The function eb8245_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
*
* The function eb8245_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
- * will have to add the code to reserve this memory as well.
+ * will have to add the code to reserve this memory as well.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
int eb8245_request_io(struct candevice_t *candev)
{
can_ioptr_t remap_addr;
int eb8245_request_io(struct candevice_t *candev)
{
can_ioptr_t remap_addr;
if (!can_request_mem_region(candev->io_addr,IO_RANGE,DEVICE_NAME " - eb8245")) {
CANMSG("Unable to request IO-memory: 0x%lx\n",candev->io_addr);
return -ENODEV;
if (!can_request_mem_region(candev->io_addr,IO_RANGE,DEVICE_NAME " - eb8245")) {
CANMSG("Unable to request IO-memory: 0x%lx\n",candev->io_addr);
return -ENODEV;
CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
can_release_mem_region(candev->io_addr,IO_RANGE);
return -ENODEV;
CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
can_release_mem_region(candev->io_addr,IO_RANGE);
return -ENODEV;
}
can_base_addr_fixup(candev, remap_addr);
DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
}
can_base_addr_fixup(candev, remap_addr);
DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
* eb8245_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
* eb8245_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
- * The function eb8245_reset() is used to give a hardware reset. This is
- * rather hardware specific so I haven't included example code. Don't forget to
+ * The function eb8245_reset() is used to give a hardware reset. This is
+ * rather hardware specific so I haven't included example code. Don't forget to
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/eb8245.c
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/eb8245.c
int i;
struct canchip_t *chip=candev->chip[0];
unsigned cdr;
int i;
struct canchip_t *chip=candev->chip[0];
unsigned cdr;
eb8245_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
udelay(1000);
eb8245_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
udelay(1000);
cdr=eb8245_read_register(chip->chip_base_addr+SJACDR);
eb8245_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
cdr=eb8245_read_register(chip->chip_base_addr+SJACDR);
eb8245_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
eb8245_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
eb8245_write_register(0, chip->chip_base_addr+SJAIER);
eb8245_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
eb8245_write_register(0, chip->chip_base_addr+SJAIER);
* Return Value: The function always returns zero
* File: src/eb8245.c
*/
* Return Value: The function always returns zero
* File: src/eb8245.c
*/
-int eb8245_init_hw_data(struct candevice_t *candev)
+int eb8245_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=0;
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=0;
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
- * The entry @int_bus_reg holds hardware specific options for the Bus
+ * The entry @int_bus_reg holds hardware specific options for the Bus
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* The entry @int_cpu_reg holds hardware specific options for the cpu interface
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* The entry @int_cpu_reg holds hardware specific options for the cpu interface
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
- * The entry @obj_base_addr represents the first memory address of the message
+ * The entry @obj_base_addr represents the first memory address of the message
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* eb8245_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
* eb8245_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
- * The function eb8245_program_irq() is used for hardware that uses
+ * The function eb8245_program_irq() is used for hardware that uses
* programmable interrupts. If your hardware doesn't use programmable interrupts
* programmable interrupts. If your hardware doesn't use programmable interrupts
- * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
- * leave this function unedited. Again this function is hardware specific so
+ * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
+ * leave this function unedited. Again this function is hardware specific so
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/eb8245.c
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/eb8245.c
* each register occupies 4 bytes
*/
* each register occupies 4 bytes
*/
-/*PSB4610 PITA-2 bridge control registers*/
+/*PSB4610 PITA-2 bridge control registers*/
#define PITA2_ICR 0x00 /* Interrupt Control Register */
#define PITA2_ICR_INT0 0x00000002 /* [RC] INT0 Active/Clear */
#define PITA2_ICR_GP0_INT 0x00000004 /* [RC] GP0 Interrupt */
#define PITA2_ICR 0x00 /* Interrupt Control Register */
#define PITA2_ICR_INT0 0x00000002 /* [RC] INT0 Active/Clear */
#define PITA2_ICR_GP0_INT 0x00000004 /* [RC] GP0 Interrupt */
-The board configuration is probably following:
-" RX1 is connected to ground.
-" TX1 is not connected.
-" CLKO is not connected.
-" Setting the OCR register to 0xDA is a good idea.
- This means normal output mode , push-pull and the correct polarity.
-" In the CDR register, you should set CBP to 1.
+The board configuration is probably following:
+" RX1 is connected to ground.
+" TX1 is not connected.
+" CLKO is not connected.
+" Setting the OCR register to 0xDA is a good idea.
+ This means normal output mode , push-pull and the correct polarity.
+" In the CDR register, you should set CBP to 1.
You will probably also want to set the clock divider value to 7
You will probably also want to set the clock divider value to 7
- (meaning direct oscillator output) because the second SJA1000 chip
+ (meaning direct oscillator output) because the second SJA1000 chip
is driven by the first one CLKOUT output.
*/
is driven by the first one CLKOUT output.
*/
#endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
pita2_addr=pci_resource_start(candev->sysdevptr.pcidev,0);
#endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
pita2_addr=pci_resource_start(candev->sysdevptr.pcidev,0);
- if (!(candev->aux_base_addr = ioremap(pita2_addr,
+ if (!(candev->aux_base_addr = ioremap(pita2_addr,
pci_resource_len(candev->sysdevptr.pcidev,0)))) {
CANMSG("Unable to access I/O memory at: 0x%lx\n", pita2_addr);
goto error_ioremap_pita2;
pci_resource_len(candev->sysdevptr.pcidev,0)))) {
CANMSG("Unable to access I/O memory at: 0x%lx\n", pita2_addr);
goto error_ioremap_pita2;
candev->io_addr=io_addr;
candev->res_addr=pita2_addr;
candev->io_addr=io_addr;
candev->res_addr=pita2_addr;
-
- /*
- * this is redundant with chip initialization, but remap address
+
+ /*
+ * this is redundant with chip initialization, but remap address
* can change when resources are temporarily released
*/
for(i=0;i<candev->nr_all_chips;i++) {
* can change when resources are temporarily released
*/
for(i=0;i<candev->nr_all_chips;i++) {
#else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
pci_release_regions(candev->sysdevptr.pcidev);
#endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
#else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
pci_release_regions(candev->sysdevptr.pcidev);
#endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
{
address += ((can_ioptr2ulong(address)&(EMS_CPCPCI_BYTES_PER_CIRCUIT-1))
*(EMS_CPCPCI_BYTES_PER_REG-1));
{
address += ((can_ioptr2ulong(address)&(EMS_CPCPCI_BYTES_PER_CIRCUIT-1))
*(EMS_CPCPCI_BYTES_PER_REG-1));
- can_writeb(data,address);
+ can_writeb(data,address);
}
unsigned ems_cpcpci_read_register(can_ioptr_t address)
}
unsigned ems_cpcpci_read_register(can_ioptr_t address)
icr=can_readl(candev->aux_base_addr + PITA2_ICR);
if(!(icr & PITA2_ICR_INT0)) return CANCHIP_IRQ_NONE;
icr=can_readl(candev->aux_base_addr + PITA2_ICR);
if(!(icr & PITA2_ICR_INT0)) return CANCHIP_IRQ_NONE;
/* correct way to handle interrupts from all chips connected to the one PITA-2 */
do {
can_writel(PITA2_ICR_INT0_En | PITA2_ICR_INT0, candev->aux_base_addr + PITA2_ICR);
/* correct way to handle interrupts from all chips connected to the one PITA-2 */
do {
can_writel(PITA2_ICR_INT0_En | PITA2_ICR_INT0, candev->aux_base_addr + PITA2_ICR);
ems_cpcpci_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
ems_cpcpci_write_register(0, chip->chip_base_addr+SJAIER);
ems_cpcpci_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
ems_cpcpci_write_register(0, chip->chip_base_addr+SJAIER);
ems_cpcpci_read_register(chip->chip_base_addr+SJAIR);
}
ems_cpcpci_read_register(chip->chip_base_addr+SJAIR);
}
ems_cpcpci_connect_irq(candev);
return 0;
ems_cpcpci_connect_irq(candev);
return 0;
int ems_cpcpci_init_hw_data(struct candevice_t *candev)
{
int ems_cpcpci_init_hw_data(struct candevice_t *candev)
{
pcidev = can_pci_get_next_untaken_device(EMS_CPCPCI_PCICAN_VENDOR, EMS_CPCPCI_PCICAN_ID);
if(pcidev == NULL)
return -ENODEV;
pcidev = can_pci_get_next_untaken_device(EMS_CPCPCI_PCICAN_VENDOR, EMS_CPCPCI_PCICAN_ID);
if(pcidev == NULL)
return -ENODEV;
if (pci_enable_device (pcidev)){
printk(KERN_CRIT "Setup of EMS_CPCPCI failed\n");
can_pci_dev_put(pcidev);
return -EIO;
}
candev->sysdevptr.pcidev=pcidev;
if (pci_enable_device (pcidev)){
printk(KERN_CRIT "Setup of EMS_CPCPCI failed\n");
can_pci_dev_put(pcidev);
return -EIO;
}
candev->sysdevptr.pcidev=pcidev;
for(i=0;i<2;i++){
if(!(pci_resource_flags(pcidev,0)&IORESOURCE_MEM)){
printk(KERN_CRIT "EMS_CPCPCI region %d is not memory\n",i);
for(i=0;i<2;i++){
if(!(pci_resource_flags(pcidev,0)&IORESOURCE_MEM)){
printk(KERN_CRIT "EMS_CPCPCI region %d is not memory\n",i);
* 0x600 the second SJA1000
* each register occupies 4 bytes
*/
* 0x600 the second SJA1000
* each register occupies 4 bytes
*/
/*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/
/*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/
for(l=0,i=0;i<4;i++){
l<<=8;
l|=can_readb(candev->dev_base_addr + i*4);
}
i=can_readb(candev->dev_base_addr + i*5);
for(l=0,i=0;i<4;i++){
l<<=8;
l|=can_readb(candev->dev_base_addr + i*4);
}
i=can_readb(candev->dev_base_addr + i*5);
CANMSG("EMS CPC-PCI check value %04lx, ID %d\n", l, i);
CANMSG("EMS CPC-PCI check value %04lx, ID %d\n", l, i);
if(l!=0x55aa01cb) {
CANMSG("EMS CPC-PCI unexpected check values\n");
}
if(l!=0x55aa01cb) {
CANMSG("EMS CPC-PCI unexpected check values\n");
}
/* initialize common routines for the SJA1000 chip */
sja1000p_fill_chipspecops(candev->chip[chipnr]);
/* initialize common routines for the SJA1000 chip */
sja1000p_fill_chipspecops(candev->chip[chipnr]);
/* special version of the IRQ handler is required for CPC-PCI board */
candev->chip[chipnr]->chipspecops->irq_handler=ems_cpcpci_irq_handler;
/* special version of the IRQ handler is required for CPC-PCI board */
candev->chip[chipnr]->chipspecops->irq_handler=ems_cpcpci_irq_handler;
candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;
return 0;
candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;
return 0;
int ems_cpcpci_init_obj_data(struct canchip_t *chip, int objnr)
{
int ems_cpcpci_init_obj_data(struct canchip_t *chip, int objnr)
{
#define PLX9052_CNTRL 0x50 /* control register, for software reset */
/* The ESD PCI/200 uses (per default) just LINTi1 (Local Interrupt 1)
#define PLX9052_CNTRL 0x50 /* control register, for software reset */
/* The ESD PCI/200 uses (per default) just LINTi1 (Local Interrupt 1)
- * on the PLX. This means that both CAN channels' (SJA1000's) /INT pins
+ * on the PLX. This means that both CAN channels' (SJA1000's) /INT pins
* are OR'ed to the LINTi1 pin (actually ANDed in the 74HC08 since both
* the SJA1000's /INT pins and the LINTi1 pin are active low).
*
* The board does have an option to route the 2nd channel to LINTi2,
* apparently just one or two resistors need to be added.
*
* are OR'ed to the LINTi1 pin (actually ANDed in the 74HC08 since both
* the SJA1000's /INT pins and the LINTi1 pin are active low).
*
* The board does have an option to route the 2nd channel to LINTi2,
* apparently just one or two resistors need to be added.
*
- * LINTi2 is floating per default, so don't set its interrupt enable flag
+ * LINTi2 is floating per default, so don't set its interrupt enable flag
* 'PLX9052_INTCSR_LI2EN', it'll just interrupt all the time.
*/
#define PLX9052_INTCSR_LI1EN 0x00000001 /* Local Interrupt 1 enable */
* 'PLX9052_INTCSR_LI2EN', it'll just interrupt all the time.
*/
#define PLX9052_INTCSR_LI1EN 0x00000001 /* Local Interrupt 1 enable */
// Standard value: Pushpull (OCTP1|OCTN1|OCPOL1|OCTP0|OCTN0|OCM1)
#define ESDPCI200_OCR_DEFAULT_STD 0xFA
// Standard value: Pushpull (OCTP1|OCTN1|OCPOL1|OCTP0|OCTN0|OCM1)
#define ESDPCI200_OCR_DEFAULT_STD 0xFA
-/* Setting the OCR register to 0xFA is a good idea.
+/* Setting the OCR register to 0xFA is a good idea.
This means normal output mode , push-pull and the correct polarity. */
This means normal output mode , push-pull and the correct polarity. */
/* enable interrupts for the SJA1000's, enable PCI interrupts */
outl( PLX9052_INTCSR_LI1EN | PLX9052_INTCSR_PIEN,
candev->res_addr+PLX9052_INTCSR);
/* enable interrupts for the SJA1000's, enable PCI interrupts */
outl( PLX9052_INTCSR_LI1EN | PLX9052_INTCSR_PIEN,
candev->res_addr+PLX9052_INTCSR);
- DEBUGMSG("enabled interrupts on the PLX\n");
+ DEBUGMSG("enabled interrupts on the PLX\n");
}
int esdpci200_irq_handler(int irq, struct canchip_t *chip)
}
int esdpci200_irq_handler(int irq, struct canchip_t *chip)
//DEBUGMSG("Starting to handle an IRQ\n");
it_reg = inl(candev->res_addr+PLX9052_INTCSR);
rmb();
//DEBUGMSG("Starting to handle an IRQ\n");
it_reg = inl(candev->res_addr+PLX9052_INTCSR);
rmb();
- if((it_reg & (PLX9052_INTCSR_LI1S | PLX9052_INTCSR_LI1EN) )
- == (PLX9052_INTCSR_LI1S | PLX9052_INTCSR_LI1EN) )
+ if((it_reg & (PLX9052_INTCSR_LI1S | PLX9052_INTCSR_LI1EN) )
+ == (PLX9052_INTCSR_LI1S | PLX9052_INTCSR_LI1EN) )
{ /*interrupt enabled and active */
int chipnum;
for(chipnum=0; chipnum < candev->nr_sja1000_chips; chipnum++)
{ /*interrupt enabled and active */
int chipnum;
for(chipnum=0; chipnum < candev->nr_sja1000_chips; chipnum++)
}
}
if( retcode != CANCHIP_IRQ_HANDLED )
}
}
if( retcode != CANCHIP_IRQ_HANDLED )
- {/* None of the chips felt they were responsible for this IRQ...
+ {/* None of the chips felt they were responsible for this IRQ...
so it appears we have problems with the IRQ */
it_reg &= ~(PLX9052_INTCSR_LI1EN);
//Either we have a problem with IRQ malfunctions, or our IRQ is shared with some other device.
so it appears we have problems with the IRQ */
it_reg &= ~(PLX9052_INTCSR_LI1EN);
//Either we have a problem with IRQ malfunctions, or our IRQ is shared with some other device.
/*MEM window for SJA1000 chips*/
bar2_addr = pci_resource_start(pcidev,2);
candev->io_addr = bar2_addr;
/*MEM window for SJA1000 chips*/
bar2_addr = pci_resource_start(pcidev,2);
candev->io_addr = bar2_addr;
- if( ! (remap_addr=ioremap(bar2_addr,
+ if( ! (remap_addr=ioremap(bar2_addr,
pci_resource_len(pcidev,2)))) /*MEM window for SJA1000 chips*/
{
CANMSG("Unable to access I/O memory at: 0x%lx\n", (unsigned long)bar2_addr);
pci_resource_len(pcidev,2)))) /*MEM window for SJA1000 chips*/
{
CANMSG("Unable to access I/O memory at: 0x%lx\n", (unsigned long)bar2_addr);
}
can_base_addr_fixup(candev, remap_addr);
}
can_base_addr_fixup(candev, remap_addr);
- CANMSG("esdpci200_sja IO-memory: 0x%lx - 0x%lx (VMA 0x%lx)\n",
+ CANMSG("esdpci200_sja IO-memory: 0x%lx - 0x%lx (VMA 0x%lx)\n",
(unsigned long) bar2_addr,
(unsigned long) (bar2_addr + pci_resource_len(pcidev,2) - 1),
(long) remap_addr);
(unsigned long) bar2_addr,
(unsigned long) (bar2_addr + pci_resource_len(pcidev,2) - 1),
(long) remap_addr);
esdpci200_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
esdpci200_write_register(0, chip->chip_base_addr+SJAIER);
esdpci200_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
esdpci200_write_register(0, chip->chip_base_addr+SJAIER);
esdpci200_read_register(chip->chip_base_addr+SJAIR);
}
esdpci200_read_register(chip->chip_base_addr+SJAIR);
}
esdpci200_connect_irq(candev);
return 0;
esdpci200_connect_irq(candev);
return 0;
int esdpci200_init_hw_data(struct candevice_t *candev)
{
int esdpci200_init_hw_data(struct candevice_t *candev)
{
/* Physical address of SJA1000 window, stored for debugging only */
candev->io_addr = pci_resource_start(pcidev,2);
/* Physical address of SJA1000 window, stored for debugging only */
candev->io_addr = pci_resource_start(pcidev,2);
candev->aux_base_addr=NULL; /* mapped dynamically in esdpci200_request_io() */
candev->dev_base_addr=NULL; /* mapped dynamically in esdpci200_request_io() */
/*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/
candev->aux_base_addr=NULL; /* mapped dynamically in esdpci200_request_io() */
candev->dev_base_addr=NULL; /* mapped dynamically in esdpci200_request_io() */
/*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/
{
if(candev->sysdevptr.pcidev==NULL)
{
if(candev->sysdevptr.pcidev==NULL)
CANMSG("initializing esdpci200 chip operations\n");
CANMSG("initializing esdpci200 chip operations\n");
candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;
if( chipnr > 0 ) /* only one IRQ used for both channels.
candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;
if( chipnr > 0 ) /* only one IRQ used for both channels.
- CHIP_IRQ_CUSTOM req'd for RTAI, since
- registering two handlers for the same IRQ
+ CHIP_IRQ_CUSTOM req'd for RTAI, since
+ registering two handlers for the same IRQ
returns an error */
candev->chip[chipnr]->flags |= CHIP_IRQ_CUSTOM;
return 0;
returns an error */
candev->chip[chipnr]->flags |= CHIP_IRQ_CUSTOM;
return 0;
int esdpci200_init_obj_data(struct canchip_t *chip, int objnr)
{
int esdpci200_init_obj_data(struct canchip_t *chip, int objnr)
{
int can_fasync(int fd, struct file *file, int on)
{
int retval;
int can_fasync(int fd, struct file *file, int on)
{
int retval;
struct canuser_t *canuser = (struct canuser_t*)(file->private_data);
struct canque_ends_t *qends;
struct canuser_t *canuser = (struct canuser_t*)(file->private_data);
struct canque_ends_t *qends;
if(!canuser || (canuser->magic != CAN_USER_MAGIC)){
CANMSG("can_close: bad canuser magic\n");
return -ENODEV;
}
if(!canuser || (canuser->magic != CAN_USER_MAGIC)){
CANMSG("can_close: bad canuser magic\n");
return -ENODEV;
}
qends = canuser->qends;
retval = fasync_helper(fd, file, on, &qends->endinfo.fileinfo.fasync);
qends = canuser->qends;
retval = fasync_helper(fd, file, on, &qends->endinfo.fileinfo.fasync);
*
* The function gensja1000io_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
*
* The function gensja1000io_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
- * will have to add the code to reserve this memory as well.
+ * will have to add the code to reserve this memory as well.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* gensja1000io_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
* gensja1000io_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
- * The function gensja1000io_reset() is used to give a hardware reset. This is
- * rather hardware specific so I haven't included example code. Don't forget to
+ * The function gensja1000io_reset() is used to give a hardware reset. This is
+ * rather hardware specific so I haven't included example code. Don't forget to
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/gensja1000io.c
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/gensja1000io.c
int i;
struct canchip_t *chip=candev->chip[0];
unsigned cdr;
int i;
struct canchip_t *chip=candev->chip[0];
unsigned cdr;
gensja1000io_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
udelay(1000);
gensja1000io_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
udelay(1000);
cdr=gensja1000io_read_register(chip->chip_base_addr+SJACDR);
gensja1000io_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
cdr=gensja1000io_read_register(chip->chip_base_addr+SJACDR);
gensja1000io_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
gensja1000io_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
gensja1000io_write_register(0, chip->chip_base_addr+SJAIER);
gensja1000io_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
gensja1000io_write_register(0, chip->chip_base_addr+SJAIER);
* Return Value: The function always returns zero
* File: src/gensja1000io.c
*/
* Return Value: The function always returns zero
* File: src/gensja1000io.c
*/
-int gensja1000io_init_hw_data(struct candevice_t *candev)
+int gensja1000io_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=0;
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=0;
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
- * The entry @int_bus_reg holds hardware specific options for the Bus
+ * The entry @int_bus_reg holds hardware specific options for the Bus
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* The entry @int_cpu_reg holds hardware specific options for the cpu interface
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* The entry @int_cpu_reg holds hardware specific options for the cpu interface
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
- * The entry @obj_base_addr represents the first memory address of the message
+ * The entry @obj_base_addr represents the first memory address of the message
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* gensja1000io_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
* gensja1000io_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
- * The function gensja1000io_program_irq() is used for hardware that uses
+ * The function gensja1000io_program_irq() is used for hardware that uses
* programmable interrupts. If your hardware doesn't use programmable interrupts
* programmable interrupts. If your hardware doesn't use programmable interrupts
- * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
- * leave this function unedited. Again this function is hardware specific so
+ * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
+ * leave this function unedited. Again this function is hardware specific so
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/gensja1000io.c
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/gensja1000io.c
*
* The function gensja1000mm_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
*
* The function gensja1000mm_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
- * will have to add the code to reserve this memory as well.
+ * will have to add the code to reserve this memory as well.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
int gensja1000mm_request_io(struct candevice_t *candev)
{
can_ioptr_t remap_addr;
int gensja1000mm_request_io(struct candevice_t *candev)
{
can_ioptr_t remap_addr;
if (!can_request_mem_region(candev->io_addr,IO_RANGE,DEVICE_NAME)) {
CANMSG("Unable to request IO-memory: 0x%lx\n",candev->io_addr);
return -ENODEV;
if (!can_request_mem_region(candev->io_addr,IO_RANGE,DEVICE_NAME)) {
CANMSG("Unable to request IO-memory: 0x%lx\n",candev->io_addr);
return -ENODEV;
CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
can_release_mem_region(candev->io_addr,IO_RANGE);
return -ENODEV;
CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
can_release_mem_region(candev->io_addr,IO_RANGE);
return -ENODEV;
}
can_base_addr_fixup(candev, remap_addr);
DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
}
can_base_addr_fixup(candev, remap_addr);
DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
* gensja1000mm_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
* gensja1000mm_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
- * The function gensja1000mm_reset() is used to give a hardware reset. This is
- * rather hardware specific so I haven't included example code. Don't forget to
+ * The function gensja1000mm_reset() is used to give a hardware reset. This is
+ * rather hardware specific so I haven't included example code. Don't forget to
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/gensja1000mm.c
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/gensja1000mm.c
int i;
struct canchip_t *chip=candev->chip[0];
unsigned cdr;
int i;
struct canchip_t *chip=candev->chip[0];
unsigned cdr;
gensja1000mm_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
udelay(1000);
gensja1000mm_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
udelay(1000);
cdr=gensja1000mm_read_register(chip->chip_base_addr+SJACDR);
gensja1000mm_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
cdr=gensja1000mm_read_register(chip->chip_base_addr+SJACDR);
gensja1000mm_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
gensja1000mm_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
gensja1000mm_write_register(0, chip->chip_base_addr+SJAIER);
gensja1000mm_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
gensja1000mm_write_register(0, chip->chip_base_addr+SJAIER);
* Return Value: The function always returns zero
* File: src/gensja1000mm.c
*/
* Return Value: The function always returns zero
* File: src/gensja1000mm.c
*/
-int gensja1000mm_init_hw_data(struct candevice_t *candev)
+int gensja1000mm_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=0;
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=0;
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
- * The entry @int_bus_reg holds hardware specific options for the Bus
+ * The entry @int_bus_reg holds hardware specific options for the Bus
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* The entry @int_cpu_reg holds hardware specific options for the cpu interface
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* The entry @int_cpu_reg holds hardware specific options for the cpu interface
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
- * The entry @obj_base_addr represents the first memory address of the message
+ * The entry @obj_base_addr represents the first memory address of the message
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* gensja1000mm_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
* gensja1000mm_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
- * The function gensja1000mm_program_irq() is used for hardware that uses
+ * The function gensja1000mm_program_irq() is used for hardware that uses
* programmable interrupts. If your hardware doesn't use programmable interrupts
* programmable interrupts. If your hardware doesn't use programmable interrupts
- * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
- * leave this function unedited. Again this function is hardware specific so
+ * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
+ * leave this function unedited. Again this function is hardware specific so
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/gensja1000mm.c
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/gensja1000mm.c
int hcan2_chip_config(struct canchip_t *chip)
{
DEBUGMSG("Configuring chip...\n");
int hcan2_chip_config(struct canchip_t *chip)
{
DEBUGMSG("Configuring chip...\n");
if (hcan2_enable_configuration(chip))
return -ENODEV;
if (hcan2_enable_configuration(chip))
return -ENODEV;
bcr1 = (((tseg1 - 1) & 0x000f) << 12) + (((tseg2 - 1) & 0x0007) << 8) + ((sjw & 0x0003) << 4);
bcr0 = (best_brp - 1) & 0x00ff;
bcr1 = (((tseg1 - 1) & 0x000f) << 12) + (((tseg2 - 1) & 0x0007) << 8) + ((sjw & 0x0003) << 4);
bcr0 = (best_brp - 1) & 0x00ff;
- hcan2_set_btregs(chip, bcr0, bcr1);
+ hcan2_set_btregs(chip, bcr0, bcr1);
hcan2_disable_configuration(chip);
hcan2_disable_configuration(chip);
can_write_reg_w(chip, bcr1, HCAN2_BCR1);
can_write_reg_w(chip, bcr0, HCAN2_BCR0);
can_write_reg_w(chip, bcr1, HCAN2_BCR1);
can_write_reg_w(chip, bcr0, HCAN2_BCR0);
/* DEBUGMSG("BCR0 and BCR1 successfully set.\n"); */
return 0;
}
/* DEBUGMSG("BCR0 and BCR1 successfully set.\n"); */
return 0;
}
int hcan2_attach_to_chip(struct canchip_t *chip)
{
/* DEBUGMSG("Attaching to chip %d.\n", chip->chip_idx); */
int hcan2_attach_to_chip(struct canchip_t *chip)
{
/* DEBUGMSG("Attaching to chip %d.\n", chip->chip_idx); */
-
- /* initialize chip */
+
+ /* initialize chip */
if (hcan2_enable_configuration(chip))
return -ENODEV;
if (hcan2_enable_configuration(chip))
return -ENODEV;
{
hcan2_stop_chip(chip);
can_disable_irq(chip->chip_irq);
{
hcan2_stop_chip(chip);
can_disable_irq(chip->chip_irq);
hcan2_clear_objects(chip);
hcan2_clear_objects(chip);
DEBUGMSG("Chip released [%02d]\n", chip->chip_idx);
return 0;
}
DEBUGMSG("Chip released [%02d]\n", chip->chip_idx);
return 0;
}
struct msgobj_t * obj;
int obj_idx = (int) (chip->chip_data);
struct msgobj_t * obj;
int obj_idx = (int) (chip->chip_data);
return hcan2_extended_mask(chip, code, mask);
return hcan2_extended_mask(chip, code, mask);
if (obj_idx > 0 && obj_idx <= 32)
obj = chip->msgobj[obj_idx - 1];
else
if (obj_idx > 0 && obj_idx <= 32)
obj = chip->msgobj[obj_idx - 1];
else
ctrl0 = ((code & 0x07ff) << 4);
lafm0 = ((mask & 0x07ff) << 4);
lafm0 |= 0x0003; /* ignore Ext ID 17:16 */
ctrl0 = ((code & 0x07ff) << 4);
lafm0 = ((mask & 0x07ff) << 4);
lafm0 |= 0x0003; /* ignore Ext ID 17:16 */
can_write_reg_w(chip, ctrl0, (int) obj->obj_base_addr + HCAN2_MB_CTRL0);
can_write_reg_w(chip, 0x0000, (int) obj->obj_base_addr + HCAN2_MB_CTRL1);
can_write_reg_w(chip, lafm0, (int) obj->obj_base_addr + HCAN2_MB_MASK);
can_write_reg_w(chip, ctrl0, (int) obj->obj_base_addr + HCAN2_MB_CTRL0);
can_write_reg_w(chip, 0x0000, (int) obj->obj_base_addr + HCAN2_MB_CTRL1);
can_write_reg_w(chip, lafm0, (int) obj->obj_base_addr + HCAN2_MB_MASK);
struct msgobj_t * obj;
int obj_idx = (int) (chip->chip_data);
struct msgobj_t * obj;
int obj_idx = (int) (chip->chip_data);
if (obj_idx > 0 && obj_idx <= 32)
obj = chip->msgobj[obj_idx - 1];
else
if (obj_idx > 0 && obj_idx <= 32)
obj = chip->msgobj[obj_idx - 1];
else
lafm0 = ((mask & 0x1ffc0000) >> 14);
lafm0 |=((mask & 0x00030000) >> 16);
lafm1 = (mask & 0x0000ffff);
lafm0 = ((mask & 0x1ffc0000) >> 14);
lafm0 |=((mask & 0x00030000) >> 16);
lafm1 = (mask & 0x0000ffff);
can_write_reg_w(chip, ctrl0, (int) obj->obj_base_addr + HCAN2_MB_CTRL0);
can_write_reg_w(chip, ctrl1, (int) obj->obj_base_addr + HCAN2_MB_CTRL1);
can_write_reg_w(chip, lafm0, (int) obj->obj_base_addr + HCAN2_MB_MASK);
can_write_reg_w(chip, lafm1, (int) obj->obj_base_addr + HCAN2_MB_MASK + 2);
can_write_reg_w(chip, ctrl0, (int) obj->obj_base_addr + HCAN2_MB_CTRL0);
can_write_reg_w(chip, ctrl1, (int) obj->obj_base_addr + HCAN2_MB_CTRL1);
can_write_reg_w(chip, lafm0, (int) obj->obj_base_addr + HCAN2_MB_MASK);
can_write_reg_w(chip, lafm1, (int) obj->obj_base_addr + HCAN2_MB_MASK + 2);
DEBUGMSG("MB%02d: Set extended_mask [id:0x%08x, m:0x%08x]\n", obj_idx, (uint32_t)code, (uint32_t)mask);
DEBUGMSG("MB%02d: Set extended_mask [id:0x%08x, m:0x%08x]\n", obj_idx, (uint32_t)code, (uint32_t)mask);
/* clears mailbox and setup LFA to accept all Exted Messages */
hcan2_setup_mbox4read(obj);
/* clears mailbox and setup LFA to accept all Exted Messages */
hcan2_setup_mbox4read(obj);
hcan2_disable_configuration(chip);
return 0;
hcan2_disable_configuration(chip);
return 0;
{
DEBUGMSG("Pre write config\n");
{
DEBUGMSG("Pre write config\n");
- /* change Mailbox header only if neccessary */
+ /* change Mailbox header only if neccessary */
/* otherwise change only data */
if (hcan2_compare_msg(obj, msg))
{
if (hcan2_enable_configuration(chip))
return -ENODEV;
/* otherwise change only data */
if (hcan2_compare_msg(obj, msg))
{
if (hcan2_enable_configuration(chip))
return -ENODEV;
hcan2_setup_mbox4write(obj, msg);
hcan2_setup_mbox4write(obj, msg);
if (hcan2_disable_configuration(chip))
return -ENODEV;
}
if (hcan2_disable_configuration(chip))
return -ENODEV;
}
int hcan2_send_msg(struct canchip_t *chip, struct msgobj_t *obj, struct canmsg_t *msg)
{
unsigned obj_bit;
int hcan2_send_msg(struct canchip_t *chip, struct msgobj_t *obj, struct canmsg_t *msg)
{
unsigned obj_bit;
- int b_addr = ((obj->object - 1) / 16) * (-2);
+ int b_addr = ((obj->object - 1) / 16) * (-2);
obj_bit = (1 << ((obj->object - 1) % 16));
obj_bit = (1 << ((obj->object - 1) % 16));
/* CANMSG("Sending message [obj: %d]\n", obj->object - 1); */
can_write_reg_w(chip, obj_bit, b_addr + HCAN2_TXPR0);
/* CANMSG("Sending message [obj: %d]\n", obj->object - 1); */
can_write_reg_w(chip, obj_bit, b_addr + HCAN2_TXPR0);
CANMSG("Warning: entering ERROR PASSIVE state\nTEC: %d REC: %d\n",
(uint16_t)((tecrec >> 8) & 0x00ff), (uint16_t)(tecrec & 0x00ff));
CANMSG("Warning: entering ERROR PASSIVE state\nTEC: %d REC: %d\n",
(uint16_t)((tecrec >> 8) & 0x00ff), (uint16_t)(tecrec & 0x00ff));
/* Show warning only */
/* reset flag - by writing '1' */
/* Show warning only */
/* reset flag - by writing '1' */
}
/* Message Overrun/Overwritten */
}
/* Message Overrun/Overwritten */
- if (irq_reg & HCAN2_IRR_MOOI) {
+ if (irq_reg & HCAN2_IRR_MOOI) {
/* put get Unread Message Status Register */
rxdf = (can_read_reg_w(chip, HCAN2_UMSR1) << 16) + can_read_reg_w(chip, HCAN2_UMSR0);
/* find the message object */
for (idx = 0; (idx < chip->max_objects) && !(rxdf & (1<<idx)); idx++) { }
/* put get Unread Message Status Register */
rxdf = (can_read_reg_w(chip, HCAN2_UMSR1) << 16) + can_read_reg_w(chip, HCAN2_UMSR0);
/* find the message object */
for (idx = 0; (idx < chip->max_objects) && !(rxdf & (1<<idx)); idx++) { }
CANMSG("Error: MESSAGE OVERRUN/OVERWRITTEN [MB: %d]\n",idx);
CANMSG("Error: MESSAGE OVERRUN/OVERWRITTEN [MB: %d]\n",idx);
/* notify only injured RXqueue-end */
/* notify only injured RXqueue-end */
- if (idx < chip->max_objects)
+ if (idx < chip->max_objects)
hcan2_notifyRXends(chip->msgobj[idx], CANQUEUE_NOTIFY_ERROR);
/* reset flag */
hcan2_notifyRXends(chip->msgobj[idx], CANQUEUE_NOTIFY_ERROR);
/* reset flag */
can_write_reg_w(chip, 0xffff, HCAN2_ABACK0);
can_write_reg_w(chip, 0xffff, HCAN2_ABACK1);
return CANCHIP_IRQ_HANDLED;
can_write_reg_w(chip, 0xffff, HCAN2_ABACK0);
can_write_reg_w(chip, 0xffff, HCAN2_ABACK1);
return CANCHIP_IRQ_HANDLED;
can_write_reg_w(chip, 1 << (idx % 16), HCAN2_TXACK0 - 2 * (idx / 16));
can_write_reg_w(chip, 1 << (idx % 16), HCAN2_TXACK0 - 2 * (idx / 16));
hcan2_wakeup_tx(chip, chip->msgobj[idx]);
}
hcan2_wakeup_tx(chip, chip->msgobj[idx]);
}
hcan2_clear_irq_flags(chip);
can_write_reg_w(chip, irqs, HCAN2_IMR);
hcan2_clear_irq_flags(chip);
can_write_reg_w(chip, irqs, HCAN2_IMR);
/* allow all mailboxes to generate IRQ */
can_write_reg_w(chip, 0, HCAN2_MBIMR0);
can_write_reg_w(chip, 0, HCAN2_MBIMR1);
/* allow all mailboxes to generate IRQ */
can_write_reg_w(chip, 0, HCAN2_MBIMR0);
can_write_reg_w(chip, 0, HCAN2_MBIMR1);
/* CANMSG("IRQ Mask set [0x%02x]\n", irqs); */
return 0;
}
/* CANMSG("IRQ Mask set [0x%02x]\n", irqs); */
return 0;
}
int hcan2_check_MB_tx_stat(struct canchip_t *chip, struct msgobj_t *obj)
{
/* Transmition is complete return 0 - no error */
int hcan2_check_MB_tx_stat(struct canchip_t *chip, struct msgobj_t *obj)
{
/* Transmition is complete return 0 - no error */
/* MB1-MB15 are in CANTXPR0 and MB16-MB31 are in CANTXPR1
CANTXPR0 = CANTXPR1 + 0x0002
MB0 - receive only */
/* MB1-MB15 are in CANTXPR0 and MB16-MB31 are in CANTXPR1
CANTXPR0 = CANTXPR1 + 0x0002
MB0 - receive only */
if (obj->object == 1) /* msgbox 0 cant transmit only receive ! */
return -ENODEV;
if (obj->object == 1) /* msgbox 0 cant transmit only receive ! */
return -ENODEV;
can_msgobj_set_fl(obj,TX_REQUEST);
if(!can_msgobj_test_and_set_fl(obj,TX_LOCK) &&
!hcan2_check_MB_tx_stat(chip, obj))
can_msgobj_set_fl(obj,TX_REQUEST);
if(!can_msgobj_test_and_set_fl(obj,TX_LOCK) &&
!hcan2_check_MB_tx_stat(chip, obj))
can_msgobj_clear_fl(obj,TX_REQUEST);
hcan2_irq_write_handler(chip, obj);
can_msgobj_clear_fl(obj,TX_REQUEST);
hcan2_irq_write_handler(chip, obj);
can_msgobj_clear_fl(obj,TX_LOCK);
}
else
can_msgobj_clear_fl(obj,TX_LOCK);
}
else
unsigned ctrl0, ctrl2, data;
unsigned long flag_addr;
uint16_t mb_offset;
unsigned ctrl0, ctrl2, data;
unsigned long flag_addr;
uint16_t mb_offset;
mb_offset = (int ) obj->obj_base_addr;
mb_offset = (int ) obj->obj_base_addr;
obj->rx_msg.length = len = ctrl2 & HCAN2_MBCT2_DLC;
obj->rx_msg.flags = (ctrl0 & HCAN2_MBCT0_RTR) ? MSG_RTR : 0;
obj->rx_msg.cob = obj->object - 1;
obj->rx_msg.length = len = ctrl2 & HCAN2_MBCT2_DLC;
obj->rx_msg.flags = (ctrl0 & HCAN2_MBCT0_RTR) ? MSG_RTR : 0;
obj->rx_msg.cob = obj->object - 1;
/* get ID of received message */
if (ctrl0 & HCAN2_MBCT0_IDE)
{
/* get ID of received message */
if (ctrl0 & HCAN2_MBCT0_IDE)
{
* HCAN2_RXPR1, HCAN2_RXPR0, HCAN2_RFPR1, HCAN2_RFPR0
*/
flag_addr = HCAN2_RXPR0 - (int)((obj->object - 1) / 16) * 2;
* HCAN2_RXPR1, HCAN2_RXPR0, HCAN2_RFPR1, HCAN2_RFPR0
*/
flag_addr = HCAN2_RXPR0 - (int)((obj->object - 1) / 16) * 2;
/* Reset flag by writing 1 to its position */
can_write_reg_w(chip, (1 << ((obj->object - 1) % 16)), flag_addr);
/* Reset flag by writing 1 to its position */
can_write_reg_w(chip, (1 << ((obj->object - 1) % 16)), flag_addr);
chip->max_objects = 32;
chip->write_register = chip->hostdevice->hwspecops->write_register;
chip->read_register = chip->hostdevice->hwspecops->read_register;
chip->max_objects = 32;
chip->write_register = chip->hostdevice->hwspecops->write_register;
chip->read_register = chip->hostdevice->hwspecops->read_register;
/*
chip->flags;
chip->baudrate;
/*
chip->flags;
chip->baudrate;
* 11 recessive bits to join CAN bus activity
*/
* 11 recessive bits to join CAN bus activity
*/
unsigned gsr_reset;
DEBUGMSG("Resetting HCAN2 chip %d...\n", chip->chip_idx);
unsigned gsr_reset;
DEBUGMSG("Resetting HCAN2 chip %d...\n", chip->chip_idx);
/* send Reset Request */
can_write_reg_w(chip, HCAN2_MCR_RESET, HCAN2_MCR );
/* send Reset Request */
can_write_reg_w(chip, HCAN2_MCR_RESET, HCAN2_MCR );
- /* Check hardware reset status */
+ /* Check hardware reset status */
i = 0;
gsr_reset = can_read_reg_w(chip, HCAN2_GSR) & HCAN2_GSR_RESET;
while (!(gsr_reset) && ((i++) <= MAX_SETTING_WAIT_LOOPS))
i = 0;
gsr_reset = can_read_reg_w(chip, HCAN2_GSR) & HCAN2_GSR_RESET;
while (!(gsr_reset) && ((i++) <= MAX_SETTING_WAIT_LOOPS))
void hcan2_setup_mbox4write(struct msgobj_t * obj, struct canmsg_t * msg)
{
int mb_offset;
void hcan2_setup_mbox4write(struct msgobj_t * obj, struct canmsg_t * msg)
{
int mb_offset;
- uint16_t ctrl0, ctrl1, ctrl2;
+ uint16_t ctrl0, ctrl1, ctrl2;
struct canchip_t * chip = obj->hostchip;
DEBUGMSG("Change Header\n");
mb_offset = (int) obj->obj_base_addr;
struct canchip_t * chip = obj->hostchip;
DEBUGMSG("Change Header\n");
mb_offset = (int) obj->obj_base_addr;
hcan2_setup_ctrl_regs(msg, &ctrl0, &ctrl1, &ctrl2);
can_write_reg_w(chip, ctrl0, mb_offset + HCAN2_MB_CTRL0);
hcan2_setup_ctrl_regs(msg, &ctrl0, &ctrl1, &ctrl2);
can_write_reg_w(chip, ctrl0, mb_offset + HCAN2_MB_CTRL0);
void hcan2_setup_mbox4write_data(struct msgobj_t * obj, struct canmsg_t * msg)
{
int len,i, mb_offset;
void hcan2_setup_mbox4write_data(struct msgobj_t * obj, struct canmsg_t * msg)
{
int len,i, mb_offset;
struct canchip_t * chip = obj->hostchip;
DEBUGMSG("Change Data\n");
mb_offset = (int) obj->obj_base_addr;
struct canchip_t * chip = obj->hostchip;
DEBUGMSG("Change Data\n");
mb_offset = (int) obj->obj_base_addr;
len = msg->length;
if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
len = msg->length;
if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
for (i = 0; i < len; i+=2)
{
data = (msg->data[i] << 8) + (i+1 < len ? msg->data[i+1] : 0);
for (i = 0; i < len; i+=2)
{
data = (msg->data[i] << 8) + (i+1 < len ? msg->data[i+1] : 0);
void hcan2_setup_mbox4read(struct msgobj_t * obj)
{
struct canchip_t * chip = obj->hostchip;
void hcan2_setup_mbox4read(struct msgobj_t * obj)
{
struct canchip_t * chip = obj->hostchip;
hcan2_clear_mbox(chip, obj->object - 1);
// in structure chip->chip_data is Mailbox number
hcan2_clear_mbox(chip, obj->object - 1);
// in structure chip->chip_data is Mailbox number
uint16_t ctrl0, ctrl1, ctrl2;
uint16_t mb_offset;
uint16_t c0,c1,c2;
uint16_t ctrl0, ctrl1, ctrl2;
uint16_t mb_offset;
uint16_t c0,c1,c2;
struct canchip_t * chip = obj->hostchip;
mb_offset = (int) obj->obj_base_addr;
struct canchip_t * chip = obj->hostchip;
mb_offset = (int) obj->obj_base_addr;
/* if using EXT ID conpare also ctrl1 */
if (msg->flags & MSG_EXT && ctrl1 ^ c1)
return 1;
/* if using EXT ID conpare also ctrl1 */
if (msg->flags & MSG_EXT && ctrl1 ^ c1)
return 1;
DEBUGMSG("C0 0x%04x HW: 0x%04x\n", ctrl0, c0);
DEBUGMSG("C1 0x%04x HW: 0x%04x\n", ctrl1, c1);
DEBUGMSG("C0 0x%04x HW: 0x%04x\n", ctrl0, c0);
DEBUGMSG("C1 0x%04x HW: 0x%04x\n", ctrl1, c1);
*
* The function hms30c7202_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
*
* The function hms30c7202_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
- * will have to add the code to reserve this memory as well.
+ * will have to add the code to reserve this memory as well.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
CANMSG("hmsc30c7202_can failed to request mem region %lx.\n",
(unsigned long)candev->io_addr );
}
CANMSG("hmsc30c7202_can failed to request mem region %lx.\n",
(unsigned long)candev->io_addr );
}
if (!( candev->dev_base_addr = ioremap( candev->io_addr, IO_RANGE ))) {
DEBUGMSG( "Failed to map IO-memory: 0x%lx - 0x%lx, mapped to 0x%lx\n",
(unsigned long)candev->io_addr,
if (!( candev->dev_base_addr = ioremap( candev->io_addr, IO_RANGE ))) {
DEBUGMSG( "Failed to map IO-memory: 0x%lx - 0x%lx, mapped to 0x%lx\n",
(unsigned long)candev->io_addr,
can_release_mem_region(candev->io_addr, IO_RANGE);
return -ENODEV;
} else {
can_release_mem_region(candev->io_addr, IO_RANGE);
return -ENODEV;
} else {
DEBUGMSG( "Mapped IO-memory: 0x%lx - 0x%lx, mapped to 0x%lx\n",
(unsigned long)candev->io_addr,
(unsigned long)candev->io_addr + IO_RANGE - 1,
(unsigned long)candev->dev_base_addr);
DEBUGMSG( "Mapped IO-memory: 0x%lx - 0x%lx, mapped to 0x%lx\n",
(unsigned long)candev->io_addr,
(unsigned long)candev->io_addr + IO_RANGE - 1,
(unsigned long)candev->dev_base_addr);
candev->chip[0]->chip_base_addr=candev->dev_base_addr;
candev->chip[0]->chip_base_addr=candev->dev_base_addr;
//pchip->write_register(0, pchip->vbase_addr + CCCR);
//DEBUGMSG("C-CAN Control Register : 0x%.4lx\n",
// (unsigned long)(c_can_read_reg_w( pchip->vbase_addr + CCCR)));
candev->chip[0]->chipspecops->start_chip(candev->chip[0]);
//DEBUGMSG("C-CAN Control Register : 0x%.4lx\n",
// (unsigned long)(c_can_read_reg_w( pchip->vbase_addr + CCCR)));
//pchip->write_register(0, pchip->vbase_addr + CCCR);
//DEBUGMSG("C-CAN Control Register : 0x%.4lx\n",
// (unsigned long)(c_can_read_reg_w( pchip->vbase_addr + CCCR)));
candev->chip[0]->chipspecops->start_chip(candev->chip[0]);
//DEBUGMSG("C-CAN Control Register : 0x%.4lx\n",
// (unsigned long)(c_can_read_reg_w( pchip->vbase_addr + CCCR)));
//DEBUGMSG("hms30c7202_can request i/o, leaving.\n");
return 0;
}
//DEBUGMSG("hms30c7202_can request i/o, leaving.\n");
return 0;
}
int hms30c7202_release_io(struct candevice_t *candev)
{
u16 tempReg;
int hms30c7202_release_io(struct candevice_t *candev)
{
u16 tempReg;
//disable IRQ generation
tempReg = c_can_read_reg_w(candev->chip[0], CCCR);
c_can_config_irqs(candev->chip[0], 0);
//disable IRQ generation
tempReg = c_can_read_reg_w(candev->chip[0], CCCR);
c_can_config_irqs(candev->chip[0], 0);
/* // clear all message objects
for (i=1; i<=15; i++) {
ccscan_write_register(
/* // clear all message objects
for (i=1; i<=15; i++) {
ccscan_write_register(
*/
// power down HMS30c7202 - C_CAN
candev->chip[0]->chipspecops->stop_chip(candev->chip[0]);
*/
// power down HMS30c7202 - C_CAN
candev->chip[0]->chipspecops->stop_chip(candev->chip[0]);
// release I/O memory mapping
iounmap(candev->dev_base_addr);
// release I/O memory mapping
iounmap(candev->dev_base_addr);
// Release the memory region
can_release_mem_region(candev->io_addr, IO_RANGE);
// Release the memory region
can_release_mem_region(candev->io_addr, IO_RANGE);
int i=0;
int enableTest=0, disableTest=0;
struct canchip_t *pchip = candev->chip[0];
int i=0;
int enableTest=0, disableTest=0;
struct canchip_t *pchip = candev->chip[0];
enableTest = pchip->chipspecops->enable_configuration(pchip);
disableTest = pchip->chipspecops->disable_configuration(pchip);
if( enableTest || disableTest) {
enableTest = pchip->chipspecops->enable_configuration(pchip);
disableTest = pchip->chipspecops->disable_configuration(pchip);
if( enableTest || disableTest) {
CANMSG("Please check your hardware.\n");
return -ENODEV;
}
CANMSG("Please check your hardware.\n");
return -ENODEV;
}
/* Check busoff status */
/* Check busoff status */
while ( (c_can_read_reg_w(pchip, CCSR) & SR_BOFF) && (i<=15)) {
udelay(20000);
i++;
while ( (c_can_read_reg_w(pchip, CCSR) & SR_BOFF) && (i<=15)) {
udelay(20000);
i++;
}
else
DEBUGMSG("Chip0 reset status ok.\n");
}
else
DEBUGMSG("Chip0 reset status ok.\n");
//pchip->config_irqs(pchip, CR_MIE | CR_SIE | CR_EIE);
return 0;
}
//pchip->config_irqs(pchip, CR_MIE | CR_SIE | CR_EIE);
return 0;
}
* Return Value: The function always returns zero
* File: src/template.c
*/
* Return Value: The function always returns zero
* File: src/template.c
*/
-int hms30c7202_init_hw_data(struct candevice_t *candev)
+int hms30c7202_init_hw_data(struct candevice_t *candev)
/*( struct canchip_t *pchip, u16 chip_nr, u16 startminor, u32 baseaddr, u8 irq )*/
{
// u32 intCntrVAddr = 0;
can_ioptr_t gpioVAddr = 0;
u32 tempReg = 0;
u32 baseaddr=candev->io_addr;
/*( struct canchip_t *pchip, u16 chip_nr, u16 startminor, u32 baseaddr, u8 irq )*/
{
// u32 intCntrVAddr = 0;
can_ioptr_t gpioVAddr = 0;
u32 tempReg = 0;
u32 baseaddr=candev->io_addr;
// if ( (!( intCntrVAddr = ioremap( 0x80024000, 0xCD ) ))
// & (! ( gpioVAddr = ioremap( 0x80023000, 0xAD ) ))) {
// DEBUGMSG("Failed to map Int and GPIO memory\n");
// if ( (!( intCntrVAddr = ioremap( 0x80024000, 0xCD ) ))
// & (! ( gpioVAddr = ioremap( 0x80023000, 0xAD ) ))) {
// DEBUGMSG("Failed to map Int and GPIO memory\n");
DEBUGMSG("Failed to map GPIO memory\n");
return -EIO;
} else {
DEBUGMSG("Failed to map GPIO memory\n");
return -EIO;
} else {
// DEBUGMSG( "Mapped Interrupt Controller IO-memory: 0x%lx - 0x%lx to 0x%lx\n",
// (unsigned long)0X80024000,
// (unsigned long)0X800240CC,
// DEBUGMSG( "Mapped Interrupt Controller IO-memory: 0x%lx - 0x%lx to 0x%lx\n",
// (unsigned long)0X80024000,
// (unsigned long)0X800240CC,
(unsigned long)0X800240AC,
(unsigned long)gpioVAddr);
}
(unsigned long)0X800240AC,
(unsigned long)gpioVAddr);
}
if (baseaddr == 0x8002f000) {
// tempReg = can_readl(intCntrVAddr);
// DEBUGMSG("Read Interrupt Enable Register : 0x%.4lx\n",(long)tempReg);
if (baseaddr == 0x8002f000) {
// tempReg = can_readl(intCntrVAddr);
// DEBUGMSG("Read Interrupt Enable Register : 0x%.4lx\n",(long)tempReg);
// Initialize chip data ( only one chip )
// pcandev->pchip[ 0 ]->powner = pcandev;
/*pchip->ntype = CAN_CHIPTYPE_C_CAN;*/
// Initialize chip data ( only one chip )
// pcandev->pchip[ 0 ]->powner = pcandev;
/*pchip->ntype = CAN_CHIPTYPE_C_CAN;*/
candev->nr_82527_chips=0;
candev->nr_sja1000_chips=0;
candev->nr_all_chips=NR_C_CAN;
candev->nr_82527_chips=0;
candev->nr_sja1000_chips=0;
candev->nr_all_chips=NR_C_CAN;
candev->chip[chipnr]->max_objects = NR_MSGOBJ;
candev->chip[chipnr]->chip_base_addr=candev->io_addr;
candev->chip[chipnr]->max_objects = NR_MSGOBJ;
candev->chip[chipnr]->chip_base_addr=candev->io_addr;
candev->chip[chipnr]->clock = 16000000/2;
candev->chip[chipnr]->clock = 16000000/2;
/*candev->chip[chipnr]->int_clk_reg = 0x0;
candev->chip[chipnr]->int_bus_reg = 0x0;
candev->chip[chipnr]->sja_cdr_reg = 0x0;
candev->chip[chipnr]->sja_ocr_reg = 0x0;*/
/*candev->chip[chipnr]->int_clk_reg = 0x0;
candev->chip[chipnr]->int_bus_reg = 0x0;
candev->chip[chipnr]->sja_cdr_reg = 0x0;
candev->chip[chipnr]->sja_ocr_reg = 0x0;*/
*
* The function hms30c7202_init_obj_data() is used to initialize the hardware
* structure containing information about the different message objects on the
*
* The function hms30c7202_init_obj_data() is used to initialize the hardware
* structure containing information about the different message objects on the
- * CAN chip.
- * The entry @obj_base_addr represents the first memory address of the message
- * object.
+ * CAN chip.
+ * The entry @obj_base_addr represents the first memory address of the message
+ * object.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* Return Value: The function always returns zero
* File: src/template.c
* Unless the hardware uses a segmented memory map, flags can be set zero.
* Return Value: The function always returns zero
* File: src/template.c
/* It seems, that there is no purpose to setup object base address */
chip->msgobj[objnr]->obj_base_addr=0;
/* It seems, that there is no purpose to setup object base address */
chip->msgobj[objnr]->obj_base_addr=0;
/*can_msgobj_test_fl(pmsgobj,RX_MODE_EXT);*/
return 0;
}
/*can_msgobj_test_fl(pmsgobj,RX_MODE_EXT);*/
return 0;
}
address = can_ulong2ioptr(((addr & C_CAN_REGOFFS_MASK) << 1) |
(addr & ~C_CAN_REGOFFS_MASK));
address = can_ulong2ioptr(((addr & C_CAN_REGOFFS_MASK) << 1) |
(addr & ~C_CAN_REGOFFS_MASK));
//DEBUGMSG("Trying to write 0x%u16x to address 0x%lx\n",data,address);
//DEBUGMSG("Trying to write 0x%u16x to address 0x%lx\n",data,address);
can_writew(data,address);
//udelay( usecs );
for (i=0; i<5; i++);
can_writew(data,address);
//udelay( usecs );
for (i=0; i<5; i++);
{
unsigned long addr=can_ioptr2ulong(address);
u16 value, i;
{
unsigned long addr=can_ioptr2ulong(address);
u16 value, i;
address = can_ulong2ioptr(((addr & C_CAN_REGOFFS_MASK) << 1) |
(addr & ~C_CAN_REGOFFS_MASK));
//DEBUGMSG("Trying to read from address 0x%lx :",address);
address = can_ulong2ioptr(((addr & C_CAN_REGOFFS_MASK) << 1) |
(addr & ~C_CAN_REGOFFS_MASK));
//DEBUGMSG("Trying to read from address 0x%lx :",address);
value = can_readw(address);
//udelay( usecs );
for (i=0;i<5;i++);
value = can_readw(address);
//udelay( usecs );
for (i=0;i<5;i++);
value = can_readw(address);
//udelay( usecs );
for (i=0;i<5;i++);
value = can_readw(address);
//udelay( usecs );
for (i=0;i<5;i++);
//DEBUGMSG("0x%u16x\n",value);
return value;
//DEBUGMSG("0x%u16x\n",value);
return value;
* hms30c7202_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
* hms30c7202_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
- * The function hms30c7202_program_irq() is used for hardware that uses
+ * The function hms30c7202_program_irq() is used for hardware that uses
* programmable interrupts. If your hardware doesn't use programmable interrupts
* programmable interrupts. If your hardware doesn't use programmable interrupts
- * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
- * leave this function unedited. Again this function is hardware specific so
+ * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
+ * leave this function unedited. Again this function is hardware specific so
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
#include "../include/main.h"
#include "../include/i82527.h"
#include "../include/main.h"
#include "../include/i82527.h"
-void i82527_irq_rtr_handler(struct canchip_t *chip, struct msgobj_t *obj,
+void i82527_irq_rtr_handler(struct canchip_t *chip, struct msgobj_t *obj,
struct rtr_id *rtr_search, unsigned long message_id);
struct rtr_id *rtr_search, unsigned long message_id);
flags = can_read_reg(chip, iCTL) & (iCTL_IE|iCTL_SIE|iCTL_EIE);
can_write_reg(chip, flags|iCTL_CCE, iCTL);
flags = can_read_reg(chip, iCTL) & (iCTL_IE|iCTL_SIE|iCTL_EIE);
can_write_reg(chip, flags|iCTL_CCE, iCTL);
{
can_write_reg(chip,chip->int_cpu_reg,iCPU); // Configure cpu interface
can_write_reg(chip,(iCTL_CCE|iCTL_INI),iCTL); // Enable configuration
{
can_write_reg(chip,chip->int_cpu_reg,iCPU); // Configure cpu interface
can_write_reg(chip,(iCTL_CCE|iCTL_INI),iCTL); // Enable configuration
- i82527_seg_write_reg(chip,chip->int_clk_reg,iCLK); // Set clock out slew rates
+ i82527_seg_write_reg(chip,chip->int_clk_reg,iCLK); // Set clock out slew rates
i82527_seg_write_reg(chip,chip->int_bus_reg,iBUS); /* Bus configuration */
can_write_reg(chip,0x00,iSTAT); /* Clear error status register */
i82527_seg_write_reg(chip,chip->int_bus_reg,iBUS); /* Bus configuration */
can_write_reg(chip,0x00,iSTAT); /* Clear error status register */
- /* Check if we can at least read back some arbitrary data from the
+ /* Check if we can at least read back some arbitrary data from the
* card. If we can not, the card is not properly configured!
*/
canobj_write_reg(chip,chip->msgobj[1],0x25,iMSGDAT1);
* card. If we can not, the card is not properly configured!
*/
canobj_write_reg(chip,chip->msgobj[1],0x25,iMSGDAT1);
int best_error = 1000000000, error;
int best_tseg=0, best_brp=0, best_rate=0, brp=0;
int tseg=0, tseg1=0, tseg2=0;
int best_error = 1000000000, error;
int best_tseg=0, best_brp=0, best_rate=0, brp=0;
int tseg=0, tseg1=0, tseg2=0;
if (i82527_enable_configuration(chip))
return -ENODEV;
if (i82527_enable_configuration(chip))
return -ENODEV;
tseg2 = 0;
if (tseg2 > MAX_TSEG2)
tseg2 = MAX_TSEG2;
tseg2 = 0;
if (tseg2 > MAX_TSEG2)
tseg2 = MAX_TSEG2;
tseg1 = best_tseg-tseg2-2;
if (tseg1>MAX_TSEG1) {
tseg1 = MAX_TSEG1;
tseg1 = best_tseg-tseg2-2;
if (tseg1>MAX_TSEG1) {
tseg1 = MAX_TSEG1;
DEBUGMSG("brp=%d, best_tseg=%d, tseg1=%d, tseg2=%d, sampl_pt=%d\n",
best_brp, best_tseg, tseg1, tseg2,
(100*(best_tseg-tseg2)/(best_tseg+1)));
DEBUGMSG("brp=%d, best_tseg=%d, tseg1=%d, tseg2=%d, sampl_pt=%d\n",
best_brp, best_tseg, tseg1, tseg2,
(100*(best_tseg-tseg2)/(best_tseg+1)));
i82527_seg_write_reg(chip, sjw<<6 | best_brp, iBT0);
can_write_reg(chip, ((flags & BTR1_SAM) != 0)<<7 | tseg2<<4 | tseg1,
iBT1);
DEBUGMSG("Writing 0x%x to iBT0\n",(sjw<<6 | best_brp));
i82527_seg_write_reg(chip, sjw<<6 | best_brp, iBT0);
can_write_reg(chip, ((flags & BTR1_SAM) != 0)<<7 | tseg2<<4 | tseg1,
iBT1);
DEBUGMSG("Writing 0x%x to iBT0\n",(sjw<<6 | best_brp));
- DEBUGMSG("Writing 0x%x to iBT1\n",((flags & BTR1_SAM) != 0)<<7 |
+ DEBUGMSG("Writing 0x%x to iBT1\n",((flags & BTR1_SAM) != 0)<<7 |
tseg2<<4 | tseg1);
i82527_disable_configuration(chip);
tseg2<<4 | tseg1);
i82527_disable_configuration(chip);
mask0 = (unsigned char) (mask >> 3);
mask1 = (unsigned char) (mask << 5);
mask0 = (unsigned char) (mask >> 3);
mask1 = (unsigned char) (mask << 5);
can_write_reg(chip,mask0,iSGM0);
can_write_reg(chip,mask1,iSGM1);
can_write_reg(chip,mask0,iSGM0);
can_write_reg(chip,mask1,iSGM1);
DEBUGMSG("All message ID's set to standard\n");
else
DEBUGMSG("All message ID's set to extended\n");
DEBUGMSG("All message ID's set to standard\n");
else
DEBUGMSG("All message ID's set to extended\n");
{
int i=0,id0=0,id1=0,id2=0,id3=0;
int len;
{
int i=0,id0=0,id1=0,id2=0,id3=0;
int len;
len = msg->length;
if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
len = msg->length;
if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
{
canobj_write_reg(chip,obj,(MVAL_SET|TXIE_RES|RXIE_SET|INTPD_RES),iMSGCTL0);
canobj_write_reg(chip,obj,(RMPD_RES|TXRQ_SET|MLST_RES|NEWD_RES),iMSGCTL1);
{
canobj_write_reg(chip,obj,(MVAL_SET|TXIE_RES|RXIE_SET|INTPD_RES),iMSGCTL0);
canobj_write_reg(chip,obj,(RMPD_RES|TXRQ_SET|MLST_RES|NEWD_RES),iMSGCTL1);
flags = can_read_reg(chip, iCTL) & (iCTL_IE|iCTL_SIE|iCTL_EIE);
can_write_reg(chip, flags, iCTL);
flags = can_read_reg(chip, iCTL) & (iCTL_IE|iCTL_SIE|iCTL_EIE);
can_write_reg(chip, flags, iCTL);
void i82527_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
{
int cmd;
void i82527_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
{
int cmd;
int i;
unsigned long message_id;
int msgcfg, msgctl1;
int i;
unsigned long message_id;
int msgcfg, msgctl1;
msgctl1=canobj_read_reg(chip,obj,iMSGCTL1);
if(msgctl1 & NEWD_RES)
return;
msgctl1=canobj_read_reg(chip,obj,iMSGCTL1);
if(msgctl1 & NEWD_RES)
return;
do {
if(objnum != 14) {
canobj_write_reg(chip,obj,(RMPD_RES|TXRQ_RES|MLST_UNC|NEWD_RES),iMSGCTL1);
do {
if(objnum != 14) {
canobj_write_reg(chip,obj,(RMPD_RES|TXRQ_RES|MLST_UNC|NEWD_RES),iMSGCTL1);
for (i=0; i < obj->rx_msg.length; i++)
obj->rx_msg.data[i] = canobj_read_reg(chip,obj,iMSGDAT0+i);
for (i=0; i < obj->rx_msg.length; i++)
obj->rx_msg.data[i] = canobj_read_reg(chip,obj,iMSGDAT0+i);
if(objnum != 14) {
/* if NEWD is set after data read, then read data are likely inconsistent */
msgctl1=canobj_read_reg(chip,obj,iMSGCTL1);
if(objnum != 14) {
/* if NEWD is set after data read, then read data are likely inconsistent */
msgctl1=canobj_read_reg(chip,obj,iMSGCTL1);
canobj_write_reg(chip,obj,(RMPD_RES|TXRQ_RES|MLST_UNC|NEWD_RES),iMSGCTL1);
msgctl1=canobj_read_reg(chip,obj,iMSGCTL1);
}
canobj_write_reg(chip,obj,(RMPD_RES|TXRQ_RES|MLST_UNC|NEWD_RES),iMSGCTL1);
msgctl1=canobj_read_reg(chip,obj,iMSGCTL1);
}
/* fill CAN message timestamp */
can_filltimestamp(&obj->rx_msg.timestamp);
canque_filter_msg2edges(obj->qends, &obj->rx_msg);
/* fill CAN message timestamp */
can_filltimestamp(&obj->rx_msg.timestamp);
canque_filter_msg2edges(obj->qends, &obj->rx_msg);
if (msgctl1 & NEWD_SET)
continue;
if (msgctl1 & NEWD_SET)
continue;
if (msgctl1 & MLST_SET) {
canobj_write_reg(chip,obj,(RMPD_UNC|TXRQ_UNC|MLST_RES|NEWD_UNC),iMSGCTL1);
CANMSG("i82527_irq_read_handler: object %d message lost\n",objnum);
}
if (msgctl1 & MLST_SET) {
canobj_write_reg(chip,obj,(RMPD_UNC|TXRQ_UNC|MLST_RES|NEWD_UNC),iMSGCTL1);
CANMSG("i82527_irq_read_handler: object %d message lost\n",objnum);
}
if ((rtr_search!=NULL) && (rtr_search->id==message_id))
i82527_irq_rtr_handler(chip, obj, rtr_search, message_id);
else
if ((rtr_search!=NULL) && (rtr_search->id==message_id))
i82527_irq_rtr_handler(chip, obj, rtr_search, message_id);
else
- i82527_irq_read_handler(chip, obj, message_id);
+ i82527_irq_read_handler(chip, obj, message_id);
void i82527_irq_update_filter(struct canchip_t *chip, struct msgobj_t *obj)
{
struct canfilt_t filt;
void i82527_irq_update_filter(struct canchip_t *chip, struct msgobj_t *obj)
{
struct canfilt_t filt;
CANMSG("i82527_irq_register 0x%x\n",irq_register);
return CANCHIP_IRQ_STUCK;
}
CANMSG("i82527_irq_register 0x%x\n",irq_register);
return CANCHIP_IRQ_STUCK;
}
DEBUGMSG("i82527: iIRQ 0x%02x\n",irq_register);
DEBUGMSG("i82527: iIRQ 0x%02x\n",irq_register);
if (irq_register == 0x01) {
status_register=can_read_reg(chip, iSTAT);
CANMSG("Status register: 0x%x\n",status_register);
continue;
/*return CANCHIP_IRQ_NONE;*/
}
if (irq_register == 0x01) {
status_register=can_read_reg(chip, iSTAT);
CANMSG("Status register: 0x%x\n",status_register);
continue;
/*return CANCHIP_IRQ_NONE;*/
}
if (irq_register == 0x02)
object = 14;
else if(irq_register <= 13+3)
if (irq_register == 0x02)
object = 14;
else if(irq_register <= 13+3)
return CANCHIP_IRQ_NONE;
obj=chip->msgobj[object];
return CANCHIP_IRQ_NONE;
obj=chip->msgobj[object];
msgcfg = canobj_read_reg(chip,obj,iMSGCFG);
if (msgcfg & MCFG_DIR) {
can_msgobj_set_fl(obj,TX_REQUEST);
msgcfg = canobj_read_reg(chip,obj,iMSGCFG);
if (msgcfg & MCFG_DIR) {
can_msgobj_set_fl(obj,TX_REQUEST);
/* calls i82527_irq_write_handler synchronized with other invocations */
if(i82527_irq_sync_activities(chip, obj)<=0){
/* The interrupt has to be cleared anyway */
canobj_write_reg(chip,obj,(MVAL_UNC|TXIE_UNC|RXIE_UNC|INTPD_RES),iMSGCTL0);
/* calls i82527_irq_write_handler synchronized with other invocations */
if(i82527_irq_sync_activities(chip, obj)<=0){
/* The interrupt has to be cleared anyway */
canobj_write_reg(chip,obj,(MVAL_UNC|TXIE_UNC|RXIE_UNC|INTPD_RES),iMSGCTL0);
* Rerun for case, that parallel activity on SMP or fully-preemptive
* kernel result in preparation and finished sending of message
* between above if and canobj_write_reg.
* Rerun for case, that parallel activity on SMP or fully-preemptive
* kernel result in preparation and finished sending of message
* between above if and canobj_write_reg.
i82527_irq_sync_activities(chip, obj);
}
}
i82527_irq_sync_activities(chip, obj);
}
}
- i82527_irq_read_handler(chip, obj, object);
+ i82527_irq_read_handler(chip, obj, object);
} while((irq_register=i82527_seg_read_reg(chip, iIRQ)) != 0);
return CANCHIP_IRQ_HANDLED;
} while((irq_register=i82527_seg_read_reg(chip, iIRQ)) != 0);
return CANCHIP_IRQ_HANDLED;
canobj_write_reg(chip,obj,(MVAL_RES|TXIE_RES|RXIE_RES|INTPD_RES),iMSGCTL0);
canobj_write_reg(chip,obj,(RMPD_RES|TXRQ_RES|MLST_RES|NEWD_RES),iMSGCTL1);
canobj_write_reg(chip,obj,(MVAL_RES|TXIE_RES|RXIE_RES|INTPD_RES),iMSGCTL0);
canobj_write_reg(chip,obj,(RMPD_RES|TXRQ_RES|MLST_RES|NEWD_RES),iMSGCTL1);
can_spin_lock(&hardware_p->rtr_lock);
rtr_search->rtr_message->id=message_id;
rtr_search->rtr_message->length=(canobj_read_reg(chip,obj,iMSGCFG) & 0xf0)>>4;
for (i=0; i<rtr_search->rtr_message->length; i++)
rtr_search->rtr_message->data[i]=canobj_read_reg(chip,obj,iMSGDAT0+i);
can_spin_lock(&hardware_p->rtr_lock);
rtr_search->rtr_message->id=message_id;
rtr_search->rtr_message->length=(canobj_read_reg(chip,obj,iMSGCFG) & 0xf0)>>4;
for (i=0; i<rtr_search->rtr_message->length; i++)
rtr_search->rtr_message->data[i]=canobj_read_reg(chip,obj,iMSGDAT0+i);
can_spin_unlock(&hardware_p->rtr_lock);
if (waitqueue_active(&rtr_search->rtr_wq))
can_spin_unlock(&hardware_p->rtr_lock);
if (waitqueue_active(&rtr_search->rtr_wq))
int i82527_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
{
can_preempt_disable();
int i82527_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
{
can_preempt_disable();
can_msgobj_set_fl(obj,TX_REQUEST);
/* calls i82527_irq_write_handler synchronized with other invocations
can_msgobj_set_fl(obj,TX_REQUEST);
/* calls i82527_irq_write_handler synchronized with other invocations
int i82527_filtch_rq(struct canchip_t *chip, struct msgobj_t *obj)
{
can_preempt_disable();
int i82527_filtch_rq(struct canchip_t *chip, struct msgobj_t *obj)
{
can_preempt_disable();
can_msgobj_set_fl(obj,FILTCH_REQUEST);
/* setups filter synchronized with other invocations from kernel and IRQ context */
can_msgobj_set_fl(obj,FILTCH_REQUEST);
/* setups filter synchronized with other invocations from kernel and IRQ context */
struct msgobj_t *obj;
struct canchip_t *chip;
struct canque_ends_t *qends;
struct msgobj_t *obj;
struct canchip_t *chip;
struct canque_ends_t *qends;
if(!canuser || (canuser->magic != CAN_USER_MAGIC)){
CANMSG("can_ioctl: bad canuser magic\n");
return -ENODEV;
}
if(!canuser || (canuser->magic != CAN_USER_MAGIC)){
CANMSG("can_ioctl: bad canuser magic\n");
return -ENODEV;
}
obj = canuser->msgobj;
if (obj == NULL) {
CANMSG("Could not assign buffer structure\n");
obj = canuser->msgobj;
if (obj == NULL) {
CANMSG("Could not assign buffer structure\n");
case CONF_FILTER: {
/* In- and output buffer re-initialization */
case CONF_FILTER: {
/* In- and output buffer re-initialization */
if(canuser->rx_edge0){
canque_set_filt(canuser->rx_edge0, arg, ~0, 0);
}
break;
}
if(canuser->rx_edge0){
canque_set_filt(canuser->rx_edge0, arg, ~0, 0);
}
break;
}
case CANQUE_FILTER: {
struct canfilt_t canfilt;
int ret;
case CANQUE_FILTER: {
struct canfilt_t canfilt;
int ret;
case CANRTR_READ: {
int ret;
struct canmsg_t rtr_msg;
case CANRTR_READ: {
int ret;
struct canmsg_t rtr_msg;
ret = copy_from_user(&rtr_msg, (void*)arg, sizeof(struct canmsg_t));
if(ret) return -EFAULT;
ret = can_ioctl_remote_read(canuser, &rtr_msg, rtr_msg.id, 0);
ret = copy_from_user(&rtr_msg, (void*)arg, sizeof(struct canmsg_t));
if(ret) return -EFAULT;
ret = can_ioctl_remote_read(canuser, &rtr_msg, rtr_msg.id, 0);
case CONF_BAUDPARAMS: {
struct can_baudparams_t params;
int ret;
case CONF_BAUDPARAMS: {
struct can_baudparams_t params;
int ret;
ret = copy_from_user(¶ms, (void*)arg, sizeof(struct can_baudparams_t));
if(ret) return -EFAULT;
ret = copy_from_user(¶ms, (void*)arg, sizeof(struct can_baudparams_t));
if(ret) return -EFAULT;
CANMSG("Not a valid ioctl command\n");
return -EINVAL;
}
CANMSG("Not a valid ioctl command\n");
return -EINVAL;
}
struct msgobj_t *obj;
struct canchip_t *chip;
/*struct canque_ends_t *qends;*/
struct msgobj_t *obj;
struct canchip_t *chip;
/*struct canque_ends_t *qends;*/
DEBUGMSG("Remote transmission request\n");
/*qends = canuser->qends;*/
DEBUGMSG("Remote transmission request\n");
/*qends = canuser->qends;*/
if (hardware_p->rtr_queue == NULL) { //No remote messages pending
new_rtr_entry=(struct rtr_id *)kmalloc(sizeof(struct rtr_id),GFP_ATOMIC);
if (new_rtr_entry == NULL) {
if (hardware_p->rtr_queue == NULL) { //No remote messages pending
new_rtr_entry=(struct rtr_id *)kmalloc(sizeof(struct rtr_id),GFP_ATOMIC);
if (new_rtr_entry == NULL) {
- can_spin_unlock_irqrestore(&hardware_p->rtr_lock,
+ can_spin_unlock_irqrestore(&hardware_p->rtr_lock,
flags);
return -ENOMEM;
}
flags);
return -ENOMEM;
}
can_spin_lock_irqsave(&hardware_p->rtr_lock, flags);
if (hardware_p->rtr_queue == new_rtr_entry) {
can_spin_lock_irqsave(&hardware_p->rtr_lock, flags);
if (hardware_p->rtr_queue == new_rtr_entry) {
- if (new_rtr_entry->next != NULL)
+ if (new_rtr_entry->next != NULL)
hardware_p->rtr_queue=new_rtr_entry->next;
else
hardware_p->rtr_queue=NULL;
hardware_p->rtr_queue=new_rtr_entry->next;
else
hardware_p->rtr_queue=NULL;
struct msgobj_t *obj;
struct canchip_t *chip;
struct canque_ends_t *qends;
struct msgobj_t *obj;
struct canchip_t *chip;
struct canque_ends_t *qends;
if(!canuser || (canuser->magic != CAN_USER_MAGIC)){
CANMSG("can_ioctl_: bad canuser magic\n");
return -ENODEV;
}
if(!canuser || (canuser->magic != CAN_USER_MAGIC)){
CANMSG("can_ioctl_: bad canuser magic\n");
return -ENODEV;
}
obj = canuser->msgobj;
if (obj == NULL) {
CANMSG("Could not assign buffer structure\n");
obj = canuser->msgobj;
if (obj == NULL) {
CANMSG("Could not assign buffer structure\n");
case CANQUE_FILTER: {
struct canfilt_t canfilt=*(struct canfilt_t *)arg;
if(canuser->rx_edge0){
case CANQUE_FILTER: {
struct canfilt_t canfilt=*(struct canfilt_t *)arg;
if(canuser->rx_edge0){
CANMSG("Not a valid ioctl command\n");
return -EINVAL;
}
CANMSG("Not a valid ioctl command\n");
return -EINVAL;
}
DEBUGMSG ("ipci165_set_btregs[%i]: btr0=%02x, btr1=%02x\n",chip->chip_idx,
(unsigned)btr0,(unsigned)btr1);
DEBUGMSG ("ipci165_set_btregs[%i]: btr0=%02x, btr1=%02x\n",chip->chip_idx,
(unsigned)btr0,(unsigned)btr1);
/* configure the chip */
data[0] = chip->chip_idx;
data[1] = btr0;
data[2] = btr1;
/* configure the chip */
data[0] = chip->chip_idx;
data[1] = btr0;
data[2] = btr1;
size = 1;
if (bci_command(chip->hostdevice, CMD_INIT_CAN, 3, data) ||
bci_response(chip->hostdevice, CMD_INIT_CAN, &size, data) ||
size = 1;
if (bci_command(chip->hostdevice, CMD_INIT_CAN, 3, data) ||
bci_response(chip->hostdevice, CMD_INIT_CAN, &size, data) ||
int size;
DEBUGMSG ("ipci165_start_chip[%i]\n",chip->chip_idx);
int size;
DEBUGMSG ("ipci165_start_chip[%i]\n",chip->chip_idx);
/* start CAN */
data[0] = chip->chip_idx;
/* start CAN */
data[0] = chip->chip_idx;
size = 1;
if (bci_command(chip->hostdevice, CMD_START_CAN, 1, data) ||
bci_response(chip->hostdevice, CMD_START_CAN, &size, data) ||
size = 1;
if (bci_command(chip->hostdevice, CMD_START_CAN, 1, data) ||
bci_response(chip->hostdevice, CMD_START_CAN, &size, data) ||
int size;
DEBUGMSG ("ipci165_stop_chip[%i]\n",chip->chip_idx);
int size;
DEBUGMSG ("ipci165_stop_chip[%i]\n",chip->chip_idx);
/* configure the chip */
data[0] = chip->chip_idx;
/* configure the chip */
data[0] = chip->chip_idx;
size = 1;
if (bci_command(chip->hostdevice, CMD_STOP_CAN, 1, data) ||
bci_response(chip->hostdevice, CMD_STOP_CAN, &size, data) ||
size = 1;
if (bci_command(chip->hostdevice, CMD_STOP_CAN, 1, data) ||
bci_response(chip->hostdevice, CMD_STOP_CAN, &size, data) ||
obj->rx_msg.flags = (frame_info & BCI_MSG_FRAME_RTR ? MSG_RTR : 0);
obj->rx_msg.cob = 0;
obj->rx_msg.timestamp.tv_sec = 0;
obj->rx_msg.flags = (frame_info & BCI_MSG_FRAME_RTR ? MSG_RTR : 0);
obj->rx_msg.cob = 0;
obj->rx_msg.timestamp.tv_sec = 0;
- obj->rx_msg.timestamp.tv_usec =
+ obj->rx_msg.timestamp.tv_usec =
BCI_TIMESTAMP_RES * can_readl(msg_addr + BCI_MSG_TIMESTAMP);
/* BCI_TIMESTAMP_RES * le32_to_cpu(can_readl(msg_addr + BCI_MSG_TIMESTAMP)); */
BCI_TIMESTAMP_RES * can_readl(msg_addr + BCI_MSG_TIMESTAMP);
/* BCI_TIMESTAMP_RES * le32_to_cpu(can_readl(msg_addr + BCI_MSG_TIMESTAMP)); */
DEBUGMSG ("ipci165_irq_read_handler[%i]: CAN status=%04x\n",chip->chip_idx, status);
/* wake up the reset thread if the CAN is in bus off */
DEBUGMSG ("ipci165_irq_read_handler[%i]: CAN status=%04x\n",chip->chip_idx, status);
/* wake up the reset thread if the CAN is in bus off */
- if (status & BCI_CAN_STATUS_BUS_OFF)
+ if (status & BCI_CAN_STATUS_BUS_OFF)
{
CANMSG ("BUS-OFF detected! Restarting\n");
set_bit(CHIP_FLAG_BUS_OFF,&chip_data->flags);
{
CANMSG ("BUS-OFF detected! Restarting\n");
set_bit(CHIP_FLAG_BUS_OFF,&chip_data->flags);
*/
void ipci165_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj)
{
*/
void ipci165_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj)
{
- while(!can_msgobj_test_and_set_fl(obj,TX_LOCK))
+ while(!can_msgobj_test_and_set_fl(obj,TX_LOCK))
- if(can_msgobj_test_and_clear_fl(obj,TX_REQUEST))
+ if(can_msgobj_test_and_clear_fl(obj,TX_REQUEST))
{
ipci165_irq_write_handler(chip, obj);
}
{
ipci165_irq_write_handler(chip, obj);
}
* @chip: pointer to chip state structure
*
* The main purpose of this function is to perform all necessary channel
* @chip: pointer to chip state structure
*
* The main purpose of this function is to perform all necessary channel
- * operations as a reaction on signalled interrupt.
+ * operations as a reaction on signalled interrupt.
* File: src/ipci165.c
*/
void ipci165_irq_chip_handler(struct canchip_t *chip)
{
struct msgobj_t *obj = chip->msgobj[0];
struct ipci165_chip_t *chip_data = chip->chip_data;
* File: src/ipci165.c
*/
void ipci165_irq_chip_handler(struct canchip_t *chip)
{
struct msgobj_t *obj = chip->msgobj[0];
struct ipci165_chip_t *chip_data = chip->chip_data;
- struct bci_queue_t *queue;
+ struct bci_queue_t *queue;
DEBUGMSG ("ipci165_irq_chip_handler[%i]\n",chip->chip_idx);
DEBUGMSG ("ipci165_irq_chip_handler[%i]\n",chip->chip_idx);
* The CAN driver uses this pointer to store relationship of interrupt
* to chip state structure - @struct canchip_t
* @regs: system dependent value pointing to registers stored in exception frame
* The CAN driver uses this pointer to store relationship of interrupt
* to chip state structure - @struct canchip_t
* @regs: system dependent value pointing to registers stored in exception frame
* The interrupt handler is activated when the ipci165 controller generates
* an interrupt as a reaction an internal state change. The interrupt is
* acknowledged and ipci165_irq_chip_handler is called for every channel.
* The interrupt handler is activated when the ipci165 controller generates
* an interrupt as a reaction an internal state change. The interrupt is
* acknowledged and ipci165_irq_chip_handler is called for every channel.
{
#endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
{
#endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
- if ((candev->dev_base_addr = ioremap(dpram_addr,
+ if ((candev->dev_base_addr = ioremap(dpram_addr,
pci_resource_len(candev->sysdevptr.pcidev,2))))
{
DEBUGMSG ("ipci165_request_io: dpram remapped to 0x%lx\n", candev->dev_base_addr);
pci_resource_len(candev->sysdevptr.pcidev,2))))
{
DEBUGMSG ("ipci165_request_io: dpram remapped to 0x%lx\n", candev->dev_base_addr);
- if ((candev->aux_base_addr = ioremap(crm_addr,
+ if ((candev->aux_base_addr = ioremap(crm_addr,
pci_resource_len(candev->sysdevptr.pcidev,0))))
{
DEBUGMSG ("ipci165_request_io: crm remapped to 0x%lx\n", can_ioptr2ulong(candev->aux_base_addr));
pci_resource_len(candev->sysdevptr.pcidev,0))))
{
DEBUGMSG ("ipci165_request_io: crm remapped to 0x%lx\n", can_ioptr2ulong(candev->aux_base_addr));
{
struct ipci165_chip_t *chip_data;
int i;
{
struct ipci165_chip_t *chip_data;
int i;
/* disable irq on HW */
ipci165_disconnect_irq(candev);
/* disable irq on HW */
ipci165_disconnect_irq(candev);
DEBUGMSG ("ipci165_download_fw\n");
DEBUGMSG ("ipci165_download_fw\n");
- /* read name and version */
+ /* read name and version */
memcpy_fromio (board_name, dpram_addr + BOARD_NAME_OFS, BOARD_NAME_LEN);
board_name[BOARD_NAME_LEN] = 0;
memcpy_fromio (board_name, dpram_addr + BOARD_NAME_OFS, BOARD_NAME_LEN);
board_name[BOARD_NAME_LEN] = 0;
candev->nr_all_chips = chips;
canchip_done(candev->chip[1]);
candev->nr_all_chips = chips;
canchip_done(candev->chip[1]);
- } else CANMSG ("Chip 2 Type: %s\n",buffer+OF_BOARD_INFO_CHIP2_TYPE);
+ } else CANMSG ("Chip 2 Type: %s\n",buffer+OF_BOARD_INFO_CHIP2_TYPE);
/* start kernel threads */
for (i = 0 ; i < chips ; i++)
/* start kernel threads */
for (i = 0 ; i < chips ; i++)
/* we do not know yet, whether our HW has one or two chan chips. Let's
prepare configuration for maximal configuration = 2. This will be
corrected later on */
/* we do not know yet, whether our HW has one or two chan chips. Let's
prepare configuration for maximal configuration = 2. This will be
corrected later on */
- candev->nr_all_chips=2;
+ candev->nr_all_chips=2;
candev->flags |= CANDEV_PROGRAMMABLE_IRQ*0;
/* initialize device spinlock */
can_spin_lock_init(&candev->device_lock);
candev->flags |= CANDEV_PROGRAMMABLE_IRQ*0;
/* initialize device spinlock */
can_spin_lock_init(&candev->device_lock);
int ipci165_init_obj_data(struct canchip_t *chip, int objnr)
{
struct msgobj_t *obj=chip->msgobj[objnr];
int ipci165_init_obj_data(struct canchip_t *chip, int objnr)
{
struct msgobj_t *obj=chip->msgobj[objnr];
DEBUGMSG ("ipci165_init_obj_data\n");
DEBUGMSG ("ipci165_init_obj_data\n");
obj->obj_base_addr = 0; /* not known yet */
obj->tx_timeout.function = ipci165_do_tx_timeout;
obj->tx_timeout.data = (unsigned long)obj;
obj->obj_base_addr = 0; /* not known yet */
obj->tx_timeout.function = ipci165_do_tx_timeout;
obj->tx_timeout.data = (unsigned long)obj;
strp = str;
for (j = 0; j < to ; j++)
strp += sprintf(strp, "%02x ",buf[j]);
strp = str;
for (j = 0; j < to ; j++)
strp += sprintf(strp, "%02x ",buf[j]);
strp += sprintf(strp, " ");
for (j = 0; j < to ; j++)
*strp++= isprint(buf[j]) ? buf[j] : '.';
strp += sprintf(strp, " ");
for (j = 0; j < to ; j++)
*strp++= isprint(buf[j]) ? buf[j] : '.';
/************************************************************************
** BCI Firmware for IPCI165 ISA and PCI generated from the Intel HEX file
/************************************************************************
** BCI Firmware for IPCI165 ISA and PCI generated from the Intel HEX file
-************************************************************************/
-
+************************************************************************/
+
#include "../include/ipci165_fw.h"
#include "../include/ipci165_fw.h"
struct ipci165_fw_t ipci165_fw[] =
{
{
struct ipci165_fw_t ipci165_fw[] =
{
{
0x55, 0x4E, 0x4B, 0x4E, 0x4F, 0x57, 0x4E, 0x00, 0x53, 0x4A, 0x41, 0x31,
0x30, 0x30, 0x30, 0x00}
}
0x55, 0x4E, 0x4B, 0x4E, 0x4F, 0x57, 0x4E, 0x00, 0x53, 0x4A, 0x41, 0x31,
0x30, 0x30, 0x30, 0x00}
}
{
0x08, 0x000000AEUL,
{
0x03, 0x04, 0x56, 0x34, 0x2E, 0x30, 0x33, 0x00}
}
{
0x08, 0x000000AEUL,
{
0x03, 0x04, 0x56, 0x34, 0x2E, 0x30, 0x33, 0x00}
}
{
0x10, 0x00002B00UL,
{
0x2A, 0x40, 0x00, 0x10, 0x42, 0x61, 0x73, 0x69, 0x63, 0x20, 0x43, 0x41,
0x4E, 0x20, 0x69, 0x6E}
}
{
0x10, 0x00002B00UL,
{
0x2A, 0x40, 0x00, 0x10, 0x42, 0x61, 0x73, 0x69, 0x63, 0x20, 0x43, 0x41,
0x4E, 0x20, 0x69, 0x6E}
}
{
0x10, 0x00002B10UL,
{
0x74, 0x65, 0x72, 0x66, 0x61, 0x63, 0x65, 0x20, 0x66, 0x69, 0x72, 0x6D,
0x77, 0x61, 0x72, 0x65}
}
{
0x10, 0x00002B10UL,
{
0x74, 0x65, 0x72, 0x66, 0x61, 0x63, 0x65, 0x20, 0x66, 0x69, 0x72, 0x6D,
0x77, 0x61, 0x72, 0x65}
}
{
0x0E, 0x00002B20UL,
{
0x20, 0x66, 0x6F, 0x72, 0x20, 0x69, 0x50, 0x43, 0x2D, 0x49, 0x31, 0x36,
0x35, 0x00}
}
{
0x0E, 0x00002B20UL,
{
0x20, 0x66, 0x6F, 0x72, 0x20, 0x69, 0x50, 0x43, 0x2D, 0x49, 0x31, 0x36,
0x35, 0x00}
}
{
0x06, 0x00002B2EUL,
{
0x02, 0x40, 0x2A, 0x10, 0x00, 0x00}
}
{
0x06, 0x00002B2EUL,
{
0x02, 0x40, 0x2A, 0x10, 0x00, 0x00}
}
{
0x10, 0x000016D4UL,
{
0xF0, 0x48, 0x07, 0xF8, 0xF8, 0x00, 0x2D, 0x06, 0x09, 0x82, 0x3D, 0x07,
0xE0, 0x08, 0xCA, 0x00}
}
{
0x10, 0x000016D4UL,
{
0xF0, 0x48, 0x07, 0xF8, 0xF8, 0x00, 0x2D, 0x06, 0x09, 0x82, 0x3D, 0x07,
0xE0, 0x08, 0xCA, 0x00}
}
{
0x10, 0x000016E4UL,
{
0x38, 0x23, 0x0D, 0x03, 0xE0, 0x78, 0xCA, 0x00, 0x38, 0x23, 0x9A, 0x04,
0x0B, 0x00, 0x04, 0x8F}
}
{
0x10, 0x000016E4UL,
{
0x38, 0x23, 0x0D, 0x03, 0xE0, 0x78, 0xCA, 0x00, 0x38, 0x23, 0x9A, 0x04,
0x0B, 0x00, 0x04, 0x8F}
}
{
0x10, 0x000016F4UL,
{
0x12, 0xFD, 0xF2, 0xF4, 0x12, 0xFD, 0x3D, 0x06, 0xCA, 0x00, 0xDC, 0x21,
0xF2, 0xF4, 0x14, 0xFD}
}
{
0x10, 0x000016F4UL,
{
0x12, 0xFD, 0xF2, 0xF4, 0x12, 0xFD, 0x3D, 0x06, 0xCA, 0x00, 0xDC, 0x21,
0xF2, 0xF4, 0x14, 0xFD}
}
{
0x06, 0x00001704UL,
{
0xF6, 0xF4, 0x12, 0xFD, 0xCB, 0x00}
}
{
0x06, 0x00001704UL,
{
0xF6, 0xF4, 0x12, 0xFD, 0xCB, 0x00}
}
{
0x10, 0x0000170AUL,
{
0xEC, 0xFE, 0xEC, 0xFF, 0xE6, 0xF8, 0x82, 0x10, 0xCA, 0x00, 0xAC, 0x1E,
0xF0, 0x64, 0xF0, 0x75}
}
{
0x10, 0x0000170AUL,
{
0xEC, 0xFE, 0xEC, 0xFF, 0xE6, 0xF8, 0x82, 0x10, 0xCA, 0x00, 0xAC, 0x1E,
0xF0, 0x64, 0xF0, 0x75}
}
{
0x10, 0x0000171AUL,
{
0xF6, 0xF4, 0x7C, 0x10, 0xF6, 0xF5, 0x7E, 0x10, 0x70, 0x65, 0xEA, 0x20,
0xFA, 0x1B, 0xF2, 0xFF}
}
{
0x10, 0x0000171AUL,
{
0xF6, 0xF4, 0x7C, 0x10, 0xF6, 0xF5, 0x7E, 0x10, 0x70, 0x65, 0xEA, 0x20,
0xFA, 0x1B, 0xF2, 0xFF}
}
{
0x10, 0x0000172AUL,
{
0x7E, 0x10, 0xF2, 0xFE, 0x7C, 0x10, 0xDC, 0x0F, 0xA9, 0x8E, 0x29, 0x82,
0x2D, 0x35, 0x29, 0x82}
}
{
0x10, 0x0000172AUL,
{
0x7E, 0x10, 0xF2, 0xFE, 0x7C, 0x10, 0xDC, 0x0F, 0xA9, 0x8E, 0x29, 0x82,
0x2D, 0x35, 0x29, 0x82}
}
{
0x10, 0x0000173AUL,
{
0x8D, 0x4B, 0x2D, 0x70, 0x29, 0x82, 0xEA, 0x20, 0x8A, 0x18, 0x29, 0x82,
0xEA, 0x80, 0xF6, 0x18}
}
{
0x10, 0x0000173AUL,
{
0x8D, 0x4B, 0x2D, 0x70, 0x29, 0x82, 0xEA, 0x20, 0x8A, 0x18, 0x29, 0x82,
0xEA, 0x80, 0xF6, 0x18}
}
{
0x10, 0x0000174AUL,
{
0xEA, 0x20, 0x60, 0x19, 0x29, 0x83, 0xEA, 0x20, 0xCA, 0x19, 0x29, 0x82,
0xEA, 0x80, 0x28, 0x1A}
}
{
0x10, 0x0000174AUL,
{
0xEA, 0x20, 0x60, 0x19, 0x29, 0x83, 0xEA, 0x20, 0xCA, 0x19, 0x29, 0x82,
0xEA, 0x80, 0x28, 0x1A}
}
{
0x10, 0x0000175AUL,
{
0xEA, 0x20, 0xCE, 0x1A, 0x29, 0x82, 0xEA, 0x80, 0x1E, 0x1B, 0xEA, 0x20,
0x4C, 0x1B, 0x07, 0xF8}
}
{
0x10, 0x0000175AUL,
{
0xEA, 0x20, 0xCE, 0x1A, 0x29, 0x82, 0xEA, 0x80, 0x1E, 0x1B, 0xEA, 0x20,
0x4C, 0x1B, 0x07, 0xF8}
}
{
0x10, 0x0000176AUL,
{
0x0E, 0x00, 0xEA, 0x30, 0xD6, 0x1B, 0xE1, 0x18, 0xF7, 0xF8, 0x2C, 0x10,
0xE6, 0xFC, 0x2A, 0x00}
}
{
0x10, 0x0000176AUL,
{
0x0E, 0x00, 0xEA, 0x30, 0xD6, 0x1B, 0xE1, 0x18, 0xF7, 0xF8, 0x2C, 0x10,
0xE6, 0xFC, 0x2A, 0x00}
}
{
0x10, 0x0000177AUL,
{
0xE6, 0xFA, 0x00, 0x10, 0xE6, 0xFB, 0x01, 0x00, 0xE6, 0xF8, 0x2D, 0x10,
0xE6, 0xF9, 0x01, 0x00}
}
{
0x10, 0x0000177AUL,
{
0xE6, 0xFA, 0x00, 0x10, 0xE6, 0xFB, 0x01, 0x00, 0xE6, 0xF8, 0x2D, 0x10,
0xE6, 0xF9, 0x01, 0x00}
}
{
0x10, 0x0000178AUL,
{
0xCA, 0x00, 0x1A, 0x29, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00,
0xE6, 0xF8, 0x4C, 0x00}
}
{
0x10, 0x0000178AUL,
{
0xCA, 0x00, 0x1A, 0x29, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00,
0xE6, 0xF8, 0x4C, 0x00}
}
{
0x10, 0x0000179AUL,
{
0xCA, 0x00, 0xD8, 0x1E, 0xEA, 0x00, 0xFA, 0x1B, 0xE1, 0x28, 0xF7, 0xF8,
0x2C, 0x10, 0xE0, 0x6C}
}
{
0x10, 0x0000179AUL,
{
0xCA, 0x00, 0xD8, 0x1E, 0xEA, 0x00, 0xFA, 0x1B, 0xE1, 0x28, 0xF7, 0xF8,
0x2C, 0x10, 0xE0, 0x6C}
}
{
0x10, 0x000017AAUL,
{
0xE6, 0xFA, 0xB0, 0x00, 0xE6, 0xFB, 0x00, 0x00, 0xE6, 0xF8, 0x2D, 0x10,
0xE6, 0xF9, 0x01, 0x00}
}
{
0x10, 0x000017AAUL,
{
0xE6, 0xFA, 0xB0, 0x00, 0xE6, 0xFB, 0x00, 0x00, 0xE6, 0xF8, 0x2D, 0x10,
0xE6, 0xF9, 0x01, 0x00}
}
{
0x10, 0x000017BAUL,
{
0xCA, 0x00, 0x1A, 0x29, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00,
0xE6, 0xF8, 0x4C, 0x00}
}
{
0x10, 0x000017BAUL,
{
0xCA, 0x00, 0x1A, 0x29, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00,
0xE6, 0xF8, 0x4C, 0x00}
}
{
0x10, 0x000017CAUL,
{
0xCA, 0x00, 0xD8, 0x1E, 0xEA, 0x00, 0xFA, 0x1B, 0xDC, 0x0F, 0xA9, 0x8E,
0xF7, 0xF8, 0x2C, 0x10}
}
{
0x10, 0x000017CAUL,
{
0xCA, 0x00, 0xD8, 0x1E, 0xEA, 0x00, 0xFA, 0x1B, 0xDC, 0x0F, 0xA9, 0x8E,
0xF7, 0xF8, 0x2C, 0x10}
}
{
0x10, 0x000017DAUL,
{
0xE1, 0x18, 0xF7, 0xF8, 0x81, 0x10, 0x0D, 0x0F, 0xC2, 0xF7, 0x81, 0x10,
0xF2, 0xF5, 0x7E, 0x10}
}
{
0x10, 0x000017DAUL,
{
0xE1, 0x18, 0xF7, 0xF8, 0x81, 0x10, 0x0D, 0x0F, 0xC2, 0xF7, 0x81, 0x10,
0xF2, 0xF5, 0x7E, 0x10}
}
{
0x10, 0x000017EAUL,
{
0xF2, 0xF4, 0x7C, 0x10, 0x00, 0x47, 0xDC, 0x05, 0xA9, 0xA4, 0x57, 0xFA,
0xFF, 0x00, 0xE4, 0xA7}
}
{
0x10, 0x000017EAUL,
{
0xF2, 0xF4, 0x7C, 0x10, 0x00, 0x47, 0xDC, 0x05, 0xA9, 0xA4, 0x57, 0xFA,
0xFF, 0x00, 0xE4, 0xA7}
}
{
0x10, 0x000017FAUL,
{
0x2C, 0x10, 0x25, 0x8F, 0x81, 0x10, 0xF3, 0xF8, 0x82, 0x10, 0x43, 0xF8,
0x81, 0x10, 0xED, 0xEC}
}
{
0x10, 0x000017FAUL,
{
0x2C, 0x10, 0x25, 0x8F, 0x81, 0x10, 0xF3, 0xF8, 0x82, 0x10, 0x43, 0xF8,
0x81, 0x10, 0xED, 0xEC}
}
{
0x10, 0x0000180AUL,
{
0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00, 0xC2, 0xF8, 0x82, 0x10,
0xCA, 0x00, 0xD8, 0x1E}
}
{
0x10, 0x0000180AUL,
{
0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00, 0xC2, 0xF8, 0x82, 0x10,
0xCA, 0x00, 0xD8, 0x1E}
}
{
0x10, 0x0000181AUL,
{
0xEA, 0x00, 0xFA, 0x1B, 0xF2, 0xF5, 0x7E, 0x10, 0xF2, 0xF4, 0x7C, 0x10,
0xDC, 0x05, 0xF4, 0x84}
}
{
0x10, 0x0000181AUL,
{
0xEA, 0x00, 0xFA, 0x1B, 0xF2, 0xF5, 0x7E, 0x10, 0xF2, 0xF4, 0x7C, 0x10,
0xDC, 0x05, 0xF4, 0x84}
}
{
0x10, 0x0000182AUL,
{
0x03, 0x00, 0xC0, 0x8B, 0xF2, 0xF4, 0x7C, 0x10, 0xDC, 0x05, 0xF4, 0x84,
0x02, 0x00, 0xC0, 0x8A}
}
{
0x10, 0x0000182AUL,
{
0x03, 0x00, 0xC0, 0x8B, 0xF2, 0xF4, 0x7C, 0x10, 0xDC, 0x05, 0xF4, 0x84,
0x02, 0x00, 0xC0, 0x8A}
}
{
0x10, 0x0000183AUL,
{
0xE0, 0x19, 0xF2, 0xF4, 0x7C, 0x10, 0xDC, 0x05, 0xF4, 0x84, 0x01, 0x00,
0xC0, 0x88, 0xCA, 0x00}
}
{
0x10, 0x0000183AUL,
{
0xE0, 0x19, 0xF2, 0xF4, 0x7C, 0x10, 0xDC, 0x05, 0xF4, 0x84, 0x01, 0x00,
0xC0, 0x88, 0xCA, 0x00}
}
{
0x10, 0x0000184AUL,
{
0x18, 0x02, 0x49, 0x81, 0x3D, 0x0F, 0xE1, 0x48, 0xF7, 0xF8, 0x2C, 0x10,
0xE1, 0x18, 0xF7, 0xF8}
}
{
0x10, 0x0000184AUL,
{
0x18, 0x02, 0x49, 0x81, 0x3D, 0x0F, 0xE1, 0x48, 0xF7, 0xF8, 0x2C, 0x10,
0xE1, 0x18, 0xF7, 0xF8}
}
{
0x10, 0x0000185AUL,
{
0x2D, 0x10, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00, 0xE0, 0x28,
0xCA, 0x00, 0xD8, 0x1E}
}
{
0x10, 0x0000185AUL,
{
0x2D, 0x10, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00, 0xE0, 0x28,
0xCA, 0x00, 0xD8, 0x1E}
}
{
0x10, 0x0000186AUL,
{
0xEA, 0x00, 0xFA, 0x1B, 0xE1, 0x48, 0xF7, 0xF8, 0x2C, 0x10, 0xF7, 0x8E,
0x2D, 0x10, 0xE6, 0xF9}
}
{
0x10, 0x0000186AUL,
{
0xEA, 0x00, 0xFA, 0x1B, 0xE1, 0x48, 0xF7, 0xF8, 0x2C, 0x10, 0xF7, 0x8E,
0x2D, 0x10, 0xE6, 0xF9}
}
{
0x10, 0x0000187AUL,
{
0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00, 0xE0, 0x28, 0xCA, 0x00, 0xD8, 0x1E,
0xEA, 0x00, 0xFA, 0x1B}
}
{
0x10, 0x0000187AUL,
{
0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00, 0xE0, 0x28, 0xCA, 0x00, 0xD8, 0x1E,
0xEA, 0x00, 0xFA, 0x1B}
}
{
0x10, 0x0000188AUL,
{
0xF2, 0xF5, 0x7E, 0x10, 0xF2, 0xF4, 0x7C, 0x10, 0xDC, 0x05, 0xF4, 0x84,
0x01, 0x00, 0xF7, 0xF8}
}
{
0x10, 0x0000188AUL,
{
0xF2, 0xF5, 0x7E, 0x10, 0xF2, 0xF4, 0x7C, 0x10, 0xDC, 0x05, 0xF4, 0x84,
0x01, 0x00, 0xF7, 0xF8}
}
{
0x10, 0x0000189AUL,
{
0x80, 0x10, 0xC2, 0xF8, 0x80, 0x10, 0xCA, 0x00, 0x64, 0x04, 0x49, 0x81,
0x3D, 0x0E, 0xE1, 0x68}
}
{
0x10, 0x0000189AUL,
{
0x80, 0x10, 0xC2, 0xF8, 0x80, 0x10, 0xCA, 0x00, 0x64, 0x04, 0x49, 0x81,
0x3D, 0x0E, 0xE1, 0x68}
}
{
0x10, 0x000018AAUL,
{
0xF7, 0xF8, 0x2C, 0x10, 0xE1, 0x18, 0xF7, 0xF8, 0x2D, 0x10, 0xE6, 0xF9,
0x2C, 0x10, 0xE6, 0xFA}
}
{
0x10, 0x000018AAUL,
{
0xF7, 0xF8, 0x2C, 0x10, 0xE1, 0x18, 0xF7, 0xF8, 0x2D, 0x10, 0xE6, 0xF9,
0x2C, 0x10, 0xE6, 0xFA}
}
{
0x10, 0x000018BAUL,
{
0x01, 0x00, 0xE0, 0x28, 0xCA, 0x00, 0xD8, 0x1E, 0x0D, 0x0C, 0xE1, 0x68,
0xF7, 0xF8, 0x2C, 0x10}
}
{
0x10, 0x000018BAUL,
{
0x01, 0x00, 0xE0, 0x28, 0xCA, 0x00, 0xD8, 0x1E, 0x0D, 0x0C, 0xE1, 0x68,
0xF7, 0xF8, 0x2C, 0x10}
}
{
0x10, 0x000018CAUL,
{
0xF7, 0x8E, 0x2D, 0x10, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00,
0xE0, 0x28, 0xCA, 0x00}
}
{
0x10, 0x000018CAUL,
{
0xF7, 0x8E, 0x2D, 0x10, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00,
0xE0, 0x28, 0xCA, 0x00}
}
{
0x10, 0x000018DAUL,
{
0xD8, 0x1E, 0xF3, 0xF8, 0x80, 0x10, 0x3D, 0x05, 0xE0, 0x28, 0xCA, 0x00,
0x28, 0x24, 0xEA, 0x00}
}
{
0x10, 0x000018DAUL,
{
0xD8, 0x1E, 0xF3, 0xF8, 0x80, 0x10, 0x3D, 0x05, 0xE0, 0x28, 0xCA, 0x00,
0x28, 0x24, 0xEA, 0x00}
}
{
0x0C, 0x000018EAUL,
{
0xFA, 0x1B, 0xE0, 0x38, 0xCA, 0x00, 0x28, 0x24, 0xEA, 0x00, 0xFA, 0x1B}
}
{
0x0C, 0x000018EAUL,
{
0xFA, 0x1B, 0xE0, 0x38, 0xCA, 0x00, 0x28, 0x24, 0xEA, 0x00, 0xFA, 0x1B}
}
{
0x10, 0x000018F6UL,
{
0xF2, 0xF5, 0x7E, 0x10, 0xF2, 0xF4, 0x7C, 0x10, 0xDC, 0x05, 0xF4, 0x84,
0x01, 0x00, 0xF7, 0xF8}
}
{
0x10, 0x000018F6UL,
{
0xF2, 0xF5, 0x7E, 0x10, 0xF2, 0xF4, 0x7C, 0x10, 0xDC, 0x05, 0xF4, 0x84,
0x01, 0x00, 0xF7, 0xF8}
}
{
0x10, 0x00001906UL,
{
0x80, 0x10, 0x49, 0x80, 0x3D, 0x04, 0xE0, 0x28, 0xCA, 0x00, 0x6A, 0x24,
0x0D, 0x03, 0xE0, 0x38}
}
{
0x10, 0x00001906UL,
{
0x80, 0x10, 0x49, 0x80, 0x3D, 0x04, 0xE0, 0x28, 0xCA, 0x00, 0x6A, 0x24,
0x0D, 0x03, 0xE0, 0x38}
}
{
0x10, 0x00001916UL,
{
0xCA, 0x00, 0x6A, 0x24, 0xC2, 0xF8, 0x80, 0x10, 0xCA, 0x00, 0xA0, 0x05,
0x49, 0x81, 0x3D, 0x0F}
}
{
0x10, 0x00001916UL,
{
0xCA, 0x00, 0x6A, 0x24, 0xC2, 0xF8, 0x80, 0x10, 0xCA, 0x00, 0xA0, 0x05,
0x49, 0x81, 0x3D, 0x0F}
}
{
0x10, 0x00001926UL,
{
0xE1, 0x78, 0xF7, 0xF8, 0x2C, 0x10, 0xE1, 0x18, 0xF7, 0xF8, 0x2D, 0x10,
0xE6, 0xF9, 0x2C, 0x10}
}
{
0x10, 0x00001926UL,
{
0xE1, 0x78, 0xF7, 0xF8, 0x2C, 0x10, 0xE1, 0x18, 0xF7, 0xF8, 0x2D, 0x10,
0xE6, 0xF9, 0x2C, 0x10}
}
{
0x10, 0x00001936UL,
{
0xE6, 0xFA, 0x01, 0x00, 0xE0, 0x28, 0xCA, 0x00, 0xD8, 0x1E, 0xEA, 0x00,
0xFA, 0x1B, 0xE1, 0x78}
}
{
0x10, 0x00001936UL,
{
0xE6, 0xFA, 0x01, 0x00, 0xE0, 0x28, 0xCA, 0x00, 0xD8, 0x1E, 0xEA, 0x00,
0xFA, 0x1B, 0xE1, 0x78}
}
{
0x10, 0x00001946UL,
{
0xF7, 0xF8, 0x2C, 0x10, 0xF7, 0x8E, 0x2D, 0x10, 0xE6, 0xF9, 0x2C, 0x10,
0xE6, 0xFA, 0x01, 0x00}
}
{
0x10, 0x00001946UL,
{
0xF7, 0xF8, 0x2C, 0x10, 0xF7, 0x8E, 0x2D, 0x10, 0xE6, 0xF9, 0x2C, 0x10,
0xE6, 0xFA, 0x01, 0x00}
}
{
0x10, 0x00001956UL,
{
0xE0, 0x28, 0xCA, 0x00, 0xD8, 0x1E, 0xEA, 0x00, 0xFA, 0x1B, 0xF2, 0xF5,
0x7E, 0x10, 0xF2, 0xF4}
}
{
0x10, 0x00001956UL,
{
0xE0, 0x28, 0xCA, 0x00, 0xD8, 0x1E, 0xEA, 0x00, 0xFA, 0x1B, 0xF2, 0xF5,
0x7E, 0x10, 0xF2, 0xF4}
}
{
0x10, 0x00001966UL,
{
0x7C, 0x10, 0xDC, 0x05, 0xF4, 0x84, 0x01, 0x00, 0xF7, 0xF8, 0x80, 0x10,
0x49, 0x80, 0x3D, 0x04}
}
{
0x10, 0x00001966UL,
{
0x7C, 0x10, 0xDC, 0x05, 0xF4, 0x84, 0x01, 0x00, 0xF7, 0xF8, 0x80, 0x10,
0x49, 0x80, 0x3D, 0x04}
}
{
0x10, 0x00001976UL,
{
0xE0, 0x28, 0xCA, 0x00, 0x6A, 0x24, 0x0D, 0x03, 0xE0, 0x38, 0xCA, 0x00,
0x6A, 0x24, 0xC2, 0xF8}
}
{
0x10, 0x00001976UL,
{
0xE0, 0x28, 0xCA, 0x00, 0x6A, 0x24, 0x0D, 0x03, 0xE0, 0x38, 0xCA, 0x00,
0x6A, 0x24, 0xC2, 0xF8}
}
{
0x10, 0x00001986UL,
{
0x80, 0x10, 0xCA, 0x00, 0x44, 0x06, 0x49, 0x81, 0x3D, 0x0F, 0xE1, 0x88,
0xF7, 0xF8, 0x2C, 0x10}
}
{
0x10, 0x00001986UL,
{
0x80, 0x10, 0xCA, 0x00, 0x44, 0x06, 0x49, 0x81, 0x3D, 0x0F, 0xE1, 0x88,
0xF7, 0xF8, 0x2C, 0x10}
}
{
0x10, 0x00001996UL,
{
0xE1, 0x18, 0xF7, 0xF8, 0x2D, 0x10, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA,
0x01, 0x00, 0xE0, 0x28}
}
{
0x10, 0x00001996UL,
{
0xE1, 0x18, 0xF7, 0xF8, 0x2D, 0x10, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA,
0x01, 0x00, 0xE0, 0x28}
}
{
0x10, 0x000019A6UL,
{
0xCA, 0x00, 0xD8, 0x1E, 0xEA, 0x00, 0xFA, 0x1B, 0xE1, 0x88, 0xF7, 0xF8,
0x2C, 0x10, 0xF7, 0x8E}
}
{
0x10, 0x000019A6UL,
{
0xCA, 0x00, 0xD8, 0x1E, 0xEA, 0x00, 0xFA, 0x1B, 0xE1, 0x88, 0xF7, 0xF8,
0x2C, 0x10, 0xF7, 0x8E}
}
{
0x10, 0x000019B6UL,
{
0x2D, 0x10, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00, 0xE0, 0x28,
0xCA, 0x00, 0xD8, 0x1E}
}
{
0x10, 0x000019B6UL,
{
0x2D, 0x10, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00, 0xE0, 0x28,
0xCA, 0x00, 0xD8, 0x1E}
}
{
0x10, 0x000019C6UL,
{
0xEA, 0x00, 0xFA, 0x1B, 0xF2, 0xF5, 0x7E, 0x10, 0xF2, 0xF4, 0x7C, 0x10,
0xDC, 0x05, 0xF4, 0x84}
}
{
0x10, 0x000019C6UL,
{
0xEA, 0x00, 0xFA, 0x1B, 0xF2, 0xF5, 0x7E, 0x10, 0xF2, 0xF4, 0x7C, 0x10,
0xDC, 0x05, 0xF4, 0x84}
}
{
0x10, 0x000019D6UL,
{
0x02, 0x00, 0xC0, 0x89, 0xF2, 0xF4, 0x7C, 0x10, 0xDC, 0x05, 0xF4, 0x84,
0x01, 0x00, 0xC0, 0x88}
}
{
0x10, 0x000019D6UL,
{
0x02, 0x00, 0xC0, 0x89, 0xF2, 0xF4, 0x7C, 0x10, 0xDC, 0x05, 0xF4, 0x84,
0x01, 0x00, 0xC0, 0x88}
}
{
0x10, 0x000019E6UL,
{
0xCA, 0x00, 0x76, 0x1E, 0x49, 0x81, 0x3D, 0x0F, 0xE1, 0xB8, 0xF7, 0xF8,
0x2C, 0x10, 0xE1, 0x18}
}
{
0x10, 0x000019E6UL,
{
0xCA, 0x00, 0x76, 0x1E, 0x49, 0x81, 0x3D, 0x0F, 0xE1, 0xB8, 0xF7, 0xF8,
0x2C, 0x10, 0xE1, 0x18}
}
{
0x10, 0x000019F6UL,
{
0xF7, 0xF8, 0x2D, 0x10, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00,
0xE0, 0x28, 0xCA, 0x00}
}
{
0x10, 0x000019F6UL,
{
0xF7, 0xF8, 0x2D, 0x10, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00,
0xE0, 0x28, 0xCA, 0x00}
}
{
0x10, 0x00001A06UL,
{
0xD8, 0x1E, 0xEA, 0x00, 0xFA, 0x1B, 0xE1, 0xB8, 0xF7, 0xF8, 0x2C, 0x10,
0xF7, 0x8E, 0x2D, 0x10}
}
{
0x10, 0x00001A06UL,
{
0xD8, 0x1E, 0xEA, 0x00, 0xFA, 0x1B, 0xE1, 0xB8, 0xF7, 0xF8, 0x2C, 0x10,
0xF7, 0x8E, 0x2D, 0x10}
}
{
0x10, 0x00001A16UL,
{
0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00, 0xE0, 0x28, 0xCA, 0x00,
0xD8, 0x1E, 0xEA, 0x00}
}
{
0x10, 0x00001A16UL,
{
0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00, 0xE0, 0x28, 0xCA, 0x00,
0xD8, 0x1E, 0xEA, 0x00}
}
{
0x10, 0x00001A26UL,
{
0xFA, 0x1B, 0xE1, 0xC8, 0xF7, 0xF8, 0x2C, 0x10, 0xD7, 0x00, 0x00, 0x00,
0xF2, 0xF4, 0xAE, 0x00}
}
{
0x10, 0x00001A26UL,
{
0xFA, 0x1B, 0xE1, 0xC8, 0xF7, 0xF8, 0x2C, 0x10, 0xD7, 0x00, 0x00, 0x00,
0xF2, 0xF4, 0xAE, 0x00}
}
{
0x10, 0x00001A36UL,
{
0xF6, 0xF4, 0x2E, 0x10, 0xF6, 0x8E, 0x30, 0x10, 0xF3, 0xF8, 0x2D, 0x11,
0x49, 0x81, 0x3D, 0x0F}
}
{
0x10, 0x00001A36UL,
{
0xF6, 0xF4, 0x2E, 0x10, 0xF6, 0x8E, 0x30, 0x10, 0xF3, 0xF8, 0x2D, 0x11,
0x49, 0x81, 0x3D, 0x0F}
}
{
0x10, 0x00001A46UL,
{
0xE0, 0x14, 0xF6, 0xF4, 0x30, 0x10, 0xE0, 0x8C, 0xE6, 0xFA, 0x32, 0xC0,
0xE6, 0xFB, 0x00, 0x00}
}
{
0x10, 0x00001A46UL,
{
0xE0, 0x14, 0xF6, 0xF4, 0x30, 0x10, 0xE0, 0x8C, 0xE6, 0xFA, 0x32, 0xC0,
0xE6, 0xFB, 0x00, 0x00}
}
{
0x10, 0x00001A56UL,
{
0xE6, 0xF8, 0x32, 0x10, 0xE6, 0xF9, 0x01, 0x00, 0xCA, 0x00, 0x1A, 0x29,
0x0D, 0x0B, 0xE0, 0x8C}
}
{
0x10, 0x00001A56UL,
{
0xE6, 0xF8, 0x32, 0x10, 0xE6, 0xF9, 0x01, 0x00, 0xCA, 0x00, 0x1A, 0x29,
0x0D, 0x0B, 0xE0, 0x8C}
}
{
0x10, 0x00001A66UL,
{
0xE6, 0xFA, 0x2A, 0xC0, 0xE6, 0xFB, 0x00, 0x00, 0xE6, 0xF8, 0x32, 0x10,
0xE6, 0xF9, 0x01, 0x00}
}
{
0x10, 0x00001A66UL,
{
0xE6, 0xFA, 0x2A, 0xC0, 0xE6, 0xFB, 0x00, 0x00, 0xE6, 0xF8, 0x32, 0x10,
0xE6, 0xF9, 0x01, 0x00}
}
{
0x10, 0x00001A76UL,
{
0xCA, 0x00, 0x1A, 0x29, 0xF3, 0xF8, 0x2C, 0x11, 0x49, 0x81, 0x3D, 0x11,
0xF2, 0xF4, 0x30, 0x10}
}
{
0x10, 0x00001A76UL,
{
0xCA, 0x00, 0x1A, 0x29, 0xF3, 0xF8, 0x2C, 0x11, 0x49, 0x81, 0x3D, 0x11,
0xF2, 0xF4, 0x30, 0x10}
}
{
0x10, 0x00001A86UL,
{
0x08, 0x41, 0xF6, 0xF4, 0x30, 0x10, 0xE0, 0x8C, 0xE6, 0xFA, 0x32, 0xC0,
0xE6, 0xFB, 0x00, 0x00}
}
{
0x10, 0x00001A86UL,
{
0x08, 0x41, 0xF6, 0xF4, 0x30, 0x10, 0xE0, 0x8C, 0xE6, 0xFA, 0x32, 0xC0,
0xE6, 0xFB, 0x00, 0x00}
}
{
0x10, 0x00001A96UL,
{
0xE6, 0xF8, 0x3C, 0x10, 0xE6, 0xF9, 0x01, 0x00, 0xCA, 0x00, 0x1A, 0x29,
0x0D, 0x0B, 0xE0, 0x8C}
}
{
0x10, 0x00001A96UL,
{
0xE6, 0xF8, 0x3C, 0x10, 0xE6, 0xF9, 0x01, 0x00, 0xCA, 0x00, 0x1A, 0x29,
0x0D, 0x0B, 0xE0, 0x8C}
}
{
0x10, 0x00001AA6UL,
{
0xE6, 0xFA, 0x2A, 0xC0, 0xE6, 0xFB, 0x00, 0x00, 0xE6, 0xF8, 0x3C, 0x10,
0xE6, 0xF9, 0x01, 0x00}
}
{
0x10, 0x00001AA6UL,
{
0xE6, 0xFA, 0x2A, 0xC0, 0xE6, 0xFB, 0x00, 0x00, 0xE6, 0xF8, 0x3C, 0x10,
0xE6, 0xF9, 0x01, 0x00}
}
{
0x0C, 0x00001AB6UL,
{
0xCA, 0x00, 0x1A, 0x29, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00}
}
{
0x0C, 0x00001AB6UL,
{
0xCA, 0x00, 0x1A, 0x29, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00}
}
{
0x10, 0x00001AC2UL,
{
0xE6, 0xF8, 0x1A, 0x00, 0xCA, 0x00, 0xD8, 0x1E, 0xEA, 0x00, 0xFA, 0x1B,
0x8A, 0x04, 0x19, 0x00}
}
{
0x10, 0x00001AC2UL,
{
0xE6, 0xF8, 0x1A, 0x00, 0xCA, 0x00, 0xD8, 0x1E, 0xEA, 0x00, 0xFA, 0x1B,
0x8A, 0x04, 0x19, 0x00}
}
{
0x10, 0x00001AD2UL,
{
0xBE, 0x88, 0xCC, 0x00, 0xF2, 0xF5, 0x7E, 0x10, 0xF2, 0xF4, 0x7C, 0x10,
0xDC, 0x05, 0xD4, 0x44}
}
{
0x10, 0x00001AD2UL,
{
0xBE, 0x88, 0xCC, 0x00, 0xF2, 0xF5, 0x7E, 0x10, 0xF2, 0xF4, 0x7C, 0x10,
0xDC, 0x05, 0xD4, 0x44}
}
{
0x10, 0x00001AE2UL,
{
0x02, 0x00, 0xF6, 0xF4, 0x14, 0xFD, 0x7C, 0x14, 0xF6, 0xF4, 0x14, 0xFD,
0xF6, 0xF4, 0x12, 0xFD}
}
{
0x10, 0x00001AE2UL,
{
0x02, 0x00, 0xF6, 0xF4, 0x14, 0xFD, 0x7C, 0x14, 0xF6, 0xF4, 0x14, 0xFD,
0xF6, 0xF4, 0x12, 0xFD}
}
{
0x10, 0x00001AF2UL,
{
0x0F, 0x04, 0xBF, 0x88, 0xE1, 0xD8, 0xF7, 0xF8, 0x2C, 0x10, 0xE1, 0x18,
0xF7, 0xF8, 0x2D, 0x10}
}
{
0x10, 0x00001AF2UL,
{
0x0F, 0x04, 0xBF, 0x88, 0xE1, 0xD8, 0xF7, 0xF8, 0x2C, 0x10, 0xE1, 0x18,
0xF7, 0xF8, 0x2D, 0x10}
}
{
0x10, 0x00001B02UL,
{
0x0D, 0x05, 0xE1, 0xD8, 0xF7, 0xF8, 0x2C, 0x10, 0xF7, 0x8E, 0x2D, 0x10,
0xE6, 0xF9, 0x2C, 0x10}
}
{
0x10, 0x00001B02UL,
{
0x0D, 0x05, 0xE1, 0xD8, 0xF7, 0xF8, 0x2C, 0x10, 0xF7, 0x8E, 0x2D, 0x10,
0xE6, 0xF9, 0x2C, 0x10}
}
{
0x10, 0x00001B12UL,
{
0xE6, 0xFA, 0x01, 0x00, 0xE0, 0x28, 0xCA, 0x00, 0xD8, 0x1E, 0x0D, 0x6E,
0x9A, 0x04, 0x08, 0x00}
}
{
0x10, 0x00001B12UL,
{
0xE6, 0xFA, 0x01, 0x00, 0xE0, 0x28, 0xCA, 0x00, 0xD8, 0x1E, 0x0D, 0x6E,
0x9A, 0x04, 0x08, 0x00}
}
{
0x10, 0x00001B22UL,
{
0x0E, 0x04, 0xE1, 0xE8, 0xF7, 0xF8, 0x2C, 0x10, 0xE1, 0x18, 0xF7, 0xF8,
0x2D, 0x10, 0x0D, 0x05}
}
{
0x10, 0x00001B22UL,
{
0x0E, 0x04, 0xE1, 0xE8, 0xF7, 0xF8, 0x2C, 0x10, 0xE1, 0x18, 0xF7, 0xF8,
0x2D, 0x10, 0x0D, 0x05}
}
{
0x10, 0x00001B32UL,
{
0xE1, 0xE8, 0xF7, 0xF8, 0x2C, 0x10, 0xF7, 0x8E, 0x2D, 0x10, 0xE6, 0xF9,
0x2C, 0x10, 0xE6, 0xFA}
}
{
0x10, 0x00001B32UL,
{
0xE1, 0xE8, 0xF7, 0xF8, 0x2C, 0x10, 0xF7, 0x8E, 0x2D, 0x10, 0xE6, 0xF9,
0x2C, 0x10, 0xE6, 0xFA}
}
{
0x10, 0x00001B42UL,
{
0x01, 0x00, 0xE0, 0x28, 0xCA, 0x00, 0xD8, 0x1E, 0x0D, 0x57, 0xF2, 0xF7,
0x7E, 0x10, 0xF2, 0xF6}
}
{
0x10, 0x00001B42UL,
{
0x01, 0x00, 0xE0, 0x28, 0xCA, 0x00, 0xD8, 0x1E, 0x0D, 0x57, 0xF2, 0xF7,
0x7E, 0x10, 0xF2, 0xF6}
}
{
0x10, 0x00001B52UL,
{
0x7C, 0x10, 0x06, 0xF6, 0x08, 0x00, 0xDC, 0x17, 0x98, 0x46, 0xA8, 0x56,
0x88, 0x50, 0x88, 0x40}
}
{
0x10, 0x00001B52UL,
{
0x7C, 0x10, 0x06, 0xF6, 0x08, 0x00, 0xDC, 0x17, 0x98, 0x46, 0xA8, 0x56,
0x88, 0x50, 0x88, 0x40}
}
{
0x10, 0x00001B62UL,
{
0xF2, 0xF5, 0x7E, 0x10, 0xF2, 0xF4, 0x7C, 0x10, 0x08, 0x44, 0xDC, 0x15,
0x98, 0xB4, 0xA8, 0xC4}
}
{
0x10, 0x00001B62UL,
{
0xF2, 0xF5, 0x7E, 0x10, 0xF2, 0xF4, 0x7C, 0x10, 0x08, 0x44, 0xDC, 0x15,
0x98, 0xB4, 0xA8, 0xC4}
}
{
0x10, 0x00001B72UL,
{
0xF2, 0xF4, 0x7C, 0x10, 0xDC, 0x05, 0xF4, 0x84, 0x03, 0x00, 0xC0, 0x8A,
0xF2, 0xF4, 0x7C, 0x10}
}
{
0x10, 0x00001B72UL,
{
0xF2, 0xF4, 0x7C, 0x10, 0xDC, 0x05, 0xF4, 0x84, 0x03, 0x00, 0xC0, 0x8A,
0xF2, 0xF4, 0x7C, 0x10}
}
{
0x10, 0x00001B82UL,
{
0xDC, 0x05, 0xF4, 0x84, 0x02, 0x00, 0xC0, 0x89, 0xF2, 0xF4, 0x7C, 0x10,
0xDC, 0x05, 0xF4, 0x84}
}
{
0x10, 0x00001B82UL,
{
0xDC, 0x05, 0xF4, 0x84, 0x02, 0x00, 0xC0, 0x89, 0xF2, 0xF4, 0x7C, 0x10,
0xDC, 0x05, 0xF4, 0x84}
}
{
0x10, 0x00001B92UL,
{
0x01, 0x00, 0xC0, 0x88, 0xCA, 0x00, 0x1A, 0x03, 0x08, 0x04, 0x49, 0x81,
0x3D, 0x0E, 0xE1, 0xF8}
}
{
0x10, 0x00001B92UL,
{
0x01, 0x00, 0xC0, 0x88, 0xCA, 0x00, 0x1A, 0x03, 0x08, 0x04, 0x49, 0x81,
0x3D, 0x0E, 0xE1, 0xF8}
}
{
0x10, 0x00001BA2UL,
{
0xF7, 0xF8, 0x2C, 0x10, 0xE1, 0x18, 0xF7, 0xF8, 0x2D, 0x10, 0xE6, 0xF9,
0x2C, 0x10, 0xE6, 0xFA}
}
{
0x10, 0x00001BA2UL,
{
0xF7, 0xF8, 0x2C, 0x10, 0xE1, 0x18, 0xF7, 0xF8, 0x2D, 0x10, 0xE6, 0xF9,
0x2C, 0x10, 0xE6, 0xFA}
}
{
0x10, 0x00001BB2UL,
{
0x01, 0x00, 0xE0, 0x28, 0xCA, 0x00, 0xD8, 0x1E, 0x0D, 0x1F, 0xE1, 0xF8,
0xF7, 0xF8, 0x2C, 0x10}
}
{
0x10, 0x00001BB2UL,
{
0x01, 0x00, 0xE0, 0x28, 0xCA, 0x00, 0xD8, 0x1E, 0x0D, 0x1F, 0xE1, 0xF8,
0xF7, 0xF8, 0x2C, 0x10}
}
{
0x10, 0x00001BC2UL,
{
0xF7, 0x8E, 0x2D, 0x10, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00,
0xE0, 0x28, 0xCA, 0x00}
}
{
0x10, 0x00001BC2UL,
{
0xF7, 0x8E, 0x2D, 0x10, 0xE6, 0xF9, 0x2C, 0x10, 0xE6, 0xFA, 0x01, 0x00,
0xE0, 0x28, 0xCA, 0x00}
}
{
0x10, 0x00001BD2UL,
{
0xD8, 0x1E, 0x0D, 0x12, 0xF2, 0xF7, 0x7E, 0x10, 0xF2, 0xF6, 0x7C, 0x10,
0xDC, 0x07, 0xA9, 0x86}
}
{
0x10, 0x00001BD2UL,
{
0xD8, 0x1E, 0x0D, 0x12, 0xF2, 0xF7, 0x7E, 0x10, 0xF2, 0xF6, 0x7C, 0x10,
0xDC, 0x07, 0xA9, 0x86}
}
{
0x10, 0x00001BE2UL,
{
0x57, 0xF8, 0xFF, 0x00, 0xDC, 0x07, 0xB9, 0x86, 0xF2, 0xFA, 0x7E, 0x10,
0xF2, 0xF9, 0x7C, 0x10}
}
{
0x10, 0x00001BE2UL,
{
0x57, 0xF8, 0xFF, 0x00, 0xDC, 0x07, 0xB9, 0x86, 0xF2, 0xFA, 0x7E, 0x10,
0xF2, 0xF9, 0x7C, 0x10}
}
{
0x0E, 0x00001BF2UL,
{
0xC2, 0xF8, 0x82, 0x10, 0xCA, 0x00, 0xD8, 0x1E, 0xFC, 0xFF, 0xFC, 0xFE,
0xCB, 0x00}
}
{
0x0E, 0x00001BF2UL,
{
0xC2, 0xF8, 0x82, 0x10, 0xCA, 0x00, 0xD8, 0x1E, 0xFC, 0xFF, 0xFC, 0xFE,
0xCB, 0x00}
}
{
0x10, 0x00001C00UL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xEC, 0xFF, 0xF0, 0xD8, 0x28, 0x02, 0x0D, 0x0F,
0xE0, 0x09, 0xF0, 0x4D}
}
{
0x10, 0x00001C00UL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xEC, 0xFF, 0xF0, 0xD8, 0x28, 0x02, 0x0D, 0x0F,
0xE0, 0x09, 0xF0, 0x4D}
}
{
0x10, 0x00001C10UL,
{
0xC0, 0x88, 0xCA, 0x00, 0x70, 0x2A, 0x49, 0x80, 0x2D, 0x10, 0xF0, 0xAF,
0xF0, 0x9E, 0xE0, 0x08}
}
{
0x10, 0x00001C10UL,
{
0xC0, 0x88, 0xCA, 0x00, 0x70, 0x2A, 0x49, 0x80, 0x2D, 0x10, 0xF0, 0xAF,
0xF0, 0x9E, 0xE0, 0x08}
}
{
0x10, 0x00001C20UL,
{
0xCA, 0x00, 0x8A, 0x08, 0xE0, 0x08, 0xCA, 0x00, 0xFA, 0x20, 0xF0, 0x90,
0xE0, 0x08, 0xCA, 0x00}
}
{
0x10, 0x00001C20UL,
{
0xCA, 0x00, 0x8A, 0x08, 0xE0, 0x08, 0xCA, 0x00, 0xFA, 0x20, 0xF0, 0x90,
0xE0, 0x08, 0xCA, 0x00}
}
{
0x10, 0x00001C30UL,
{
0xA2, 0x20, 0xF0, 0xE4, 0xF0, 0xF5, 0x70, 0x45, 0x3D, 0xE9, 0x08, 0x02,
0xFC, 0xFF, 0xFC, 0xFE}
}
{
0x10, 0x00001C30UL,
{
0xA2, 0x20, 0xF0, 0xE4, 0xF0, 0xF5, 0x70, 0x45, 0x3D, 0xE9, 0x08, 0x02,
0xFC, 0xFF, 0xFC, 0xFE}
}
{
0x04, 0x00001C40UL,
{
0xFC, 0xFD, 0xCB, 0x00}
}
{
0x04, 0x00001C40UL,
{
0xFC, 0xFD, 0xCB, 0x00}
}
{
0x10, 0x00001C44UL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xEC, 0xFF, 0xF0, 0xD8, 0x28, 0x02, 0x0D, 0x0F,
0xE0, 0x19, 0xF0, 0x4D}
}
{
0x10, 0x00001C44UL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xEC, 0xFF, 0xF0, 0xD8, 0x28, 0x02, 0x0D, 0x0F,
0xE0, 0x19, 0xF0, 0x4D}
}
{
0x10, 0x00001C54UL,
{
0xC0, 0x88, 0xCA, 0x00, 0x70, 0x2A, 0x49, 0x80, 0x2D, 0x10, 0xF0, 0xAF,
0xF0, 0x9E, 0xE0, 0x18}
}
{
0x10, 0x00001C54UL,
{
0xC0, 0x88, 0xCA, 0x00, 0x70, 0x2A, 0x49, 0x80, 0x2D, 0x10, 0xF0, 0xAF,
0xF0, 0x9E, 0xE0, 0x18}
}
{
0x10, 0x00001C64UL,
{
0xCA, 0x00, 0x8A, 0x08, 0xE0, 0x18, 0xCA, 0x00, 0xFA, 0x20, 0xF0, 0x90,
0xE0, 0x18, 0xCA, 0x00}
}
{
0x10, 0x00001C64UL,
{
0xCA, 0x00, 0x8A, 0x08, 0xE0, 0x18, 0xCA, 0x00, 0xFA, 0x20, 0xF0, 0x90,
0xE0, 0x18, 0xCA, 0x00}
}
{
0x10, 0x00001C74UL,
{
0xA2, 0x20, 0xF0, 0xE4, 0xF0, 0xF5, 0x70, 0x45, 0x3D, 0xE9, 0x08, 0x02,
0xFC, 0xFF, 0xFC, 0xFE}
}
{
0x10, 0x00001C74UL,
{
0xA2, 0x20, 0xF0, 0xE4, 0xF0, 0xF5, 0x70, 0x45, 0x3D, 0xE9, 0x08, 0x02,
0xFC, 0xFF, 0xFC, 0xFE}
}
{
0x04, 0x00001C84UL,
{
0xFC, 0xFD, 0xCB, 0x00}
}
{
0x04, 0x00001C84UL,
{
0xFC, 0xFD, 0xCB, 0x00}
}
{
0x10, 0x00001C88UL,
{
0xEC, 0xFE, 0xEC, 0xFF, 0x0D, 0x0E, 0xE0, 0x08, 0xCA, 0x00, 0x18, 0x1F,
0x49, 0x80, 0x2D, 0x0F}
}
{
0x10, 0x00001C88UL,
{
0xEC, 0xFE, 0xEC, 0xFF, 0x0D, 0x0E, 0xE0, 0x08, 0xCA, 0x00, 0x18, 0x1F,
0x49, 0x80, 0x2D, 0x0F}
}
{
0x10, 0x00001C98UL,
{
0xF0, 0xBF, 0xF0, 0xAE, 0xE6, 0xF9, 0x12, 0x00, 0xE0, 0x08, 0xCA, 0x00,
0x56, 0x1F, 0xCA, 0x00}
}
{
0x10, 0x00001C98UL,
{
0xF0, 0xBF, 0xF0, 0xAE, 0xE6, 0xF9, 0x12, 0x00, 0xE0, 0x08, 0xCA, 0x00,
0x56, 0x1F, 0xCA, 0x00}
}
{
0x10, 0x00001CA8UL,
{
0x18, 0x0C, 0xCA, 0x00, 0xB8, 0x0B, 0xF0, 0xE4, 0xF0, 0xF5, 0x70, 0x45,
0x3D, 0xEC, 0xFC, 0xFF}
}
{
0x10, 0x00001CA8UL,
{
0x18, 0x0C, 0xCA, 0x00, 0xB8, 0x0B, 0xF0, 0xE4, 0xF0, 0xF5, 0x70, 0x45,
0x3D, 0xEC, 0xFC, 0xFF}
}
{
0x04, 0x00001CB8UL,
{
0xFC, 0xFE, 0xCB, 0x00}
}
{
0x04, 0x00001CB8UL,
{
0xFC, 0xFE, 0xCB, 0x00}
}
{
0x10, 0x00001CBCUL,
{
0xEC, 0xFE, 0xEC, 0xFF, 0x0D, 0x0E, 0xE0, 0x18, 0xCA, 0x00, 0x18, 0x1F,
0x49, 0x80, 0x2D, 0x0F}
}
{
0x10, 0x00001CBCUL,
{
0xEC, 0xFE, 0xEC, 0xFF, 0x0D, 0x0E, 0xE0, 0x18, 0xCA, 0x00, 0x18, 0x1F,
0x49, 0x80, 0x2D, 0x0F}
}
{
0x10, 0x00001CCCUL,
{
0xF0, 0xBF, 0xF0, 0xAE, 0xE6, 0xF9, 0x12, 0x00, 0xE0, 0x18, 0xCA, 0x00,
0x56, 0x1F, 0xCA, 0x00}
}
{
0x10, 0x00001CCCUL,
{
0xF0, 0xBF, 0xF0, 0xAE, 0xE6, 0xF9, 0x12, 0x00, 0xE0, 0x18, 0xCA, 0x00,
0x56, 0x1F, 0xCA, 0x00}
}
{
0x10, 0x00001CDCUL,
{
0x34, 0x0C, 0xCA, 0x00, 0xE8, 0x0B, 0xF0, 0xE4, 0xF0, 0xF5, 0x70, 0x45,
0x3D, 0xEC, 0xFC, 0xFF}
}
{
0x10, 0x00001CDCUL,
{
0x34, 0x0C, 0xCA, 0x00, 0xE8, 0x0B, 0xF0, 0xE4, 0xF0, 0xF5, 0x70, 0x45,
0x3D, 0xEC, 0xFC, 0xFF}
}
{
0x04, 0x00001CECUL,
{
0xFC, 0xFE, 0xCB, 0x00}
}
{
0x04, 0x00001CECUL,
{
0xFC, 0xFE, 0xCB, 0x00}
}
{
0x10, 0x00001CF0UL,
{
0x06, 0xF0, 0xF4, 0xFF, 0xE0, 0x08, 0xCA, 0x00, 0xA0, 0x0A, 0xB8, 0x40,
0xC2, 0xF4, 0xF4, 0xFC}
}
{
0x10, 0x00001CF0UL,
{
0x06, 0xF0, 0xF4, 0xFF, 0xE0, 0x08, 0xCA, 0x00, 0xA0, 0x0A, 0xB8, 0x40,
0xC2, 0xF4, 0xF4, 0xFC}
}
{
0x10, 0x00001D00UL,
{
0xC4, 0x40, 0x02, 0x00, 0xE0, 0x18, 0xCA, 0x00, 0xA0, 0x0A, 0xC4, 0x40,
0x04, 0x00, 0xC2, 0xF4}
}
{
0x10, 0x00001D00UL,
{
0xC4, 0x40, 0x02, 0x00, 0xE0, 0x18, 0xCA, 0x00, 0xA0, 0x0A, 0xC4, 0x40,
0x04, 0x00, 0xC2, 0xF4}
}
{
0x10, 0x00001D10UL,
{
0xF3, 0xFC, 0xC4, 0x40, 0x06, 0x00, 0xC2, 0xF4, 0xF0, 0x10, 0xC4, 0x40,
0x08, 0x00, 0xF2, 0xF5}
}
{
0x10, 0x00001D10UL,
{
0xF3, 0xFC, 0xC4, 0x40, 0x06, 0x00, 0xC2, 0xF4, 0xF0, 0x10, 0xC4, 0x40,
0x08, 0x00, 0xF2, 0xF5}
}
{
0x10, 0x00001D20UL,
{
0x2A, 0x10, 0x24, 0x8F, 0x2A, 0x10, 0xC4, 0x50, 0x0A, 0x00, 0xF0, 0xA0,
0xE0, 0x0B, 0x06, 0xFA}
}
{
0x10, 0x00001D20UL,
{
0x2A, 0x10, 0x24, 0x8F, 0x2A, 0x10, 0xC4, 0x50, 0x0A, 0x00, 0xF0, 0xA0,
0xE0, 0x0B, 0x06, 0xFA}
}
{
0x10, 0x00001D30UL,
{
0x00, 0x00, 0x16, 0xFB, 0x01, 0x00, 0xE0, 0xC9, 0xE0, 0x08, 0xCA, 0x00,
0x80, 0x21, 0x06, 0xF0}
}
{
0x10, 0x00001D30UL,
{
0x00, 0x00, 0x16, 0xFB, 0x01, 0x00, 0xE0, 0xC9, 0xE0, 0x08, 0xCA, 0x00,
0x80, 0x21, 0x06, 0xF0}
}
{
0x04, 0x00001D40UL,
{
0x0C, 0x00, 0xCB, 0x00}
}
{
0x04, 0x00001D40UL,
{
0x0C, 0x00, 0xCB, 0x00}
}
{
0x10, 0x00001D44UL,
{
0xE6, 0x8A, 0xAF, 0x04, 0xE6, 0x0D, 0x02, 0x20, 0xE6, 0x8B, 0xAF, 0x04,
0xE6, 0x0E, 0x40, 0x20}
}
{
0x10, 0x00001D44UL,
{
0xE6, 0x8A, 0xAF, 0x04, 0xE6, 0x0D, 0x02, 0x20, 0xE6, 0x8B, 0xAF, 0x04,
0xE6, 0x0E, 0x40, 0x20}
}
{
0x10, 0x00001D54UL,
{
0xE6, 0x8C, 0x5F, 0x04, 0xE6, 0x0F, 0x08, 0x10, 0xE6, 0x8D, 0xAF, 0x04,
0x0E, 0x04, 0xE0, 0x28}
}
{
0x10, 0x00001D54UL,
{
0xE6, 0x8C, 0x5F, 0x04, 0xE6, 0x0F, 0x08, 0x10, 0xE6, 0x8D, 0xAF, 0x04,
0x0E, 0x04, 0xE0, 0x28}
}
{
0x10, 0x00001D64UL,
{
0xCA, 0x00, 0x18, 0x26, 0xE0, 0x88, 0xCA, 0x00, 0xFA, 0x27, 0xE0, 0x49,
0xE0, 0x08, 0xCA, 0x00}
}
{
0x10, 0x00001D64UL,
{
0xCA, 0x00, 0x18, 0x26, 0xE0, 0x88, 0xCA, 0x00, 0xFA, 0x27, 0xE0, 0x49,
0xE0, 0x08, 0xCA, 0x00}
}
{
0x10, 0x00001D74UL,
{
0xFE, 0x01, 0xE0, 0x59, 0xE0, 0x18, 0xCA, 0x00, 0xFE, 0x01, 0xE0, 0x68,
0xCA, 0x00, 0x1C, 0x01}
}
{
0x10, 0x00001D74UL,
{
0xFE, 0x01, 0xE0, 0x59, 0xE0, 0x18, 0xCA, 0x00, 0xFE, 0x01, 0xE0, 0x68,
0xCA, 0x00, 0x1C, 0x01}
}
{
0x10, 0x00001D84UL,
{
0xE0, 0x18, 0xCA, 0x00, 0xE0, 0x1D, 0xE0, 0x29, 0xE0, 0x08, 0xCA, 0x00,
0xEE, 0x1D, 0xE0, 0x39}
}
{
0x10, 0x00001D84UL,
{
0xE0, 0x18, 0xCA, 0x00, 0xE0, 0x1D, 0xE0, 0x29, 0xE0, 0x08, 0xCA, 0x00,
0xEE, 0x1D, 0xE0, 0x39}
}
{
0x10, 0x00001D94UL,
{
0xE0, 0x18, 0xCA, 0x00, 0xEE, 0x1D, 0xE0, 0x49, 0xE0, 0x08, 0xCA, 0x00,
0x0E, 0x1E, 0xE0, 0x59}
}
{
0x10, 0x00001D94UL,
{
0xE0, 0x18, 0xCA, 0x00, 0xEE, 0x1D, 0xE0, 0x49, 0xE0, 0x08, 0xCA, 0x00,
0x0E, 0x1E, 0xE0, 0x59}
}
{
0x10, 0x00001DA4UL,
{
0xE0, 0x18, 0xCA, 0x00, 0x0E, 0x1E, 0xCA, 0x00, 0x2E, 0x1E, 0xE6, 0xFC,
0x2A, 0x00, 0xE6, 0xFA}
}
{
0x10, 0x00001DA4UL,
{
0xE0, 0x18, 0xCA, 0x00, 0x0E, 0x1E, 0xCA, 0x00, 0x2E, 0x1E, 0xE6, 0xFC,
0x2A, 0x00, 0xE6, 0xFA}
}
{
0x10, 0x00001DB4UL,
{
0x00, 0x10, 0xE6, 0xFB, 0x01, 0x00, 0xE0, 0x48, 0xE6, 0xF9, 0x20, 0x00,
0xCA, 0x00, 0x1A, 0x29}
}
{
0x10, 0x00001DB4UL,
{
0x00, 0x10, 0xE6, 0xFB, 0x01, 0x00, 0xE0, 0x48, 0xE6, 0xF9, 0x20, 0x00,
0xCA, 0x00, 0x1A, 0x29}
}
{
0x10, 0x00001DC4UL,
{
0xE0, 0x6C, 0xE6, 0xFA, 0xB0, 0x00, 0xE6, 0xFB, 0x00, 0x00, 0xE6, 0xF8,
0x2E, 0x00, 0xE6, 0xF9}
}
{
0x10, 0x00001DC4UL,
{
0xE0, 0x6C, 0xE6, 0xFA, 0xB0, 0x00, 0xE6, 0xFB, 0x00, 0x00, 0xE6, 0xF8,
0x2E, 0x00, 0xE6, 0xF9}
}
{
0x0C, 0x00001DD4UL,
{
0x20, 0x00, 0xCA, 0x00, 0x1A, 0x29, 0xCA, 0x00, 0xAC, 0x24, 0x0D, 0xFD}
}
{
0x0C, 0x00001DD4UL,
{
0x20, 0x00, 0xCA, 0x00, 0x1A, 0x29, 0xCA, 0x00, 0xAC, 0x24, 0x0D, 0xFD}
}
{
0x10, 0x00002A70UL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xF0, 0xD9, 0xF0, 0xE8, 0xF0, 0x49, 0x49, 0x80,
0x3D, 0x06, 0xF0, 0x4E}
}
{
0x10, 0x00002A70UL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xF0, 0xD9, 0xF0, 0xE8, 0xF0, 0x49, 0x49, 0x80,
0x3D, 0x06, 0xF0, 0x4E}
}
{
0x10, 0x00002A80UL,
{
0xC0, 0x89, 0xE0, 0x08, 0xCA, 0x00, 0x48, 0x25, 0x0D, 0x0A, 0xF0, 0x4D,
0x49, 0x81, 0x3D, 0x06}
}
{
0x10, 0x00002A80UL,
{
0xC0, 0x89, 0xE0, 0x08, 0xCA, 0x00, 0x48, 0x25, 0x0D, 0x0A, 0xF0, 0x4D,
0x49, 0x81, 0x3D, 0x06}
}
{
0x10, 0x00002A90UL,
{
0xF0, 0x4E, 0xC0, 0x89, 0xE0, 0x18, 0xCA, 0x00, 0x48, 0x25, 0x0D, 0x01,
0xE1, 0x08, 0xFC, 0xFE}
}
{
0x10, 0x00002A90UL,
{
0xF0, 0x4E, 0xC0, 0x89, 0xE0, 0x18, 0xCA, 0x00, 0x48, 0x25, 0x0D, 0x01,
0xE1, 0x08, 0xFC, 0xFE}
}
{
0x04, 0x00002AA0UL,
{
0xFC, 0xFD, 0xCB, 0x00}
}
{
0x04, 0x00002AA0UL,
{
0xFC, 0xFD, 0xCB, 0x00}
}
{
0x10, 0x00002AA4UL,
{
0xEC, 0xFD, 0xF0, 0xD8, 0xF0, 0x48, 0x49, 0x80, 0x3D, 0x04, 0xE0, 0x08,
0xCA, 0x00, 0xA4, 0x25}
}
{
0x10, 0x00002AA4UL,
{
0xEC, 0xFD, 0xF0, 0xD8, 0xF0, 0x48, 0x49, 0x80, 0x3D, 0x04, 0xE0, 0x08,
0xCA, 0x00, 0xA4, 0x25}
}
{
0x10, 0x00002AB4UL,
{
0x0D, 0x06, 0xF0, 0x4D, 0x49, 0x81, 0x3D, 0x03, 0xE0, 0x18, 0xCA, 0x00,
0xA4, 0x25, 0xFC, 0xFD}
}
{
0x10, 0x00002AB4UL,
{
0x0D, 0x06, 0xF0, 0x4D, 0x49, 0x81, 0x3D, 0x03, 0xE0, 0x18, 0xCA, 0x00,
0xA4, 0x25, 0xFC, 0xFD}
}
{
0x02, 0x00002AC4UL,
{
0xCB, 0x00}
}
{
0x02, 0x00002AC4UL,
{
0xCB, 0x00}
}
{
0x10, 0x00002AC6UL,
{
0xEC, 0xFD, 0xF0, 0xD8, 0xF0, 0x48, 0x49, 0x80, 0x3D, 0x09, 0xE0, 0x08,
0xCA, 0x00, 0xFE, 0x25}
}
{
0x10, 0x00002AC6UL,
{
0xEC, 0xFD, 0xF0, 0xD8, 0xF0, 0x48, 0x49, 0x80, 0x3D, 0x09, 0xE0, 0x08,
0xCA, 0x00, 0xFE, 0x25}
}
{
0x10, 0x00002AD6UL,
{
0x48, 0x40, 0x3D, 0x02, 0xE1, 0x08, 0x0D, 0x0F, 0xE1, 0x18, 0x0D, 0x0D,
0xF0, 0x4D, 0x49, 0x81}
}
{
0x10, 0x00002AD6UL,
{
0x48, 0x40, 0x3D, 0x02, 0xE1, 0x08, 0x0D, 0x0F, 0xE1, 0x18, 0x0D, 0x0D,
0xF0, 0x4D, 0x49, 0x81}
}
{
0x10, 0x00002AE6UL,
{
0x3D, 0x09, 0xE0, 0x18, 0xCA, 0x00, 0xFE, 0x25, 0x48, 0x40, 0x3D, 0x02,
0xE1, 0x08, 0x0D, 0x03}
}
{
0x10, 0x00002AE6UL,
{
0x3D, 0x09, 0xE0, 0x18, 0xCA, 0x00, 0xFE, 0x25, 0x48, 0x40, 0x3D, 0x02,
0xE1, 0x08, 0x0D, 0x03}
}
{
0x0A, 0x00002AF6UL,
{
0xE1, 0x18, 0x0D, 0x01, 0xE1, 0x08, 0xFC, 0xFD, 0xCB, 0x00}
}
{
0x0A, 0x00002AF6UL,
{
0xE1, 0x18, 0x0D, 0x01, 0xE1, 0x08, 0xFC, 0xFD, 0xCB, 0x00}
}
{
0x06, 0x00002B34UL,
{
0x02, 0x40, 0x5A, 0x11, 0x01, 0x00}
}
{
0x06, 0x00002B34UL,
{
0x02, 0x40, 0x5A, 0x11, 0x01, 0x00}
}
{
0x06, 0x00002B3AUL,
{
0x02, 0x40, 0x5C, 0x11, 0x01, 0x00}
}
{
0x06, 0x00002B3AUL,
{
0x02, 0x40, 0x5C, 0x11, 0x01, 0x00}
}
{
0x06, 0x00002B40UL,
{
0x01, 0x40, 0x5E, 0x11, 0x08, 0x00}
}
{
0x06, 0x00002B40UL,
{
0x01, 0x40, 0x5E, 0x11, 0x08, 0x00}
}
{
0x06, 0x00002B46UL,
{
0x02, 0x40, 0x00, 0xFD, 0x00, 0x00}
}
{
0x06, 0x00002B46UL,
{
0x02, 0x40, 0x00, 0xFD, 0x00, 0x00}
}
{
0x06, 0x00002B4CUL,
{
0x02, 0x40, 0x02, 0xFD, 0x00, 0x00}
}
{
0x06, 0x00002B4CUL,
{
0x02, 0x40, 0x02, 0xFD, 0x00, 0x00}
}
{
0x06, 0x00002B52UL,
{
0x02, 0x40, 0x04, 0xFD, 0x00, 0x00}
}
{
0x06, 0x00002B52UL,
{
0x02, 0x40, 0x04, 0xFD, 0x00, 0x00}
}
{
0x06, 0x00002B58UL,
{
0x02, 0x40, 0x06, 0xFD, 0x00, 0x00}
}
{
0x06, 0x00002B58UL,
{
0x02, 0x40, 0x06, 0xFD, 0x00, 0x00}
}
{
0x02, 0x00002B5EUL,
{
0x04, 0x81}
}
{
0x02, 0x00002B5EUL,
{
0x04, 0x81}
}
{
0x02, 0x00002B60UL,
{
0x84, 0x82}
}
{
0x02, 0x00002B60UL,
{
0x84, 0x82}
}
{
0x02, 0x00002B62UL,
{
0x04, 0x83}
}
{
0x02, 0x00002B62UL,
{
0x04, 0x83}
}
{
0x02, 0x00002B64UL,
{
0x84, 0x84}
}
{
0x02, 0x00002B64UL,
{
0x84, 0x84}
}
{
0x02, 0x00002B66UL,
{
0x84, 0x85}
}
{
0x02, 0x00002B66UL,
{
0x84, 0x85}
}
{
0x02, 0x00002B68UL,
{
0x84, 0x86}
}
{
0x02, 0x00002B68UL,
{
0x84, 0x86}
}
{
0x02, 0x00002B6AUL,
{
0x04, 0x87}
}
{
0x02, 0x00002B6AUL,
{
0x04, 0x87}
}
{
0x02, 0x00002B6CUL,
{
0x04, 0x88}
}
{
0x02, 0x00002B6CUL,
{
0x04, 0x88}
}
{
0x02, 0x00002B6EUL,
{
0x84, 0x89}
}
{
0x02, 0x00002B6EUL,
{
0x84, 0x89}
}
{
0x02, 0x00002B70UL,
{
0x84, 0x8A}
}
{
0x02, 0x00002B70UL,
{
0x84, 0x8A}
}
{
0x10, 0x000022E6UL,
{
0xF0, 0x48, 0x07, 0xF8, 0xF0, 0x00, 0x2D, 0x14, 0x07, 0xF8, 0xF0, 0x00,
0x2D, 0x13, 0x29, 0x81}
}
{
0x10, 0x000022E6UL,
{
0xF0, 0x48, 0x07, 0xF8, 0xF0, 0x00, 0x2D, 0x14, 0x07, 0xF8, 0xF0, 0x00,
0x2D, 0x13, 0x29, 0x81}
}
{
0x10, 0x000022F6UL,
{
0x2D, 0x13, 0x07, 0xF8, 0xF1, 0x00, 0x2D, 0x12, 0x29, 0x81, 0x2D, 0x12,
0x07, 0xF8, 0xF3, 0x00}
}
{
0x10, 0x000022F6UL,
{
0x2D, 0x13, 0x07, 0xF8, 0xF1, 0x00, 0x2D, 0x12, 0x29, 0x81, 0x2D, 0x12,
0x07, 0xF8, 0xF3, 0x00}
}
{
0x10, 0x00002306UL,
{
0x2D, 0x11, 0x29, 0x81, 0x2D, 0x11, 0x07, 0xF8, 0x3A, 0x00, 0x3D, 0x10,
0xE1, 0x08, 0xCB, 0x00}
}
{
0x10, 0x00002306UL,
{
0x2D, 0x11, 0x29, 0x81, 0x2D, 0x11, 0x07, 0xF8, 0x3A, 0x00, 0x3D, 0x10,
0xE1, 0x08, 0xCB, 0x00}
}
{
0x10, 0x00002316UL,
{
0xE1, 0x18, 0xCB, 0x00, 0xE1, 0x28, 0xCB, 0x00, 0xE1, 0x38, 0xCB, 0x00,
0xE1, 0x48, 0xCB, 0x00}
}
{
0x10, 0x00002316UL,
{
0xE1, 0x18, 0xCB, 0x00, 0xE1, 0x28, 0xCB, 0x00, 0xE1, 0x38, 0xCB, 0x00,
0xE1, 0x48, 0xCB, 0x00}
}
{
0x10, 0x00002326UL,
{
0xE1, 0x58, 0xCB, 0x00, 0xE1, 0x68, 0xCB, 0x00, 0xE1, 0x78, 0xCB, 0x00,
0xE7, 0xF8, 0xFF, 0x00}
}
{
0x10, 0x00002326UL,
{
0xE1, 0x58, 0xCB, 0x00, 0xE1, 0x68, 0xCB, 0x00, 0xE1, 0x78, 0xCB, 0x00,
0xE7, 0xF8, 0xFF, 0x00}
}
{
0x02, 0x00002336UL,
{
0xCB, 0x00}
}
{
0x02, 0x00002336UL,
{
0xCB, 0x00}
}
{
0x10, 0x00002338UL,
{
0xF0, 0x48, 0x47, 0xF8, 0x08, 0x00, 0x9D, 0x42, 0xC0, 0x84, 0x5C, 0x24,
0x06, 0xF4, 0x4A, 0x23}
}
{
0x10, 0x00002338UL,
{
0xF0, 0x48, 0x47, 0xF8, 0x08, 0x00, 0x9D, 0x42, 0xC0, 0x84, 0x5C, 0x24,
0x06, 0xF4, 0x4A, 0x23}
}
{
0x10, 0x00002348UL,
{
0x9C, 0x04, 0xEA, 0x00, 0x6A, 0x23, 0xEA, 0x00, 0x70, 0x23, 0xEA, 0x00,
0x7C, 0x23, 0xEA, 0x00}
}
{
0x10, 0x00002348UL,
{
0x9C, 0x04, 0xEA, 0x00, 0x6A, 0x23, 0xEA, 0x00, 0x70, 0x23, 0xEA, 0x00,
0x7C, 0x23, 0xEA, 0x00}
}
{
0x10, 0x00002358UL,
{
0x88, 0x23, 0xEA, 0x00, 0x94, 0x23, 0xEA, 0x00, 0xA0, 0x23, 0xEA, 0x00,
0xAC, 0x23, 0xEA, 0x00}
}
{
0x10, 0x00002358UL,
{
0x88, 0x23, 0xEA, 0x00, 0x94, 0x23, 0xEA, 0x00, 0xA0, 0x23, 0xEA, 0x00,
0xAC, 0x23, 0xEA, 0x00}
}
{
0x10, 0x00002368UL,
{
0xB8, 0x23, 0x4A, 0x04, 0x03, 0xA5, 0xCB, 0x00, 0x9A, 0x04, 0x2D, 0x90,
0x0F, 0x02, 0xD1, 0x80}
}
{
0x10, 0x00002368UL,
{
0xB8, 0x23, 0x4A, 0x04, 0x03, 0xA5, 0xCB, 0x00, 0x9A, 0x04, 0x2D, 0x90,
0x0F, 0x02, 0xD1, 0x80}
}
{
0x10, 0x00002378UL,
{
0x7F, 0xCA, 0xCB, 0x00, 0x9A, 0x04, 0x27, 0x80, 0x0F, 0x01, 0xD1, 0x80,
0x7F, 0xC6, 0xCB, 0x00}
}
{
0x10, 0x00002378UL,
{
0x7F, 0xCA, 0xCB, 0x00, 0x9A, 0x04, 0x27, 0x80, 0x0F, 0x01, 0xD1, 0x80,
0x7F, 0xC6, 0xCB, 0x00}
}
{
0x10, 0x00002388UL,
{
0x9A, 0x04, 0x21, 0x70, 0x1F, 0x01, 0xD1, 0x80, 0x7F, 0xC6, 0xCB, 0x00,
0x9A, 0x04, 0x1B, 0x60}
}
{
0x10, 0x00002388UL,
{
0x9A, 0x04, 0x21, 0x70, 0x1F, 0x01, 0xD1, 0x80, 0x7F, 0xC6, 0xCB, 0x00,
0x9A, 0x04, 0x1B, 0x60}
}
{
0x10, 0x00002398UL,
{
0x0F, 0x00, 0xD1, 0x80, 0x7F, 0xC2, 0xCB, 0x00, 0x9A, 0x04, 0x15, 0x50,
0x1F, 0x00, 0xD1, 0x80}
}
{
0x10, 0x00002398UL,
{
0x0F, 0x00, 0xD1, 0x80, 0x7F, 0xC2, 0xCB, 0x00, 0x9A, 0x04, 0x15, 0x50,
0x1F, 0x00, 0xD1, 0x80}
}
{
0x10, 0x000023A8UL,
{
0x7F, 0xC2, 0xCB, 0x00, 0x9A, 0x04, 0x0F, 0x40, 0xEF, 0x00, 0xD1, 0x80,
0x7F, 0xC2, 0xCB, 0x00}
}
{
0x10, 0x000023A8UL,
{
0x7F, 0xC2, 0xCB, 0x00, 0x9A, 0x04, 0x0F, 0x40, 0xEF, 0x00, 0xD1, 0x80,
0x7F, 0xC2, 0xCB, 0x00}
}
{
0x10, 0x000023B8UL,
{
0x9A, 0x04, 0x09, 0x20, 0xFF, 0x00, 0xD1, 0x80, 0x7F, 0xC2, 0xCB, 0x00,
0xF0, 0x48, 0xC0, 0x89}
}
{
0x10, 0x000023B8UL,
{
0x9A, 0x04, 0x09, 0x20, 0xFF, 0x00, 0xD1, 0x80, 0x7F, 0xC2, 0xCB, 0x00,
0xF0, 0x48, 0xC0, 0x89}
}
{
0x08, 0x000023C8UL,
{
0xE0, 0x38, 0xCA, 0x00, 0x84, 0x00, 0xCB, 0x00}
}
{
0x08, 0x000023C8UL,
{
0xE0, 0x38, 0xCA, 0x00, 0x84, 0x00, 0xCB, 0x00}
}
{
0x10, 0x000023D0UL,
{
0xE1, 0x0A, 0xF0, 0x48, 0xC0, 0x84, 0xE4, 0xA4, 0xCF, 0x10, 0xF0, 0x48,
0x47, 0xF8, 0x08, 0x00}
}
{
0x10, 0x000023D0UL,
{
0xE1, 0x0A, 0xF0, 0x48, 0xC0, 0x84, 0xE4, 0xA4, 0xCF, 0x10, 0xF0, 0x48,
0x47, 0xF8, 0x08, 0x00}
}
{
0x10, 0x000023E0UL,
{
0x9D, 0x1D, 0xC0, 0x84, 0x5C, 0x14, 0x06, 0xF4, 0xEC, 0x23, 0x9C, 0x04,
0x0D, 0x07, 0x0D, 0x08}
}
{
0x10, 0x000023E0UL,
{
0x9D, 0x1D, 0xC0, 0x84, 0x5C, 0x14, 0x06, 0xF4, 0xEC, 0x23, 0x9C, 0x04,
0x0D, 0x07, 0x0D, 0x08}
}
{
0x10, 0x000023F0UL,
{
0x0D, 0x09, 0x0D, 0x0A, 0x0D, 0x0B, 0x0D, 0x0C, 0x0D, 0x0D, 0x0D, 0x0E,
0x5E, 0x03, 0xCB, 0x00}
}
{
0x10, 0x000023F0UL,
{
0x0D, 0x09, 0x0D, 0x0A, 0x0D, 0x0B, 0x0D, 0x0C, 0x0D, 0x0D, 0x0D, 0x0E,
0x5E, 0x03, 0xCB, 0x00}
}
{
0x10, 0x00002400UL,
{
0x0E, 0x02, 0xCB, 0x00, 0x0E, 0x01, 0xCB, 0x00, 0x1E, 0x01, 0xCB, 0x00,
0x0E, 0x00, 0xCB, 0x00}
}
{
0x10, 0x00002400UL,
{
0x0E, 0x02, 0xCB, 0x00, 0x0E, 0x01, 0xCB, 0x00, 0x1E, 0x01, 0xCB, 0x00,
0x0E, 0x00, 0xCB, 0x00}
}
{
0x10, 0x00002410UL,
{
0x1E, 0x00, 0xCB, 0x00, 0xEE, 0x00, 0xCB, 0x00, 0xFE, 0x00, 0xCB, 0x00,
0xF0, 0x48, 0xC0, 0x89}
}
{
0x10, 0x00002410UL,
{
0x1E, 0x00, 0xCB, 0x00, 0xEE, 0x00, 0xCB, 0x00, 0xFE, 0x00, 0xCB, 0x00,
0xF0, 0x48, 0xC0, 0x89}
}
{
0x08, 0x00002420UL,
{
0xE0, 0x58, 0xCA, 0x00, 0x84, 0x00, 0xCB, 0x00}
}
{
0x08, 0x00002420UL,
{
0xE0, 0x58, 0xCA, 0x00, 0x84, 0x00, 0xCB, 0x00}
}
{
0x10, 0x00002428UL,
{
0xF0, 0x48, 0x47, 0xF8, 0x08, 0x00, 0x9D, 0x1C, 0xC0, 0x84, 0x5C, 0x14,
0x06, 0xF4, 0x3A, 0x24}
}
{
0x10, 0x00002428UL,
{
0xF0, 0x48, 0x47, 0xF8, 0x08, 0x00, 0x9D, 0x1C, 0xC0, 0x84, 0x5C, 0x14,
0x06, 0xF4, 0x3A, 0x24}
}
{
0x10, 0x00002438UL,
{
0x9C, 0x04, 0x0D, 0x07, 0x0D, 0x08, 0x0D, 0x09, 0x0D, 0x0A, 0x0D, 0x0B,
0x0D, 0x0C, 0x0D, 0x0D}
}
{
0x10, 0x00002438UL,
{
0x9C, 0x04, 0x0D, 0x07, 0x0D, 0x08, 0x0D, 0x09, 0x0D, 0x0A, 0x0D, 0x0B,
0x0D, 0x0C, 0x0D, 0x0D}
}
{
0x10, 0x00002448UL,
{
0x0D, 0x0E, 0xAF, 0x04, 0xCB, 0x00, 0x9F, 0x04, 0xCB, 0x00, 0x8F, 0x04,
0xCB, 0x00, 0x7F, 0x04}
}
{
0x10, 0x00002448UL,
{
0x0D, 0x0E, 0xAF, 0x04, 0xCB, 0x00, 0x9F, 0x04, 0xCB, 0x00, 0x8F, 0x04,
0xCB, 0x00, 0x7F, 0x04}
}
{
0x10, 0x00002458UL,
{
0xCB, 0x00, 0x6F, 0x04, 0xCB, 0x00, 0x5F, 0x04, 0xCB, 0x00, 0x4F, 0x04,
0xCB, 0x00, 0x2F, 0x04}
}
{
0x10, 0x00002458UL,
{
0xCB, 0x00, 0x6F, 0x04, 0xCB, 0x00, 0x5F, 0x04, 0xCB, 0x00, 0x4F, 0x04,
0xCB, 0x00, 0x2F, 0x04}
}
{
0x02, 0x00002468UL,
{
0xCB, 0x00}
}
{
0x02, 0x00002468UL,
{
0xCB, 0x00}
}
{
0x10, 0x0000246AUL,
{
0xF0, 0x48, 0x47, 0xF8, 0x08, 0x00, 0x9D, 0x1C, 0xC0, 0x84, 0x5C, 0x14,
0x06, 0xF4, 0x7C, 0x24}
}
{
0x10, 0x0000246AUL,
{
0xF0, 0x48, 0x47, 0xF8, 0x08, 0x00, 0x9D, 0x1C, 0xC0, 0x84, 0x5C, 0x14,
0x06, 0xF4, 0x7C, 0x24}
}
{
0x10, 0x0000247AUL,
{
0x9C, 0x04, 0x0D, 0x07, 0x0D, 0x08, 0x0D, 0x09, 0x0D, 0x0A, 0x0D, 0x0B,
0x0D, 0x0C, 0x0D, 0x0D}
}
{
0x10, 0x0000247AUL,
{
0x9C, 0x04, 0x0D, 0x07, 0x0D, 0x08, 0x0D, 0x09, 0x0D, 0x0A, 0x0D, 0x0B,
0x0D, 0x0C, 0x0D, 0x0D}
}
{
0x10, 0x0000248AUL,
{
0x0D, 0x0E, 0xAE, 0x04, 0xCB, 0x00, 0x9E, 0x04, 0xCB, 0x00, 0x8E, 0x04,
0xCB, 0x00, 0x7E, 0x04}
}
{
0x10, 0x0000248AUL,
{
0x0D, 0x0E, 0xAE, 0x04, 0xCB, 0x00, 0x9E, 0x04, 0xCB, 0x00, 0x8E, 0x04,
0xCB, 0x00, 0x7E, 0x04}
}
{
0x10, 0x0000249AUL,
{
0xCB, 0x00, 0x6E, 0x04, 0xCB, 0x00, 0x5E, 0x04, 0xCB, 0x00, 0x4E, 0x04,
0xCB, 0x00, 0x2E, 0x04}
}
{
0x10, 0x0000249AUL,
{
0xCB, 0x00, 0x6E, 0x04, 0xCB, 0x00, 0x5E, 0x04, 0xCB, 0x00, 0x4E, 0x04,
0xCB, 0x00, 0x2E, 0x04}
}
{
0x02, 0x000024AAUL,
{
0xCB, 0x00}
}
{
0x02, 0x000024AAUL,
{
0xCB, 0x00}
}
{
0x10, 0x000024ACUL,
{
0xF2, 0xF4, 0x06, 0xFD, 0x3D, 0x0A, 0xCA, 0x00, 0xA4, 0x26, 0x0D, 0xFA,
0x0D, 0x06, 0xAA, 0x03}
}
{
0x10, 0x000024ACUL,
{
0xF2, 0xF4, 0x06, 0xFD, 0x3D, 0x0A, 0xCA, 0x00, 0xA4, 0x26, 0x0D, 0xFA,
0x0D, 0x06, 0xAA, 0x03}
}
{
0x10, 0x000024BCUL,
{
0x01, 0x50, 0x0D, 0x03, 0xE0, 0x08, 0xCA, 0x00, 0xF0, 0x1C, 0xF2, 0xF4,
0x06, 0xFD, 0x3D, 0xF7}
}
{
0x10, 0x000024BCUL,
{
0x01, 0x50, 0x0D, 0x03, 0xE0, 0x08, 0xCA, 0x00, 0xF0, 0x1C, 0xF2, 0xF4,
0x06, 0xFD, 0x3D, 0xF7}
}
{
0x02, 0x000024CCUL,
{
0x0D, 0xEF}
}
{
0x02, 0x000024CCUL,
{
0x0D, 0xEF}
}
{
0x10, 0x000024CEUL,
{
0x0D, 0x06, 0xAA, 0x02, 0x01, 0x00, 0x0D, 0x03, 0xE0, 0x18, 0xCA, 0x00,
0x0A, 0x17, 0xF2, 0xF4}
}
{
0x10, 0x000024CEUL,
{
0x0D, 0x06, 0xAA, 0x02, 0x01, 0x00, 0x0D, 0x03, 0xE0, 0x18, 0xCA, 0x00,
0x0A, 0x17, 0xF2, 0xF4}
}
{
0x06, 0x000024DEUL,
{
0x04, 0xFD, 0x3D, 0xF7, 0xCB, 0x00}
}
{
0x06, 0x000024DEUL,
{
0x04, 0xFD, 0x3D, 0xF7, 0xCB, 0x00}
}
{
0x10, 0x000024E4UL,
{
0x0D, 0x0D, 0xAA, 0x01, 0x01, 0x10, 0x0D, 0x04, 0xE0, 0x38, 0xCA, 0x00,
0x44, 0x1C, 0x0D, 0x06}
}
{
0x10, 0x000024E4UL,
{
0x0D, 0x0D, 0xAA, 0x01, 0x01, 0x10, 0x0D, 0x04, 0xE0, 0x38, 0xCA, 0x00,
0x44, 0x1C, 0x0D, 0x06}
}
{
0x10, 0x000024F4UL,
{
0xAA, 0x01, 0x01, 0x00, 0x0D, 0x03, 0xE0, 0x28, 0xCA, 0x00, 0x00, 0x1C,
0xF2, 0xF4, 0x02, 0xFD}
}
{
0x10, 0x000024F4UL,
{
0xAA, 0x01, 0x01, 0x00, 0x0D, 0x03, 0xE0, 0x28, 0xCA, 0x00, 0x00, 0x1C,
0xF2, 0xF4, 0x02, 0xFD}
}
{
0x04, 0x00002504UL,
{
0x3D, 0xF0, 0xCB, 0x00}
}
{
0x04, 0x00002504UL,
{
0x3D, 0xF0, 0xCB, 0x00}
}
{
0x10, 0x00002508UL,
{
0x0D, 0x1B, 0xAA, 0x00, 0x01, 0xF0, 0x0D, 0x04, 0xE0, 0x78, 0xCA, 0x00,
0xB2, 0x26, 0x0D, 0x14}
}
{
0x10, 0x00002508UL,
{
0x0D, 0x1B, 0xAA, 0x00, 0x01, 0xF0, 0x0D, 0x04, 0xE0, 0x78, 0xCA, 0x00,
0xB2, 0x26, 0x0D, 0x14}
}
{
0x10, 0x00002518UL,
{
0xAA, 0x00, 0x01, 0xE0, 0x0D, 0x04, 0xE0, 0x68, 0xCA, 0x00, 0x50, 0x0C,
0x0D, 0x0D, 0xAA, 0x00}
}
{
0x10, 0x00002518UL,
{
0xAA, 0x00, 0x01, 0xE0, 0x0D, 0x04, 0xE0, 0x68, 0xCA, 0x00, 0x50, 0x0C,
0x0D, 0x0D, 0xAA, 0x00}
}
{
0x10, 0x00002528UL,
{
0x01, 0x10, 0x0D, 0x04, 0xE0, 0x58, 0xCA, 0x00, 0xBC, 0x1C, 0x0D, 0x06,
0xAA, 0x00, 0x01, 0x00}
}
{
0x10, 0x00002528UL,
{
0x01, 0x10, 0x0D, 0x04, 0xE0, 0x58, 0xCA, 0x00, 0xBC, 0x1C, 0x0D, 0x06,
0xAA, 0x00, 0x01, 0x00}
}
{
0x10, 0x00002538UL,
{
0x0D, 0x03, 0xE0, 0x48, 0xCA, 0x00, 0x88, 0x1C, 0xF2, 0xF4, 0x00, 0xFD,
0x3D, 0xE2, 0xCB, 0x00}
}
{
0x10, 0x00002538UL,
{
0x0D, 0x03, 0xE0, 0x48, 0xCA, 0x00, 0x88, 0x1C, 0xF2, 0xF4, 0x00, 0xFD,
0x3D, 0xE2, 0xCB, 0x00}
}
{
0x10, 0x00002548UL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x13, 0x09, 0x81, 0x3D, 0x22, 0xBE, 0x88,
0xCC, 0x00, 0xF2, 0xF4}
}
{
0x10, 0x00002548UL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x13, 0x09, 0x81, 0x3D, 0x22, 0xBE, 0x88,
0xCC, 0x00, 0xF2, 0xF4}
}
{
0x10, 0x00002558UL,
{
0x5C, 0x11, 0x3D, 0x07, 0xF0, 0x49, 0x29, 0x82, 0x3D, 0x01, 0x3F, 0x04,
0xBF, 0x88, 0xE1, 0x08}
}
{
0x10, 0x00002558UL,
{
0x5C, 0x11, 0x3D, 0x07, 0xF0, 0x49, 0x29, 0x82, 0x3D, 0x01, 0x3F, 0x04,
0xBF, 0x88, 0xE1, 0x08}
}
{
0x10, 0x00002568UL,
{
0xCB, 0x00, 0x04, 0x8F, 0x5C, 0x11, 0xBF, 0x88, 0xE1, 0x18, 0xCB, 0x00,
0xBE, 0x88, 0xCC, 0x00}
}
{
0x10, 0x00002568UL,
{
0xCB, 0x00, 0x04, 0x8F, 0x5C, 0x11, 0xBF, 0x88, 0xE1, 0x18, 0xCB, 0x00,
0xBE, 0x88, 0xCC, 0x00}
}
{
0x10, 0x00002578UL,
{
0xF2, 0xF4, 0x5A, 0x11, 0x3D, 0x07, 0xF0, 0x49, 0x29, 0x83, 0x3D, 0x01,
0x1F, 0x04, 0xBF, 0x88}
}
{
0x10, 0x00002578UL,
{
0xF2, 0xF4, 0x5A, 0x11, 0x3D, 0x07, 0xF0, 0x49, 0x29, 0x83, 0x3D, 0x01,
0x1F, 0x04, 0xBF, 0x88}
}
{
0x10, 0x00002588UL,
{
0xE1, 0x08, 0xCB, 0x00, 0x04, 0x8F, 0x5A, 0x11, 0xBF, 0x88, 0xE1, 0x18,
0xCB, 0x00, 0xF0, 0x48}
}
{
0x10, 0x00002588UL,
{
0xE1, 0x08, 0xCB, 0x00, 0x04, 0x8F, 0x5A, 0x11, 0xBF, 0x88, 0xE1, 0x18,
0xCB, 0x00, 0xF0, 0x48}
}
{
0x0C, 0x00002598UL,
{
0xC0, 0x89, 0xE0, 0x48, 0xCA, 0x00, 0x84, 0x00, 0xE1, 0x08, 0xCB, 0x00}
}
{
0x0C, 0x00002598UL,
{
0xC0, 0x89, 0xE0, 0x48, 0xCA, 0x00, 0x84, 0x00, 0xE1, 0x08, 0xCB, 0x00}
}
{
0x10, 0x000025A4UL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x13, 0x09, 0x81, 0x3D, 0x22, 0xBE, 0x88,
0xCC, 0x00, 0x24, 0x8F}
}
{
0x10, 0x000025A4UL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x13, 0x09, 0x81, 0x3D, 0x22, 0xBE, 0x88,
0xCC, 0x00, 0x24, 0x8F}
}
{
0x10, 0x000025B4UL,
{
0x5C, 0x11, 0xBF, 0x88, 0xAA, 0x04, 0x01, 0x30, 0x0D, 0x07, 0xBE, 0x88,
0xCC, 0x00, 0x9A, 0x04}
}
{
0x10, 0x000025B4UL,
{
0x5C, 0x11, 0xBF, 0x88, 0xAA, 0x04, 0x01, 0x30, 0x0D, 0x07, 0xBE, 0x88,
0xCC, 0x00, 0x9A, 0x04}
}
{
0x10, 0x000025C4UL,
{
0x03, 0x80, 0x0F, 0x01, 0xD1, 0x80, 0x7F, 0xC6, 0xBF, 0x88, 0xCB, 0x00,
0xBE, 0x88, 0xCC, 0x00}
}
{
0x10, 0x000025C4UL,
{
0x03, 0x80, 0x0F, 0x01, 0xD1, 0x80, 0x7F, 0xC6, 0xBF, 0x88, 0xCB, 0x00,
0xBE, 0x88, 0xCC, 0x00}
}
{
0x10, 0x000025D4UL,
{
0x24, 0x8F, 0x5A, 0x11, 0xBF, 0x88, 0xAA, 0x04, 0x01, 0x10, 0x0D, 0x07,
0xBE, 0x88, 0xCC, 0x00}
}
{
0x10, 0x000025D4UL,
{
0x24, 0x8F, 0x5A, 0x11, 0xBF, 0x88, 0xAA, 0x04, 0x01, 0x10, 0x0D, 0x07,
0xBE, 0x88, 0xCC, 0x00}
}
{
0x10, 0x000025E4UL,
{
0x9A, 0x04, 0x03, 0x70, 0x1F, 0x01, 0xD1, 0x80, 0x7F, 0xC6, 0xBF, 0x88,
0xCB, 0x00, 0xF0, 0x48}
}
{
0x10, 0x000025E4UL,
{
0x9A, 0x04, 0x03, 0x70, 0x1F, 0x01, 0xD1, 0x80, 0x7F, 0xC6, 0xBF, 0x88,
0xCB, 0x00, 0xF0, 0x48}
}
{
0x0A, 0x000025F4UL,
{
0xC0, 0x89, 0xE0, 0x48, 0xCA, 0x00, 0x84, 0x00, 0xCB, 0x00}
}
{
0x0A, 0x000025F4UL,
{
0xC0, 0x89, 0xE0, 0x48, 0xCA, 0x00, 0x84, 0x00, 0xCB, 0x00}
}
{
0x10, 0x000025FEUL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x05, 0x09, 0x81, 0x3D, 0x06, 0xF2, 0xF4,
0x5C, 0x11, 0xCB, 0x00}
}
{
0x10, 0x000025FEUL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x05, 0x09, 0x81, 0x3D, 0x06, 0xF2, 0xF4,
0x5C, 0x11, 0xCB, 0x00}
}
{
0x0A, 0x0000260EUL,
{
0xF2, 0xF4, 0x5A, 0x11, 0xCB, 0x00, 0xE0, 0x04, 0xCB, 0x00}
}
{
0x0A, 0x0000260EUL,
{
0xF2, 0xF4, 0x5A, 0x11, 0xCB, 0x00, 0xE0, 0x04, 0xCB, 0x00}
}
{
0x10, 0x0000291AUL,
{
0x48, 0xC0, 0x2D, 0x08, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88,
0x08, 0x81, 0x28, 0xC1}
}
{
0x10, 0x0000291AUL,
{
0x48, 0xC0, 0x2D, 0x08, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88,
0x08, 0x81, 0x28, 0xC1}
}
{
0x06, 0x0000292AUL,
{
0x48, 0xC0, 0x3D, 0xF8, 0xCB, 0x00}
}
{
0x06, 0x0000292AUL,
{
0x48, 0xC0, 0x3D, 0xF8, 0xCB, 0x00}
}
{
0x10, 0x00002930UL,
{
0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B,
0x99, 0x8A, 0xDC, 0x09}
}
{
0x10, 0x00002930UL,
{
0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B,
0x99, 0x8A, 0xDC, 0x09}
}
{
0x10, 0x00002940UL,
{
0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88,
0x08, 0x81, 0xDC, 0x0B}
}
{
0x10, 0x00002940UL,
{
0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88,
0x08, 0x81, 0xDC, 0x0B}
}
{
0x10, 0x00002950UL,
{
0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A,
0xDC, 0x09, 0xB9, 0x88}
}
{
0x10, 0x00002950UL,
{
0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A,
0xDC, 0x09, 0xB9, 0x88}
}
{
0x10, 0x00002960UL,
{
0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81,
0xDC, 0x0B, 0x99, 0x8A}
}
{
0x10, 0x00002960UL,
{
0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81,
0xDC, 0x0B, 0x99, 0x8A}
}
{
0x10, 0x00002970UL,
{
0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0xA9, 0x8A, 0xDC, 0x09,
0xB9, 0x88, 0xCB, 0x00}
}
{
0x10, 0x00002970UL,
{
0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0xA9, 0x8A, 0xDC, 0x09,
0xB9, 0x88, 0xCB, 0x00}
}
{
0x10, 0x00002980UL,
{
0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B,
0x99, 0x8A, 0xDC, 0x09}
}
{
0x10, 0x00002980UL,
{
0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B,
0x99, 0x8A, 0xDC, 0x09}
}
{
0x10, 0x00002990UL,
{
0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88,
0x08, 0x81, 0xDC, 0x0B}
}
{
0x10, 0x00002990UL,
{
0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88,
0x08, 0x81, 0xDC, 0x0B}
}
{
0x10, 0x000029A0UL,
{
0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A,
0xDC, 0x09, 0xB9, 0x88}
}
{
0x10, 0x000029A0UL,
{
0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A,
0xDC, 0x09, 0xB9, 0x88}
}
{
0x10, 0x000029B0UL,
{
0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81,
0xDC, 0x0B, 0x99, 0x8A}
}
{
0x10, 0x000029B0UL,
{
0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81,
0xDC, 0x0B, 0x99, 0x8A}
}
{
0x10, 0x000029C0UL,
{
0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09,
0xB9, 0x88, 0x08, 0x81}
}
{
0x10, 0x000029C0UL,
{
0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09,
0xB9, 0x88, 0x08, 0x81}
}
{
0x10, 0x000029D0UL,
{
0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B,
0x99, 0x8A, 0xDC, 0x09}
}
{
0x10, 0x000029D0UL,
{
0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B,
0x99, 0x8A, 0xDC, 0x09}
}
{
0x10, 0x000029E0UL,
{
0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88,
0x08, 0x81, 0xDC, 0x0B}
}
{
0x10, 0x000029E0UL,
{
0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88,
0x08, 0x81, 0xDC, 0x0B}
}
{
0x10, 0x000029F0UL,
{
0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0xA9, 0x8A,
0xDC, 0x09, 0xB9, 0x88}
}
{
0x10, 0x000029F0UL,
{
0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0xA9, 0x8A,
0xDC, 0x09, 0xB9, 0x88}
}
{
0x02, 0x00002A00UL,
{
0xCB, 0x00}
}
{
0x02, 0x00002A00UL,
{
0xCB, 0x00}
}
{
0x10, 0x00002A02UL,
{
0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B,
0x99, 0x8A, 0xDC, 0x09}
}
{
0x10, 0x00002A02UL,
{
0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B,
0x99, 0x8A, 0xDC, 0x09}
}
{
0x10, 0x00002A12UL,
{
0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88,
0x08, 0x81, 0xDC, 0x0B}
}
{
0x10, 0x00002A12UL,
{
0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88,
0x08, 0x81, 0xDC, 0x0B}
}
{
0x10, 0x00002A22UL,
{
0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A,
0xDC, 0x09, 0xB9, 0x88}
}
{
0x10, 0x00002A22UL,
{
0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A,
0xDC, 0x09, 0xB9, 0x88}
}
{
0x10, 0x00002A32UL,
{
0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81,
0xDC, 0x0B, 0x99, 0x8A}
}
{
0x10, 0x00002A32UL,
{
0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81,
0xDC, 0x0B, 0x99, 0x8A}
}
{
0x10, 0x00002A42UL,
{
0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09,
0xB9, 0x88, 0x08, 0x81}
}
{
0x10, 0x00002A42UL,
{
0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09,
0xB9, 0x88, 0x08, 0x81}
}
{
0x10, 0x00002A52UL,
{
0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B,
0x99, 0x8A, 0xDC, 0x09}
}
{
0x10, 0x00002A52UL,
{
0xDC, 0x0B, 0x99, 0x8A, 0xDC, 0x09, 0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B,
0x99, 0x8A, 0xDC, 0x09}
}
{
0x0E, 0x00002A62UL,
{
0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0xA9, 0x8A, 0xDC, 0x09, 0xB9, 0x88,
0xCB, 0x00}
}
{
0x0E, 0x00002A62UL,
{
0xB9, 0x88, 0x08, 0x81, 0xDC, 0x0B, 0xA9, 0x8A, 0xDC, 0x09, 0xB9, 0x88,
0xCB, 0x00}
}
{
0x10, 0x0000C000UL,
{
0x0A, 0x20, 0x43, 0x43, 0x49, 0x5F, 0x49, 0x6E, 0x73, 0x74, 0x61, 0x6C,
0x6C, 0x3A, 0x20, 0x5A}
}
{
0x10, 0x0000C000UL,
{
0x0A, 0x20, 0x43, 0x43, 0x49, 0x5F, 0x49, 0x6E, 0x73, 0x74, 0x61, 0x6C,
0x6C, 0x3A, 0x20, 0x5A}
}
{
0x10, 0x0000C010UL,
{
0x75, 0x65, 0x72, 0x73, 0x74, 0x20, 0x54, 0x61, 0x73, 0x6B, 0x73, 0x20,
0x72, 0x65, 0x67, 0x69}
}
{
0x10, 0x0000C010UL,
{
0x75, 0x65, 0x72, 0x73, 0x74, 0x20, 0x54, 0x61, 0x73, 0x6B, 0x73, 0x20,
0x72, 0x65, 0x67, 0x69}
}
{
0x0A, 0x0000C020UL,
{
0x73, 0x74, 0x69, 0x65, 0x72, 0x65, 0x6E, 0x20, 0x21, 0x00}
}
{
0x0A, 0x0000C020UL,
{
0x73, 0x74, 0x69, 0x65, 0x72, 0x65, 0x6E, 0x20, 0x21, 0x00}
}
{
0x06, 0x00002B72UL,
{
0x01, 0x40, 0x4A, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002B72UL,
{
0x01, 0x40, 0x4A, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002B78UL,
{
0x01, 0x40, 0x4B, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002B78UL,
{
0x01, 0x40, 0x4B, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002B7EUL,
{
0x01, 0x40, 0x4C, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002B7EUL,
{
0x01, 0x40, 0x4C, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002B84UL,
{
0x01, 0x40, 0x4D, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002B84UL,
{
0x01, 0x40, 0x4D, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002B8AUL,
{
0x01, 0x40, 0x4E, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002B8AUL,
{
0x01, 0x40, 0x4E, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002B90UL,
{
0x01, 0x40, 0x4F, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002B90UL,
{
0x01, 0x40, 0x4F, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002B96UL,
{
0x01, 0x40, 0x50, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002B96UL,
{
0x01, 0x40, 0x50, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002B9CUL,
{
0x01, 0x40, 0x51, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002B9CUL,
{
0x01, 0x40, 0x51, 0x11, 0x00, 0x00}
}
{
0x0E, 0x00001DE0UL,
{
0xF0, 0x48, 0xF7, 0xF8, 0x4C, 0x11, 0xE1, 0x18, 0x75, 0xF8, 0x4D, 0x11,
0xCB, 0x00}
}
{
0x0E, 0x00001DE0UL,
{
0xF0, 0x48, 0xF7, 0xF8, 0x4C, 0x11, 0xE1, 0x18, 0x75, 0xF8, 0x4D, 0x11,
0xCB, 0x00}
}
{
0x10, 0x00001DEEUL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x06, 0x09, 0x81, 0x3D, 0x07, 0xF0, 0x49,
0xF7, 0xF8, 0x51, 0x11}
}
{
0x10, 0x00001DEEUL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x06, 0x09, 0x81, 0x3D, 0x07, 0xF0, 0x49,
0xF7, 0xF8, 0x51, 0x11}
}
{
0x10, 0x00001DFEUL,
{
0x0D, 0x03, 0xF0, 0x49, 0xF7, 0xF8, 0x50, 0x11, 0xE1, 0x28, 0x75, 0xF8,
0x4D, 0x11, 0xCB, 0x00}
}
{
0x10, 0x00001DFEUL,
{
0x0D, 0x03, 0xF0, 0x49, 0xF7, 0xF8, 0x50, 0x11, 0xE1, 0x28, 0x75, 0xF8,
0x4D, 0x11, 0xCB, 0x00}
}
{
0x10, 0x00001E0EUL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x06, 0x09, 0x81, 0x3D, 0x07, 0xF0, 0x49,
0xF7, 0xF8, 0x4F, 0x11}
}
{
0x10, 0x00001E0EUL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x06, 0x09, 0x81, 0x3D, 0x07, 0xF0, 0x49,
0xF7, 0xF8, 0x4F, 0x11}
}
{
0x10, 0x00001E1EUL,
{
0x0D, 0x03, 0xF0, 0x49, 0xF7, 0xF8, 0x4E, 0x11, 0xE1, 0x48, 0x75, 0xF8,
0x4D, 0x11, 0xCB, 0x00}
}
{
0x10, 0x00001E1EUL,
{
0x0D, 0x03, 0xF0, 0x49, 0xF7, 0xF8, 0x4E, 0x11, 0xE1, 0x48, 0x75, 0xF8,
0x4D, 0x11, 0xCB, 0x00}
}
{
0x10, 0x00001E2EUL,
{
0xF3, 0xF8, 0x4D, 0x11, 0x49, 0x87, 0x2D, 0x06, 0xE6, 0xF8, 0x00, 0xC0,
0xCA, 0x00, 0x36, 0x00}
}
{
0x10, 0x00001E2EUL,
{
0xF3, 0xF8, 0x4D, 0x11, 0x49, 0x87, 0x2D, 0x06, 0xE6, 0xF8, 0x00, 0xC0,
0xCA, 0x00, 0x36, 0x00}
}
{
0x10, 0x00001E3EUL,
{
0xE1, 0x08, 0xCB, 0x00, 0xE0, 0x04, 0xE6, 0xF5, 0x20, 0x00, 0xF6, 0xF4,
0x46, 0x11, 0xF6, 0xF5}
}
{
0x10, 0x00001E3EUL,
{
0xE1, 0x08, 0xCB, 0x00, 0xE0, 0x04, 0xE6, 0xF5, 0x20, 0x00, 0xF6, 0xF4,
0x46, 0x11, 0xF6, 0xF5}
}
{
0x10, 0x00001E4EUL,
{
0x48, 0x11, 0xE6, 0xF4, 0x00, 0x20, 0xF6, 0xF4, 0x42, 0x11, 0xF6, 0xF5,
0x44, 0x11, 0xCA, 0x00}
}
{
0x10, 0x00001E4EUL,
{
0x48, 0x11, 0xE6, 0xF4, 0x00, 0x20, 0xF6, 0xF4, 0x42, 0x11, 0xF6, 0xF5,
0x44, 0x11, 0xCA, 0x00}
}
{
0x10, 0x00001E5EUL,
{
0x80, 0x22, 0x7E, 0xE6, 0x7F, 0xE7, 0xE6, 0xCA, 0x59, 0x00, 0xD1, 0x90,
0x66, 0xE0, 0xFF, 0xCF}
}
{
0x10, 0x00001E5EUL,
{
0x80, 0x22, 0x7E, 0xE6, 0x7F, 0xE7, 0xE6, 0xCA, 0x59, 0x00, 0xD1, 0x90,
0x66, 0xE0, 0xFF, 0xCF}
}
{
0x08, 0x00001E6EUL,
{
0x76, 0xE0, 0x00, 0x20, 0xE1, 0x18, 0xCB, 0x00}
}
{
0x08, 0x00001E6EUL,
{
0x76, 0xE0, 0x00, 0x20, 0xE1, 0x18, 0xCB, 0x00}
}
{
0x10, 0x00001E76UL,
{
0xF0, 0x49, 0x49, 0x80, 0x2D, 0x06, 0x49, 0x81, 0x2D, 0x04, 0x49, 0x82,
0x2D, 0x02, 0xE1, 0x08}
}
{
0x10, 0x00001E76UL,
{
0xF0, 0x49, 0x49, 0x80, 0x2D, 0x06, 0x49, 0x81, 0x2D, 0x04, 0x49, 0x82,
0x2D, 0x02, 0xE1, 0x08}
}
{
0x10, 0x00001E86UL,
{
0xCB, 0x00, 0xF0, 0x48, 0x49, 0x80, 0x3D, 0x04, 0xF0, 0x49, 0xF7, 0xF8,
0x4B, 0x11, 0x0D, 0x09}
}
{
0x10, 0x00001E86UL,
{
0xCB, 0x00, 0xF0, 0x48, 0x49, 0x80, 0x3D, 0x04, 0xF0, 0x49, 0xF7, 0xF8,
0x4B, 0x11, 0x0D, 0x09}
}
{
0x10, 0x00001E96UL,
{
0xF0, 0x48, 0x49, 0x81, 0x3D, 0x04, 0xF0, 0x49, 0xF7, 0xF8, 0x4A, 0x11,
0x0D, 0x02, 0xE1, 0x08}
}
{
0x10, 0x00001E96UL,
{
0xF0, 0x48, 0x49, 0x81, 0x3D, 0x04, 0xF0, 0x49, 0xF7, 0xF8, 0x4A, 0x11,
0x0D, 0x02, 0xE1, 0x08}
}
{
0x06, 0x00001EA6UL,
{
0xCB, 0x00, 0xE1, 0x18, 0xCB, 0x00}
}
{
0x06, 0x00001EA6UL,
{
0xCB, 0x00, 0xE1, 0x18, 0xCB, 0x00}
}
{
0x10, 0x00001EACUL,
{
0xF2, 0xF7, 0x48, 0x11, 0xF2, 0xF6, 0x46, 0x11, 0xDC, 0x07, 0xA9, 0x86,
0x49, 0x81, 0x3D, 0x0B}
}
{
0x10, 0x00001EACUL,
{
0xF2, 0xF7, 0x48, 0x11, 0xF2, 0xF6, 0x46, 0x11, 0xDC, 0x07, 0xA9, 0x86,
0x49, 0x81, 0x3D, 0x0B}
}
{
0x10, 0x00001EBCUL,
{
0xDC, 0x17, 0xF4, 0x86, 0x01, 0x00, 0xCC, 0x00, 0xB9, 0x88, 0xF2, 0xF5,
0x48, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x00001EBCUL,
{
0xDC, 0x17, 0xF4, 0x86, 0x01, 0x00, 0xCC, 0x00, 0xB9, 0x88, 0xF2, 0xF5,
0x48, 0x11, 0xF2, 0xF4}
}
{
0x0C, 0x00001ECCUL,
{
0x46, 0x11, 0x08, 0x44, 0xCB, 0x00, 0xE0, 0x04, 0xE0, 0x05, 0xCB, 0x00}
}
{
0x0C, 0x00001ECCUL,
{
0x46, 0x11, 0x08, 0x44, 0xCB, 0x00, 0xE0, 0x04, 0xE0, 0x05, 0xCB, 0x00}
}
{
0x10, 0x00001ED8UL,
{
0xEC, 0xFD, 0xF0, 0x69, 0xF0, 0x7A, 0xF0, 0xD8, 0xF0, 0x48, 0xC0, 0x8C,
0xF0, 0xBA, 0xF0, 0xA9}
}
{
0x10, 0x00001ED8UL,
{
0xEC, 0xFD, 0xF0, 0x69, 0xF0, 0x7A, 0xF0, 0xD8, 0xF0, 0x48, 0xC0, 0x8C,
0xF0, 0xBA, 0xF0, 0xA9}
}
{
0x10, 0x00001EE8UL,
{
0xF2, 0xF9, 0x48, 0x11, 0xF2, 0xF8, 0x46, 0x11, 0x08, 0x84, 0xCA, 0x00,
0x1A, 0x29, 0xF0, 0x6D}
}
{
0x10, 0x00001EE8UL,
{
0xF2, 0xF9, 0x48, 0x11, 0xF2, 0xF8, 0x46, 0x11, 0x08, 0x84, 0xCA, 0x00,
0x1A, 0x29, 0xF0, 0x6D}
}
{
0x10, 0x00001EF8UL,
{
0xF2, 0xF5, 0x48, 0x11, 0xF2, 0xF4, 0x46, 0x11, 0xDC, 0x05, 0xE4, 0xC4,
0x01, 0x00, 0xE1, 0x2C}
}
{
0x10, 0x00001EF8UL,
{
0xF2, 0xF5, 0x48, 0x11, 0xF2, 0xF4, 0x46, 0x11, 0xDC, 0x05, 0xE4, 0xC4,
0x01, 0x00, 0xE1, 0x2C}
}
{
0x10, 0x00001F08UL,
{
0xF2, 0xF5, 0x48, 0x11, 0xF2, 0xF4, 0x46, 0x11, 0xDC, 0x05, 0xB9, 0xC4,
0xFC, 0xFD, 0xCB, 0x00}
}
{
0x10, 0x00001F08UL,
{
0xF2, 0xF5, 0x48, 0x11, 0xF2, 0xF4, 0x46, 0x11, 0xDC, 0x05, 0xB9, 0xC4,
0xFC, 0xFD, 0xCB, 0x00}
}
{
0x10, 0x00001F18UL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x0E, 0x09, 0x81, 0x3D, 0x18, 0xF2, 0xF5,
0x40, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x00001F18UL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x0E, 0x09, 0x81, 0x3D, 0x18, 0xF2, 0xF5,
0x40, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x00001F28UL,
{
0x3E, 0x11, 0xDC, 0x05, 0xA9, 0x84, 0x3D, 0x02, 0x0F, 0xF4, 0x0D, 0x01,
0x0E, 0xF4, 0x69, 0x81}
}
{
0x10, 0x00001F28UL,
{
0x3E, 0x11, 0xDC, 0x05, 0xA9, 0x84, 0x3D, 0x02, 0x0F, 0xF4, 0x0D, 0x01,
0x0E, 0xF4, 0x69, 0x81}
}
{
0x10, 0x00001F38UL,
{
0xCB, 0x00, 0xF2, 0xF5, 0x38, 0x11, 0xF2, 0xF4, 0x36, 0x11, 0xDC, 0x05,
0xA9, 0x84, 0x3D, 0x02}
}
{
0x10, 0x00001F38UL,
{
0xCB, 0x00, 0xF2, 0xF5, 0x38, 0x11, 0xF2, 0xF4, 0x36, 0x11, 0xDC, 0x05,
0xA9, 0x84, 0x3D, 0x02}
}
{
0x0E, 0x00001F48UL,
{
0x0F, 0xF4, 0x0D, 0x01, 0x0E, 0xF4, 0x69, 0x81, 0xCB, 0x00, 0xE1, 0x08,
0xCB, 0x00}
}
{
0x0E, 0x00001F48UL,
{
0x0F, 0xF4, 0x0D, 0x01, 0x0E, 0xF4, 0x69, 0x81, 0xCB, 0x00, 0xE1, 0x08,
0xCB, 0x00}
}
{
0x10, 0x00001F56UL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xEC, 0xFF, 0xF0, 0xEA, 0xF0, 0xFB, 0xF0, 0xD9,
0xF0, 0x48, 0x29, 0x81}
}
{
0x10, 0x00001F56UL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xEC, 0xFF, 0xF0, 0xEA, 0xF0, 0xFB, 0xF0, 0xD9,
0xF0, 0x48, 0x29, 0x81}
}
{
0x10, 0x00001F66UL,
{
0x2D, 0x4E, 0x09, 0x81, 0xEA, 0x30, 0x98, 0x20, 0xF2, 0xF9, 0x40, 0x11,
0xF2, 0xF8, 0x3E, 0x11}
}
{
0x10, 0x00001F66UL,
{
0x2D, 0x4E, 0x09, 0x81, 0xEA, 0x30, 0x98, 0x20, 0xF2, 0xF9, 0x40, 0x11,
0xF2, 0xF8, 0x3E, 0x11}
}
{
0x10, 0x00001F76UL,
{
0xDC, 0x09, 0xA9, 0x88, 0xEA, 0x30, 0x98, 0x20, 0xF0, 0x6D, 0xDC, 0x09,
0xE4, 0xC8, 0x01, 0x00}
}
{
0x10, 0x00001F76UL,
{
0xDC, 0x09, 0xA9, 0x88, 0xEA, 0x30, 0x98, 0x20, 0xF0, 0x6D, 0xDC, 0x09,
0xE4, 0xC8, 0x01, 0x00}
}
{
0x10, 0x00001F86UL,
{
0xF0, 0x4D, 0xC0, 0x8C, 0xF0, 0xBF, 0xF0, 0xAE, 0xF2, 0xF9, 0x40, 0x11,
0xF2, 0xF8, 0x3E, 0x11}
}
{
0x10, 0x00001F86UL,
{
0xF0, 0x4D, 0xC0, 0x8C, 0xF0, 0xBF, 0xF0, 0xAE, 0xF2, 0xF9, 0x40, 0x11,
0xF2, 0xF8, 0x3E, 0x11}
}
{
0x10, 0x00001F96UL,
{
0x08, 0x82, 0xCA, 0x00, 0x1A, 0x29, 0xE1, 0x1C, 0xF2, 0xF5, 0x40, 0x11,
0xF2, 0xF4, 0x3E, 0x11}
}
{
0x10, 0x00001F96UL,
{
0x08, 0x82, 0xCA, 0x00, 0x1A, 0x29, 0xE1, 0x1C, 0xF2, 0xF5, 0x40, 0x11,
0xF2, 0xF4, 0x3E, 0x11}
}
{
0x10, 0x00001FA6UL,
{
0xDC, 0x05, 0xB9, 0xC4, 0xE6, 0xF4, 0x14, 0x00, 0x04, 0xF4, 0x3E, 0x11,
0xF2, 0xF9, 0x48, 0x11}
}
{
0x10, 0x00001FA6UL,
{
0xDC, 0x05, 0xB9, 0xC4, 0xE6, 0xF4, 0x14, 0x00, 0x04, 0xF4, 0x3E, 0x11,
0xF2, 0xF9, 0x48, 0x11}
}
{
0x10, 0x00001FB6UL,
{
0xF2, 0xF8, 0x46, 0x11, 0xF0, 0x68, 0x06, 0xF6, 0x08, 0x0C, 0xF0, 0x79,
0x22, 0xF6, 0x3E, 0x11}
}
{
0x10, 0x00001FB6UL,
{
0xF2, 0xF8, 0x46, 0x11, 0xF0, 0x68, 0x06, 0xF6, 0x08, 0x0C, 0xF0, 0x79,
0x22, 0xF6, 0x3E, 0x11}
}
{
0x10, 0x00001FC6UL,
{
0x32, 0xF7, 0x40, 0x11, 0xED, 0x06, 0x06, 0xF8, 0x20, 0x08, 0xF6, 0xF8,
0x3E, 0x11, 0xF6, 0xF9}
}
{
0x10, 0x00001FC6UL,
{
0x32, 0xF7, 0x40, 0x11, 0xED, 0x06, 0x06, 0xF8, 0x20, 0x08, 0xF6, 0xF8,
0x3E, 0x11, 0xF6, 0xF9}
}
{
0x10, 0x00001FD6UL,
{
0x40, 0x11, 0xF3, 0xF8, 0x4B, 0x11, 0x49, 0x81, 0x3D, 0x03, 0xCA, 0x00,
0xDC, 0x21, 0x0D, 0x0D}
}
{
0x10, 0x00001FD6UL,
{
0x40, 0x11, 0xF3, 0xF8, 0x4B, 0x11, 0x49, 0x81, 0x3D, 0x03, 0xCA, 0x00,
0xDC, 0x21, 0x0D, 0x0D}
}
{
0x10, 0x00001FE6UL,
{
0xF3, 0xF8, 0x4B, 0x11, 0x49, 0x82, 0x3D, 0x09, 0xF2, 0xF5, 0x40, 0x11,
0xF2, 0xF4, 0x3E, 0x11}
}
{
0x10, 0x00001FE6UL,
{
0xF3, 0xF8, 0x4B, 0x11, 0x49, 0x82, 0x3D, 0x09, 0xF2, 0xF5, 0x40, 0x11,
0xF2, 0xF4, 0x3E, 0x11}
}
{
0x10, 0x00001FF6UL,
{
0xDC, 0x05, 0xA9, 0x84, 0x2D, 0x02, 0xCA, 0x00, 0xDC, 0x21, 0xE1, 0x18,
0x0D, 0x4B, 0xF2, 0xF9}
}
{
0x10, 0x00001FF6UL,
{
0xDC, 0x05, 0xA9, 0x84, 0x2D, 0x02, 0xCA, 0x00, 0xDC, 0x21, 0xE1, 0x18,
0x0D, 0x4B, 0xF2, 0xF9}
}
{
0x10, 0x00002006UL,
{
0x38, 0x11, 0xF2, 0xF8, 0x36, 0x11, 0xDC, 0x09, 0xA9, 0x88, 0x3D, 0x43,
0xF0, 0x6D, 0xDC, 0x09}
}
{
0x10, 0x00002006UL,
{
0x38, 0x11, 0xF2, 0xF8, 0x36, 0x11, 0xDC, 0x09, 0xA9, 0x88, 0x3D, 0x43,
0xF0, 0x6D, 0xDC, 0x09}
}
{
0x10, 0x00002016UL,
{
0xE4, 0xC8, 0x01, 0x00, 0xF0, 0x4D, 0xC0, 0x8C, 0xF0, 0xBF, 0xF0, 0xAE,
0xF2, 0xF9, 0x38, 0x11}
}
{
0x10, 0x00002016UL,
{
0xE4, 0xC8, 0x01, 0x00, 0xF0, 0x4D, 0xC0, 0x8C, 0xF0, 0xBF, 0xF0, 0xAE,
0xF2, 0xF9, 0x38, 0x11}
}
{
0x10, 0x00002026UL,
{
0xF2, 0xF8, 0x36, 0x11, 0x08, 0x82, 0xCA, 0x00, 0x1A, 0x29, 0xE1, 0x1C,
0xF2, 0xF5, 0x38, 0x11}
}
{
0x10, 0x00002026UL,
{
0xF2, 0xF8, 0x36, 0x11, 0x08, 0x82, 0xCA, 0x00, 0x1A, 0x29, 0xE1, 0x1C,
0xF2, 0xF5, 0x38, 0x11}
}
{
0x10, 0x00002036UL,
{
0xF2, 0xF4, 0x36, 0x11, 0xDC, 0x05, 0xB9, 0xC4, 0xE6, 0xF4, 0x14, 0x00,
0x04, 0xF4, 0x36, 0x11}
}
{
0x10, 0x00002036UL,
{
0xF2, 0xF4, 0x36, 0x11, 0xDC, 0x05, 0xB9, 0xC4, 0xE6, 0xF4, 0x14, 0x00,
0x04, 0xF4, 0x36, 0x11}
}
{
0x10, 0x00002046UL,
{
0xF2, 0xF9, 0x48, 0x11, 0xF2, 0xF8, 0x46, 0x11, 0xF0, 0x68, 0x06, 0xF6,
0xF0, 0x0F, 0xF0, 0x79}
}
{
0x10, 0x00002046UL,
{
0xF2, 0xF9, 0x48, 0x11, 0xF2, 0xF8, 0x46, 0x11, 0xF0, 0x68, 0x06, 0xF6,
0xF0, 0x0F, 0xF0, 0x79}
}
{
0x10, 0x00002056UL,
{
0x22, 0xF6, 0x36, 0x11, 0x32, 0xF7, 0x38, 0x11, 0xED, 0x06, 0x06, 0xF8,
0x08, 0x0C, 0xF6, 0xF8}
}
{
0x10, 0x00002056UL,
{
0x22, 0xF6, 0x36, 0x11, 0x32, 0xF7, 0x38, 0x11, 0xED, 0x06, 0x06, 0xF8,
0x08, 0x0C, 0xF6, 0xF8}
}
{
0x10, 0x00002066UL,
{
0x36, 0x11, 0xF6, 0xF9, 0x38, 0x11, 0xF3, 0xF8, 0x4A, 0x11, 0x49, 0x81,
0x3D, 0x03, 0xCA, 0x00}
}
{
0x10, 0x00002066UL,
{
0x36, 0x11, 0xF6, 0xF9, 0x38, 0x11, 0xF3, 0xF8, 0x4A, 0x11, 0x49, 0x81,
0x3D, 0x03, 0xCA, 0x00}
}
{
0x10, 0x00002076UL,
{
0xDC, 0x21, 0x0D, 0x0D, 0xF3, 0xF8, 0x4A, 0x11, 0x49, 0x82, 0x3D, 0x09,
0xF2, 0xF5, 0x38, 0x11}
}
{
0x10, 0x00002076UL,
{
0xDC, 0x21, 0x0D, 0x0D, 0xF3, 0xF8, 0x4A, 0x11, 0x49, 0x82, 0x3D, 0x09,
0xF2, 0xF5, 0x38, 0x11}
}
{
0x10, 0x00002086UL,
{
0xF2, 0xF4, 0x36, 0x11, 0xDC, 0x05, 0xA9, 0x84, 0x2D, 0x02, 0xCA, 0x00,
0xDC, 0x21, 0xE1, 0x18}
}
{
0x10, 0x00002086UL,
{
0xF2, 0xF4, 0x36, 0x11, 0xDC, 0x05, 0xA9, 0x84, 0x2D, 0x02, 0xCA, 0x00,
0xDC, 0x21, 0xE1, 0x18}
}
{
0x0C, 0x00002096UL,
{
0x0D, 0x01, 0xE1, 0x08, 0xFC, 0xFF, 0xFC, 0xFE, 0xFC, 0xFD, 0xCB, 0x00}
}
{
0x0C, 0x00002096UL,
{
0x0D, 0x01, 0xE1, 0x08, 0xFC, 0xFF, 0xFC, 0xFE, 0xFC, 0xFD, 0xCB, 0x00}
}
{
0x10, 0x000020A2UL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x14, 0x09, 0x81, 0x3D, 0x24, 0xF2, 0xF7,
0x3C, 0x11, 0xF2, 0xF6}
}
{
0x10, 0x000020A2UL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x14, 0x09, 0x81, 0x3D, 0x24, 0xF2, 0xF7,
0x3C, 0x11, 0xF2, 0xF6}
}
{
0x10, 0x000020B2UL,
{
0x3A, 0x11, 0xDC, 0x07, 0xA9, 0x86, 0x2D, 0x1D, 0xDC, 0x17, 0xF4, 0x86,
0x01, 0x00, 0xCC, 0x00}
}
{
0x10, 0x000020B2UL,
{
0x3A, 0x11, 0xDC, 0x07, 0xA9, 0x86, 0x2D, 0x1D, 0xDC, 0x17, 0xF4, 0x86,
0x01, 0x00, 0xCC, 0x00}
}
{
0x10, 0x000020C2UL,
{
0xB9, 0x89, 0xF2, 0xF5, 0x3C, 0x11, 0xF2, 0xF4, 0x3A, 0x11, 0x08, 0x42,
0xCB, 0x00, 0xF2, 0xF7}
}
{
0x10, 0x000020C2UL,
{
0xB9, 0x89, 0xF2, 0xF5, 0x3C, 0x11, 0xF2, 0xF4, 0x3A, 0x11, 0x08, 0x42,
0xCB, 0x00, 0xF2, 0xF7}
}
{
0x10, 0x000020D2UL,
{
0x34, 0x11, 0xF2, 0xF6, 0x32, 0x11, 0xDC, 0x07, 0xA9, 0x86, 0x2D, 0x0B,
0xDC, 0x17, 0xF4, 0x86}
}
{
0x10, 0x000020D2UL,
{
0x34, 0x11, 0xF2, 0xF6, 0x32, 0x11, 0xDC, 0x07, 0xA9, 0x86, 0x2D, 0x0B,
0xDC, 0x17, 0xF4, 0x86}
}
{
0x10, 0x000020E2UL,
{
0x01, 0x00, 0xCC, 0x00, 0xB9, 0x89, 0xF2, 0xF5, 0x34, 0x11, 0xF2, 0xF4,
0x32, 0x11, 0x08, 0x42}
}
{
0x10, 0x000020E2UL,
{
0x01, 0x00, 0xCC, 0x00, 0xB9, 0x89, 0xF2, 0xF5, 0x34, 0x11, 0xF2, 0xF4,
0x32, 0x11, 0x08, 0x42}
}
{
0x08, 0x000020F2UL,
{
0xCB, 0x00, 0xE0, 0x04, 0xE0, 0x05, 0xCB, 0x00}
}
{
0x08, 0x000020F2UL,
{
0xCB, 0x00, 0xE0, 0x04, 0xE0, 0x05, 0xCB, 0x00}
}
{
0x10, 0x000020FAUL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x21, 0x09, 0x81, 0x3D, 0x3D, 0xE1, 0x0C,
0xF2, 0xF5, 0x3C, 0x11}
}
{
0x10, 0x000020FAUL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x21, 0x09, 0x81, 0x3D, 0x3D, 0xE1, 0x0C,
0xF2, 0xF5, 0x3C, 0x11}
}
{
0x10, 0x0000210AUL,
{
0xF2, 0xF4, 0x3A, 0x11, 0xDC, 0x05, 0xB9, 0xC4, 0xE6, 0xF4, 0x14, 0x00,
0x04, 0xF4, 0x3A, 0x11}
}
{
0x10, 0x0000210AUL,
{
0xF2, 0xF4, 0x3A, 0x11, 0xDC, 0x05, 0xB9, 0xC4, 0xE6, 0xF4, 0x14, 0x00,
0x04, 0xF4, 0x3A, 0x11}
}
{
0x10, 0x0000211AUL,
{
0xF2, 0xF9, 0x48, 0x11, 0xF2, 0xF8, 0x46, 0x11, 0xF0, 0x68, 0x06, 0xF6,
0x38, 0x04, 0xF0, 0x79}
}
{
0x10, 0x0000211AUL,
{
0xF2, 0xF9, 0x48, 0x11, 0xF2, 0xF8, 0x46, 0x11, 0xF0, 0x68, 0x06, 0xF6,
0x38, 0x04, 0xF0, 0x79}
}
{
0x10, 0x0000212AUL,
{
0x22, 0xF6, 0x3A, 0x11, 0x32, 0xF7, 0x3C, 0x11, 0xED, 0x25, 0x06, 0xF8,
0x50, 0x00, 0xF6, 0xF8}
}
{
0x10, 0x0000212AUL,
{
0x22, 0xF6, 0x3A, 0x11, 0x32, 0xF7, 0x3C, 0x11, 0xED, 0x25, 0x06, 0xF8,
0x50, 0x00, 0xF6, 0xF8}
}
{
0x10, 0x0000213AUL,
{
0x3A, 0x11, 0xF6, 0xF9, 0x3C, 0x11, 0xCB, 0x00, 0xE1, 0x0C, 0xF2, 0xF5,
0x34, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x0000213AUL,
{
0x3A, 0x11, 0xF6, 0xF9, 0x3C, 0x11, 0xCB, 0x00, 0xE1, 0x0C, 0xF2, 0xF5,
0x34, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x0000214AUL,
{
0x32, 0x11, 0xDC, 0x05, 0xB9, 0xC4, 0xE6, 0xF4, 0x14, 0x00, 0x04, 0xF4,
0x32, 0x11, 0xF2, 0xF9}
}
{
0x10, 0x0000214AUL,
{
0x32, 0x11, 0xDC, 0x05, 0xB9, 0xC4, 0xE6, 0xF4, 0x14, 0x00, 0x04, 0xF4,
0x32, 0x11, 0xF2, 0xF9}
}
{
0x10, 0x0000215AUL,
{
0x48, 0x11, 0xF2, 0xF8, 0x46, 0x11, 0xF0, 0x68, 0x06, 0xF6, 0x20, 0x08,
0xF0, 0x79, 0x22, 0xF6}
}
{
0x10, 0x0000215AUL,
{
0x48, 0x11, 0xF2, 0xF8, 0x46, 0x11, 0xF0, 0x68, 0x06, 0xF6, 0x20, 0x08,
0xF0, 0x79, 0x22, 0xF6}
}
{
0x10, 0x0000216AUL,
{
0x32, 0x11, 0x32, 0xF7, 0x34, 0x11, 0xED, 0x06, 0x06, 0xF8, 0x38, 0x04,
0xF6, 0xF8, 0x32, 0x11}
}
{
0x10, 0x0000216AUL,
{
0x32, 0x11, 0x32, 0xF7, 0x34, 0x11, 0xED, 0x06, 0x06, 0xF8, 0x38, 0x04,
0xF6, 0xF8, 0x32, 0x11}
}
{
0x06, 0x0000217AUL,
{
0xF6, 0xF9, 0x34, 0x11, 0xCB, 0x00}
}
{
0x06, 0x0000217AUL,
{
0xF6, 0xF9, 0x34, 0x11, 0xCB, 0x00}
}
{
0x10, 0x00002180UL,
{
0xEC, 0xFE, 0xEC, 0xFF, 0xF0, 0x2A, 0xF0, 0x3B, 0xF0, 0x78, 0xE1, 0x0C,
0xF2, 0xF5, 0x44, 0x11}
}
{
0x10, 0x00002180UL,
{
0xEC, 0xFE, 0xEC, 0xFF, 0xF0, 0x2A, 0xF0, 0x3B, 0xF0, 0x78, 0xE1, 0x0C,
0xF2, 0xF5, 0x44, 0x11}
}
{
0x10, 0x00002190UL,
{
0xF2, 0xF4, 0x42, 0x11, 0xDC, 0x05, 0xB9, 0xC4, 0xF2, 0xFF, 0x44, 0x11,
0xF2, 0xFE, 0x42, 0x11}
}
{
0x10, 0x00002190UL,
{
0xF2, 0xF4, 0x42, 0x11, 0xDC, 0x05, 0xB9, 0xC4, 0xF2, 0xFF, 0x44, 0x11,
0xF2, 0xFE, 0x42, 0x11}
}
{
0x10, 0x000021A0UL,
{
0xDC, 0x0F, 0xA9, 0x8E, 0x3D, 0x14, 0xF0, 0x49, 0xC0, 0x8C, 0xF2, 0xF9,
0x48, 0x11, 0xF2, 0xF8}
}
{
0x10, 0x000021A0UL,
{
0xDC, 0x0F, 0xA9, 0x8E, 0x3D, 0x14, 0xF0, 0x49, 0xC0, 0x8C, 0xF2, 0xF9,
0x48, 0x11, 0xF2, 0xF8}
}
{
0x10, 0x000021B0UL,
{
0x46, 0x11, 0x00, 0x87, 0x06, 0xF8, 0xF0, 0x0F, 0xCA, 0x00, 0x1A, 0x29,
0xE1, 0x1C, 0xF2, 0xF5}
}
{
0x10, 0x000021B0UL,
{
0x46, 0x11, 0x00, 0x87, 0x06, 0xF8, 0xF0, 0x0F, 0xCA, 0x00, 0x1A, 0x29,
0xE1, 0x1C, 0xF2, 0xF5}
}
{
0x10, 0x000021C0UL,
{
0x44, 0x11, 0xF2, 0xF4, 0x42, 0x11, 0xDC, 0x05, 0xB9, 0xC4, 0xE1, 0x18,
0x0D, 0x04, 0xE1, 0x1C}
}
{
0x10, 0x000021C0UL,
{
0x44, 0x11, 0xF2, 0xF4, 0x42, 0x11, 0xDC, 0x05, 0xB9, 0xC4, 0xE1, 0x18,
0x0D, 0x04, 0xE1, 0x1C}
}
{
0x0C, 0x000021D0UL,
{
0xDC, 0x0F, 0xB9, 0xCE, 0xE1, 0x08, 0xFC, 0xFF, 0xFC, 0xFE, 0xCB, 0x00}
}
{
0x0C, 0x000021D0UL,
{
0xDC, 0x0F, 0xB9, 0xCE, 0xE1, 0x08, 0xFC, 0xFF, 0xFC, 0xFE, 0xCB, 0x00}
}
{
0x0C, 0x000021DCUL,
{
0xBE, 0x88, 0xCC, 0x00, 0x7F, 0xE6, 0x7E, 0xE6, 0xBF, 0x88, 0xCB, 0x00}
}
{
0x0C, 0x000021DCUL,
{
0xBE, 0x88, 0xCC, 0x00, 0x7F, 0xE6, 0x7E, 0xE6, 0xBF, 0x88, 0xCB, 0x00}
}
{
0x10, 0x000021E8UL,
{
0xC6, 0x03, 0x03, 0x00, 0xCC, 0x00, 0xF6, 0xF0, 0x00, 0xFC, 0xC6, 0x08,
0x00, 0xFC, 0xCC, 0x00}
}
{
0x10, 0x000021E8UL,
{
0xC6, 0x03, 0x03, 0x00, 0xCC, 0x00, 0xF6, 0xF0, 0x00, 0xFC, 0xC6, 0x08,
0x00, 0xFC, 0xCC, 0x00}
}
{
0x10, 0x000021F8UL,
{
0xEC, 0x00, 0xC6, 0x87, 0x10, 0x00, 0xEC, 0x06, 0xEC, 0x07, 0xF2, 0xF5,
0x40, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x000021F8UL,
{
0xEC, 0x00, 0xC6, 0x87, 0x10, 0x00, 0xEC, 0x06, 0xEC, 0x07, 0xF2, 0xF5,
0x40, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x00002208UL,
{
0x3E, 0x11, 0xDC, 0x05, 0xA9, 0x84, 0x3D, 0x04, 0xC2, 0xF8, 0x4F, 0x11,
0xCA, 0x00, 0x38, 0x23}
}
{
0x10, 0x00002208UL,
{
0x3E, 0x11, 0xDC, 0x05, 0xA9, 0x84, 0x3D, 0x04, 0xC2, 0xF8, 0x4F, 0x11,
0xCA, 0x00, 0x38, 0x23}
}
{
0x10, 0x00002218UL,
{
0xF2, 0xF5, 0x38, 0x11, 0xF2, 0xF4, 0x36, 0x11, 0xDC, 0x05, 0xA9, 0x84,
0x3D, 0x04, 0xC2, 0xF8}
}
{
0x10, 0x00002218UL,
{
0xF2, 0xF5, 0x38, 0x11, 0xF2, 0xF4, 0x36, 0x11, 0xDC, 0x05, 0xA9, 0x84,
0x3D, 0x04, 0xC2, 0xF8}
}
{
0x10, 0x00002228UL,
{
0x4E, 0x11, 0xCA, 0x00, 0x38, 0x23, 0xF2, 0xF5, 0x3C, 0x11, 0xF2, 0xF4,
0x3A, 0x11, 0xDC, 0x05}
}
{
0x10, 0x00002228UL,
{
0x4E, 0x11, 0xCA, 0x00, 0x38, 0x23, 0xF2, 0xF5, 0x3C, 0x11, 0xF2, 0xF4,
0x3A, 0x11, 0xDC, 0x05}
}
{
0x10, 0x00002238UL,
{
0xA9, 0x84, 0x2D, 0x04, 0xC2, 0xF8, 0x51, 0x11, 0xCA, 0x00, 0x38, 0x23,
0xF2, 0xF5, 0x34, 0x11}
}
{
0x10, 0x00002238UL,
{
0xA9, 0x84, 0x2D, 0x04, 0xC2, 0xF8, 0x51, 0x11, 0xCA, 0x00, 0x38, 0x23,
0xF2, 0xF5, 0x34, 0x11}
}
{
0x10, 0x00002248UL,
{
0xF2, 0xF4, 0x32, 0x11, 0xDC, 0x05, 0xA9, 0x84, 0x2D, 0x04, 0xC2, 0xF8,
0x50, 0x11, 0xCA, 0x00}
}
{
0x10, 0x00002248UL,
{
0xF2, 0xF4, 0x32, 0x11, 0xDC, 0x05, 0xA9, 0x84, 0x2D, 0x04, 0xC2, 0xF8,
0x50, 0x11, 0xCA, 0x00}
}
{
0x10, 0x00002258UL,
{
0x38, 0x23, 0xF2, 0xF5, 0x48, 0x11, 0xF2, 0xF4, 0x46, 0x11, 0xDC, 0x05,
0xA9, 0x84, 0x49, 0x81}
}
{
0x10, 0x00002258UL,
{
0x38, 0x23, 0xF2, 0xF5, 0x48, 0x11, 0xF2, 0xF4, 0x46, 0x11, 0xDC, 0x05,
0xA9, 0x84, 0x49, 0x81}
}
{
0x10, 0x00002268UL,
{
0x3D, 0x04, 0xC2, 0xF8, 0x4C, 0x11, 0xCA, 0x00, 0x38, 0x23, 0xFC, 0x07,
0xFC, 0x06, 0xFC, 0x87}
}
{
0x10, 0x00002268UL,
{
0x3D, 0x04, 0xC2, 0xF8, 0x4C, 0x11, 0xCA, 0x00, 0x38, 0x23, 0xFC, 0x07,
0xFC, 0x06, 0xFC, 0x87}
}
{
0x08, 0x00002278UL,
{
0xFC, 0x00, 0xFC, 0x08, 0xFC, 0x03, 0xFB, 0x88}
}
{
0x08, 0x00002278UL,
{
0xFC, 0x00, 0xFC, 0x08, 0xFC, 0x03, 0xFB, 0x88}
}
{
0x10, 0x00002280UL,
{
0xE6, 0xFB, 0x00, 0x20, 0xE0, 0x0A, 0xE0, 0x08, 0xE6, 0xF9, 0x80, 0x00,
0xCA, 0x00, 0x94, 0x00}
}
{
0x10, 0x00002280UL,
{
0xE6, 0xFB, 0x00, 0x20, 0xE0, 0x0A, 0xE0, 0x08, 0xE6, 0xF9, 0x80, 0x00,
0xCA, 0x00, 0x94, 0x00}
}
{
0x10, 0x00002290UL,
{
0xF2, 0xFB, 0x48, 0x11, 0xF2, 0xFA, 0x46, 0x11, 0xF0, 0x4A, 0x06, 0xF4,
0x50, 0x00, 0xF6, 0xF4}
}
{
0x10, 0x00002290UL,
{
0xF2, 0xFB, 0x48, 0x11, 0xF2, 0xFA, 0x46, 0x11, 0xF0, 0x4A, 0x06, 0xF4,
0x50, 0x00, 0xF6, 0xF4}
}
{
0x10, 0x000022A0UL,
{
0x3A, 0x11, 0xF6, 0xFB, 0x3C, 0x11, 0xF0, 0x6A, 0x06, 0xF6, 0x38, 0x04,
0xF6, 0xF6, 0x32, 0x11}
}
{
0x10, 0x000022A0UL,
{
0x3A, 0x11, 0xF6, 0xFB, 0x3C, 0x11, 0xF0, 0x6A, 0x06, 0xF6, 0x38, 0x04,
0xF6, 0xF6, 0x32, 0x11}
}
{
0x10, 0x000022B0UL,
{
0xF6, 0xFB, 0x34, 0x11, 0xF0, 0x8A, 0x06, 0xF8, 0x20, 0x08, 0xF6, 0xF8,
0x3E, 0x11, 0xF6, 0xFB}
}
{
0x10, 0x000022B0UL,
{
0xF6, 0xFB, 0x34, 0x11, 0xF0, 0x8A, 0x06, 0xF8, 0x20, 0x08, 0xF6, 0xF8,
0x3E, 0x11, 0xF6, 0xFB}
}
{
0x10, 0x000022C0UL,
{
0x40, 0x11, 0x06, 0xFA, 0x08, 0x0C, 0xF6, 0xFA, 0x36, 0x11, 0xF6, 0xFB,
0x38, 0x11, 0xE0, 0x08}
}
{
0x10, 0x000022C0UL,
{
0x40, 0x11, 0x06, 0xFA, 0x08, 0x0C, 0xF6, 0xFA, 0x36, 0x11, 0xF6, 0xFB,
0x38, 0x11, 0xE0, 0x08}
}
{
0x10, 0x000022D0UL,
{
0xE1, 0x1E, 0xF2, 0xF5, 0x44, 0x11, 0xF2, 0xF4, 0x42, 0x11, 0x00, 0x48,
0xDC, 0x05, 0xB9, 0xE4}
}
{
0x10, 0x000022D0UL,
{
0xE1, 0x1E, 0xF2, 0xF5, 0x44, 0x11, 0xF2, 0xF4, 0x42, 0x11, 0x00, 0x48,
0xDC, 0x05, 0xB9, 0xE4}
}
{
0x06, 0x000022E0UL,
{
0x80, 0xF8, 0x8D, 0xF7, 0xCB, 0x00}
}
{
0x06, 0x000022E0UL,
{
0x80, 0xF8, 0x8D, 0xF7, 0xCB, 0x00}
}
{
0x06, 0x00002BA2UL,
{
0x01, 0x40, 0x2C, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002BA2UL,
{
0x01, 0x40, 0x2C, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002BA8UL,
{
0x01, 0x40, 0x2D, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002BA8UL,
{
0x01, 0x40, 0x2D, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002BAEUL,
{
0x01, 0x40, 0x30, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002BAEUL,
{
0x01, 0x40, 0x30, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002BB4UL,
{
0x01, 0x40, 0x31, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002BB4UL,
{
0x01, 0x40, 0x31, 0x11, 0x00, 0x00}
}
{
0x06, 0x00002BBAUL,
{
0x01, 0x40, 0xF0, 0xFC, 0x02, 0x00}
}
{
0x06, 0x00002BBAUL,
{
0x01, 0x40, 0xF0, 0xFC, 0x02, 0x00}
}
{
0x06, 0x00002BC0UL,
{
0x01, 0x40, 0xF1, 0xFC, 0x02, 0x00}
}
{
0x06, 0x00002BC0UL,
{
0x01, 0x40, 0xF1, 0xFC, 0x02, 0x00}
}
{
0x10, 0x0000011CUL,
{
0xEC, 0xFD, 0xF0, 0xD8, 0xFE, 0x04, 0xEE, 0x04, 0x1E, 0x05, 0x0E, 0x05,
0xF6, 0x8E, 0x10, 0x11}
}
{
0x10, 0x0000011CUL,
{
0xEC, 0xFD, 0xF0, 0xD8, 0xFE, 0x04, 0xEE, 0x04, 0x1E, 0x05, 0x0E, 0x05,
0xF6, 0x8E, 0x10, 0x11}
}
{
0x10, 0x0000012CUL,
{
0xF6, 0x8E, 0x18, 0x11, 0xF6, 0x8E, 0x0C, 0x11, 0xF6, 0x8E, 0x14, 0x11,
0xF6, 0x8E, 0x26, 0x11}
}
{
0x10, 0x0000012CUL,
{
0xF6, 0x8E, 0x18, 0x11, 0xF6, 0x8E, 0x0C, 0x11, 0xF6, 0x8E, 0x14, 0x11,
0xF6, 0x8E, 0x26, 0x11}
}
{
0x10, 0x0000013CUL,
{
0xF6, 0x8E, 0x28, 0x11, 0xF6, 0x8E, 0xFE, 0x10, 0xF6, 0x8E, 0x00, 0x11,
0xF6, 0x8E, 0x1E, 0x11}
}
{
0x10, 0x0000013CUL,
{
0xF6, 0x8E, 0x28, 0x11, 0xF6, 0x8E, 0xFE, 0x10, 0xF6, 0x8E, 0x00, 0x11,
0xF6, 0x8E, 0x1E, 0x11}
}
{
0x10, 0x0000014CUL,
{
0xF6, 0x8E, 0x20, 0x11, 0xF6, 0x8E, 0xF6, 0x10, 0xF6, 0x8E, 0xF8, 0x10,
0xF6, 0x8E, 0x0E, 0x11}
}
{
0x10, 0x0000014CUL,
{
0xF6, 0x8E, 0x20, 0x11, 0xF6, 0x8E, 0xF6, 0x10, 0xF6, 0x8E, 0xF8, 0x10,
0xF6, 0x8E, 0x0E, 0x11}
}
{
0x10, 0x0000015CUL,
{
0xF6, 0x8E, 0x16, 0x11, 0xF6, 0x8E, 0x0A, 0x11, 0xF6, 0x8E, 0x12, 0x11,
0xF6, 0x8E, 0x22, 0x11}
}
{
0x10, 0x0000015CUL,
{
0xF6, 0x8E, 0x16, 0x11, 0xF6, 0x8E, 0x0A, 0x11, 0xF6, 0x8E, 0x12, 0x11,
0xF6, 0x8E, 0x22, 0x11}
}
{
0x10, 0x0000016CUL,
{
0xF6, 0x8E, 0x24, 0x11, 0xF6, 0x8E, 0xFA, 0x10, 0xF6, 0x8E, 0xFC, 0x10,
0xF6, 0x8E, 0x1A, 0x11}
}
{
0x10, 0x0000016CUL,
{
0xF6, 0x8E, 0x24, 0x11, 0xF6, 0x8E, 0xFA, 0x10, 0xF6, 0x8E, 0xFC, 0x10,
0xF6, 0x8E, 0x1A, 0x11}
}
{
0x10, 0x0000017CUL,
{
0xF6, 0x8E, 0x1C, 0x11, 0xF6, 0x8E, 0xF2, 0x10, 0xF6, 0x8E, 0xF4, 0x10,
0xE6, 0xF4, 0x00, 0x40}
}
{
0x10, 0x0000017CUL,
{
0xF6, 0x8E, 0x1C, 0x11, 0xF6, 0x8E, 0xF2, 0x10, 0xF6, 0x8E, 0xF4, 0x10,
0xE6, 0xF4, 0x00, 0x40}
}
{
0x10, 0x0000018CUL,
{
0xE6, 0xF5, 0x20, 0x00, 0xF6, 0xF4, 0x06, 0x11, 0xF6, 0xF5, 0x08, 0x11,
0xE6, 0xF4, 0x00, 0x48}
}
{
0x10, 0x0000018CUL,
{
0xE6, 0xF5, 0x20, 0x00, 0xF6, 0xF4, 0x06, 0x11, 0xF6, 0xF5, 0x08, 0x11,
0xE6, 0xF4, 0x00, 0x48}
}
{
0x10, 0x0000019CUL,
{
0xF6, 0xF4, 0x02, 0x11, 0xF6, 0xF5, 0x04, 0x11, 0x5F, 0xE7, 0x6F, 0xE7,
0x5F, 0xE6, 0x6F, 0xE6}
}
{
0x10, 0x0000019CUL,
{
0xF6, 0xF4, 0x02, 0x11, 0xF6, 0xF5, 0x04, 0x11, 0x5F, 0xE7, 0x6F, 0xE7,
0x5F, 0xE6, 0x6F, 0xE6}
}
{
0x10, 0x000001ACUL,
{
0x5E, 0xE6, 0xCA, 0x00, 0x8A, 0x0D, 0x5F, 0xE6, 0xCA, 0x00, 0x8A, 0x0D,
0x6E, 0xE6, 0xCA, 0x00}
}
{
0x10, 0x000001ACUL,
{
0x5E, 0xE6, 0xCA, 0x00, 0x8A, 0x0D, 0x5F, 0xE6, 0xCA, 0x00, 0x8A, 0x0D,
0x6E, 0xE6, 0xCA, 0x00}
}
{
0x10, 0x000001BCUL,
{
0x8A, 0x0D, 0x6F, 0xE6, 0xCA, 0x00, 0x8A, 0x0D, 0xD1, 0x90, 0x66, 0xE0,
0xFF, 0xF0, 0x76, 0xE0}
}
{
0x10, 0x000001BCUL,
{
0x8A, 0x0D, 0x6F, 0xE6, 0xCA, 0x00, 0x8A, 0x0D, 0xD1, 0x90, 0x66, 0xE0,
0xFF, 0xF0, 0x76, 0xE0}
}
{
0x10, 0x000001CCUL,
{
0x00, 0x0A, 0xE6, 0xC8, 0x68, 0x00, 0xE6, 0xC9, 0x69, 0x00, 0xE0, 0x08,
0xCA, 0x00, 0x3C, 0x0D}
}
{
0x10, 0x000001CCUL,
{
0x00, 0x0A, 0xE6, 0xC8, 0x68, 0x00, 0xE6, 0xC9, 0x69, 0x00, 0xE0, 0x08,
0xCA, 0x00, 0x3C, 0x0D}
}
{
0x10, 0x000001DCUL,
{
0xF7, 0xF8, 0x2D, 0x11, 0xE0, 0x18, 0xCA, 0x00, 0x3C, 0x0D, 0xF7, 0xF8,
0x2C, 0x11, 0xF0, 0x4D}
}
{
0x10, 0x000001DCUL,
{
0xF7, 0xF8, 0x2D, 0x11, 0xE0, 0x18, 0xCA, 0x00, 0x3C, 0x0D, 0xF7, 0xF8,
0x2C, 0x11, 0xF0, 0x4D}
}
{
0x10, 0x000001ECUL,
{
0xF7, 0xF8, 0xF2, 0xFC, 0xE0, 0x89, 0xC2, 0xF8, 0xF2, 0xFC, 0xCA, 0x00,
0x00, 0x27, 0xFC, 0xFD}
}
{
0x10, 0x000001ECUL,
{
0xF7, 0xF8, 0xF2, 0xFC, 0xE0, 0x89, 0xC2, 0xF8, 0xF2, 0xFC, 0xCA, 0x00,
0x00, 0x27, 0xFC, 0xFD}
}
{
0x02, 0x000001FCUL,
{
0xCB, 0x00}
}
{
0x02, 0x000001FCUL,
{
0xCB, 0x00}
}
{
0x10, 0x000001FEUL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x06, 0x09, 0x81, 0x3D, 0x07, 0xF0, 0x49,
0xF7, 0xF8, 0x31, 0x11}
}
{
0x10, 0x000001FEUL,
{
0xF0, 0x48, 0x29, 0x81, 0x2D, 0x06, 0x09, 0x81, 0x3D, 0x07, 0xF0, 0x49,
0xF7, 0xF8, 0x31, 0x11}
}
{
0x0A, 0x0000020EUL,
{
0xCB, 0x00, 0xF0, 0x49, 0xF7, 0xF8, 0x30, 0x11, 0xCB, 0x00}
}
{
0x0A, 0x0000020EUL,
{
0xCB, 0x00, 0xF0, 0x49, 0xF7, 0xF8, 0x30, 0x11, 0xCB, 0x00}
}
{
0x10, 0x00000218UL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xEC, 0xFF, 0xF0, 0xDB, 0xF0, 0xEA, 0xF0, 0xF9,
0x88, 0x80, 0xA9, 0x80}
}
{
0x10, 0x00000218UL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xEC, 0xFF, 0xF0, 0xDB, 0xF0, 0xEA, 0xF0, 0xF9,
0x88, 0x80, 0xA9, 0x80}
}
{
0x10, 0x00000228UL,
{
0xC0, 0x88, 0xCA, 0x00, 0x44, 0x06, 0x47, 0xF8, 0xFF, 0x00, 0x3D, 0x03,
0xE7, 0xF8, 0xFF, 0x00}
}
{
0x10, 0x00000228UL,
{
0xC0, 0x88, 0xCA, 0x00, 0x44, 0x06, 0x47, 0xF8, 0xFF, 0x00, 0x3D, 0x03,
0xE7, 0xF8, 0xFF, 0x00}
}
{
0x10, 0x00000238UL,
{
0x0D, 0x6B, 0xF6, 0x8C, 0x2A, 0x11, 0xA9, 0x80, 0x29, 0x81, 0x2D, 0x31,
0x09, 0x81, 0x3D, 0x5E}
}
{
0x10, 0x00000238UL,
{
0x0D, 0x6B, 0xF6, 0x8C, 0x2A, 0x11, 0xA9, 0x80, 0x29, 0x81, 0x2D, 0x31,
0x09, 0x81, 0x3D, 0x5E}
}
{
0x10, 0x00000248UL,
{
0xF0, 0x4F, 0xF7, 0xF8, 0x2F, 0x11, 0xE6, 0x8C, 0x6E, 0x04, 0xF0, 0x6E,
0xF2, 0xF5, 0x08, 0x11}
}
{
0x10, 0x00000248UL,
{
0xF0, 0x4F, 0xF7, 0xF8, 0x2F, 0x11, 0xE6, 0x8C, 0x6E, 0x04, 0xF0, 0x6E,
0xF2, 0xF5, 0x08, 0x11}
}
{
0x10, 0x00000258UL,
{
0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x06, 0x00, 0xF0, 0x6D,
0xF2, 0xF5, 0x08, 0x11}
}
{
0x10, 0x00000258UL,
{
0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x06, 0x00, 0xF0, 0x6D,
0xF2, 0xF5, 0x08, 0x11}
}
{
0x10, 0x00000268UL,
{
0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x07, 0x00, 0xE7, 0xFC,
0x5E, 0x00, 0xF2, 0xF5}
}
{
0x10, 0x00000268UL,
{
0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x07, 0x00, 0xE7, 0xFC,
0x5E, 0x00, 0xF2, 0xF5}
}
{
0x10, 0x00000278UL,
{
0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x08, 0x00,
0xE7, 0xFC, 0x2F, 0x00}
}
{
0x10, 0x00000278UL,
{
0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x08, 0x00,
0xE7, 0xFC, 0x2F, 0x00}
}
{
0x10, 0x00000288UL,
{
0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4,
0x04, 0x00, 0xE1, 0x9C}
}
{
0x10, 0x00000288UL,
{
0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4,
0x04, 0x00, 0xE1, 0x9C}
}
{
0x10, 0x00000298UL,
{
0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xB9, 0xC4,
0x0D, 0x32, 0xF0, 0x4F}
}
{
0x10, 0x00000298UL,
{
0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xB9, 0xC4,
0x0D, 0x32, 0xF0, 0x4F}
}
{
0x10, 0x000002A8UL,
{
0xF7, 0xF8, 0x2E, 0x11, 0xE6, 0x8C, 0x6E, 0x04, 0xF0, 0x6E, 0xF2, 0xF5,
0x04, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x000002A8UL,
{
0xF7, 0xF8, 0x2E, 0x11, 0xE6, 0x8C, 0x6E, 0x04, 0xF0, 0x6E, 0xF2, 0xF5,
0x04, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x000002B8UL,
{
0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x06, 0x00, 0xF0, 0x6D, 0xF2, 0xF5,
0x04, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x000002B8UL,
{
0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x06, 0x00, 0xF0, 0x6D, 0xF2, 0xF5,
0x04, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x000002C8UL,
{
0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x07, 0x00, 0xE7, 0xFC, 0x5E, 0x00,
0xF2, 0xF5, 0x04, 0x11}
}
{
0x10, 0x000002C8UL,
{
0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x07, 0x00, 0xE7, 0xFC, 0x5E, 0x00,
0xF2, 0xF5, 0x04, 0x11}
}
{
0x10, 0x000002D8UL,
{
0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x08, 0x00, 0xE7, 0xFC,
0x2F, 0x00, 0xF2, 0xF5}
}
{
0x10, 0x000002D8UL,
{
0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x08, 0x00, 0xE7, 0xFC,
0x2F, 0x00, 0xF2, 0xF5}
}
{
0x10, 0x000002E8UL,
{
0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x04, 0x00,
0xE1, 0x9C, 0xF2, 0xF5}
}
{
0x10, 0x000002E8UL,
{
0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x04, 0x00,
0xE1, 0x9C, 0xF2, 0xF5}
}
{
0x10, 0x000002F8UL,
{
0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xB9, 0xC4, 0x0D, 0x03,
0xE7, 0xF8, 0xFF, 0x00}
}
{
0x10, 0x000002F8UL,
{
0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xB9, 0xC4, 0x0D, 0x03,
0xE7, 0xF8, 0xFF, 0x00}
}
{
0x10, 0x00000308UL,
{
0x0D, 0x03, 0xF2, 0x8C, 0x2A, 0x11, 0xE1, 0x18, 0x08, 0x02, 0xFC, 0xFF,
0xFC, 0xFE, 0xFC, 0xFD}
}
{
0x10, 0x00000308UL,
{
0x0D, 0x03, 0xF2, 0x8C, 0x2A, 0x11, 0xE1, 0x18, 0x08, 0x02, 0xFC, 0xFF,
0xFC, 0xFE, 0xFC, 0xFD}
}
{
0x02, 0x00000318UL,
{
0xCB, 0x00}
}
{
0x02, 0x00000318UL,
{
0xCB, 0x00}
}
{
0x10, 0x0000031AUL,
{
0x88, 0xC0, 0x88, 0xB0, 0xF0, 0x48, 0x29, 0x81, 0x2D, 0x4F, 0x09, 0x81,
0xEA, 0x30, 0x58, 0x04}
}
{
0x10, 0x0000031AUL,
{
0x88, 0xC0, 0x88, 0xB0, 0xF0, 0x48, 0x29, 0x81, 0x2D, 0x4F, 0x09, 0x81,
0xEA, 0x30, 0x58, 0x04}
}
{
0x10, 0x0000032AUL,
{
0xF0, 0x49, 0x49, 0x80, 0x3D, 0x22, 0xF0, 0x4A, 0x49, 0x80, 0x3D, 0x09,
0xA8, 0x40, 0xF6, 0xF4}
}
{
0x10, 0x0000032AUL,
{
0xF0, 0x49, 0x49, 0x80, 0x3D, 0x22, 0xF0, 0x4A, 0x49, 0x80, 0x3D, 0x09,
0xA8, 0x40, 0xF6, 0xF4}
}
{
0x10, 0x0000033AUL,
{
0x10, 0x11, 0xD4, 0x40, 0x04, 0x00, 0xF6, 0xF4, 0x18, 0x11, 0xEA, 0x00,
0x5E, 0x04, 0xF0, 0x4A}
}
{
0x10, 0x0000033AUL,
{
0x10, 0x11, 0xD4, 0x40, 0x04, 0x00, 0xF6, 0xF4, 0x18, 0x11, 0xEA, 0x00,
0x5E, 0x04, 0xF0, 0x4A}
}
{
0x10, 0x0000034AUL,
{
0x49, 0x81, 0x3D, 0x10, 0xA8, 0x40, 0xD4, 0x50, 0x02, 0x00, 0xF6, 0xF4,
0x26, 0x11, 0xF6, 0xF5}
}
{
0x10, 0x0000034AUL,
{
0x49, 0x81, 0x3D, 0x10, 0xA8, 0x40, 0xD4, 0x50, 0x02, 0x00, 0xF6, 0xF4,
0x26, 0x11, 0xF6, 0xF5}
}
{
0x10, 0x0000035AUL,
{
0x28, 0x11, 0xD4, 0x40, 0x04, 0x00, 0xD4, 0x50, 0x06, 0x00, 0xF6, 0xF4,
0xFE, 0x10, 0xF6, 0xF5}
}
{
0x10, 0x0000035AUL,
{
0x28, 0x11, 0xD4, 0x40, 0x04, 0x00, 0xD4, 0x50, 0x06, 0x00, 0xF6, 0xF4,
0xFE, 0x10, 0xF6, 0xF5}
}
{
0x10, 0x0000036AUL,
{
0x00, 0x11, 0x0D, 0x78, 0xE7, 0xF8, 0xFF, 0x00, 0x0D, 0x76, 0xF0, 0x49,
0x49, 0x81, 0x3D, 0x21}
}
{
0x10, 0x0000036AUL,
{
0x00, 0x11, 0x0D, 0x78, 0xE7, 0xF8, 0xFF, 0x00, 0x0D, 0x76, 0xF0, 0x49,
0x49, 0x81, 0x3D, 0x21}
}
{
0x10, 0x0000037AUL,
{
0xF0, 0x4A, 0x49, 0x80, 0x3D, 0x08, 0xA8, 0x40, 0xF6, 0xF4, 0x0C, 0x11,
0xD4, 0x40, 0x04, 0x00}
}
{
0x10, 0x0000037AUL,
{
0xF0, 0x4A, 0x49, 0x80, 0x3D, 0x08, 0xA8, 0x40, 0xF6, 0xF4, 0x0C, 0x11,
0xD4, 0x40, 0x04, 0x00}
}
{
0x10, 0x0000038AUL,
{
0xF6, 0xF4, 0x14, 0x11, 0x0D, 0x67, 0xF0, 0x4A, 0x49, 0x81, 0x3D, 0x10,
0xA8, 0x40, 0xD4, 0x50}
}
{
0x10, 0x0000038AUL,
{
0xF6, 0xF4, 0x14, 0x11, 0x0D, 0x67, 0xF0, 0x4A, 0x49, 0x81, 0x3D, 0x10,
0xA8, 0x40, 0xD4, 0x50}
}
{
0x10, 0x0000039AUL,
{
0x02, 0x00, 0xF6, 0xF4, 0x1E, 0x11, 0xF6, 0xF5, 0x20, 0x11, 0xD4, 0x40,
0x04, 0x00, 0xD4, 0x50}
}
{
0x10, 0x0000039AUL,
{
0x02, 0x00, 0xF6, 0xF4, 0x1E, 0x11, 0xF6, 0xF5, 0x20, 0x11, 0xD4, 0x40,
0x04, 0x00, 0xD4, 0x50}
}
{
0x10, 0x000003AAUL,
{
0x06, 0x00, 0xF6, 0xF4, 0xF6, 0x10, 0xF6, 0xF5, 0xF8, 0x10, 0x0D, 0x54,
0xE7, 0xF8, 0xFF, 0x00}
}
{
0x10, 0x000003AAUL,
{
0x06, 0x00, 0xF6, 0xF4, 0xF6, 0x10, 0xF6, 0xF5, 0xF8, 0x10, 0x0D, 0x54,
0xE7, 0xF8, 0xFF, 0x00}
}
{
0x10, 0x000003BAUL,
{
0x0D, 0x52, 0xE7, 0xF8, 0xFF, 0x00, 0x0D, 0x4F, 0xF0, 0x49, 0x49, 0x80,
0x3D, 0x21, 0xF0, 0x4A}
}
{
0x10, 0x000003BAUL,
{
0x0D, 0x52, 0xE7, 0xF8, 0xFF, 0x00, 0x0D, 0x4F, 0xF0, 0x49, 0x49, 0x80,
0x3D, 0x21, 0xF0, 0x4A}
}
{
0x10, 0x000003CAUL,
{
0x49, 0x80, 0x3D, 0x08, 0xA8, 0x40, 0xF6, 0xF4, 0x0E, 0x11, 0xD4, 0x40,
0x04, 0x00, 0xF6, 0xF4}
}
{
0x10, 0x000003CAUL,
{
0x49, 0x80, 0x3D, 0x08, 0xA8, 0x40, 0xF6, 0xF4, 0x0E, 0x11, 0xD4, 0x40,
0x04, 0x00, 0xF6, 0xF4}
}
{
0x10, 0x000003DAUL,
{
0x16, 0x11, 0x0D, 0x40, 0xF0, 0x4A, 0x49, 0x81, 0x3D, 0x10, 0xA8, 0x40,
0xD4, 0x50, 0x02, 0x00}
}
{
0x10, 0x000003DAUL,
{
0x16, 0x11, 0x0D, 0x40, 0xF0, 0x4A, 0x49, 0x81, 0x3D, 0x10, 0xA8, 0x40,
0xD4, 0x50, 0x02, 0x00}
}
{
0x10, 0x000003EAUL,
{
0xF6, 0xF4, 0x22, 0x11, 0xF6, 0xF5, 0x24, 0x11, 0xD4, 0x40, 0x04, 0x00,
0xD4, 0x50, 0x06, 0x00}
}
{
0x10, 0x000003EAUL,
{
0xF6, 0xF4, 0x22, 0x11, 0xF6, 0xF5, 0x24, 0x11, 0xD4, 0x40, 0x04, 0x00,
0xD4, 0x50, 0x06, 0x00}
}
{
0x10, 0x000003FAUL,
{
0xF6, 0xF4, 0xFA, 0x10, 0xF6, 0xF5, 0xFC, 0x10, 0x0D, 0x2D, 0xE7, 0xF8,
0xFF, 0x00, 0x0D, 0x2B}
}
{
0x10, 0x000003FAUL,
{
0xF6, 0xF4, 0xFA, 0x10, 0xF6, 0xF5, 0xFC, 0x10, 0x0D, 0x2D, 0xE7, 0xF8,
0xFF, 0x00, 0x0D, 0x2B}
}
{
0x10, 0x0000040AUL,
{
0xF0, 0x49, 0x49, 0x81, 0x3D, 0x21, 0xF0, 0x4A, 0x49, 0x80, 0x3D, 0x08,
0xA8, 0x40, 0xF6, 0xF4}
}
{
0x10, 0x0000040AUL,
{
0xF0, 0x49, 0x49, 0x81, 0x3D, 0x21, 0xF0, 0x4A, 0x49, 0x80, 0x3D, 0x08,
0xA8, 0x40, 0xF6, 0xF4}
}
{
0x10, 0x0000041AUL,
{
0x0A, 0x11, 0xD4, 0x40, 0x04, 0x00, 0xF6, 0xF4, 0x12, 0x11, 0x0D, 0x1C,
0xF0, 0x4A, 0x49, 0x81}
}
{
0x10, 0x0000041AUL,
{
0x0A, 0x11, 0xD4, 0x40, 0x04, 0x00, 0xF6, 0xF4, 0x12, 0x11, 0x0D, 0x1C,
0xF0, 0x4A, 0x49, 0x81}
}
{
0x10, 0x0000042AUL,
{
0x3D, 0x10, 0xA8, 0x40, 0xD4, 0x50, 0x02, 0x00, 0xF6, 0xF4, 0x1A, 0x11,
0xF6, 0xF5, 0x1C, 0x11}
}
{
0x10, 0x0000042AUL,
{
0x3D, 0x10, 0xA8, 0x40, 0xD4, 0x50, 0x02, 0x00, 0xF6, 0xF4, 0x1A, 0x11,
0xF6, 0xF5, 0x1C, 0x11}
}
{
0x10, 0x0000043AUL,
{
0xD4, 0x40, 0x04, 0x00, 0xD4, 0x50, 0x06, 0x00, 0xF6, 0xF4, 0xF2, 0x10,
0xF6, 0xF5, 0xF4, 0x10}
}
{
0x10, 0x0000043AUL,
{
0xD4, 0x40, 0x04, 0x00, 0xD4, 0x50, 0x06, 0x00, 0xF6, 0xF4, 0xF2, 0x10,
0xF6, 0xF5, 0xF4, 0x10}
}
{
0x10, 0x0000044AUL,
{
0x0D, 0x09, 0xE7, 0xF8, 0xFF, 0x00, 0x0D, 0x07, 0xE7, 0xF8, 0xFF, 0x00,
0x0D, 0x04, 0xE7, 0xF8}
}
{
0x10, 0x0000044AUL,
{
0x0D, 0x09, 0xE7, 0xF8, 0xFF, 0x00, 0x0D, 0x07, 0xE7, 0xF8, 0xFF, 0x00,
0x0D, 0x04, 0xE7, 0xF8}
}
{
0x0A, 0x0000045AUL,
{
0xFF, 0x00, 0x0D, 0x01, 0xE1, 0x18, 0x08, 0x04, 0xCB, 0x00}
}
{
0x0A, 0x0000045AUL,
{
0xFF, 0x00, 0x0D, 0x01, 0xE1, 0x18, 0x08, 0x04, 0xCB, 0x00}
}
{
0x10, 0x00000464UL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xEC, 0xFF, 0x28, 0x02, 0xF6, 0x8C, 0x2A, 0x11,
0xF0, 0x48, 0x29, 0x81}
}
{
0x10, 0x00000464UL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xEC, 0xFF, 0x28, 0x02, 0xF6, 0x8C, 0x2A, 0x11,
0xF0, 0x48, 0x29, 0x81}
}
{
0x10, 0x00000474UL,
{
0x2D, 0x47, 0x09, 0x81, 0xEA, 0x30, 0x8A, 0x05, 0xF3, 0xF8, 0x2D, 0x11,
0x49, 0x81, 0x2D, 0x04}
}
{
0x10, 0x00000474UL,
{
0x2D, 0x47, 0x09, 0x81, 0xEA, 0x30, 0x8A, 0x05, 0xF3, 0xF8, 0x2D, 0x11,
0x49, 0x81, 0x2D, 0x04}
}
{
0x10, 0x00000484UL,
{
0xE7, 0xF8, 0xFF, 0x00, 0xEA, 0x00, 0x96, 0x05, 0xFE, 0x04, 0x1E, 0x05,
0xF6, 0x8E, 0xEE, 0xFC}
}
{
0x10, 0x00000484UL,
{
0xE7, 0xF8, 0xFF, 0x00, 0xEA, 0x00, 0x96, 0x05, 0xFE, 0x04, 0x1E, 0x05,
0xF6, 0x8E, 0xEE, 0xFC}
}
{
0x10, 0x00000494UL,
{
0xF6, 0x8E, 0xEA, 0xFC, 0xF6, 0x8E, 0xE6, 0xFC, 0xCE, 0x04, 0x0D, 0x03,
0xE0, 0x08, 0xCA, 0x00}
}
{
0x10, 0x00000494UL,
{
0xF6, 0x8E, 0xEA, 0xFC, 0xF6, 0x8E, 0xE6, 0xFC, 0xCE, 0x04, 0x0D, 0x03,
0xE0, 0x08, 0xCA, 0x00}
}
{
0x10, 0x000004A4UL,
{
0xFA, 0x20, 0xF0, 0x90, 0xE0, 0x08, 0xCA, 0x00, 0xA2, 0x20, 0xF0, 0xE4,
0xF0, 0xF5, 0x70, 0x45}
}
{
0x10, 0x000004A4UL,
{
0xFA, 0x20, 0xF0, 0x90, 0xE0, 0x08, 0xCA, 0x00, 0xA2, 0x20, 0xF0, 0xE4,
0xF0, 0xF5, 0x70, 0x45}
}
{
0x10, 0x000004B4UL,
{
0x3D, 0xF5, 0xCA, 0x00, 0x90, 0x26, 0xE0, 0x08, 0xCA, 0x00, 0xC6, 0x2A,
0x49, 0x80, 0x3D, 0x03}
}
{
0x10, 0x000004B4UL,
{
0x3D, 0xF5, 0xCA, 0x00, 0x90, 0x26, 0xE0, 0x08, 0xCA, 0x00, 0xC6, 0x2A,
0x49, 0x80, 0x3D, 0x03}
}
{
0x10, 0x000004C4UL,
{
0xE0, 0x08, 0xCA, 0x00, 0xA4, 0x2A, 0xE6, 0x8C, 0x6E, 0x04, 0xE1, 0x9C,
0xF2, 0xF5, 0x08, 0x11}
}
{
0x10, 0x000004C4UL,
{
0xE0, 0x08, 0xCA, 0x00, 0xA4, 0x2A, 0xE6, 0x8C, 0x6E, 0x04, 0xE1, 0x9C,
0xF2, 0xF5, 0x08, 0x11}
}
{
0x10, 0x000004D4UL,
{
0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xB9, 0xC4, 0xE0, 0x8D, 0x0D, 0x07,
0xF0, 0x6D, 0xF2, 0xF5}
}
{
0x10, 0x000004D4UL,
{
0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xB9, 0xC4, 0xE0, 0x8D, 0x0D, 0x07,
0xF0, 0x6D, 0xF2, 0xF5}
}
{
0x10, 0x000004E4UL,
{
0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xB9, 0xC4, 0xF2, 0xF5,
0x08, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x000004E4UL,
{
0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xB9, 0xC4, 0xF2, 0xF5,
0x08, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x000004F4UL,
{
0x06, 0x11, 0xDC, 0x05, 0xA9, 0x84, 0x8A, 0xF4, 0xF1, 0x00, 0xCA, 0x00,
0x9A, 0x26, 0x0D, 0x46}
}
{
0x10, 0x000004F4UL,
{
0x06, 0x11, 0xDC, 0x05, 0xA9, 0x84, 0x8A, 0xF4, 0xF1, 0x00, 0xCA, 0x00,
0x9A, 0x26, 0x0D, 0x46}
}
{
0x10, 0x00000504UL,
{
0xF3, 0xF8, 0x2C, 0x11, 0x49, 0x81, 0x2D, 0x03, 0xE7, 0xF8, 0xFF, 0x00,
0x0D, 0x42, 0xEE, 0x04}
}
{
0x10, 0x00000504UL,
{
0xF3, 0xF8, 0x2C, 0x11, 0x49, 0x81, 0x2D, 0x03, 0xE7, 0xF8, 0xFF, 0x00,
0x0D, 0x42, 0xEE, 0x04}
}
{
0x10, 0x00000514UL,
{
0x0E, 0x05, 0xF6, 0x8E, 0xEC, 0xFC, 0xF6, 0x8E, 0xE8, 0xFC, 0xF6, 0x8E,
0xE4, 0xFC, 0xBE, 0x04}
}
{
0x10, 0x00000514UL,
{
0x0E, 0x05, 0xF6, 0x8E, 0xEC, 0xFC, 0xF6, 0x8E, 0xE8, 0xFC, 0xF6, 0x8E,
0xE4, 0xFC, 0xBE, 0x04}
}
{
0x10, 0x00000524UL,
{
0x0D, 0x03, 0xE0, 0x18, 0xCA, 0x00, 0xFA, 0x20, 0xF0, 0x90, 0xE0, 0x18,
0xCA, 0x00, 0xA2, 0x20}
}
{
0x10, 0x00000524UL,
{
0x0D, 0x03, 0xE0, 0x18, 0xCA, 0x00, 0xFA, 0x20, 0xF0, 0x90, 0xE0, 0x18,
0xCA, 0x00, 0xA2, 0x20}
}
{
0x10, 0x00000534UL,
{
0xF0, 0xE4, 0xF0, 0xF5, 0x70, 0x45, 0x3D, 0xF5, 0xCA, 0x00, 0x90, 0x26,
0xE0, 0x18, 0xCA, 0x00}
}
{
0x10, 0x00000534UL,
{
0xF0, 0xE4, 0xF0, 0xF5, 0x70, 0x45, 0x3D, 0xF5, 0xCA, 0x00, 0x90, 0x26,
0xE0, 0x18, 0xCA, 0x00}
}
{
0x10, 0x00000544UL,
{
0xC6, 0x2A, 0x49, 0x80, 0x3D, 0x03, 0xE0, 0x18, 0xCA, 0x00, 0xA4, 0x2A,
0xE6, 0x8C, 0x6E, 0x04}
}
{
0x10, 0x00000544UL,
{
0xC6, 0x2A, 0x49, 0x80, 0x3D, 0x03, 0xE0, 0x18, 0xCA, 0x00, 0xA4, 0x2A,
0xE6, 0x8C, 0x6E, 0x04}
}
{
0x10, 0x00000554UL,
{
0xE1, 0x9C, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05,
0xB9, 0xC4, 0xE0, 0x8D}
}
{
0x10, 0x00000554UL,
{
0xE1, 0x9C, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05,
0xB9, 0xC4, 0xE0, 0x8D}
}
{
0x10, 0x00000564UL,
{
0x0D, 0x07, 0xF0, 0x6D, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11,
0xDC, 0x05, 0xB9, 0xC4}
}
{
0x10, 0x00000564UL,
{
0x0D, 0x07, 0xF0, 0x6D, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11,
0xDC, 0x05, 0xB9, 0xC4}
}
{
0x10, 0x00000574UL,
{
0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xA9, 0x84,
0x8A, 0xF4, 0xF1, 0x00}
}
{
0x10, 0x00000574UL,
{
0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xA9, 0x84,
0x8A, 0xF4, 0xF1, 0x00}
}
{
0x10, 0x00000584UL,
{
0xCA, 0x00, 0x9A, 0x26, 0x0D, 0x03, 0xE7, 0xF8, 0xFF, 0x00, 0x0D, 0x03,
0xF2, 0x8C, 0x2A, 0x11}
}
{
0x10, 0x00000584UL,
{
0xCA, 0x00, 0x9A, 0x26, 0x0D, 0x03, 0xE7, 0xF8, 0xFF, 0x00, 0x0D, 0x03,
0xF2, 0x8C, 0x2A, 0x11}
}
{
0x0C, 0x00000594UL,
{
0xE1, 0x18, 0x08, 0x02, 0xFC, 0xFF, 0xFC, 0xFE, 0xFC, 0xFD, 0xCB, 0x00}
}
{
0x0C, 0x00000594UL,
{
0xE1, 0x18, 0x08, 0x02, 0xFC, 0xFF, 0xFC, 0xFE, 0xFC, 0xFD, 0xCB, 0x00}
}
{
0x10, 0x000005A0UL,
{
0xF6, 0x8C, 0x2A, 0x11, 0xF0, 0x48, 0x29, 0x81, 0x2D, 0x24, 0x09, 0x81,
0x3D, 0x44, 0xF3, 0xF8}
}
{
0x10, 0x000005A0UL,
{
0xF6, 0x8C, 0x2A, 0x11, 0xF0, 0x48, 0x29, 0x81, 0x2D, 0x24, 0x09, 0x81,
0x3D, 0x44, 0xF3, 0xF8}
}
{
0x10, 0x000005B0UL,
{
0x2D, 0x11, 0x49, 0x81, 0x2D, 0x03, 0xE7, 0xF8, 0xFF, 0x00, 0xCB, 0x00,
0xE6, 0x8C, 0x6E, 0x04}
}
{
0x10, 0x000005B0UL,
{
0x2D, 0x11, 0x49, 0x81, 0x2D, 0x03, 0xE7, 0xF8, 0xFF, 0x00, 0xCB, 0x00,
0xE6, 0x8C, 0x6E, 0x04}
}
{
0x10, 0x000005C0UL,
{
0xCA, 0x00, 0x90, 0x26, 0xE1, 0x2C, 0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4,
0x06, 0x11, 0xDC, 0x05}
}
{
0x10, 0x000005C0UL,
{
0xCA, 0x00, 0x90, 0x26, 0xE1, 0x2C, 0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4,
0x06, 0x11, 0xDC, 0x05}
}
{
0x10, 0x000005D0UL,
{
0xE4, 0xC4, 0x01, 0x00, 0xF2, 0xF9, 0x08, 0x11, 0xF2, 0xF8, 0x06, 0x11,
0xDC, 0x09, 0xF4, 0x88}
}
{
0x10, 0x000005D0UL,
{
0xE4, 0xC4, 0x01, 0x00, 0xF2, 0xF9, 0x08, 0x11, 0xF2, 0xF8, 0x06, 0x11,
0xDC, 0x09, 0xF4, 0x88}
}
{
0x10, 0x000005E0UL,
{
0x02, 0x00, 0x9A, 0xF4, 0xF7, 0x20, 0xE1, 0x1C, 0xDC, 0x09, 0xB9, 0xC8,
0xCA, 0x00, 0x9A, 0x26}
}
{
0x10, 0x000005E0UL,
{
0x02, 0x00, 0x9A, 0xF4, 0xF7, 0x20, 0xE1, 0x1C, 0xDC, 0x09, 0xB9, 0xC8,
0xCA, 0x00, 0x9A, 0x26}
}
{
0x10, 0x000005F0UL,
{
0x0D, 0x25, 0xF3, 0xF8, 0x2C, 0x11, 0x49, 0x81, 0x2D, 0x03, 0xE7, 0xF8,
0xFF, 0x00, 0xCB, 0x00}
}
{
0x10, 0x000005F0UL,
{
0x0D, 0x25, 0xF3, 0xF8, 0x2C, 0x11, 0x49, 0x81, 0x2D, 0x03, 0xE7, 0xF8,
0xFF, 0x00, 0xCB, 0x00}
}
{
0x10, 0x00000600UL,
{
0xE6, 0x8C, 0x6E, 0x04, 0xCA, 0x00, 0x90, 0x26, 0xE1, 0x2C, 0xF2, 0xF5,
0x04, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x00000600UL,
{
0xE6, 0x8C, 0x6E, 0x04, 0xCA, 0x00, 0x90, 0x26, 0xE1, 0x2C, 0xF2, 0xF5,
0x04, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x00000610UL,
{
0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x01, 0x00, 0xF2, 0xF9, 0x04, 0x11,
0xF2, 0xF8, 0x02, 0x11}
}
{
0x10, 0x00000610UL,
{
0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x01, 0x00, 0xF2, 0xF9, 0x04, 0x11,
0xF2, 0xF8, 0x02, 0x11}
}
{
0x10, 0x00000620UL,
{
0xDC, 0x09, 0xF4, 0x88, 0x02, 0x00, 0x9A, 0xF4, 0xF7, 0x20, 0xE1, 0x1C,
0xDC, 0x09, 0xB9, 0xC8}
}
{
0x10, 0x00000620UL,
{
0xDC, 0x09, 0xF4, 0x88, 0x02, 0x00, 0x9A, 0xF4, 0xF7, 0x20, 0xE1, 0x1C,
0xDC, 0x09, 0xB9, 0xC8}
}
{
0x10, 0x00000630UL,
{
0xCA, 0x00, 0x9A, 0x26, 0x0D, 0x03, 0xE7, 0xF8, 0xFF, 0x00, 0xCB, 0x00,
0xF2, 0x8C, 0x2A, 0x11}
}
{
0x10, 0x00000630UL,
{
0xCA, 0x00, 0x9A, 0x26, 0x0D, 0x03, 0xE7, 0xF8, 0xFF, 0x00, 0xCB, 0x00,
0xF2, 0x8C, 0x2A, 0x11}
}
{
0x04, 0x00000640UL,
{
0xE1, 0x18, 0xCB, 0x00}
}
{
0x04, 0x00000640UL,
{
0xE1, 0x18, 0xCB, 0x00}
}
{
0x10, 0x00000644UL,
{
0xEC, 0xFE, 0xEC, 0xFF, 0x28, 0x02, 0xF6, 0x8C, 0x2A, 0x11, 0xF0, 0x48,
0x29, 0x81, 0xEA, 0x20}
}
{
0x10, 0x00000644UL,
{
0xEC, 0xFE, 0xEC, 0xFF, 0x28, 0x02, 0xF6, 0x8C, 0x2A, 0x11, 0xF0, 0x48,
0x29, 0x81, 0xEA, 0x20}
}
{
0x10, 0x00000654UL,
{
0x6C, 0x07, 0x09, 0x81, 0xEA, 0x30, 0x76, 0x08, 0xF3, 0xF8, 0x2D, 0x11,
0x49, 0x81, 0x2D, 0x04}
}
{
0x10, 0x00000654UL,
{
0x6C, 0x07, 0x09, 0x81, 0xEA, 0x30, 0x76, 0x08, 0xF3, 0xF8, 0x2D, 0x11,
0x49, 0x81, 0x2D, 0x04}
}
{
0x10, 0x00000664UL,
{
0xE7, 0xF8, 0xFF, 0x00, 0xEA, 0x00, 0x82, 0x08, 0xCA, 0x00, 0x90, 0x26,
0x5E, 0xE6, 0xCA, 0x00}
}
{
0x10, 0x00000664UL,
{
0xE7, 0xF8, 0xFF, 0x00, 0xEA, 0x00, 0x82, 0x08, 0xCA, 0x00, 0x90, 0x26,
0x5E, 0xE6, 0xCA, 0x00}
}
{
0x10, 0x00000674UL,
{
0x8A, 0x0D, 0x5F, 0xE6, 0xCA, 0x00, 0x8A, 0x0D, 0xE6, 0x8C, 0x6E, 0x04,
0xE7, 0xFC, 0x80, 0x00}
}
{
0x10, 0x00000674UL,
{
0x8A, 0x0D, 0x5F, 0xE6, 0xCA, 0x00, 0x8A, 0x0D, 0xE6, 0x8C, 0x6E, 0x04,
0xE7, 0xFC, 0x80, 0x00}
}
{
0x10, 0x00000684UL,
{
0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4,
0x1F, 0x00, 0xE7, 0xFC}
}
{
0x10, 0x00000684UL,
{
0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4,
0x1F, 0x00, 0xE7, 0xFC}
}
{
0x10, 0x00000694UL,
{
0xFF, 0x00, 0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05,
0xE4, 0xC4, 0x10, 0x00}
}
{
0x10, 0x00000694UL,
{
0xFF, 0x00, 0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05,
0xE4, 0xC4, 0x10, 0x00}
}
{
0x10, 0x000006A4UL,
{
0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4,
0x11, 0x00, 0xF2, 0xF5}
}
{
0x10, 0x000006A4UL,
{
0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4,
0x11, 0x00, 0xF2, 0xF5}
}
{
0x10, 0x000006B4UL,
{
0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x12, 0x00,
0xF2, 0xF5, 0x08, 0x11}
}
{
0x10, 0x000006B4UL,
{
0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x12, 0x00,
0xF2, 0xF5, 0x08, 0x11}
}
{
0x10, 0x000006C4UL,
{
0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x13, 0x00, 0xF2, 0xF5,
0x08, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x000006C4UL,
{
0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x13, 0x00, 0xF2, 0xF5,
0x08, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x000006D4UL,
{
0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x14, 0x00, 0xF2, 0xF5, 0x08, 0x11,
0xF2, 0xF4, 0x06, 0x11}
}
{
0x10, 0x000006D4UL,
{
0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x14, 0x00, 0xF2, 0xF5, 0x08, 0x11,
0xF2, 0xF4, 0x06, 0x11}
}
{
0x10, 0x000006E4UL,
{
0xDC, 0x05, 0xE4, 0xC4, 0x15, 0x00, 0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4,
0x06, 0x11, 0xDC, 0x05}
}
{
0x10, 0x000006E4UL,
{
0xDC, 0x05, 0xE4, 0xC4, 0x15, 0x00, 0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4,
0x06, 0x11, 0xDC, 0x05}
}
{
0x10, 0x000006F4UL,
{
0xE4, 0xC4, 0x16, 0x00, 0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11,
0xDC, 0x05, 0xE4, 0xC4}
}
{
0x10, 0x000006F4UL,
{
0xE4, 0xC4, 0x16, 0x00, 0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11,
0xDC, 0x05, 0xE4, 0xC4}
}
{
0x10, 0x00000704UL,
{
0x17, 0x00, 0xCA, 0x00, 0x9A, 0x26, 0xFE, 0x04, 0x1E, 0x05, 0xF6, 0x8E,
0xEE, 0xFC, 0xF6, 0x8E}
}
{
0x10, 0x00000704UL,
{
0x17, 0x00, 0xCA, 0x00, 0x9A, 0x26, 0xFE, 0x04, 0x1E, 0x05, 0xF6, 0x8E,
0xEE, 0xFC, 0xF6, 0x8E}
}
{
0x10, 0x00000714UL,
{
0xEA, 0xFC, 0xF6, 0x8E, 0xE6, 0xFC, 0xCE, 0x04, 0xF6, 0x8E, 0x10, 0x11,
0xF6, 0x8E, 0x18, 0x11}
}
{
0x10, 0x00000714UL,
{
0xEA, 0xFC, 0xF6, 0x8E, 0xE6, 0xFC, 0xCE, 0x04, 0xF6, 0x8E, 0x10, 0x11,
0xF6, 0x8E, 0x18, 0x11}
}
{
0x10, 0x00000724UL,
{
0xF6, 0x8E, 0x0C, 0x11, 0xF6, 0x8E, 0x14, 0x11, 0xF6, 0x8E, 0x26, 0x11,
0xF6, 0x8E, 0x28, 0x11}
}
{
0x10, 0x00000724UL,
{
0xF6, 0x8E, 0x0C, 0x11, 0xF6, 0x8E, 0x14, 0x11, 0xF6, 0x8E, 0x26, 0x11,
0xF6, 0x8E, 0x28, 0x11}
}
{
0x10, 0x00000734UL,
{
0xF6, 0x8E, 0xFE, 0x10, 0xF6, 0x8E, 0x00, 0x11, 0xF6, 0x8E, 0x1E, 0x11,
0xF6, 0x8E, 0x20, 0x11}
}
{
0x10, 0x00000734UL,
{
0xF6, 0x8E, 0xFE, 0x10, 0xF6, 0x8E, 0x00, 0x11, 0xF6, 0x8E, 0x1E, 0x11,
0xF6, 0x8E, 0x20, 0x11}
}
{
0x10, 0x00000744UL,
{
0xF6, 0x8E, 0xF6, 0x10, 0xF6, 0x8E, 0xF8, 0x10, 0x0D, 0x03, 0xE0, 0x08,
0xCA, 0x00, 0xFA, 0x20}
}
{
0x10, 0x00000744UL,
{
0xF6, 0x8E, 0xF6, 0x10, 0xF6, 0x8E, 0xF8, 0x10, 0x0D, 0x03, 0xE0, 0x08,
0xCA, 0x00, 0xFA, 0x20}
}
{
0x10, 0x00000754UL,
{
0xF0, 0x90, 0xE0, 0x08, 0xCA, 0x00, 0xA2, 0x20, 0xF0, 0x64, 0xF0, 0x75,
0xF0, 0xE4, 0xF0, 0xF5}
}
{
0x10, 0x00000754UL,
{
0xF0, 0x90, 0xE0, 0x08, 0xCA, 0x00, 0xA2, 0x20, 0xF0, 0x64, 0xF0, 0x75,
0xF0, 0xE4, 0xF0, 0xF5}
}
{
0x10, 0x00000764UL,
{
0x70, 0x65, 0x3D, 0xF3, 0xEA, 0x00, 0x7C, 0x08, 0xF3, 0xF8, 0x2C, 0x11,
0x49, 0x81, 0x2D, 0x04}
}
{
0x10, 0x00000764UL,
{
0x70, 0x65, 0x3D, 0xF3, 0xEA, 0x00, 0x7C, 0x08, 0xF3, 0xF8, 0x2C, 0x11,
0x49, 0x81, 0x2D, 0x04}
}
{
0x10, 0x00000774UL,
{
0xE7, 0xF8, 0xFF, 0x00, 0xEA, 0x00, 0x82, 0x08, 0x6E, 0xE6, 0xCA, 0x00,
0x8A, 0x0D, 0x6F, 0xE6}
}
{
0x10, 0x00000774UL,
{
0xE7, 0xF8, 0xFF, 0x00, 0xEA, 0x00, 0x82, 0x08, 0x6E, 0xE6, 0xCA, 0x00,
0x8A, 0x0D, 0x6F, 0xE6}
}
{
0x10, 0x00000784UL,
{
0xCA, 0x00, 0x8A, 0x0D, 0xE6, 0x8C, 0x6E, 0x04, 0xCA, 0x00, 0x90, 0x26,
0xE7, 0xFC, 0x80, 0x00}
}
{
0x10, 0x00000784UL,
{
0xCA, 0x00, 0x8A, 0x0D, 0xE6, 0x8C, 0x6E, 0x04, 0xCA, 0x00, 0x90, 0x26,
0xE7, 0xFC, 0x80, 0x00}
}
{
0x10, 0x00000794UL,
{
0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4,
0x1F, 0x00, 0xE7, 0xFC}
}
{
0x10, 0x00000794UL,
{
0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4,
0x1F, 0x00, 0xE7, 0xFC}
}
{
0x10, 0x000007A4UL,
{
0xFF, 0x00, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05,
0xE4, 0xC4, 0x10, 0x00}
}
{
0x10, 0x000007A4UL,
{
0xFF, 0x00, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05,
0xE4, 0xC4, 0x10, 0x00}
}
{
0x10, 0x000007B4UL,
{
0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4,
0x11, 0x00, 0xF2, 0xF5}
}
{
0x10, 0x000007B4UL,
{
0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4,
0x11, 0x00, 0xF2, 0xF5}
}
{
0x10, 0x000007C4UL,
{
0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x12, 0x00,
0xF2, 0xF5, 0x04, 0x11}
}
{
0x10, 0x000007C4UL,
{
0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x12, 0x00,
0xF2, 0xF5, 0x04, 0x11}
}
{
0x10, 0x000007D4UL,
{
0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x13, 0x00, 0xF2, 0xF5,
0x04, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x000007D4UL,
{
0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x13, 0x00, 0xF2, 0xF5,
0x04, 0x11, 0xF2, 0xF4}
}
{
0x10, 0x000007E4UL,
{
0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x14, 0x00, 0xF2, 0xF5, 0x04, 0x11,
0xF2, 0xF4, 0x02, 0x11}
}
{
0x10, 0x000007E4UL,
{
0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x14, 0x00, 0xF2, 0xF5, 0x04, 0x11,
0xF2, 0xF4, 0x02, 0x11}
}
{
0x10, 0x000007F4UL,
{
0xDC, 0x05, 0xE4, 0xC4, 0x15, 0x00, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4,
0x02, 0x11, 0xDC, 0x05}
}
{
0x10, 0x000007F4UL,
{
0xDC, 0x05, 0xE4, 0xC4, 0x15, 0x00, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4,
0x02, 0x11, 0xDC, 0x05}
}
{
0x10, 0x00000804UL,
{
0xE4, 0xC4, 0x16, 0x00, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11,
0xDC, 0x05, 0xE4, 0xC4}
}
{
0x10, 0x00000804UL,
{
0xE4, 0xC4, 0x16, 0x00, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11,
0xDC, 0x05, 0xE4, 0xC4}
}
{
0x10, 0x00000814UL,
{
0x17, 0x00, 0xCA, 0x00, 0x9A, 0x26, 0xEE, 0x04, 0x0E, 0x05, 0xF6, 0x8E,
0xEC, 0xFC, 0xF6, 0x8E}
}
{
0x10, 0x00000814UL,
{
0x17, 0x00, 0xCA, 0x00, 0x9A, 0x26, 0xEE, 0x04, 0x0E, 0x05, 0xF6, 0x8E,
0xEC, 0xFC, 0xF6, 0x8E}
}
{
0x10, 0x00000824UL,
{
0xE8, 0xFC, 0xF6, 0x8E, 0xE4, 0xFC, 0xBE, 0x04, 0xF6, 0x8E, 0x0E, 0x11,
0xF6, 0x8E, 0x16, 0x11}
}
{
0x10, 0x00000824UL,
{
0xE8, 0xFC, 0xF6, 0x8E, 0xE4, 0xFC, 0xBE, 0x04, 0xF6, 0x8E, 0x0E, 0x11,
0xF6, 0x8E, 0x16, 0x11}
}
{
0x10, 0x00000834UL,
{
0xF6, 0x8E, 0x0A, 0x11, 0xF6, 0x8E, 0x12, 0x11, 0xF6, 0x8E, 0x22, 0x11,
0xF6, 0x8E, 0x24, 0x11}
}
{
0x10, 0x00000834UL,
{
0xF6, 0x8E, 0x0A, 0x11, 0xF6, 0x8E, 0x12, 0x11, 0xF6, 0x8E, 0x22, 0x11,
0xF6, 0x8E, 0x24, 0x11}
}
{
0x0C, 0x00000844UL,
{
0xF6, 0x8E, 0xFA, 0x10, 0xF6, 0x8E, 0xFC, 0x10, 0xF6, 0x8E, 0x1A, 0x11}
}
{
0x0C, 0x00000844UL,
{
0xF6, 0x8E, 0xFA, 0x10, 0xF6, 0x8E, 0xFC, 0x10, 0xF6, 0x8E, 0x1A, 0x11}
}
{
0x10, 0x00000850UL,
{
0xF6, 0x8E, 0x1C, 0x11, 0xF6, 0x8E, 0xF2, 0x10, 0xF6, 0x8E, 0xF4, 0x10,
0x0D, 0x03, 0xE0, 0x18}
}
{
0x10, 0x00000850UL,
{
0xF6, 0x8E, 0x1C, 0x11, 0xF6, 0x8E, 0xF2, 0x10, 0xF6, 0x8E, 0xF4, 0x10,
0x0D, 0x03, 0xE0, 0x18}
}
{
0x10, 0x00000860UL,
{
0xCA, 0x00, 0xFA, 0x20, 0xF0, 0x90, 0xE0, 0x18, 0xCA, 0x00, 0xA2, 0x20,
0xF0, 0x64, 0xF0, 0x75}
}
{
0x10, 0x00000860UL,
{
0xCA, 0x00, 0xFA, 0x20, 0xF0, 0x90, 0xE0, 0x18, 0xCA, 0x00, 0xA2, 0x20,
0xF0, 0x64, 0xF0, 0x75}
}
{
0x10, 0x00000870UL,
{
0x70, 0x65, 0x3D, 0xF5, 0x0D, 0x03, 0xE7, 0xF8, 0xFF, 0x00, 0x0D, 0x03,
0xF2, 0x8C, 0x2A, 0x11}
}
{
0x10, 0x00000870UL,
{
0x70, 0x65, 0x3D, 0xF5, 0x0D, 0x03, 0xE7, 0xF8, 0xFF, 0x00, 0x0D, 0x03,
0xF2, 0x8C, 0x2A, 0x11}
}
{
0x0A, 0x00000880UL,
{
0xE1, 0x18, 0x08, 0x02, 0xFC, 0xFF, 0xFC, 0xFE, 0xCB, 0x00}
}
{
0x0A, 0x00000880UL,
{
0xE1, 0x18, 0x08, 0x02, 0xFC, 0xFF, 0xFC, 0xFE, 0xCB, 0x00}
}
{
0x10, 0x0000088AUL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xEC, 0xFF, 0xF0, 0xE9, 0xF0, 0xFA, 0xF6, 0x8C,
0x2A, 0x11, 0xF0, 0x48}
}
{
0x10, 0x0000088AUL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xEC, 0xFF, 0xF0, 0xE9, 0xF0, 0xFA, 0xF6, 0x8C,
0x2A, 0x11, 0xF0, 0x48}
}
{
0x10, 0x0000089AUL,
{
0x29, 0x81, 0x2D, 0x7D, 0x09, 0x81, 0xEA, 0x30, 0x8C, 0x0A, 0xE6, 0x8C,
0x6E, 0x04, 0xDC, 0x0F}
}
{
0x10, 0x0000089AUL,
{
0x29, 0x81, 0x2D, 0x7D, 0x09, 0x81, 0xEA, 0x30, 0x8C, 0x0A, 0xE6, 0x8C,
0x6E, 0x04, 0xDC, 0x0F}
}
{
0x10, 0x000008AAUL,
{
0xF4, 0xAE, 0x05, 0x00, 0xF0, 0xD5, 0xC0, 0xA5, 0x7C, 0x75, 0x9A, 0xF5,
0x3D, 0x00, 0xF0, 0x6D}
}
{
0x10, 0x000008AAUL,
{
0xF4, 0xAE, 0x05, 0x00, 0xF0, 0xD5, 0xC0, 0xA5, 0x7C, 0x75, 0x9A, 0xF5,
0x3D, 0x00, 0xF0, 0x6D}
}
{
0x10, 0x000008BAUL,
{
0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4,
0x10, 0x00, 0xDC, 0x0F}
}
{
0x10, 0x000008BAUL,
{
0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4,
0x10, 0x00, 0xDC, 0x0F}
}
{
0x10, 0x000008CAUL,
{
0xF4, 0x8E, 0x06, 0x00, 0xF2, 0xF7, 0x08, 0x11, 0xF2, 0xF6, 0x06, 0x11,
0xDC, 0x07, 0xE4, 0x86}
}
{
0x10, 0x000008CAUL,
{
0xF4, 0x8E, 0x06, 0x00, 0xF2, 0xF7, 0x08, 0x11, 0xF2, 0xF6, 0x06, 0x11,
0xDC, 0x07, 0xE4, 0x86}
}
{
0x10, 0x000008DAUL,
{
0x11, 0x00, 0xDC, 0x0F, 0xF4, 0x8E, 0x07, 0x00, 0xF2, 0xF7, 0x08, 0x11,
0xF2, 0xF6, 0x06, 0x11}
}
{
0x10, 0x000008DAUL,
{
0x11, 0x00, 0xDC, 0x0F, 0xF4, 0x8E, 0x07, 0x00, 0xF2, 0xF7, 0x08, 0x11,
0xF2, 0xF6, 0x06, 0x11}
}
{
0x10, 0x000008EAUL,
{
0xDC, 0x07, 0xE4, 0x86, 0x12, 0x00, 0xDC, 0x0F, 0xF4, 0x8E, 0x08, 0x00,
0xF2, 0xF7, 0x08, 0x11}
}
{
0x10, 0x000008EAUL,
{
0xDC, 0x07, 0xE4, 0x86, 0x12, 0x00, 0xDC, 0x0F, 0xF4, 0x8E, 0x08, 0x00,
0xF2, 0xF7, 0x08, 0x11}
}
{
0x10, 0x000008FAUL,
{
0xF2, 0xF6, 0x06, 0x11, 0xDC, 0x07, 0xE4, 0x86, 0x13, 0x00, 0xDC, 0x0F,
0xF4, 0x8E, 0x09, 0x00}
}
{
0x10, 0x000008FAUL,
{
0xF2, 0xF6, 0x06, 0x11, 0xDC, 0x07, 0xE4, 0x86, 0x13, 0x00, 0xDC, 0x0F,
0xF4, 0x8E, 0x09, 0x00}
}
{
0x10, 0x0000090AUL,
{
0xF2, 0xF7, 0x08, 0x11, 0xF2, 0xF6, 0x06, 0x11, 0xDC, 0x07, 0xE4, 0x86,
0x14, 0x00, 0xF0, 0xAE}
}
{
0x10, 0x0000090AUL,
{
0xF2, 0xF7, 0x08, 0x11, 0xF2, 0xF6, 0x06, 0x11, 0xDC, 0x07, 0xE4, 0x86,
0x14, 0x00, 0xF0, 0xAE}
}
{
0x10, 0x0000091AUL,
{
0x06, 0xFA, 0x0A, 0x00, 0xF0, 0xBF, 0xF2, 0xF9, 0x08, 0x11, 0xF2, 0xF8,
0x06, 0x11, 0x06, 0xF8}
}
{
0x10, 0x0000091AUL,
{
0x06, 0xFA, 0x0A, 0x00, 0xF0, 0xBF, 0xF2, 0xF9, 0x08, 0x11, 0xF2, 0xF8,
0x06, 0x11, 0x06, 0xF8}
}
{
0x10, 0x0000092AUL,
{
0x15, 0x00, 0xCA, 0x00, 0x30, 0x29, 0x0D, 0x2A, 0xF0, 0x6D, 0x67, 0xFC,
0x7F, 0x00, 0xF2, 0xF5}
}
{
0x10, 0x0000092AUL,
{
0x15, 0x00, 0xCA, 0x00, 0x30, 0x29, 0x0D, 0x2A, 0xF0, 0x6D, 0x67, 0xFC,
0x7F, 0x00, 0xF2, 0xF5}
}
{
0x10, 0x0000093AUL,
{
0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x10, 0x00,
0xDC, 0x0F, 0xF4, 0x8E}
}
{
0x10, 0x0000093AUL,
{
0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x10, 0x00,
0xDC, 0x0F, 0xF4, 0x8E}
}
{
0x10, 0x0000094AUL,
{
0x06, 0x00, 0xF2, 0xF7, 0x08, 0x11, 0xF2, 0xF6, 0x06, 0x11, 0xDC, 0x07,
0xE4, 0x86, 0x11, 0x00}
}
{
0x10, 0x0000094AUL,
{
0x06, 0x00, 0xF2, 0xF7, 0x08, 0x11, 0xF2, 0xF6, 0x06, 0x11, 0xDC, 0x07,
0xE4, 0x86, 0x11, 0x00}
}
{
0x10, 0x0000095AUL,
{
0xDC, 0x0F, 0xF4, 0x8E, 0x07, 0x00, 0xF2, 0xF7, 0x08, 0x11, 0xF2, 0xF6,
0x06, 0x11, 0xDC, 0x07}
}
{
0x10, 0x0000095AUL,
{
0xDC, 0x0F, 0xF4, 0x8E, 0x07, 0x00, 0xF2, 0xF7, 0x08, 0x11, 0xF2, 0xF6,
0x06, 0x11, 0xDC, 0x07}
}
{
0x10, 0x0000096AUL,
{
0xE4, 0x86, 0x12, 0x00, 0xF0, 0xAE, 0x06, 0xFA, 0x08, 0x00, 0xF0, 0xBF,
0xF2, 0xF9, 0x08, 0x11}
}
{
0x10, 0x0000096AUL,
{
0xE4, 0x86, 0x12, 0x00, 0xF0, 0xAE, 0x06, 0xFA, 0x08, 0x00, 0xF0, 0xBF,
0xF2, 0xF9, 0x08, 0x11}
}
{
0x10, 0x0000097AUL,
{
0xF2, 0xF8, 0x06, 0x11, 0x06, 0xF8, 0x13, 0x00, 0xCA, 0x00, 0x30, 0x29,
0xE1, 0x1C, 0xF2, 0xF5}
}
{
0x10, 0x0000097AUL,
{
0xF2, 0xF8, 0x06, 0x11, 0x06, 0xF8, 0x13, 0x00, 0xCA, 0x00, 0x30, 0x29,
0xE1, 0x1C, 0xF2, 0xF5}
}
{
0x10, 0x0000098AUL,
{
0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x01, 0x00,
0x0D, 0x7D, 0xE6, 0x8C}
}
{
0x10, 0x0000098AUL,
{
0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x01, 0x00,
0x0D, 0x7D, 0xE6, 0x8C}
}
{
0x10, 0x0000099AUL,
{
0x6E, 0x04, 0xDC, 0x0F, 0xF4, 0xAE, 0x05, 0x00, 0xF0, 0xD5, 0xC0, 0xA5,
0x7C, 0x75, 0x9A, 0xF5}
}
{
0x10, 0x0000099AUL,
{
0x6E, 0x04, 0xDC, 0x0F, 0xF4, 0xAE, 0x05, 0x00, 0xF0, 0xD5, 0xC0, 0xA5,
0x7C, 0x75, 0x9A, 0xF5}
}
{
0x10, 0x000009AAUL,
{
0x3D, 0x00, 0xF0, 0x6D, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11,
0xDC, 0x05, 0xE4, 0xC4}
}
{
0x10, 0x000009AAUL,
{
0x3D, 0x00, 0xF0, 0x6D, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11,
0xDC, 0x05, 0xE4, 0xC4}
}
{
0x10, 0x000009BAUL,
{
0x10, 0x00, 0xDC, 0x0F, 0xF4, 0x8E, 0x06, 0x00, 0xF2, 0xF7, 0x04, 0x11,
0xF2, 0xF6, 0x02, 0x11}
}
{
0x10, 0x000009BAUL,
{
0x10, 0x00, 0xDC, 0x0F, 0xF4, 0x8E, 0x06, 0x00, 0xF2, 0xF7, 0x04, 0x11,
0xF2, 0xF6, 0x02, 0x11}
}
{
0x10, 0x000009CAUL,
{
0xDC, 0x07, 0xE4, 0x86, 0x11, 0x00, 0xDC, 0x0F, 0xF4, 0x8E, 0x07, 0x00,
0xF2, 0xF7, 0x04, 0x11}
}
{
0x10, 0x000009CAUL,
{
0xDC, 0x07, 0xE4, 0x86, 0x11, 0x00, 0xDC, 0x0F, 0xF4, 0x8E, 0x07, 0x00,
0xF2, 0xF7, 0x04, 0x11}
}
{
0x10, 0x000009DAUL,
{
0xF2, 0xF6, 0x02, 0x11, 0xDC, 0x07, 0xE4, 0x86, 0x12, 0x00, 0xDC, 0x0F,
0xF4, 0x8E, 0x08, 0x00}
}
{
0x10, 0x000009DAUL,
{
0xF2, 0xF6, 0x02, 0x11, 0xDC, 0x07, 0xE4, 0x86, 0x12, 0x00, 0xDC, 0x0F,
0xF4, 0x8E, 0x08, 0x00}
}
{
0x10, 0x000009EAUL,
{
0xF2, 0xF7, 0x04, 0x11, 0xF2, 0xF6, 0x02, 0x11, 0xDC, 0x07, 0xE4, 0x86,
0x13, 0x00, 0xDC, 0x0F}
}
{
0x10, 0x000009EAUL,
{
0xF2, 0xF7, 0x04, 0x11, 0xF2, 0xF6, 0x02, 0x11, 0xDC, 0x07, 0xE4, 0x86,
0x13, 0x00, 0xDC, 0x0F}
}
{
0x10, 0x000009FAUL,
{
0xF4, 0x8E, 0x09, 0x00, 0xF2, 0xF7, 0x04, 0x11, 0xF2, 0xF6, 0x02, 0x11,
0xDC, 0x07, 0xE4, 0x86}
}
{
0x10, 0x000009FAUL,
{
0xF4, 0x8E, 0x09, 0x00, 0xF2, 0xF7, 0x04, 0x11, 0xF2, 0xF6, 0x02, 0x11,
0xDC, 0x07, 0xE4, 0x86}
}
{
0x10, 0x00000A0AUL,
{
0x14, 0x00, 0xF0, 0xAE, 0x06, 0xFA, 0x0A, 0x00, 0xF0, 0xBF, 0xF2, 0xF9,
0x04, 0x11, 0xF2, 0xF8}
}
{
0x10, 0x00000A0AUL,
{
0x14, 0x00, 0xF0, 0xAE, 0x06, 0xFA, 0x0A, 0x00, 0xF0, 0xBF, 0xF2, 0xF9,
0x04, 0x11, 0xF2, 0xF8}
}
{
0x10, 0x00000A1AUL,
{
0x02, 0x11, 0x06, 0xF8, 0x15, 0x00, 0xCA, 0x00, 0x30, 0x29, 0x0D, 0x2A,
0xF0, 0x6D, 0x67, 0xFC}
}
{
0x10, 0x00000A1AUL,
{
0x02, 0x11, 0x06, 0xF8, 0x15, 0x00, 0xCA, 0x00, 0x30, 0x29, 0x0D, 0x2A,
0xF0, 0x6D, 0x67, 0xFC}
}
{
0x10, 0x00000A2AUL,
{
0x7F, 0x00, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05,
0xE4, 0xC4, 0x10, 0x00}
}
{
0x10, 0x00000A2AUL,
{
0x7F, 0x00, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05,
0xE4, 0xC4, 0x10, 0x00}
}
{
0x10, 0x00000A3AUL,
{
0xDC, 0x0F, 0xF4, 0x8E, 0x06, 0x00, 0xF2, 0xF7, 0x04, 0x11, 0xF2, 0xF6,
0x02, 0x11, 0xDC, 0x07}
}
{
0x10, 0x00000A3AUL,
{
0xDC, 0x0F, 0xF4, 0x8E, 0x06, 0x00, 0xF2, 0xF7, 0x04, 0x11, 0xF2, 0xF6,
0x02, 0x11, 0xDC, 0x07}
}
{
0x10, 0x00000A4AUL,
{
0xE4, 0x86, 0x11, 0x00, 0xDC, 0x0F, 0xF4, 0x8E, 0x07, 0x00, 0xF2, 0xF7,
0x04, 0x11, 0xF2, 0xF6}
}
{
0x10, 0x00000A4AUL,
{
0xE4, 0x86, 0x11, 0x00, 0xDC, 0x0F, 0xF4, 0x8E, 0x07, 0x00, 0xF2, 0xF7,
0x04, 0x11, 0xF2, 0xF6}
}
{
0x10, 0x00000A5AUL,
{
0x02, 0x11, 0xDC, 0x07, 0xE4, 0x86, 0x12, 0x00, 0xF0, 0xAE, 0x06, 0xFA,
0x08, 0x00, 0xF0, 0xBF}
}
{
0x10, 0x00000A5AUL,
{
0x02, 0x11, 0xDC, 0x07, 0xE4, 0x86, 0x12, 0x00, 0xF0, 0xAE, 0x06, 0xFA,
0x08, 0x00, 0xF0, 0xBF}
}
{
0x10, 0x00000A6AUL,
{
0xF2, 0xF9, 0x04, 0x11, 0xF2, 0xF8, 0x02, 0x11, 0x06, 0xF8, 0x13, 0x00,
0xCA, 0x00, 0x30, 0x29}
}
{
0x10, 0x00000A6AUL,
{
0xF2, 0xF9, 0x04, 0x11, 0xF2, 0xF8, 0x02, 0x11, 0x06, 0xF8, 0x13, 0x00,
0xCA, 0x00, 0x30, 0x29}
}
{
0x10, 0x00000A7AUL,
{
0xE1, 0x1C, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05,
0xE4, 0xC4, 0x01, 0x00}
}
{
0x10, 0x00000A7AUL,
{
0xE1, 0x1C, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05,
0xE4, 0xC4, 0x01, 0x00}
}
{
0x10, 0x00000A8AUL,
{
0x0D, 0x03, 0xE7, 0xF8, 0xFF, 0x00, 0x0D, 0x03, 0xF2, 0x8C, 0x2A, 0x11,
0xE1, 0x18, 0xFC, 0xFF}
}
{
0x10, 0x00000A8AUL,
{
0x0D, 0x03, 0xE7, 0xF8, 0xFF, 0x00, 0x0D, 0x03, 0xF2, 0x8C, 0x2A, 0x11,
0xE1, 0x18, 0xFC, 0xFF}
}
{
0x06, 0x00000A9AUL,
{
0xFC, 0xFE, 0xFC, 0xFD, 0xCB, 0x00}
}
{
0x06, 0x00000A9AUL,
{
0xFC, 0xFE, 0xFC, 0xFD, 0xCB, 0x00}
}
{
0x10, 0x00000AA0UL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xEC, 0xFF, 0xE0, 0x0D, 0xF6, 0x8C, 0x2A, 0x11,
0xF0, 0x48, 0x29, 0x81}
}
{
0x10, 0x00000AA0UL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xEC, 0xFF, 0xE0, 0x0D, 0xF6, 0x8C, 0x2A, 0x11,
0xF0, 0x48, 0x29, 0x81}
}
{
0x10, 0x00000AB0UL,
{
0x2D, 0x3E, 0x09, 0x81, 0x3D, 0x78, 0xF3, 0xF8, 0x2D, 0x11, 0x49, 0x81,
0x3D, 0x35, 0xE6, 0x8C}
}
{
0x10, 0x00000AB0UL,
{
0x2D, 0x3E, 0x09, 0x81, 0x3D, 0x78, 0xF3, 0xF8, 0x2D, 0x11, 0x49, 0x81,
0x3D, 0x35, 0xE6, 0x8C}
}
{
0x10, 0x00000AC0UL,
{
0x6E, 0x04, 0xF2, 0xF7, 0x08, 0x11, 0xF2, 0xF6, 0x06, 0x11, 0xDC, 0x07,
0xF4, 0x86, 0x02, 0x00}
}
{
0x10, 0x00000AC0UL,
{
0x6E, 0x04, 0xF2, 0xF7, 0x08, 0x11, 0xF2, 0xF6, 0x06, 0x11, 0xDC, 0x07,
0xF4, 0x86, 0x02, 0x00}
}
{
0x10, 0x00000AD0UL,
{
0xF0, 0xE4, 0x66, 0xFE, 0xD6, 0x00, 0xDC, 0x07, 0xA9, 0x86, 0xF0, 0xF4,
0x68, 0xF1, 0xF0, 0x4F}
}
{
0x10, 0x00000AD0UL,
{
0xF0, 0xE4, 0x66, 0xFE, 0xD6, 0x00, 0xDC, 0x07, 0xA9, 0x86, 0xF0, 0xF4,
0x68, 0xF1, 0xF0, 0x4F}
}
{
0x10, 0x00000AE0UL,
{
0x49, 0x80, 0x2D, 0x01, 0xE0, 0x1D, 0x9A, 0xFE, 0x01, 0x60, 0x78, 0xD2,
0x9A, 0xFE, 0x01, 0x70}
}
{
0x10, 0x00000AE0UL,
{
0x49, 0x80, 0x2D, 0x01, 0xE0, 0x1D, 0x9A, 0xFE, 0x01, 0x60, 0x78, 0xD2,
0x9A, 0xFE, 0x01, 0x70}
}
{
0x10, 0x00000AF0UL,
{
0x78, 0xD4, 0x9A, 0xFE, 0x01, 0x10, 0x3F, 0xFD, 0x9A, 0xFE, 0x04, 0x40,
0xF0, 0x4F, 0x49, 0x80}
}
{
0x10, 0x00000AF0UL,
{
0x78, 0xD4, 0x9A, 0xFE, 0x01, 0x10, 0x3F, 0xFD, 0x9A, 0xFE, 0x04, 0x40,
0xF0, 0x4F, 0x49, 0x80}
}
{
0x10, 0x00000B00UL,
{
0x3D, 0x01, 0x4F, 0xFD, 0xF0, 0x4E, 0x69, 0x84, 0xC0, 0x84, 0x3D, 0x04,
0xF0, 0x4F, 0x49, 0x80}
}
{
0x10, 0x00000B00UL,
{
0x3D, 0x01, 0x4F, 0xFD, 0xF0, 0x4E, 0x69, 0x84, 0xC0, 0x84, 0x3D, 0x04,
0xF0, 0x4F, 0x49, 0x80}
}
{
0x10, 0x00000B10UL,
{
0x3D, 0x01, 0x5F, 0xFD, 0x9A, 0x04, 0x01, 0xC0, 0x8F, 0xFD, 0xBB, 0x4E,
0xF0, 0x64, 0xF0, 0x75}
}
{
0x10, 0x00000B10UL,
{
0x3D, 0x01, 0x5F, 0xFD, 0x9A, 0x04, 0x01, 0xC0, 0x8F, 0xFD, 0xBB, 0x4E,
0xF0, 0x64, 0xF0, 0x75}
}
{
0x10, 0x00000B20UL,
{
0x70, 0x65, 0x3D, 0x43, 0x9F, 0xFD, 0x0D, 0x41, 0xE6, 0xFD, 0xFF, 0xFF,
0x0D, 0x3E, 0xF3, 0xF8}
}
{
0x10, 0x00000B20UL,
{
0x70, 0x65, 0x3D, 0x43, 0x9F, 0xFD, 0x0D, 0x41, 0xE6, 0xFD, 0xFF, 0xFF,
0x0D, 0x3E, 0xF3, 0xF8}
}
{
0x10, 0x00000B30UL,
{
0x2C, 0x11, 0x49, 0x81, 0x3D, 0x35, 0xE6, 0x8C, 0x6E, 0x04, 0xF2, 0xF7,
0x04, 0x11, 0xF2, 0xF6}
}
{
0x10, 0x00000B30UL,
{
0x2C, 0x11, 0x49, 0x81, 0x3D, 0x35, 0xE6, 0x8C, 0x6E, 0x04, 0xF2, 0xF7,
0x04, 0x11, 0xF2, 0xF6}
}
{
0x10, 0x00000B40UL,
{
0x02, 0x11, 0xDC, 0x07, 0xF4, 0x86, 0x02, 0x00, 0xF0, 0xE4, 0x66, 0xFE,
0xD6, 0x00, 0xDC, 0x07}
}
{
0x10, 0x00000B40UL,
{
0x02, 0x11, 0xDC, 0x07, 0xF4, 0x86, 0x02, 0x00, 0xF0, 0xE4, 0x66, 0xFE,
0xD6, 0x00, 0xDC, 0x07}
}
{
0x10, 0x00000B50UL,
{
0xA9, 0x86, 0xF0, 0xF4, 0x68, 0xF1, 0xF0, 0x4F, 0x49, 0x80, 0x2D, 0x01,
0xE0, 0x1D, 0x9A, 0xFE}
}
{
0x10, 0x00000B50UL,
{
0xA9, 0x86, 0xF0, 0xF4, 0x68, 0xF1, 0xF0, 0x4F, 0x49, 0x80, 0x2D, 0x01,
0xE0, 0x1D, 0x9A, 0xFE}
}
{
0x10, 0x00000B60UL,
{
0x01, 0x60, 0x78, 0xD2, 0x9A, 0xFE, 0x01, 0x70, 0x78, 0xD4, 0x9A, 0xFE,
0x01, 0x10, 0x3F, 0xFD}
}
{
0x10, 0x00000B60UL,
{
0x01, 0x60, 0x78, 0xD2, 0x9A, 0xFE, 0x01, 0x70, 0x78, 0xD4, 0x9A, 0xFE,
0x01, 0x10, 0x3F, 0xFD}
}
{
0x10, 0x00000B70UL,
{
0x9A, 0xFE, 0x04, 0x40, 0xF0, 0x4F, 0x49, 0x80, 0x3D, 0x01, 0x4F, 0xFD,
0xF0, 0x4E, 0x69, 0x84}
}
{
0x10, 0x00000B70UL,
{
0x9A, 0xFE, 0x04, 0x40, 0xF0, 0x4F, 0x49, 0x80, 0x3D, 0x01, 0x4F, 0xFD,
0xF0, 0x4E, 0x69, 0x84}
}
{
0x10, 0x00000B80UL,
{
0xC0, 0x84, 0x3D, 0x04, 0xF0, 0x4F, 0x49, 0x80, 0x3D, 0x01, 0x5F, 0xFD,
0x9A, 0x04, 0x01, 0xB0}
}
{
0x10, 0x00000B80UL,
{
0xC0, 0x84, 0x3D, 0x04, 0xF0, 0x4F, 0x49, 0x80, 0x3D, 0x01, 0x5F, 0xFD,
0x9A, 0x04, 0x01, 0xB0}
}
{
0x10, 0x00000B90UL,
{
0x8F, 0xFD, 0xBB, 0x2A, 0xF0, 0x64, 0xF0, 0x75, 0x70, 0x65, 0x3D, 0x07,
0x9F, 0xFD, 0x0D, 0x05}
}
{
0x10, 0x00000B90UL,
{
0x8F, 0xFD, 0xBB, 0x2A, 0xF0, 0x64, 0xF0, 0x75, 0x70, 0x65, 0x3D, 0x07,
0x9F, 0xFD, 0x0D, 0x05}
}
{
0x10, 0x00000BA0UL,
{
0xE6, 0xFD, 0xFF, 0xFF, 0x0D, 0x02, 0xE6, 0xFD, 0xFF, 0xFF, 0xF2, 0x8C,
0x2A, 0x11, 0xF0, 0x4D}
}
{
0x10, 0x00000BA0UL,
{
0xE6, 0xFD, 0xFF, 0xFF, 0x0D, 0x02, 0xE6, 0xFD, 0xFF, 0xFF, 0xF2, 0x8C,
0x2A, 0x11, 0xF0, 0x4D}
}
{
0x08, 0x00000BB0UL,
{
0xFC, 0xFF, 0xFC, 0xFE, 0xFC, 0xFD, 0xCB, 0x00}
}
{
0x08, 0x00000BB0UL,
{
0xFC, 0xFF, 0xFC, 0xFE, 0xFC, 0xFD, 0xCB, 0x00}
}
{
0x10, 0x00000BB8UL,
{
0xF2, 0xF4, 0xE6, 0xFC, 0x3D, 0x03, 0xE0, 0x04, 0xE0, 0x05, 0xCB, 0x00,
0xF2, 0xF5, 0xEE, 0xFC}
}
{
0x10, 0x00000BB8UL,
{
0xF2, 0xF4, 0xE6, 0xFC, 0x3D, 0x03, 0xE0, 0x04, 0xE0, 0x05, 0xCB, 0x00,
0xF2, 0xF5, 0xEE, 0xFC}
}
{
0x10, 0x00000BC8UL,
{
0xE6, 0xF4, 0x12, 0x00, 0x1B, 0x54, 0xF2, 0xF9, 0x0C, 0xFE, 0xF2, 0xF8,
0x0E, 0xFE, 0xE6, 0xF6}
}
{
0x10, 0x00000BC8UL,
{
0xE6, 0xF4, 0x12, 0x00, 0x1B, 0x54, 0xF2, 0xF9, 0x0C, 0xFE, 0xF2, 0xF8,
0x0E, 0xFE, 0xE6, 0xF6}
}
{
0x10, 0x00000BD8UL,
{
0x20, 0xFD, 0xE6, 0xF7, 0x02, 0x00, 0xF0, 0x46, 0x00, 0x48, 0xF0, 0x57,
0x10, 0x59, 0xCB, 0x00}
}
{
0x10, 0x00000BD8UL,
{
0x20, 0xFD, 0xE6, 0xF7, 0x02, 0x00, 0xF0, 0x46, 0x00, 0x48, 0xF0, 0x57,
0x10, 0x59, 0xCB, 0x00}
}
{
0x10, 0x00000BE8UL,
{
0xF2, 0xF4, 0xE4, 0xFC, 0x3D, 0x03, 0xE0, 0x04, 0xE0, 0x05, 0xCB, 0x00,
0xF2, 0xF5, 0xEC, 0xFC}
}
{
0x10, 0x00000BE8UL,
{
0xF2, 0xF4, 0xE4, 0xFC, 0x3D, 0x03, 0xE0, 0x04, 0xE0, 0x05, 0xCB, 0x00,
0xF2, 0xF5, 0xEC, 0xFC}
}
{
0x10, 0x00000BF8UL,
{
0xE6, 0xF4, 0x12, 0x00, 0x1B, 0x54, 0xF2, 0xF9, 0x0C, 0xFE, 0xF2, 0xF8,
0x0E, 0xFE, 0xE6, 0xF6}
}
{
0x10, 0x00000BF8UL,
{
0xE6, 0xF4, 0x12, 0x00, 0x1B, 0x54, 0xF2, 0xF9, 0x0C, 0xFE, 0xF2, 0xF8,
0x0E, 0xFE, 0xE6, 0xF6}
}
{
0x10, 0x00000C08UL,
{
0x00, 0x00, 0xE6, 0xF7, 0x02, 0x00, 0xF0, 0x46, 0x00, 0x48, 0xF0, 0x57,
0x10, 0x59, 0xCB, 0x00}
}
{
0x10, 0x00000C08UL,
{
0x00, 0x00, 0xE6, 0xF7, 0x02, 0x00, 0xF0, 0x46, 0x00, 0x48, 0xF0, 0x57,
0x10, 0x59, 0xCB, 0x00}
}
{
0x10, 0x00000C18UL,
{
0x24, 0x8F, 0xEE, 0xFC, 0xF2, 0xF4, 0xEE, 0xFC, 0x46, 0xF4, 0x10, 0x0E,
0x3D, 0x02, 0xF6, 0x8E}
}
{
0x10, 0x00000C18UL,
{
0x24, 0x8F, 0xEE, 0xFC, 0xF2, 0xF4, 0xEE, 0xFC, 0x46, 0xF4, 0x10, 0x0E,
0x3D, 0x02, 0xF6, 0x8E}
}
{
0x0C, 0x00000C28UL,
{
0xEE, 0xFC, 0x6E, 0xC8, 0x04, 0x8F, 0xE6, 0xFC, 0x6F, 0xC8, 0xCB, 0x00}
}
{
0x0C, 0x00000C28UL,
{
0xEE, 0xFC, 0x6E, 0xC8, 0x04, 0x8F, 0xE6, 0xFC, 0x6F, 0xC8, 0xCB, 0x00}
}
{
0x10, 0x00000C34UL,
{
0x24, 0x8F, 0xEC, 0xFC, 0xF2, 0xF4, 0xEC, 0xFC, 0x46, 0xF4, 0x10, 0x0E,
0x3D, 0x02, 0xF6, 0x8E}
}
{
0x10, 0x00000C34UL,
{
0x24, 0x8F, 0xEC, 0xFC, 0xF2, 0xF4, 0xEC, 0xFC, 0x46, 0xF4, 0x10, 0x0E,
0x3D, 0x02, 0xF6, 0x8E}
}
{
0x0C, 0x00000C44UL,
{
0xEC, 0xFC, 0x6E, 0xC9, 0x04, 0x8F, 0xE4, 0xFC, 0x6F, 0xC9, 0xCB, 0x00}
}
{
0x0C, 0x00000C44UL,
{
0xEC, 0xFC, 0x6E, 0xC9, 0x04, 0x8F, 0xE4, 0xFC, 0x6F, 0xC9, 0xCB, 0x00}
}
{
0x10, 0x00000C50UL,
{
0xF6, 0x8C, 0x2A, 0x11, 0xF3, 0xF8, 0x2D, 0x11, 0x49, 0x81, 0x3D, 0x30,
0xE6, 0x8C, 0x6E, 0x04}
}
{
0x10, 0x00000C50UL,
{
0xF6, 0x8C, 0x2A, 0x11, 0xF3, 0xF8, 0x2D, 0x11, 0x49, 0x81, 0x3D, 0x30,
0xE6, 0x8C, 0x6E, 0x04}
}
{
0x10, 0x00000C60UL,
{
0xF2, 0xF7, 0x08, 0x11, 0xF2, 0xF6, 0x06, 0x11, 0xDC, 0x07, 0xF4, 0x86,
0x02, 0x00, 0xC0, 0x84}
}
{
0x10, 0x00000C60UL,
{
0xF2, 0xF7, 0x08, 0x11, 0xF2, 0xF6, 0x06, 0x11, 0xDC, 0x07, 0xF4, 0x86,
0x02, 0x00, 0xC0, 0x84}
}
{
0x10, 0x00000C70UL,
{
0x66, 0xF4, 0x30, 0x00, 0x48, 0x40, 0xBD, 0x02, 0x24, 0x8F, 0xE2, 0xFC,
0xDC, 0x07, 0xA9, 0x86}
}
{
0x10, 0x00000C70UL,
{
0x66, 0xF4, 0x30, 0x00, 0x48, 0x40, 0xBD, 0x02, 0x24, 0x8F, 0xE2, 0xFC,
0xDC, 0x07, 0xA9, 0x86}
}
{
0x10, 0x00000C80UL,
{
0x9A, 0xF4, 0x08, 0x00, 0xE7, 0xF8, 0x64, 0x00, 0xF7, 0xF8, 0xF1, 0xFC,
0xF6, 0x8E, 0xE2, 0xFC}
}
{
0x10, 0x00000C80UL,
{
0x9A, 0xF4, 0x08, 0x00, 0xE7, 0xF8, 0x64, 0x00, 0xF7, 0xF8, 0xF1, 0xFC,
0xF6, 0x8E, 0xE2, 0xFC}
}
{
0x10, 0x00000C90UL,
{
0xF7, 0x8E, 0xF4, 0xFC, 0x05, 0x8F, 0xF1, 0xFC, 0xF3, 0xF8, 0xF1, 0xFC,
0x49, 0x80, 0x3D, 0x10}
}
{
0x10, 0x00000C90UL,
{
0xF7, 0x8E, 0xF4, 0xFC, 0x05, 0x8F, 0xF1, 0xFC, 0xF3, 0xF8, 0xF1, 0xFC,
0x49, 0x80, 0x3D, 0x10}
}
{
0x10, 0x00000CA0UL,
{
0xC2, 0xF4, 0xF4, 0xFC, 0x02, 0xF4, 0xE2, 0xFC, 0x7C, 0x14, 0xF7, 0xF8,
0xF4, 0xFC, 0xE7, 0xF8}
}
{
0x10, 0x00000CA0UL,
{
0xC2, 0xF4, 0xF4, 0xFC, 0x02, 0xF4, 0xE2, 0xFC, 0x7C, 0x14, 0xF7, 0xF8,
0xF4, 0xFC, 0xE7, 0xF8}
}
{
0x10, 0x00000CB0UL,
{
0x64, 0x00, 0xF7, 0xF8, 0xF1, 0xFC, 0xF6, 0x8E, 0xE2, 0xFC, 0x0D, 0x02,
0xF7, 0x8E, 0xF4, 0xFC}
}
{
0x10, 0x00000CB0UL,
{
0x64, 0x00, 0xF7, 0xF8, 0xF1, 0xFC, 0xF6, 0x8E, 0xE2, 0xFC, 0x0D, 0x02,
0xF7, 0x8E, 0xF4, 0xFC}
}
{
0x10, 0x00000CC0UL,
{
0xF3, 0xF8, 0x2C, 0x11, 0x49, 0x81, 0x3D, 0x30, 0xE6, 0x8C, 0x6E, 0x04,
0xF2, 0xF7, 0x04, 0x11}
}
{
0x10, 0x00000CC0UL,
{
0xF3, 0xF8, 0x2C, 0x11, 0x49, 0x81, 0x3D, 0x30, 0xE6, 0x8C, 0x6E, 0x04,
0xF2, 0xF7, 0x04, 0x11}
}
{
0x10, 0x00000CD0UL,
{
0xF2, 0xF6, 0x02, 0x11, 0xDC, 0x07, 0xF4, 0x86, 0x02, 0x00, 0xC0, 0x84,
0x66, 0xF4, 0x30, 0x00}
}
{
0x10, 0x00000CD0UL,
{
0xF2, 0xF6, 0x02, 0x11, 0xDC, 0x07, 0xF4, 0x86, 0x02, 0x00, 0xC0, 0x84,
0x66, 0xF4, 0x30, 0x00}
}
{
0x10, 0x00000CE0UL,
{
0x48, 0x40, 0xBD, 0x02, 0x24, 0x8F, 0xE0, 0xFC, 0xDC, 0x07, 0xA9, 0x86,
0x9A, 0xF4, 0x08, 0x00}
}
{
0x10, 0x00000CE0UL,
{
0x48, 0x40, 0xBD, 0x02, 0x24, 0x8F, 0xE0, 0xFC, 0xDC, 0x07, 0xA9, 0x86,
0x9A, 0xF4, 0x08, 0x00}
}
{
0x10, 0x00000CF0UL,
{
0xE7, 0xF8, 0x64, 0x00, 0xF7, 0xF8, 0xF0, 0xFC, 0xF6, 0x8E, 0xE0, 0xFC,
0xF7, 0x8E, 0xF3, 0xFC}
}
{
0x10, 0x00000CF0UL,
{
0xE7, 0xF8, 0x64, 0x00, 0xF7, 0xF8, 0xF0, 0xFC, 0xF6, 0x8E, 0xE0, 0xFC,
0xF7, 0x8E, 0xF3, 0xFC}
}
{
0x10, 0x00000D00UL,
{
0x05, 0x8F, 0xF0, 0xFC, 0xF3, 0xF8, 0xF0, 0xFC, 0x49, 0x80, 0x3D, 0x10,
0xC2, 0xF4, 0xF3, 0xFC}
}
{
0x10, 0x00000D00UL,
{
0x05, 0x8F, 0xF0, 0xFC, 0xF3, 0xF8, 0xF0, 0xFC, 0x49, 0x80, 0x3D, 0x10,
0xC2, 0xF4, 0xF3, 0xFC}
}
{
0x10, 0x00000D10UL,
{
0x02, 0xF4, 0xE0, 0xFC, 0x7C, 0x14, 0xF7, 0xF8, 0xF3, 0xFC, 0xE7, 0xF8,
0x64, 0x00, 0xF7, 0xF8}
}
{
0x10, 0x00000D10UL,
{
0x02, 0xF4, 0xE0, 0xFC, 0x7C, 0x14, 0xF7, 0xF8, 0xF3, 0xFC, 0xE7, 0xF8,
0x64, 0x00, 0xF7, 0xF8}
}
{
0x10, 0x00000D20UL,
{
0xF0, 0xFC, 0xF6, 0x8E, 0xE0, 0xFC, 0x0D, 0x02, 0xF7, 0x8E, 0xF3, 0xFC,
0xF2, 0x8C, 0x2A, 0x11}
}
{
0x10, 0x00000D20UL,
{
0xF0, 0xFC, 0xF6, 0x8E, 0xE0, 0xFC, 0x0D, 0x02, 0xF7, 0x8E, 0xF3, 0xFC,
0xF2, 0x8C, 0x2A, 0x11}
}
{
0x0C, 0x00000D30UL,
{
0xE0, 0x89, 0xC2, 0xF8, 0xF2, 0xFC, 0xCA, 0x00, 0x00, 0x27, 0xCB, 0x00}
}
{
0x0C, 0x00000D30UL,
{
0xE0, 0x89, 0xC2, 0xF8, 0xF2, 0xFC, 0xCA, 0x00, 0x00, 0x27, 0xCB, 0x00}
}
{
0x10, 0x00000D3CUL,
{
0xE1, 0x0C, 0xF6, 0x8C, 0x2A, 0x11, 0xF0, 0x48, 0x29, 0x81, 0x2D, 0x10,
0x09, 0x81, 0x3D, 0x1B}
}
{
0x10, 0x00000D3CUL,
{
0xE1, 0x0C, 0xF6, 0x8C, 0x2A, 0x11, 0xF0, 0x48, 0x29, 0x81, 0x2D, 0x10,
0x09, 0x81, 0x3D, 0x1B}
}
{
0x10, 0x00000D4CUL,
{
0xE6, 0x8C, 0x6E, 0x04, 0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11,
0xDC, 0x05, 0xF4, 0x84}
}
{
0x10, 0x00000D4CUL,
{
0xE6, 0x8C, 0x6E, 0x04, 0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11,
0xDC, 0x05, 0xF4, 0x84}
}
{
0x10, 0x00000D5CUL,
{
0x03, 0x00, 0x47, 0xF8, 0xE0, 0x00, 0x3D, 0x0F, 0xE1, 0x1C, 0x0D, 0x0D,
0xE6, 0x8C, 0x6E, 0x04}
}
{
0x10, 0x00000D5CUL,
{
0x03, 0x00, 0x47, 0xF8, 0xE0, 0x00, 0x3D, 0x0F, 0xE1, 0x1C, 0x0D, 0x0D,
0xE6, 0x8C, 0x6E, 0x04}
}
{
0x10, 0x00000D6CUL,
{
0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xF4, 0x84,
0x03, 0x00, 0x47, 0xF8}
}
{
0x10, 0x00000D6CUL,
{
0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xF4, 0x84,
0x03, 0x00, 0x47, 0xF8}
}
{
0x0E, 0x00000D7CUL,
{
0xE0, 0x00, 0x3D, 0x01, 0xE1, 0x1C, 0xF2, 0x8C, 0x2A, 0x11, 0xF1, 0x8C,
0xCB, 0x00}
}
{
0x0E, 0x00000D7CUL,
{
0xE0, 0x00, 0x3D, 0x01, 0xE1, 0x1C, 0xF2, 0x8C, 0x2A, 0x11, 0xF1, 0x8C,
0xCB, 0x00}
}
{
0x0A, 0x00000D8AUL,
{
0xE0, 0x05, 0x86, 0xF5, 0xE7, 0x03, 0x8D, 0xFD, 0xCB, 0x00}
}
{
0x0A, 0x00000D8AUL,
{
0xE0, 0x05, 0x86, 0xF5, 0xE7, 0x03, 0x8D, 0xFD, 0xCB, 0x00}
}
{
0x02, 0x00002BC6UL,
{
0x04, 0x8D}
}
{
0x02, 0x00002BC6UL,
{
0x04, 0x8D}
}
{
0x02, 0x00002BC8UL,
{
0x04, 0x8E}
}
{
0x02, 0x00002BC8UL,
{
0x04, 0x8E}
}
{
0x02, 0x00002BCAUL,
{
0x04, 0x8F}
}
{
0x02, 0x00002BCAUL,
{
0x04, 0x8F}
}
{
0x02, 0x00002BCCUL,
{
0x05, 0x80}
}
{
0x02, 0x00002BCCUL,
{
0x05, 0x80}
}
{
0x02, 0x00002BCEUL,
{
0x05, 0x81}
}
{
0x02, 0x00002BCEUL,
{
0x05, 0x81}
}
{
0x10, 0x00000D94UL,
{
0xC6, 0x03, 0x03, 0x00, 0xCC, 0x00, 0xF6, 0xF0, 0x20, 0xFC, 0xC6, 0x08,
0x20, 0xFC, 0xCC, 0x00}
}
{
0x10, 0x00000D94UL,
{
0xC6, 0x03, 0x03, 0x00, 0xCC, 0x00, 0xF6, 0xF0, 0x20, 0xFC, 0xC6, 0x08,
0x20, 0xFC, 0xCC, 0x00}
}
{
0x10, 0x00000DA4UL,
{
0xEC, 0x00, 0xC6, 0x87, 0x10, 0x00, 0xEC, 0x06, 0xEC, 0x07, 0xF6, 0x8C,
0xFA, 0xFC, 0xE6, 0x8C}
}
{
0x10, 0x00000DA4UL,
{
0xEC, 0x00, 0xC6, 0x87, 0x10, 0x00, 0xEC, 0x06, 0xEC, 0x07, 0xF6, 0x8C,
0xFA, 0xFC, 0xE6, 0x8C}
}
{
0x10, 0x00000DB4UL,
{
0x6E, 0x04, 0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05,
0xF4, 0x84, 0x03, 0x00}
}
{
0x10, 0x00000DB4UL,
{
0x6E, 0x04, 0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05,
0xF4, 0x84, 0x03, 0x00}
}
{
0x10, 0x00000DC4UL,
{
0xF7, 0xF8, 0x58, 0x11, 0xF3, 0xF8, 0x58, 0x11, 0x9A, 0xF4, 0x18, 0x00,
0xF2, 0xF4, 0xE6, 0xFC}
}
{
0x10, 0x00000DC4UL,
{
0xF7, 0xF8, 0x58, 0x11, 0xF3, 0xF8, 0x58, 0x11, 0x9A, 0xF4, 0x18, 0x00,
0xF2, 0xF4, 0xE6, 0xFC}
}
{
0x10, 0x00000DD4UL,
{
0x46, 0xF4, 0x10, 0x0E, 0x2D, 0x0A, 0xF2, 0xFA, 0x08, 0x11, 0xF2, 0xF9,
0x06, 0x11, 0x06, 0xF9}
}
{
0x10, 0x00000DD4UL,
{
0x46, 0xF4, 0x10, 0x0E, 0x2D, 0x0A, 0xF2, 0xFA, 0x08, 0x11, 0xF2, 0xF9,
0x06, 0x11, 0x06, 0xF9}
}
{
0x10, 0x00000DE4UL,
{
0x10, 0x00, 0xE0, 0x08, 0xCA, 0x00, 0x48, 0x11, 0x0D, 0x01, 0xCF, 0x04,
0xE1, 0x4C, 0xF2, 0xF5}
}
{
0x10, 0x00000DE4UL,
{
0x10, 0x00, 0xE0, 0x08, 0xCA, 0x00, 0x48, 0x11, 0x0D, 0x01, 0xCF, 0x04,
0xE1, 0x4C, 0xF2, 0xF5}
}
{
0x10, 0x00000DF4UL,
{
0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x01, 0x00,
0xF3, 0xF8, 0x58, 0x11}
}
{
0x10, 0x00000DF4UL,
{
0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x01, 0x00,
0xF3, 0xF8, 0x58, 0x11}
}
{
0x10, 0x00000E04UL,
{
0x9A, 0xF4, 0x03, 0x10, 0xE0, 0x08, 0xCA, 0x00, 0xA4, 0x2A, 0xC2, 0xF4,
0x58, 0x11, 0x66, 0xF4}
}
{
0x10, 0x00000E04UL,
{
0x9A, 0xF4, 0x03, 0x10, 0xE0, 0x08, 0xCA, 0x00, 0xA4, 0x2A, 0xC2, 0xF4,
0x58, 0x11, 0x66, 0xF4}
}
{
0x10, 0x00000E14UL,
{
0x2C, 0x00, 0xEA, 0x20, 0x44, 0x0F, 0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4,
0x06, 0x11, 0xDC, 0x05}
}
{
0x10, 0x00000E14UL,
{
0x2C, 0x00, 0xEA, 0x20, 0x44, 0x0F, 0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4,
0x06, 0x11, 0xDC, 0x05}
}
{
0x10, 0x00000E24UL,
{
0xF4, 0x84, 0x02, 0x00, 0xF7, 0xF8, 0x59, 0x11, 0xF3, 0xF8, 0x59, 0x11,
0x9A, 0xF4, 0x04, 0x70}
}
{
0x10, 0x00000E24UL,
{
0xF4, 0x84, 0x02, 0x00, 0xF7, 0xF8, 0x59, 0x11, 0xF3, 0xF8, 0x59, 0x11,
0x9A, 0xF4, 0x04, 0x70}
}
{
0x10, 0x00000E34UL,
{
0x8A, 0x04, 0x02, 0xF0, 0xFF, 0x04, 0xDF, 0x04, 0xF3, 0xF8, 0x59, 0x11,
0x9A, 0xF4, 0x02, 0x60}
}
{
0x10, 0x00000E34UL,
{
0x8A, 0x04, 0x02, 0xF0, 0xFF, 0x04, 0xDF, 0x04, 0xF3, 0xF8, 0x59, 0x11,
0x9A, 0xF4, 0x02, 0x60}
}
{
0x10, 0x00000E44UL,
{
0x9A, 0x05, 0x08, 0x10, 0xF3, 0xF8, 0x59, 0x11, 0x67, 0xF8, 0x40, 0x00,
0xC0, 0x84, 0x3D, 0x05}
}
{
0x10, 0x00000E44UL,
{
0x9A, 0x05, 0x08, 0x10, 0xF3, 0xF8, 0x59, 0x11, 0x67, 0xF8, 0x40, 0x00,
0xC0, 0x84, 0x3D, 0x05}
}
{
0x10, 0x00000E54UL,
{
0x9A, 0x05, 0x03, 0x10, 0x3A, 0x05, 0x05, 0x11, 0xDF, 0x04, 0xF3, 0xF8,
0x58, 0x11, 0x9A, 0xF4}
}
{
0x10, 0x00000E54UL,
{
0x9A, 0x05, 0x03, 0x10, 0x3A, 0x05, 0x05, 0x11, 0xDF, 0x04, 0xF3, 0xF8,
0x58, 0x11, 0x9A, 0xF4}
}
{
0x10, 0x00000E64UL,
{
0x13, 0x30, 0xDF, 0x04, 0xE1, 0x4C, 0x0D, 0x07, 0xF2, 0xF5, 0x08, 0x11,
0xF2, 0xF4, 0x06, 0x11}
}
{
0x10, 0x00000E64UL,
{
0x13, 0x30, 0xDF, 0x04, 0xE1, 0x4C, 0x0D, 0x07, 0xF2, 0xF5, 0x08, 0x11,
0xF2, 0xF4, 0x06, 0x11}
}
{
0x10, 0x00000E74UL,
{
0xDC, 0x05, 0xE4, 0xC4, 0x01, 0x00, 0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4,
0x06, 0x11, 0xDC, 0x05}
}
{
0x10, 0x00000E74UL,
{
0xDC, 0x05, 0xE4, 0xC4, 0x01, 0x00, 0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4,
0x06, 0x11, 0xDC, 0x05}
}
{
0x10, 0x00000E84UL,
{
0xF4, 0x84, 0x02, 0x00, 0x8A, 0xF4, 0xF0, 0x00, 0x9A, 0x04, 0x5A, 0xD0,
0xF2, 0xF4, 0xE6, 0xFC}
}
{
0x10, 0x00000E84UL,
{
0xF4, 0x84, 0x02, 0x00, 0x8A, 0xF4, 0xF0, 0x00, 0x9A, 0x04, 0x5A, 0xD0,
0xF2, 0xF4, 0xE6, 0xFC}
}
{
0x10, 0x00000E94UL,
{
0x46, 0xF4, 0x10, 0x0E, 0x2D, 0x53, 0xF2, 0xF5, 0xEA, 0xFC, 0xE6, 0xF4,
0x12, 0x00, 0x1B, 0x54}
}
{
0x10, 0x00000E94UL,
{
0x46, 0xF4, 0x10, 0x0E, 0x2D, 0x53, 0xF2, 0xF5, 0xEA, 0xFC, 0xE6, 0xF4,
0x12, 0x00, 0x1B, 0x54}
}
{
0x10, 0x00000EA4UL,
{
0xF2, 0xF9, 0x0C, 0xFE, 0xF2, 0xF8, 0x0E, 0xFE, 0xE6, 0xF6, 0x20, 0xFD,
0xE6, 0xF7, 0x02, 0x00}
}
{
0x10, 0x00000EA4UL,
{
0xF2, 0xF9, 0x0C, 0xFE, 0xF2, 0xF8, 0x0E, 0xFE, 0xE6, 0xF6, 0x20, 0xFD,
0xE6, 0xF7, 0x02, 0x00}
}
{
0x10, 0x00000EB4UL,
{
0xF0, 0x46, 0x00, 0x48, 0xF0, 0x57, 0x10, 0x59, 0xF6, 0xF4, 0xF6, 0xFC,
0xF6, 0xF5, 0xF8, 0xFC}
}
{
0x10, 0x00000EB4UL,
{
0xF0, 0x46, 0x00, 0x48, 0xF0, 0x57, 0x10, 0x59, 0xF6, 0xF4, 0xF6, 0xFC,
0xF6, 0xF5, 0xF8, 0xFC}
}
{
0x10, 0x00000EC4UL,
{
0xCA, 0x00, 0x2A, 0x28, 0xF6, 0xF4, 0x54, 0x11, 0xF6, 0xF5, 0x56, 0x11,
0xE0, 0x08, 0xCA, 0x00}
}
{
0x10, 0x00000EC4UL,
{
0xCA, 0x00, 0x2A, 0x28, 0xF6, 0xF4, 0x54, 0x11, 0xF6, 0xF5, 0x56, 0x11,
0xE0, 0x08, 0xCA, 0x00}
}
{
0x10, 0x00000ED4UL,
{
0xA0, 0x0A, 0xF6, 0xF4, 0x52, 0x11, 0xF2, 0xF4, 0x54, 0x11, 0xF2, 0xF5,
0x56, 0x11, 0xF2, 0xF3}
}
{
0x10, 0x00000ED4UL,
{
0xA0, 0x0A, 0xF6, 0xF4, 0x52, 0x11, 0xF2, 0xF4, 0x54, 0x11, 0xF2, 0xF5,
0x56, 0x11, 0xF2, 0xF3}
}
{
0x10, 0x00000EE4UL,
{
0xF8, 0xFC, 0xF2, 0xF2, 0xF6, 0xFC, 0xCA, 0x00, 0x62, 0x00, 0xF2, 0xF6,
0x52, 0x11, 0xF2, 0xF5}
}
{
0x10, 0x00000EE4UL,
{
0xF8, 0xFC, 0xF2, 0xF2, 0xF6, 0xFC, 0xCA, 0x00, 0x62, 0x00, 0xF2, 0xF6,
0x52, 0x11, 0xF2, 0xF5}
}
{
0x10, 0x00000EF4UL,
{
0xF8, 0xFC, 0xF2, 0xF4, 0xF6, 0xFC, 0x08, 0x46, 0x18, 0x50, 0xDC, 0x05,
0xB8, 0x64, 0xE1, 0x1C}
}
{
0x10, 0x00000EF4UL,
{
0xF8, 0xFC, 0xF2, 0xF4, 0xF6, 0xFC, 0x08, 0x46, 0x18, 0x50, 0xDC, 0x05,
0xB8, 0x64, 0xE1, 0x1C}
}
{
0x10, 0x00000F04UL,
{
0xF2, 0xF5, 0xF8, 0xFC, 0xF2, 0xF4, 0xF6, 0xFC, 0x08, 0x44, 0x18, 0x50,
0xDC, 0x05, 0xB9, 0xC4}
}
{
0x10, 0x00000F04UL,
{
0xF2, 0xF5, 0xF8, 0xFC, 0xF2, 0xF4, 0xF6, 0xFC, 0x08, 0x44, 0x18, 0x50,
0xDC, 0x05, 0xB9, 0xC4}
}
{
0x10, 0x00000F14UL,
{
0x24, 0x8F, 0xEA, 0xFC, 0xF2, 0xF5, 0xEA, 0xFC, 0xE6, 0xF4, 0x10, 0x0E,
0xF2, 0x07, 0xEA, 0xFC}
}
{
0x10, 0x00000F14UL,
{
0x24, 0x8F, 0xEA, 0xFC, 0xF2, 0xF5, 0xEA, 0xFC, 0xE6, 0xF4, 0x10, 0x0E,
0xF2, 0x07, 0xEA, 0xFC}
}
{
0x10, 0x00000F24UL,
{
0x5B, 0x44, 0xF2, 0xF4, 0x0C, 0xFE, 0xF2, 0xF6, 0x0E, 0xFE, 0xF6, 0xF4,
0xEA, 0xFC, 0x24, 0x8F}
}
{
0x10, 0x00000F24UL,
{
0x5B, 0x44, 0xF2, 0xF4, 0x0C, 0xFE, 0xF2, 0xF6, 0x0E, 0xFE, 0xF6, 0xF4,
0xEA, 0xFC, 0x24, 0x8F}
}
{
0x10, 0x00000F34UL,
{
0xE6, 0xFC, 0xC2, 0xF8, 0x31, 0x11, 0xCA, 0x00, 0x38, 0x23, 0x0D, 0x01,
0xCF, 0x04, 0xDE, 0x04}
}
{
0x10, 0x00000F34UL,
{
0xE6, 0xFC, 0xC2, 0xF8, 0x31, 0x11, 0xCA, 0x00, 0x38, 0x23, 0x0D, 0x01,
0xCF, 0x04, 0xDE, 0x04}
}
{
0x10, 0x00000F44UL,
{
0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xF4, 0x84,
0x03, 0x00, 0xF7, 0xF8}
}
{
0x10, 0x00000F44UL,
{
0xF2, 0xF5, 0x08, 0x11, 0xF2, 0xF4, 0x06, 0x11, 0xDC, 0x05, 0xF4, 0x84,
0x03, 0x00, 0xF7, 0xF8}
}
{
0x10, 0x00000F54UL,
{
0x58, 0x11, 0x49, 0x80, 0xEA, 0x30, 0xC8, 0x0D, 0xF2, 0x8C, 0xFA, 0xFC,
0xFC, 0x07, 0xFC, 0x06}
}
{
0x10, 0x00000F54UL,
{
0x58, 0x11, 0x49, 0x80, 0xEA, 0x30, 0xC8, 0x0D, 0xF2, 0x8C, 0xFA, 0xFC,
0xFC, 0x07, 0xFC, 0x06}
}
{
0x0A, 0x00000F64UL,
{
0xFC, 0x87, 0xFC, 0x00, 0xFC, 0x08, 0xFC, 0x03, 0xFB, 0x88}
}
{
0x0A, 0x00000F64UL,
{
0xFC, 0x87, 0xFC, 0x00, 0xFC, 0x08, 0xFC, 0x03, 0xFB, 0x88}
}
{
0x10, 0x00000F6EUL,
{
0xC6, 0x03, 0x03, 0x00, 0xCC, 0x00, 0xF6, 0xF0, 0x20, 0xFC, 0xC6, 0x08,
0x20, 0xFC, 0xCC, 0x00}
}
{
0x10, 0x00000F6EUL,
{
0xC6, 0x03, 0x03, 0x00, 0xCC, 0x00, 0xF6, 0xF0, 0x20, 0xFC, 0xC6, 0x08,
0x20, 0xFC, 0xCC, 0x00}
}
{
0x10, 0x00000F7EUL,
{
0xEC, 0x00, 0xC6, 0x87, 0x10, 0x00, 0xEC, 0x06, 0xEC, 0x07, 0xF6, 0x8C,
0xFA, 0xFC, 0xE6, 0x8C}
}
{
0x10, 0x00000F7EUL,
{
0xEC, 0x00, 0xC6, 0x87, 0x10, 0x00, 0xEC, 0x06, 0xEC, 0x07, 0xF6, 0x8C,
0xFA, 0xFC, 0xE6, 0x8C}
}
{
0x10, 0x00000F8EUL,
{
0x6E, 0x04, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05,
0xF4, 0x84, 0x03, 0x00}
}
{
0x10, 0x00000F8EUL,
{
0x6E, 0x04, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05,
0xF4, 0x84, 0x03, 0x00}
}
{
0x10, 0x00000F9EUL,
{
0xF7, 0xF8, 0x58, 0x11, 0xF3, 0xF8, 0x58, 0x11, 0x9A, 0xF4, 0x18, 0x00,
0xF2, 0xF4, 0xE4, 0xFC}
}
{
0x10, 0x00000F9EUL,
{
0xF7, 0xF8, 0x58, 0x11, 0xF3, 0xF8, 0x58, 0x11, 0x9A, 0xF4, 0x18, 0x00,
0xF2, 0xF4, 0xE4, 0xFC}
}
{
0x10, 0x00000FAEUL,
{
0x46, 0xF4, 0x10, 0x0E, 0x2D, 0x0A, 0xF2, 0xFA, 0x04, 0x11, 0xF2, 0xF9,
0x02, 0x11, 0x06, 0xF9}
}
{
0x10, 0x00000FAEUL,
{
0x46, 0xF4, 0x10, 0x0E, 0x2D, 0x0A, 0xF2, 0xFA, 0x04, 0x11, 0xF2, 0xF9,
0x02, 0x11, 0x06, 0xF9}
}
{
0x10, 0x00000FBEUL,
{
0x10, 0x00, 0xE0, 0x18, 0xCA, 0x00, 0x48, 0x11, 0x0D, 0x01, 0xBF, 0x04,
0xE1, 0x4C, 0xF2, 0xF5}
}
{
0x10, 0x00000FBEUL,
{
0x10, 0x00, 0xE0, 0x18, 0xCA, 0x00, 0x48, 0x11, 0x0D, 0x01, 0xBF, 0x04,
0xE1, 0x4C, 0xF2, 0xF5}
}
{
0x10, 0x00000FCEUL,
{
0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x01, 0x00,
0xF3, 0xF8, 0x58, 0x11}
}
{
0x10, 0x00000FCEUL,
{
0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xE4, 0xC4, 0x01, 0x00,
0xF3, 0xF8, 0x58, 0x11}
}
{
0x10, 0x00000FDEUL,
{
0x9A, 0xF4, 0x03, 0x10, 0xE0, 0x18, 0xCA, 0x00, 0xA4, 0x2A, 0xC2, 0xF4,
0x58, 0x11, 0x66, 0xF4}
}
{
0x10, 0x00000FDEUL,
{
0x9A, 0xF4, 0x03, 0x10, 0xE0, 0x18, 0xCA, 0x00, 0xA4, 0x2A, 0xC2, 0xF4,
0x58, 0x11, 0x66, 0xF4}
}
{
0x10, 0x00000FEEUL,
{
0x2C, 0x00, 0xEA, 0x20, 0x1E, 0x11, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4,
0x02, 0x11, 0xDC, 0x05}
}
{
0x10, 0x00000FEEUL,
{
0x2C, 0x00, 0xEA, 0x20, 0x1E, 0x11, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4,
0x02, 0x11, 0xDC, 0x05}
}
{
0x10, 0x00000FFEUL,
{
0xF4, 0x84, 0x02, 0x00, 0xF7, 0xF8, 0x59, 0x11, 0xF3, 0xF8, 0x59, 0x11,
0x9A, 0xF4, 0x04, 0x70}
}
{
0x10, 0x00000FFEUL,
{
0xF4, 0x84, 0x02, 0x00, 0xF7, 0xF8, 0x59, 0x11, 0xF3, 0xF8, 0x59, 0x11,
0x9A, 0xF4, 0x04, 0x70}
}
{
0x10, 0x0000100EUL,
{
0x8A, 0x04, 0x02, 0xE0, 0xEF, 0x04, 0xDF, 0x04, 0xF3, 0xF8, 0x59, 0x11,
0x9A, 0xF4, 0x02, 0x60}
}
{
0x10, 0x0000100EUL,
{
0x8A, 0x04, 0x02, 0xE0, 0xEF, 0x04, 0xDF, 0x04, 0xF3, 0xF8, 0x59, 0x11,
0x9A, 0xF4, 0x02, 0x60}
}
{
0x10, 0x0000101EUL,
{
0x9A, 0x05, 0x08, 0x00, 0xF3, 0xF8, 0x59, 0x11, 0x67, 0xF8, 0x40, 0x00,
0xC0, 0x84, 0x3D, 0x05}
}
{
0x10, 0x0000101EUL,
{
0x9A, 0x05, 0x08, 0x00, 0xF3, 0xF8, 0x59, 0x11, 0x67, 0xF8, 0x40, 0x00,
0xC0, 0x84, 0x3D, 0x05}
}
{
0x10, 0x0000102EUL,
{
0x9A, 0x05, 0x03, 0x00, 0x3A, 0x05, 0x05, 0x00, 0xDF, 0x04, 0xF3, 0xF8,
0x58, 0x11, 0x9A, 0xF4}
}
{
0x10, 0x0000102EUL,
{
0x9A, 0x05, 0x03, 0x00, 0x3A, 0x05, 0x05, 0x00, 0xDF, 0x04, 0xF3, 0xF8,
0x58, 0x11, 0x9A, 0xF4}
}
{
0x10, 0x0000103EUL,
{
0x13, 0x30, 0xDF, 0x04, 0xE1, 0x4C, 0x0D, 0x07, 0xF2, 0xF5, 0x04, 0x11,
0xF2, 0xF4, 0x02, 0x11}
}
{
0x10, 0x0000103EUL,
{
0x13, 0x30, 0xDF, 0x04, 0xE1, 0x4C, 0x0D, 0x07, 0xF2, 0xF5, 0x04, 0x11,
0xF2, 0xF4, 0x02, 0x11}
}
{
0x10, 0x0000104EUL,
{
0xDC, 0x05, 0xE4, 0xC4, 0x01, 0x00, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4,
0x02, 0x11, 0xDC, 0x05}
}
{
0x10, 0x0000104EUL,
{
0xDC, 0x05, 0xE4, 0xC4, 0x01, 0x00, 0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4,
0x02, 0x11, 0xDC, 0x05}
}
{
0x10, 0x0000105EUL,
{
0xF4, 0x84, 0x02, 0x00, 0x8A, 0xF4, 0xF0, 0x00, 0x9A, 0x04, 0x5A, 0xD0,
0xF2, 0xF4, 0xE4, 0xFC}
}
{
0x10, 0x0000105EUL,
{
0xF4, 0x84, 0x02, 0x00, 0x8A, 0xF4, 0xF0, 0x00, 0x9A, 0x04, 0x5A, 0xD0,
0xF2, 0xF4, 0xE4, 0xFC}
}
{
0x10, 0x0000106EUL,
{
0x46, 0xF4, 0x10, 0x0E, 0x2D, 0x53, 0xF2, 0xF5, 0xE8, 0xFC, 0xE6, 0xF4,
0x12, 0x00, 0x1B, 0x54}
}
{
0x10, 0x0000106EUL,
{
0x46, 0xF4, 0x10, 0x0E, 0x2D, 0x53, 0xF2, 0xF5, 0xE8, 0xFC, 0xE6, 0xF4,
0x12, 0x00, 0x1B, 0x54}
}
{
0x10, 0x0000107EUL,
{
0xF2, 0xF9, 0x0C, 0xFE, 0xF2, 0xF8, 0x0E, 0xFE, 0xE6, 0xF6, 0x00, 0x00,
0xE6, 0xF7, 0x02, 0x00}
}
{
0x10, 0x0000107EUL,
{
0xF2, 0xF9, 0x0C, 0xFE, 0xF2, 0xF8, 0x0E, 0xFE, 0xE6, 0xF6, 0x00, 0x00,
0xE6, 0xF7, 0x02, 0x00}
}
{
0x10, 0x0000108EUL,
{
0xF0, 0x46, 0x00, 0x48, 0xF0, 0x57, 0x10, 0x59, 0xF6, 0xF4, 0xF6, 0xFC,
0xF6, 0xF5, 0xF8, 0xFC}
}
{
0x10, 0x0000108EUL,
{
0xF0, 0x46, 0x00, 0x48, 0xF0, 0x57, 0x10, 0x59, 0xF6, 0xF4, 0xF6, 0xFC,
0xF6, 0xF5, 0xF8, 0xFC}
}
{
0x10, 0x0000109EUL,
{
0xCA, 0x00, 0x2A, 0x28, 0xF6, 0xF4, 0x54, 0x11, 0xF6, 0xF5, 0x56, 0x11,
0xE0, 0x18, 0xCA, 0x00}
}
{
0x10, 0x0000109EUL,
{
0xCA, 0x00, 0x2A, 0x28, 0xF6, 0xF4, 0x54, 0x11, 0xF6, 0xF5, 0x56, 0x11,
0xE0, 0x18, 0xCA, 0x00}
}
{
0x10, 0x000010AEUL,
{
0xA0, 0x0A, 0xF6, 0xF4, 0x52, 0x11, 0xF2, 0xF4, 0x54, 0x11, 0xF2, 0xF5,
0x56, 0x11, 0xF2, 0xF3}
}
{
0x10, 0x000010AEUL,
{
0xA0, 0x0A, 0xF6, 0xF4, 0x52, 0x11, 0xF2, 0xF4, 0x54, 0x11, 0xF2, 0xF5,
0x56, 0x11, 0xF2, 0xF3}
}
{
0x10, 0x000010BEUL,
{
0xF8, 0xFC, 0xF2, 0xF2, 0xF6, 0xFC, 0xCA, 0x00, 0x62, 0x00, 0xF2, 0xF6,
0x52, 0x11, 0xF2, 0xF5}
}
{
0x10, 0x000010BEUL,
{
0xF8, 0xFC, 0xF2, 0xF2, 0xF6, 0xFC, 0xCA, 0x00, 0x62, 0x00, 0xF2, 0xF6,
0x52, 0x11, 0xF2, 0xF5}
}
{
0x10, 0x000010CEUL,
{
0xF8, 0xFC, 0xF2, 0xF4, 0xF6, 0xFC, 0x08, 0x46, 0x18, 0x50, 0xDC, 0x05,
0xB8, 0x64, 0xE1, 0x1C}
}
{
0x10, 0x000010CEUL,
{
0xF8, 0xFC, 0xF2, 0xF4, 0xF6, 0xFC, 0x08, 0x46, 0x18, 0x50, 0xDC, 0x05,
0xB8, 0x64, 0xE1, 0x1C}
}
{
0x10, 0x000010DEUL,
{
0xF2, 0xF5, 0xF8, 0xFC, 0xF2, 0xF4, 0xF6, 0xFC, 0x08, 0x44, 0x18, 0x50,
0xDC, 0x05, 0xB9, 0xC4}
}
{
0x10, 0x000010DEUL,
{
0xF2, 0xF5, 0xF8, 0xFC, 0xF2, 0xF4, 0xF6, 0xFC, 0x08, 0x44, 0x18, 0x50,
0xDC, 0x05, 0xB9, 0xC4}
}
{
0x10, 0x000010EEUL,
{
0x24, 0x8F, 0xE8, 0xFC, 0xF2, 0xF5, 0xE8, 0xFC, 0xE6, 0xF4, 0x10, 0x0E,
0xF2, 0x07, 0xE8, 0xFC}
}
{
0x10, 0x000010EEUL,
{
0x24, 0x8F, 0xE8, 0xFC, 0xF2, 0xF5, 0xE8, 0xFC, 0xE6, 0xF4, 0x10, 0x0E,
0xF2, 0x07, 0xE8, 0xFC}
}
{
0x10, 0x000010FEUL,
{
0x5B, 0x44, 0xF2, 0xF4, 0x0C, 0xFE, 0xF2, 0xF6, 0x0E, 0xFE, 0xF6, 0xF4,
0xE8, 0xFC, 0x24, 0x8F}
}
{
0x10, 0x000010FEUL,
{
0x5B, 0x44, 0xF2, 0xF4, 0x0C, 0xFE, 0xF2, 0xF6, 0x0E, 0xFE, 0xF6, 0xF4,
0xE8, 0xFC, 0x24, 0x8F}
}
{
0x10, 0x0000110EUL,
{
0xE4, 0xFC, 0xC2, 0xF8, 0x30, 0x11, 0xCA, 0x00, 0x38, 0x23, 0x0D, 0x01,
0xBF, 0x04, 0xDE, 0x04}
}
{
0x10, 0x0000110EUL,
{
0xE4, 0xFC, 0xC2, 0xF8, 0x30, 0x11, 0xCA, 0x00, 0x38, 0x23, 0x0D, 0x01,
0xBF, 0x04, 0xDE, 0x04}
}
{
0x10, 0x0000111EUL,
{
0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xF4, 0x84,
0x03, 0x00, 0xF7, 0xF8}
}
{
0x10, 0x0000111EUL,
{
0xF2, 0xF5, 0x04, 0x11, 0xF2, 0xF4, 0x02, 0x11, 0xDC, 0x05, 0xF4, 0x84,
0x03, 0x00, 0xF7, 0xF8}
}
{
0x10, 0x0000112EUL,
{
0x58, 0x11, 0x49, 0x80, 0xEA, 0x30, 0xA2, 0x0F, 0xF2, 0x8C, 0xFA, 0xFC,
0xFC, 0x07, 0xFC, 0x06}
}
{
0x10, 0x0000112EUL,
{
0x58, 0x11, 0x49, 0x80, 0xEA, 0x30, 0xA2, 0x0F, 0xF2, 0x8C, 0xFA, 0xFC,
0xFC, 0x07, 0xFC, 0x06}
}
{
0x0A, 0x0000113EUL,
{
0xFC, 0x87, 0xFC, 0x00, 0xFC, 0x08, 0xFC, 0x03, 0xFB, 0x88}
}
{
0x0A, 0x0000113EUL,
{
0xFC, 0x87, 0xFC, 0x00, 0xFC, 0x08, 0xFC, 0x03, 0xFB, 0x88}
}
{
0x10, 0x00001148UL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xEC, 0xFF, 0xF0, 0xE9, 0xF0, 0xFA, 0x06, 0xF0,
0xF6, 0xFF, 0xF0, 0x48}
}
{
0x10, 0x00001148UL,
{
0xEC, 0xFD, 0xEC, 0xFE, 0xEC, 0xFF, 0xF0, 0xE9, 0xF0, 0xFA, 0x06, 0xF0,
0xF6, 0xFF, 0xF0, 0x48}
}
{
0x10, 0x00001158UL,
{
0x49, 0x80, 0xEA, 0x30, 0x20, 0x14, 0xF2, 0xF5, 0xEA, 0xFC, 0xE6, 0xF4,
0x12, 0x00, 0x1B, 0x54}
}
{
0x10, 0x00001158UL,
{
0x49, 0x80, 0xEA, 0x30, 0x20, 0x14, 0xF2, 0xF5, 0xEA, 0xFC, 0xE6, 0xF4,
0x12, 0x00, 0x1B, 0x54}
}
{
0x10, 0x00001168UL,
{
0xF2, 0xF9, 0x0C, 0xFE, 0xF2, 0xF8, 0x0E, 0xFE, 0xE6, 0xF6, 0x20, 0xFD,
0xE6, 0xF7, 0x02, 0x00}
}
{
0x10, 0x00001168UL,
{
0xF2, 0xF9, 0x0C, 0xFE, 0xF2, 0xF8, 0x0E, 0xFE, 0xE6, 0xF6, 0x20, 0xFD,
0xE6, 0xF7, 0x02, 0x00}
}
{
0x10, 0x00001178UL,
{
0xF0, 0x46, 0x00, 0x48, 0xF0, 0x57, 0x10, 0x59, 0xF6, 0xF4, 0xFC, 0xFC,
0xF6, 0xF5, 0xFE, 0xFC}
}
{
0x10, 0x00001178UL,
{
0xF0, 0x46, 0x00, 0x48, 0xF0, 0x57, 0x10, 0x59, 0xF6, 0xF4, 0xFC, 0xFC,
0xF6, 0xF5, 0xFE, 0xFC}
}
{
0x10, 0x00001188UL,
{
0xDC, 0x0F, 0xA9, 0x8E, 0x8A, 0xF4, 0x02, 0x70, 0xEA, 0x00, 0xF6, 0x12,
0xF0, 0xBF, 0xF0, 0xAE}
}
{
0x10, 0x00001188UL,
{
0xDC, 0x0F, 0xA9, 0x8E, 0x8A, 0xF4, 0x02, 0x70, 0xEA, 0x00, 0xF6, 0x12,
0xF0, 0xBF, 0xF0, 0xAE}
}
{
0x10, 0x00001198UL,
{
0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x44, 0x18, 0x50,
0x08, 0x41, 0x18, 0x50}
}
{
0x10, 0x00001198UL,
{
0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x44, 0x18, 0x50,
0x08, 0x41, 0x18, 0x50}
}
{
0x10, 0x000011A8UL,
{
0xF0, 0x84, 0xF0, 0x95, 0xCA, 0x00, 0x80, 0x29, 0xF2, 0xF3, 0xFE, 0xFC,
0xF2, 0xF2, 0xFC, 0xFC}
}
{
0x10, 0x000011A8UL,
{
0xF0, 0x84, 0xF0, 0x95, 0xCA, 0x00, 0x80, 0x29, 0xF2, 0xF3, 0xFE, 0xFC,
0xF2, 0xF2, 0xFC, 0xFC}
}
{
0x10, 0x000011B8UL,
{
0x08, 0x26, 0x18, 0x30, 0xCA, 0x00, 0x54, 0x00, 0xC4, 0x40, 0x02, 0x00,
0xC4, 0x50, 0x04, 0x00}
}
{
0x10, 0x000011B8UL,
{
0x08, 0x26, 0x18, 0x30, 0xCA, 0x00, 0x54, 0x00, 0xC4, 0x40, 0x02, 0x00,
0xC4, 0x50, 0x04, 0x00}
}
{
0x10, 0x000011C8UL,
{
0xD4, 0x40, 0x04, 0x00, 0x66, 0xF4, 0xFF, 0xF8, 0xC4, 0x40, 0x04, 0x00,
0xF2, 0xF5, 0xFE, 0xFC}
}
{
0x10, 0x000011C8UL,
{
0xD4, 0x40, 0x04, 0x00, 0x66, 0xF4, 0xFF, 0xF8, 0xC4, 0x40, 0x04, 0x00,
0xF2, 0xF5, 0xFE, 0xFC}
}
{
0x10, 0x000011D8UL,
{
0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x45, 0x18, 0x50, 0xDC, 0x05, 0xA9, 0x84,
0xC0, 0x84, 0x7C, 0x64}
}
{
0x10, 0x000011D8UL,
{
0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x45, 0x18, 0x50, 0xDC, 0x05, 0xA9, 0x84,
0xC0, 0x84, 0x7C, 0x64}
}
{
0x10, 0x000011E8UL,
{
0x9A, 0xF4, 0x05, 0x00, 0xF4, 0x80, 0x05, 0x00, 0x79, 0x84, 0xE4, 0x80,
0x05, 0x00, 0xD4, 0x40}
}
{
0x10, 0x000011E8UL,
{
0x9A, 0xF4, 0x05, 0x00, 0xF4, 0x80, 0x05, 0x00, 0x79, 0x84, 0xE4, 0x80,
0x05, 0x00, 0xD4, 0x40}
}
{
0x10, 0x000011F8UL,
{
0x02, 0x00, 0xD4, 0x50, 0x04, 0x00, 0x62, 0xF4, 0x26, 0x11, 0x62, 0xF5,
0x28, 0x11, 0x22, 0xF4}
}
{
0x10, 0x000011F8UL,
{
0x02, 0x00, 0xD4, 0x50, 0x04, 0x00, 0x62, 0xF4, 0x26, 0x11, 0x62, 0xF5,
0x28, 0x11, 0x22, 0xF4}
}
{
0x10, 0x00001208UL,
{
0xFE, 0x10, 0x32, 0xF5, 0x00, 0x11, 0x3D, 0x2E, 0xCA, 0x00, 0x2A, 0x28,
0xF0, 0x64, 0xF0, 0x75}
}
{
0x10, 0x00001208UL,
{
0xFE, 0x10, 0x32, 0xF5, 0x00, 0x11, 0x3D, 0x2E, 0xCA, 0x00, 0x2A, 0x28,
0xF0, 0x64, 0xF0, 0x75}
}
{
0x10, 0x00001218UL,
{
0xC4, 0x40, 0x06, 0x00, 0xC4, 0x50, 0x08, 0x00, 0xF2, 0xF3, 0xFE, 0xFC,
0xF2, 0xF2, 0xFC, 0xFC}
}
{
0x10, 0x00001218UL,
{
0xC4, 0x40, 0x06, 0x00, 0xC4, 0x50, 0x08, 0x00, 0xF2, 0xF3, 0xFE, 0xFC,
0xF2, 0xF2, 0xFC, 0xFC}
}
{
0x10, 0x00001228UL,
{
0xCA, 0x00, 0x62, 0x00, 0xE1, 0x0C, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4,
0xFC, 0xFC, 0x08, 0x44}
}
{
0x10, 0x00001228UL,
{
0xCA, 0x00, 0x62, 0x00, 0xE1, 0x0C, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4,
0xFC, 0xFC, 0x08, 0x44}
}
{
0x10, 0x00001238UL,
{
0x18, 0x50, 0xDC, 0x05, 0xB9, 0xC4, 0x24, 0x8F, 0xEA, 0xFC, 0xF2, 0xF5,
0xEA, 0xFC, 0xE6, 0xF4}
}
{
0x10, 0x00001238UL,
{
0x18, 0x50, 0xDC, 0x05, 0xB9, 0xC4, 0x24, 0x8F, 0xEA, 0xFC, 0xF2, 0xF5,
0xEA, 0xFC, 0xE6, 0xF4}
}
{
0x10, 0x00001248UL,
{
0x10, 0x0E, 0xF2, 0x07, 0xEA, 0xFC, 0x5B, 0x44, 0xF2, 0xF4, 0x0C, 0xFE,
0xF2, 0xF6, 0x0E, 0xFE}
}
{
0x10, 0x00001248UL,
{
0x10, 0x0E, 0xF2, 0x07, 0xEA, 0xFC, 0x5B, 0x44, 0xF2, 0xF4, 0x0C, 0xFE,
0xF2, 0xF6, 0x0E, 0xFE}
}
{
0x10, 0x00001258UL,
{
0xF6, 0xF4, 0xEA, 0xFC, 0x24, 0x8F, 0xE6, 0xFC, 0xC2, 0xF8, 0x31, 0x11,
0xCA, 0x00, 0x38, 0x23}
}
{
0x10, 0x00001258UL,
{
0xF6, 0xF4, 0xEA, 0xFC, 0x24, 0x8F, 0xE6, 0xFC, 0xC2, 0xF8, 0x31, 0x11,
0xCA, 0x00, 0x38, 0x23}
}
{
0x10, 0x00001268UL,
{
0xEA, 0x00, 0xC8, 0x16, 0xD4, 0x40, 0x02, 0x00, 0xD4, 0x50, 0x04, 0x00,
0x62, 0xF4, 0x1E, 0x11}
}
{
0x10, 0x00001268UL,
{
0xEA, 0x00, 0xC8, 0x16, 0xD4, 0x40, 0x02, 0x00, 0xD4, 0x50, 0x04, 0x00,
0x62, 0xF4, 0x1E, 0x11}
}
{
0x10, 0x00001278UL,
{
0x62, 0xF5, 0x20, 0x11, 0x22, 0xF4, 0xF6, 0x10, 0x32, 0xF5, 0xF8, 0x10,
0xEA, 0x30, 0xC8, 0x16}
}
{
0x10, 0x00001278UL,
{
0x62, 0xF5, 0x20, 0x11, 0x22, 0xF4, 0xF6, 0x10, 0x32, 0xF5, 0xF8, 0x10,
0xEA, 0x30, 0xC8, 0x16}
}
{
0x10, 0x00001288UL,
{
0xCA, 0x00, 0x2A, 0x28, 0xF0, 0x64, 0xF0, 0x75, 0xC4, 0x40, 0x06, 0x00,
0xC4, 0x50, 0x08, 0x00}
}
{
0x10, 0x00001288UL,
{
0xCA, 0x00, 0x2A, 0x28, 0xF0, 0x64, 0xF0, 0x75, 0xC4, 0x40, 0x06, 0x00,
0xC4, 0x50, 0x08, 0x00}
}
{
0x10, 0x00001298UL,
{
0xF2, 0xF3, 0xFE, 0xFC, 0xF2, 0xF2, 0xFC, 0xFC, 0xCA, 0x00, 0x62, 0x00,
0xE1, 0x2C, 0xF2, 0xF5}
}
{
0x10, 0x00001298UL,
{
0xF2, 0xF3, 0xFE, 0xFC, 0xF2, 0xF2, 0xFC, 0xFC, 0xCA, 0x00, 0x62, 0x00,
0xE1, 0x2C, 0xF2, 0xF5}
}
{
0x10, 0x000012A8UL,
{
0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x44, 0x18, 0x50, 0xDC, 0x05,
0xB9, 0xC4, 0xF2, 0xF7}
}
{
0x10, 0x000012A8UL,
{
0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x44, 0x18, 0x50, 0xDC, 0x05,
0xB9, 0xC4, 0xF2, 0xF7}
}
{
0x10, 0x000012B8UL,
{
0xFE, 0xFC, 0xF2, 0xF6, 0xFC, 0xFC, 0x08, 0x64, 0x18, 0x70, 0xDC, 0x17,
0xA9, 0x86, 0xB9, 0x86}
}
{
0x10, 0x000012B8UL,
{
0xFE, 0xFC, 0xF2, 0xF6, 0xFC, 0xFC, 0x08, 0x64, 0x18, 0x70, 0xDC, 0x17,
0xA9, 0x86, 0xB9, 0x86}
}
{
0x10, 0x000012C8UL,
{
0x24, 0x8F, 0xEA, 0xFC, 0xF2, 0xF5, 0xEA, 0xFC, 0xE6, 0xF4, 0x10, 0x0E,
0xF2, 0x07, 0xEA, 0xFC}
}
{
0x10, 0x000012C8UL,
{
0x24, 0x8F, 0xEA, 0xFC, 0xF2, 0xF5, 0xEA, 0xFC, 0xE6, 0xF4, 0x10, 0x0E,
0xF2, 0x07, 0xEA, 0xFC}
}
{
0x10, 0x000012D8UL,
{
0x5B, 0x44, 0xF2, 0xF4, 0x0C, 0xFE, 0xF2, 0xF6, 0x0E, 0xFE, 0xF6, 0xF4,
0xEA, 0xFC, 0x24, 0x8F}
}
{
0x10, 0x000012D8UL,
{
0x5B, 0x44, 0xF2, 0xF4, 0x0C, 0xFE, 0xF2, 0xF6, 0x0E, 0xFE, 0xF6, 0xF4,
0xEA, 0xFC, 0x24, 0x8F}
}
{
0x10, 0x000012E8UL,
{
0xE6, 0xFC, 0xC2, 0xF8, 0x31, 0x11, 0xCA, 0x00, 0x38, 0x23, 0xEA, 0x00,
0xC8, 0x16, 0xF0, 0xBF}
}
{
0x10, 0x000012E8UL,
{
0xE6, 0xFC, 0xC2, 0xF8, 0x31, 0x11, 0xCA, 0x00, 0x38, 0x23, 0xEA, 0x00,
0xC8, 0x16, 0xF0, 0xBF}
}
{
0x10, 0x000012F8UL,
{
0xF0, 0xAE, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x44,
0x18, 0x50, 0x08, 0x41}
}
{
0x10, 0x000012F8UL,
{
0xF0, 0xAE, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x44,
0x18, 0x50, 0x08, 0x41}
}
{
0x10, 0x00001308UL,
{
0x18, 0x50, 0xF0, 0x84, 0xF0, 0x95, 0xCA, 0x00, 0x02, 0x2A, 0xF2, 0xF5,
0xFE, 0xFC, 0xF2, 0xF4}
}
{
0x10, 0x00001308UL,
{
0x18, 0x50, 0xF0, 0x84, 0xF0, 0x95, 0xCA, 0x00, 0x02, 0x2A, 0xF2, 0xF5,
0xFE, 0xFC, 0xF2, 0xF4}
}
{
0x10, 0x00001318UL,
{
0xFC, 0xFC, 0x08, 0x46, 0x18, 0x50, 0xDC, 0x05, 0xA8, 0x44, 0xB8, 0x40,
0x66, 0xF4, 0xFF, 0xE0}
}
{
0x10, 0x00001318UL,
{
0xFC, 0xFC, 0x08, 0x46, 0x18, 0x50, 0xDC, 0x05, 0xA8, 0x44, 0xB8, 0x40,
0x66, 0xF4, 0xFF, 0xE0}
}
{
0x10, 0x00001328UL,
{
0xB8, 0x40, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x45,
0x18, 0x50, 0xDC, 0x05}
}
{
0x10, 0x00001328UL,
{
0xB8, 0x40, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x45,
0x18, 0x50, 0xDC, 0x05}
}
{
0x10, 0x00001338UL,
{
0xA9, 0x84, 0xC0, 0x84, 0x7C, 0x64, 0x9A, 0xF4, 0x06, 0x00, 0xF4, 0x80,
0x01, 0x00, 0x77, 0xF8}
}
{
0x10, 0x00001338UL,
{
0xA9, 0x84, 0xC0, 0x84, 0x7C, 0x64, 0x9A, 0xF4, 0x06, 0x00, 0xF4, 0x80,
0x01, 0x00, 0x77, 0xF8}
}
{
0x10, 0x00001348UL,
{
0x10, 0x00, 0xE4, 0x80, 0x01, 0x00, 0xA8, 0xD0, 0xF0, 0x4D, 0x62, 0xF4,
0x10, 0x11, 0x42, 0xF4}
}
{
0x10, 0x00001348UL,
{
0x10, 0x00, 0xE4, 0x80, 0x01, 0x00, 0xA8, 0xD0, 0xF0, 0x4D, 0x62, 0xF4,
0x10, 0x11, 0x42, 0xF4}
}
{
0x10, 0x00001358UL,
{
0x18, 0x11, 0x3D, 0x2E, 0xCA, 0x00, 0x2A, 0x28, 0xF0, 0x64, 0xF0, 0x75,
0xC4, 0x40, 0x06, 0x00}
}
{
0x10, 0x00001358UL,
{
0x18, 0x11, 0x3D, 0x2E, 0xCA, 0x00, 0x2A, 0x28, 0xF0, 0x64, 0xF0, 0x75,
0xC4, 0x40, 0x06, 0x00}
}
{
0x10, 0x00001368UL,
{
0xC4, 0x50, 0x08, 0x00, 0xF2, 0xF3, 0xFE, 0xFC, 0xF2, 0xF2, 0xFC, 0xFC,
0xCA, 0x00, 0x62, 0x00}
}
{
0x10, 0x00001368UL,
{
0xC4, 0x50, 0x08, 0x00, 0xF2, 0xF3, 0xFE, 0xFC, 0xF2, 0xF2, 0xFC, 0xFC,
0xCA, 0x00, 0x62, 0x00}
}
{
0x10, 0x00001378UL,
{
0xE1, 0x0C, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x44,
0x18, 0x50, 0xDC, 0x05}
}
{
0x10, 0x00001378UL,
{
0xE1, 0x0C, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x44,
0x18, 0x50, 0xDC, 0x05}
}
{
0x10, 0x00001388UL,
{
0xB9, 0xC4, 0x24, 0x8F, 0xEA, 0xFC, 0xF2, 0xF5, 0xEA, 0xFC, 0xE6, 0xF4,
0x10, 0x0E, 0xF2, 0x07}
}
{
0x10, 0x00001388UL,
{
0xB9, 0xC4, 0x24, 0x8F, 0xEA, 0xFC, 0xF2, 0xF5, 0xEA, 0xFC, 0xE6, 0xF4,
0x10, 0x0E, 0xF2, 0x07}
}
{
0x10, 0x00001398UL,
{
0xEA, 0xFC, 0x5B, 0x44, 0xF2, 0xF4, 0x0C, 0xFE, 0xF2, 0xF6, 0x0E, 0xFE,
0xF6, 0xF4, 0xEA, 0xFC}
}
{
0x10, 0x00001398UL,
{
0xEA, 0xFC, 0x5B, 0x44, 0xF2, 0xF4, 0x0C, 0xFE, 0xF2, 0xF6, 0x0E, 0xFE,
0xF6, 0xF4, 0xEA, 0xFC}
}
{
0x10, 0x000013A8UL,
{
0x24, 0x8F, 0xE6, 0xFC, 0xC2, 0xF8, 0x31, 0x11, 0xCA, 0x00, 0x38, 0x23,
0xEA, 0x00, 0xC8, 0x16}
}
{
0x10, 0x000013A8UL,
{
0x24, 0x8F, 0xE6, 0xFC, 0xC2, 0xF8, 0x31, 0x11, 0xCA, 0x00, 0x38, 0x23,
0xEA, 0x00, 0xC8, 0x16}
}
{
0x10, 0x000013B8UL,
{
0x62, 0xFD, 0x0C, 0x11, 0x42, 0xFD, 0x14, 0x11, 0xEA, 0x30, 0xC8, 0x16,
0xCA, 0x00, 0x2A, 0x28}
}
{
0x10, 0x000013B8UL,
{
0x62, 0xFD, 0x0C, 0x11, 0x42, 0xFD, 0x14, 0x11, 0xEA, 0x30, 0xC8, 0x16,
0xCA, 0x00, 0x2A, 0x28}
}
{
0x10, 0x000013C8UL,
{
0xF0, 0x64, 0xF0, 0x75, 0xC4, 0x40, 0x06, 0x00, 0xC4, 0x50, 0x08, 0x00,
0xF2, 0xF3, 0xFE, 0xFC}
}
{
0x10, 0x000013C8UL,
{
0xF0, 0x64, 0xF0, 0x75, 0xC4, 0x40, 0x06, 0x00, 0xC4, 0x50, 0x08, 0x00,
0xF2, 0xF3, 0xFE, 0xFC}
}
{
0x10, 0x000013D8UL,
{
0xF2, 0xF2, 0xFC, 0xFC, 0xCA, 0x00, 0x62, 0x00, 0xE1, 0x2C, 0xF2, 0xF5,
0xFE, 0xFC, 0xF2, 0xF4}
}
{
0x10, 0x000013D8UL,
{
0xF2, 0xF2, 0xFC, 0xFC, 0xCA, 0x00, 0x62, 0x00, 0xE1, 0x2C, 0xF2, 0xF5,
0xFE, 0xFC, 0xF2, 0xF4}
}
{
0x0E, 0x000013E8UL,
{
0xFC, 0xFC, 0x08, 0x44, 0x18, 0x50, 0xDC, 0x05, 0xB9, 0xC4, 0x24, 0x8F,
0xEA, 0xFC}
}
{
0x0E, 0x000013E8UL,
{
0xFC, 0xFC, 0x08, 0x44, 0x18, 0x50, 0xDC, 0x05, 0xB9, 0xC4, 0x24, 0x8F,
0xEA, 0xFC}
}
{
0x10, 0x000013F6UL,
{
0xF2, 0xF5, 0xEA, 0xFC, 0xE6, 0xF4, 0x10, 0x0E, 0xF2, 0x07, 0xEA, 0xFC,
0x5B, 0x44, 0xF2, 0xF4}
}
{
0x10, 0x000013F6UL,
{
0xF2, 0xF5, 0xEA, 0xFC, 0xE6, 0xF4, 0x10, 0x0E, 0xF2, 0x07, 0xEA, 0xFC,
0x5B, 0x44, 0xF2, 0xF4}
}
{
0x10, 0x00001406UL,
{
0x0C, 0xFE, 0xF2, 0xF6, 0x0E, 0xFE, 0xF6, 0xF4, 0xEA, 0xFC, 0x24, 0x8F,
0xE6, 0xFC, 0xC2, 0xF8}
}
{
0x10, 0x00001406UL,
{
0x0C, 0xFE, 0xF2, 0xF6, 0x0E, 0xFE, 0xF6, 0xF4, 0xEA, 0xFC, 0x24, 0x8F,
0xE6, 0xFC, 0xC2, 0xF8}
}
{
0x10, 0x00001416UL,
{
0x31, 0x11, 0xCA, 0x00, 0x38, 0x23, 0xEA, 0x00, 0xC8, 0x16, 0xF2, 0xF5,
0xE8, 0xFC, 0xE6, 0xF4}
}
{
0x10, 0x00001416UL,
{
0x31, 0x11, 0xCA, 0x00, 0x38, 0x23, 0xEA, 0x00, 0xC8, 0x16, 0xF2, 0xF5,
0xE8, 0xFC, 0xE6, 0xF4}
}
{
0x10, 0x00001426UL,
{
0x12, 0x00, 0x1B, 0x54, 0xF2, 0xF9, 0x0C, 0xFE, 0xF2, 0xF8, 0x0E, 0xFE,
0xE6, 0xF6, 0x00, 0x00}
}
{
0x10, 0x00001426UL,
{
0x12, 0x00, 0x1B, 0x54, 0xF2, 0xF9, 0x0C, 0xFE, 0xF2, 0xF8, 0x0E, 0xFE,
0xE6, 0xF6, 0x00, 0x00}
}
{
0x10, 0x00001436UL,
{
0xE6, 0xF7, 0x02, 0x00, 0xF0, 0x46, 0x00, 0x48, 0xF0, 0x57, 0x10, 0x59,
0xF6, 0xF4, 0xFC, 0xFC}
}
{
0x10, 0x00001436UL,
{
0xE6, 0xF7, 0x02, 0x00, 0xF0, 0x46, 0x00, 0x48, 0xF0, 0x57, 0x10, 0x59,
0xF6, 0xF4, 0xFC, 0xFC}
}
{
0x10, 0x00001446UL,
{
0xF6, 0xF5, 0xFE, 0xFC, 0xDC, 0x0F, 0xA9, 0x8E, 0x8A, 0xF4, 0x02, 0x70,
0xEA, 0x00, 0xA6, 0x15}
}
{
0x10, 0x00001446UL,
{
0xF6, 0xF5, 0xFE, 0xFC, 0xDC, 0x0F, 0xA9, 0x8E, 0x8A, 0xF4, 0x02, 0x70,
0xEA, 0x00, 0xA6, 0x15}
}
{
0x10, 0x00001456UL,
{
0xF0, 0xBF, 0xF0, 0xAE, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC,
0x08, 0x44, 0x18, 0x50}
}
{
0x10, 0x00001456UL,
{
0xF0, 0xBF, 0xF0, 0xAE, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC,
0x08, 0x44, 0x18, 0x50}
}
{
0x10, 0x00001466UL,
{
0x08, 0x41, 0x18, 0x50, 0xF0, 0x84, 0xF0, 0x95, 0xCA, 0x00, 0x80, 0x29,
0xF2, 0xF3, 0xFE, 0xFC}
}
{
0x10, 0x00001466UL,
{
0x08, 0x41, 0x18, 0x50, 0xF0, 0x84, 0xF0, 0x95, 0xCA, 0x00, 0x80, 0x29,
0xF2, 0xF3, 0xFE, 0xFC}
}
{
0x10, 0x00001476UL,
{
0xF2, 0xF2, 0xFC, 0xFC, 0x08, 0x26, 0x18, 0x30, 0xCA, 0x00, 0x54, 0x00,
0xC4, 0x40, 0x02, 0x00}
}
{
0x10, 0x00001476UL,
{
0xF2, 0xF2, 0xFC, 0xFC, 0x08, 0x26, 0x18, 0x30, 0xCA, 0x00, 0x54, 0x00,
0xC4, 0x40, 0x02, 0x00}
}
{
0x10, 0x00001486UL,
{
0xC4, 0x50, 0x04, 0x00, 0xD4, 0x40, 0x04, 0x00, 0x66, 0xF4, 0xFF, 0xF8,
0xC4, 0x40, 0x04, 0x00}
}
{
0x10, 0x00001486UL,
{
0xC4, 0x50, 0x04, 0x00, 0xD4, 0x40, 0x04, 0x00, 0x66, 0xF4, 0xFF, 0xF8,
0xC4, 0x40, 0x04, 0x00}
}
{
0x10, 0x00001496UL,
{
0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x45, 0x18, 0x50,
0xDC, 0x05, 0xA9, 0x84}
}
{
0x10, 0x00001496UL,
{
0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x45, 0x18, 0x50,
0xDC, 0x05, 0xA9, 0x84}
}
{
0x10, 0x000014A6UL,
{
0xC0, 0x84, 0x7C, 0x64, 0x9A, 0xF4, 0x05, 0x00, 0xF4, 0x80, 0x05, 0x00,
0x79, 0x84, 0xE4, 0x80}
}
{
0x10, 0x000014A6UL,
{
0xC0, 0x84, 0x7C, 0x64, 0x9A, 0xF4, 0x05, 0x00, 0xF4, 0x80, 0x05, 0x00,
0x79, 0x84, 0xE4, 0x80}
}
{
0x10, 0x000014B6UL,
{
0x05, 0x00, 0xD4, 0x40, 0x02, 0x00, 0xD4, 0x50, 0x04, 0x00, 0x62, 0xF4,
0x22, 0x11, 0x62, 0xF5}
}
{
0x10, 0x000014B6UL,
{
0x05, 0x00, 0xD4, 0x40, 0x02, 0x00, 0xD4, 0x50, 0x04, 0x00, 0x62, 0xF4,
0x22, 0x11, 0x62, 0xF5}
}
{
0x10, 0x000014C6UL,
{
0x24, 0x11, 0x22, 0xF4, 0xFA, 0x10, 0x32, 0xF5, 0xFC, 0x10, 0x3D, 0x2E,
0xCA, 0x00, 0x2A, 0x28}
}
{
0x10, 0x000014C6UL,
{
0x24, 0x11, 0x22, 0xF4, 0xFA, 0x10, 0x32, 0xF5, 0xFC, 0x10, 0x3D, 0x2E,
0xCA, 0x00, 0x2A, 0x28}
}
{
0x10, 0x000014D6UL,
{
0xF0, 0x64, 0xF0, 0x75, 0xC4, 0x40, 0x06, 0x00, 0xC4, 0x50, 0x08, 0x00,
0xF2, 0xF3, 0xFE, 0xFC}
}
{
0x10, 0x000014D6UL,
{
0xF0, 0x64, 0xF0, 0x75, 0xC4, 0x40, 0x06, 0x00, 0xC4, 0x50, 0x08, 0x00,
0xF2, 0xF3, 0xFE, 0xFC}
}
{
0x10, 0x000014E6UL,
{
0xF2, 0xF2, 0xFC, 0xFC, 0xCA, 0x00, 0x62, 0x00, 0xE1, 0x0C, 0xF2, 0xF5,
0xFE, 0xFC, 0xF2, 0xF4}
}
{
0x10, 0x000014E6UL,
{
0xF2, 0xF2, 0xFC, 0xFC, 0xCA, 0x00, 0x62, 0x00, 0xE1, 0x0C, 0xF2, 0xF5,
0xFE, 0xFC, 0xF2, 0xF4}
}
{
0x10, 0x000014F6UL,
{
0xFC, 0xFC, 0x08, 0x44, 0x18, 0x50, 0xDC, 0x05, 0xB9, 0xC4, 0x24, 0x8F,
0xE8, 0xFC, 0xF2, 0xF5}
}
{
0x10, 0x000014F6UL,
{
0xFC, 0xFC, 0x08, 0x44, 0x18, 0x50, 0xDC, 0x05, 0xB9, 0xC4, 0x24, 0x8F,
0xE8, 0xFC, 0xF2, 0xF5}
}
{
0x10, 0x00001506UL,
{
0xE8, 0xFC, 0xE6, 0xF4, 0x10, 0x0E, 0xF2, 0x07, 0xE8, 0xFC, 0x5B, 0x44,
0xF2, 0xF4, 0x0C, 0xFE}
}
{
0x10, 0x00001506UL,
{
0xE8, 0xFC, 0xE6, 0xF4, 0x10, 0x0E, 0xF2, 0x07, 0xE8, 0xFC, 0x5B, 0x44,
0xF2, 0xF4, 0x0C, 0xFE}
}
{
0x10, 0x00001516UL,
{
0xF2, 0xF6, 0x0E, 0xFE, 0xF6, 0xF4, 0xE8, 0xFC, 0x24, 0x8F, 0xE4, 0xFC,
0xC2, 0xF8, 0x30, 0x11}
}
{
0x10, 0x00001516UL,
{
0xF2, 0xF6, 0x0E, 0xFE, 0xF6, 0xF4, 0xE8, 0xFC, 0x24, 0x8F, 0xE4, 0xFC,
0xC2, 0xF8, 0x30, 0x11}
}
{
0x10, 0x00001526UL,
{
0xCA, 0x00, 0x38, 0x23, 0xEA, 0x00, 0xC8, 0x16, 0xD4, 0x40, 0x02, 0x00,
0xD4, 0x50, 0x04, 0x00}
}
{
0x10, 0x00001526UL,
{
0xCA, 0x00, 0x38, 0x23, 0xEA, 0x00, 0xC8, 0x16, 0xD4, 0x40, 0x02, 0x00,
0xD4, 0x50, 0x04, 0x00}
}
{
0x10, 0x00001536UL,
{
0x62, 0xF4, 0x1A, 0x11, 0x62, 0xF5, 0x1C, 0x11, 0x22, 0xF4, 0xF2, 0x10,
0x32, 0xF5, 0xF4, 0x10}
}
{
0x10, 0x00001536UL,
{
0x62, 0xF4, 0x1A, 0x11, 0x62, 0xF5, 0x1C, 0x11, 0x22, 0xF4, 0xF2, 0x10,
0x32, 0xF5, 0xF4, 0x10}
}
{
0x10, 0x00001546UL,
{
0xEA, 0x30, 0xC8, 0x16, 0xCA, 0x00, 0x2A, 0x28, 0xF0, 0x64, 0xF0, 0x75,
0xC4, 0x40, 0x06, 0x00}
}
{
0x10, 0x00001546UL,
{
0xEA, 0x30, 0xC8, 0x16, 0xCA, 0x00, 0x2A, 0x28, 0xF0, 0x64, 0xF0, 0x75,
0xC4, 0x40, 0x06, 0x00}
}
{
0x10, 0x00001556UL,
{
0xC4, 0x50, 0x08, 0x00, 0xF2, 0xF3, 0xFE, 0xFC, 0xF2, 0xF2, 0xFC, 0xFC,
0xCA, 0x00, 0x62, 0x00}
}
{
0x10, 0x00001556UL,
{
0xC4, 0x50, 0x08, 0x00, 0xF2, 0xF3, 0xFE, 0xFC, 0xF2, 0xF2, 0xFC, 0xFC,
0xCA, 0x00, 0x62, 0x00}
}
{
0x10, 0x00001566UL,
{
0xE1, 0x2C, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x44,
0x18, 0x50, 0xDC, 0x05}
}
{
0x10, 0x00001566UL,
{
0xE1, 0x2C, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x44,
0x18, 0x50, 0xDC, 0x05}
}
{
0x10, 0x00001576UL,
{
0xB9, 0xC4, 0x24, 0x8F, 0xE8, 0xFC, 0xF2, 0xF5, 0xE8, 0xFC, 0xE6, 0xF4,
0x10, 0x0E, 0xF2, 0x07}
}
{
0x10, 0x00001576UL,
{
0xB9, 0xC4, 0x24, 0x8F, 0xE8, 0xFC, 0xF2, 0xF5, 0xE8, 0xFC, 0xE6, 0xF4,
0x10, 0x0E, 0xF2, 0x07}
}
{
0x10, 0x00001586UL,
{
0xE8, 0xFC, 0x5B, 0x44, 0xF2, 0xF4, 0x0C, 0xFE, 0xF2, 0xF6, 0x0E, 0xFE,
0xF6, 0xF4, 0xE8, 0xFC}
}
{
0x10, 0x00001586UL,
{
0xE8, 0xFC, 0x5B, 0x44, 0xF2, 0xF4, 0x0C, 0xFE, 0xF2, 0xF6, 0x0E, 0xFE,
0xF6, 0xF4, 0xE8, 0xFC}
}
{
0x10, 0x00001596UL,
{
0x24, 0x8F, 0xE4, 0xFC, 0xC2, 0xF8, 0x30, 0x11, 0xCA, 0x00, 0x38, 0x23,
0xEA, 0x00, 0xC8, 0x16}
}
{
0x10, 0x00001596UL,
{
0x24, 0x8F, 0xE4, 0xFC, 0xC2, 0xF8, 0x30, 0x11, 0xCA, 0x00, 0x38, 0x23,
0xEA, 0x00, 0xC8, 0x16}
}
{
0x10, 0x000015A6UL,
{
0xF0, 0xBF, 0xF0, 0xAE, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC,
0x08, 0x44, 0x18, 0x50}
}
{
0x10, 0x000015A6UL,
{
0xF0, 0xBF, 0xF0, 0xAE, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC,
0x08, 0x44, 0x18, 0x50}
}
{
0x10, 0x000015B6UL,
{
0x08, 0x41, 0x18, 0x50, 0xF0, 0x84, 0xF0, 0x95, 0xCA, 0x00, 0x02, 0x2A,
0xF2, 0xF5, 0xFE, 0xFC}
}
{
0x10, 0x000015B6UL,
{
0x08, 0x41, 0x18, 0x50, 0xF0, 0x84, 0xF0, 0x95, 0xCA, 0x00, 0x02, 0x2A,
0xF2, 0xF5, 0xFE, 0xFC}
}
{
0x10, 0x000015C6UL,
{
0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x46, 0x18, 0x50, 0xDC, 0x05, 0xA8, 0x44,
0xB8, 0x40, 0x66, 0xF4}
}
{
0x10, 0x000015C6UL,
{
0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x46, 0x18, 0x50, 0xDC, 0x05, 0xA8, 0x44,
0xB8, 0x40, 0x66, 0xF4}
}
{
0x10, 0x000015D6UL,
{
0xFF, 0xE0, 0xB8, 0x40, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC,
0x08, 0x45, 0x18, 0x50}
}
{
0x10, 0x000015D6UL,
{
0xFF, 0xE0, 0xB8, 0x40, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC,
0x08, 0x45, 0x18, 0x50}
}
{
0x10, 0x000015E6UL,
{
0xDC, 0x05, 0xA9, 0x84, 0xC0, 0x84, 0x7C, 0x64, 0x9A, 0xF4, 0x06, 0x00,
0xF4, 0x80, 0x01, 0x00}
}
{
0x10, 0x000015E6UL,
{
0xDC, 0x05, 0xA9, 0x84, 0xC0, 0x84, 0x7C, 0x64, 0x9A, 0xF4, 0x06, 0x00,
0xF4, 0x80, 0x01, 0x00}
}
{
0x10, 0x000015F6UL,
{
0x77, 0xF8, 0x10, 0x00, 0xE4, 0x80, 0x01, 0x00, 0xA8, 0xD0, 0xF0, 0x4D,
0x62, 0xF4, 0x0E, 0x11}
}
{
0x10, 0x000015F6UL,
{
0x77, 0xF8, 0x10, 0x00, 0xE4, 0x80, 0x01, 0x00, 0xA8, 0xD0, 0xF0, 0x4D,
0x62, 0xF4, 0x0E, 0x11}
}
{
0x10, 0x00001606UL,
{
0x42, 0xF4, 0x16, 0x11, 0x3D, 0x2D, 0xCA, 0x00, 0x2A, 0x28, 0xF0, 0x64,
0xF0, 0x75, 0xC4, 0x40}
}
{
0x10, 0x00001606UL,
{
0x42, 0xF4, 0x16, 0x11, 0x3D, 0x2D, 0xCA, 0x00, 0x2A, 0x28, 0xF0, 0x64,
0xF0, 0x75, 0xC4, 0x40}
}
{
0x10, 0x00001616UL,
{
0x06, 0x00, 0xC4, 0x50, 0x08, 0x00, 0xF2, 0xF3, 0xFE, 0xFC, 0xF2, 0xF2,
0xFC, 0xFC, 0xCA, 0x00}
}
{
0x10, 0x00001616UL,
{
0x06, 0x00, 0xC4, 0x50, 0x08, 0x00, 0xF2, 0xF3, 0xFE, 0xFC, 0xF2, 0xF2,
0xFC, 0xFC, 0xCA, 0x00}
}
{
0x10, 0x00001626UL,
{
0x62, 0x00, 0xE1, 0x0C, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC,
0x08, 0x44, 0x18, 0x50}
}
{
0x10, 0x00001626UL,
{
0x62, 0x00, 0xE1, 0x0C, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC,
0x08, 0x44, 0x18, 0x50}
}
{
0x10, 0x00001636UL,
{
0xDC, 0x05, 0xB9, 0xC4, 0x24, 0x8F, 0xE8, 0xFC, 0xF2, 0xF5, 0xE8, 0xFC,
0xE6, 0xF4, 0x10, 0x0E}
}
{
0x10, 0x00001636UL,
{
0xDC, 0x05, 0xB9, 0xC4, 0x24, 0x8F, 0xE8, 0xFC, 0xF2, 0xF5, 0xE8, 0xFC,
0xE6, 0xF4, 0x10, 0x0E}
}
{
0x10, 0x00001646UL,
{
0xF2, 0x07, 0xE8, 0xFC, 0x5B, 0x44, 0xF2, 0xF4, 0x0C, 0xFE, 0xF2, 0xF6,
0x0E, 0xFE, 0xF6, 0xF4}
}
{
0x10, 0x00001646UL,
{
0xF2, 0x07, 0xE8, 0xFC, 0x5B, 0x44, 0xF2, 0xF4, 0x0C, 0xFE, 0xF2, 0xF6,
0x0E, 0xFE, 0xF6, 0xF4}
}
{
0x10, 0x00001656UL,
{
0xE8, 0xFC, 0x24, 0x8F, 0xE4, 0xFC, 0xC2, 0xF8, 0x30, 0x11, 0xCA, 0x00,
0x38, 0x23, 0x0D, 0x31}
}
{
0x10, 0x00001656UL,
{
0xE8, 0xFC, 0x24, 0x8F, 0xE4, 0xFC, 0xC2, 0xF8, 0x30, 0x11, 0xCA, 0x00,
0x38, 0x23, 0x0D, 0x31}
}
{
0x10, 0x00001666UL,
{
0x62, 0xFD, 0x0A, 0x11, 0x42, 0xFD, 0x12, 0x11, 0x3D, 0x2C, 0xCA, 0x00,
0x2A, 0x28, 0xF0, 0x64}
}
{
0x10, 0x00001666UL,
{
0x62, 0xFD, 0x0A, 0x11, 0x42, 0xFD, 0x12, 0x11, 0x3D, 0x2C, 0xCA, 0x00,
0x2A, 0x28, 0xF0, 0x64}
}
{
0x10, 0x00001676UL,
{
0xF0, 0x75, 0xC4, 0x40, 0x06, 0x00, 0xC4, 0x50, 0x08, 0x00, 0xF2, 0xF3,
0xFE, 0xFC, 0xF2, 0xF2}
}
{
0x10, 0x00001676UL,
{
0xF0, 0x75, 0xC4, 0x40, 0x06, 0x00, 0xC4, 0x50, 0x08, 0x00, 0xF2, 0xF3,
0xFE, 0xFC, 0xF2, 0xF2}
}
{
0x06, 0x00001686UL,
{
0xFC, 0xFC, 0xCA, 0x00, 0x62, 0x00}
}
{
0x06, 0x00001686UL,
{
0xFC, 0xFC, 0xCA, 0x00, 0x62, 0x00}
}
{
0x10, 0x0000168CUL,
{
0xE1, 0x2C, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x44,
0x18, 0x50, 0xDC, 0x05}
}
{
0x10, 0x0000168CUL,
{
0xE1, 0x2C, 0xF2, 0xF5, 0xFE, 0xFC, 0xF2, 0xF4, 0xFC, 0xFC, 0x08, 0x44,
0x18, 0x50, 0xDC, 0x05}
}
{
0x10, 0x0000169CUL,
{
0xB9, 0xC4, 0x24, 0x8F, 0xE8, 0xFC, 0xF2, 0xF5, 0xE8, 0xFC, 0xE6, 0xF4,
0x10, 0x0E, 0xF2, 0x07}
}
{
0x10, 0x0000169CUL,
{
0xB9, 0xC4, 0x24, 0x8F, 0xE8, 0xFC, 0xF2, 0xF5, 0xE8, 0xFC, 0xE6, 0xF4,
0x10, 0x0E, 0xF2, 0x07}
}
{
0x10, 0x000016ACUL,
{
0xE8, 0xFC, 0x5B, 0x44, 0xF2, 0xF4, 0x0C, 0xFE, 0xF2, 0xF6, 0x0E, 0xFE,
0xF6, 0xF4, 0xE8, 0xFC}
}
{
0x10, 0x000016ACUL,
{
0xE8, 0xFC, 0x5B, 0x44, 0xF2, 0xF4, 0x0C, 0xFE, 0xF2, 0xF6, 0x0E, 0xFE,
0xF6, 0xF4, 0xE8, 0xFC}
}
{
0x10, 0x000016BCUL,
{
0x24, 0x8F, 0xE4, 0xFC, 0xC2, 0xF8, 0x30, 0x11, 0xCA, 0x00, 0x38, 0x23,
0x06, 0xF0, 0x0A, 0x00}
}
{
0x10, 0x000016BCUL,
{
0x24, 0x8F, 0xE4, 0xFC, 0xC2, 0xF8, 0x30, 0x11, 0xCA, 0x00, 0x38, 0x23,
0x06, 0xF0, 0x0A, 0x00}
}
{
0x08, 0x000016CCUL,
{
0xFC, 0xFF, 0xFC, 0xFE, 0xFC, 0xFD, 0xCB, 0x00}
}
{
0x08, 0x000016CCUL,
{
0xFC, 0xFF, 0xFC, 0xFE, 0xFC, 0xFD, 0xCB, 0x00}
}
{
0x06, 0x00002BD0UL,
{
0x02, 0x40, 0x84, 0x10, 0x00, 0x00}
}
{
0x06, 0x00002BD0UL,
{
0x02, 0x40, 0x84, 0x10, 0x00, 0x00}
}
{
0x06, 0x00002BD6UL,
{
0x02, 0x40, 0x86, 0x10, 0x01, 0x00}
}
{
0x06, 0x00002BD6UL,
{
0x02, 0x40, 0x86, 0x10, 0x01, 0x00}
}
{
0x08, 0x00002BDCUL,
{
0x04, 0x40, 0x88, 0x10, 0x00, 0x00, 0x00, 0x00}
}
{
0x08, 0x00002BDCUL,
{
0x04, 0x40, 0x88, 0x10, 0x00, 0x00, 0x00, 0x00}
}
{
0x06, 0x00002BE4UL,
{
0x02, 0x40, 0xCC, 0x10, 0x00, 0x00}
}
{
0x06, 0x00002BE4UL,
{
0x02, 0x40, 0xCC, 0x10, 0x00, 0x00}
}
{
0x06, 0x00002BEAUL,
{
0x01, 0x40, 0xF0, 0x10, 0x00, 0x00}
}
{
0x06, 0x00002BEAUL,
{
0x01, 0x40, 0xF0, 0x10, 0x00, 0x00}
}
{
0x04, 0x00002618UL,
{
0xEC, 0xFD, 0xF0, 0xD8}
}
{
0x04, 0x00002618UL,
{
0xEC, 0xFD, 0xF0, 0xD8}
}
{
0x10, 0x0000261CUL,
{
0xCA, 0x00, 0xA8, 0x27, 0xE6, 0xF4, 0xCE, 0x02, 0xF6, 0xF4, 0x86, 0x10,
0xF0, 0x4D, 0xF7, 0xF8}
}
{
0x10, 0x0000261CUL,
{
0xCA, 0x00, 0xA8, 0x27, 0xE6, 0xF4, 0xCE, 0x02, 0xF6, 0xF4, 0x86, 0x10,
0xF0, 0x4D, 0xF7, 0xF8}
}
{
0x10, 0x0000262CUL,
{
0xCE, 0x10, 0xE0, 0x06, 0xE1, 0x0A, 0xE4, 0xA6, 0xCF, 0x10, 0x86, 0xF6,
0x1F, 0x00, 0x8D, 0xFB}
}
{
0x10, 0x0000262CUL,
{
0xCE, 0x10, 0xE0, 0x06, 0xE1, 0x0A, 0xE4, 0xA6, 0xCF, 0x10, 0x86, 0xF6,
0x1F, 0x00, 0x8D, 0xFB}
}
{
0x10, 0x0000263CUL,
{
0xE1, 0x1A, 0xC2, 0xF4, 0x5E, 0x11, 0xE4, 0xA4, 0xCF, 0x10, 0xF0, 0x4D,
0x49, 0x81, 0x2D, 0x19}
}
{
0x10, 0x0000263CUL,
{
0xE1, 0x1A, 0xC2, 0xF4, 0x5E, 0x11, 0xE4, 0xA4, 0xCF, 0x10, 0xF0, 0x4D,
0x49, 0x81, 0x2D, 0x19}
}
{
0x10, 0x0000264CUL,
{
0xF0, 0x4D, 0x49, 0x82, 0x2D, 0x16, 0xF0, 0x4D, 0x49, 0x84, 0x2D, 0x13,
0xF0, 0x4D, 0x47, 0xF8}
}
{
0x10, 0x0000264CUL,
{
0xF0, 0x4D, 0x49, 0x82, 0x2D, 0x16, 0xF0, 0x4D, 0x49, 0x84, 0x2D, 0x13,
0xF0, 0x4D, 0x47, 0xF8}
}
{
0x10, 0x0000265CUL,
{
0x08, 0x00, 0x2D, 0x0F, 0xF0, 0x4D, 0x47, 0xF8, 0x10, 0x00, 0x2D, 0x0B,
0xF0, 0x4D, 0x47, 0xF8}
}
{
0x10, 0x0000265CUL,
{
0x08, 0x00, 0x2D, 0x0F, 0xF0, 0x4D, 0x47, 0xF8, 0x10, 0x00, 0x2D, 0x0B,
0xF0, 0x4D, 0x47, 0xF8}
}
{
0x10, 0x0000266CUL,
{
0x20, 0x00, 0x2D, 0x07, 0xF0, 0x4D, 0xC0, 0x89, 0xE0, 0x28, 0xCA, 0x00,
0x84, 0x00, 0xE0, 0x4D}
}
{
0x10, 0x0000266CUL,
{
0x20, 0x00, 0x2D, 0x07, 0xF0, 0x4D, 0xC0, 0x89, 0xE0, 0x28, 0xCA, 0x00,
0x84, 0x00, 0xE0, 0x4D}
}
{
0x10, 0x0000267CUL,
{
0xF0, 0x4D, 0xF0, 0x4D, 0xC0, 0x88, 0xCA, 0x00, 0xD6, 0x27, 0xCA, 0x00,
0xC6, 0x27, 0xBF, 0x88}
}
{
0x10, 0x0000267CUL,
{
0xF0, 0x4D, 0xF0, 0x4D, 0xC0, 0x88, 0xCA, 0x00, 0xD6, 0x27, 0xCA, 0x00,
0xC6, 0x27, 0xBF, 0x88}
}
{
0x04, 0x0000268CUL,
{
0xFC, 0xFD, 0xCB, 0x00}
}
{
0x04, 0x0000268CUL,
{
0xFC, 0xFD, 0xCB, 0x00}
}
{
0x0A, 0x00002690UL,
{
0xD1, 0xA0, 0x6E, 0xCA, 0x6E, 0xC6, 0x6E, 0xC2, 0xCB, 0x00}
}
{
0x0A, 0x00002690UL,
{
0xD1, 0xA0, 0x6E, 0xCA, 0x6E, 0xC6, 0x6E, 0xC2, 0xCB, 0x00}
}
{
0x0A, 0x0000269AUL,
{
0xD1, 0xA0, 0x6F, 0xCA, 0x6F, 0xC6, 0x6F, 0xC2, 0xCB, 0x00}
}
{
0x0A, 0x0000269AUL,
{
0xD1, 0xA0, 0x6F, 0xCA, 0x6F, 0xC6, 0x6F, 0xC2, 0xCB, 0x00}
}
{
0x0E, 0x000026A4UL,
{
0xBB, 0xF5, 0x24, 0x8F, 0x88, 0x10, 0x34, 0x8F, 0x8A, 0x10, 0xBB, 0xF5,
0xCB, 0x00}
}
{
0x0E, 0x000026A4UL,
{
0xBB, 0xF5, 0x24, 0x8F, 0x88, 0x10, 0x34, 0x8F, 0x8A, 0x10, 0xBB, 0xF5,
0xCB, 0x00}
}
{
0x10, 0x000026B2UL,
{
0xF2, 0xF6, 0x86, 0x10, 0xF2, 0xF8, 0x88, 0x10, 0xF2, 0xF9, 0x8A, 0x10,
0xF6, 0xF8, 0x0E, 0xFE}
}
{
0x10, 0x000026B2UL,
{
0xF2, 0xF6, 0x86, 0x10, 0xF2, 0xF8, 0x88, 0x10, 0xF2, 0xF9, 0x8A, 0x10,
0xF6, 0xF8, 0x0E, 0xFE}
}
{
0x10, 0x000026C2UL,
{
0xF6, 0xF9, 0x0C, 0xFE, 0x7B, 0x66, 0xF2, 0xF7, 0x0E, 0xFE, 0x46, 0xF7,
0x63, 0x00, 0xFD, 0x0C}
}
{
0x10, 0x000026C2UL,
{
0xF6, 0xF9, 0x0C, 0xFE, 0x7B, 0x66, 0xF2, 0xF7, 0x0E, 0xFE, 0x46, 0xF7,
0x63, 0x00, 0xFD, 0x0C}
}
{
0x10, 0x000026D2UL,
{
0xE6, 0xF6, 0x64, 0x00, 0xF6, 0xF8, 0x0E, 0xFE, 0xF6, 0xF9, 0x0C, 0xFE,
0x7B, 0x66, 0xF6, 0x07}
}
{
0x10, 0x000026D2UL,
{
0xE6, 0xF6, 0x64, 0x00, 0xF6, 0xF8, 0x0E, 0xFE, 0xF6, 0xF9, 0x0C, 0xFE,
0x7B, 0x66, 0xF6, 0x07}
}
{
0x10, 0x000026E2UL,
{
0x86, 0x10, 0xF7, 0x8E, 0xF0, 0x10, 0x0D, 0x06, 0xF1, 0xAE, 0xE7, 0xF8,
0x64, 0x00, 0x21, 0x8A}
}
{
0x10, 0x000026E2UL,
{
0x86, 0x10, 0xF7, 0x8E, 0xF0, 0x10, 0x0D, 0x06, 0xF1, 0xAE, 0xE7, 0xF8,
0x64, 0x00, 0x21, 0x8A}
}
{
0x0C, 0x000026F2UL,
{
0xF7, 0xF8, 0xF0, 0x10, 0xF6, 0x8E, 0x88, 0x10, 0xF6, 0x8E, 0x8A, 0x10}
}
{
0x0C, 0x000026F2UL,
{
0xF7, 0xF8, 0xF0, 0x10, 0xF6, 0x8E, 0x88, 0x10, 0xF6, 0x8E, 0x8A, 0x10}
}
{
0x02, 0x000026FEUL,
{
0xCB, 0x00}
}
{
0x02, 0x000026FEUL,
{
0xCB, 0x00}
}
{
0x10, 0x00002700UL,
{
0xBE, 0x88, 0xCC, 0x00, 0xC2, 0xF5, 0xCE, 0x10, 0xF6, 0xF9, 0x0E, 0xFE,
0x5B, 0x55, 0xF2, 0xF6}
}
{
0x10, 0x00002700UL,
{
0xBE, 0x88, 0xCC, 0x00, 0xC2, 0xF5, 0xCE, 0x10, 0xF6, 0xF9, 0x0E, 0xFE,
0x5B, 0x55, 0xF2, 0xF6}
}
{
0x10, 0x00002710UL,
{
0x0E, 0xFE, 0x48, 0x60, 0x3D, 0x01, 0x08, 0x61, 0xF0, 0x56, 0x02, 0xF5,
0xCC, 0x10, 0xF0, 0x48}
}
{
0x10, 0x00002710UL,
{
0x0E, 0xFE, 0x48, 0x60, 0x3D, 0x01, 0x08, 0x61, 0xF0, 0x56, 0x02, 0xF5,
0xCC, 0x10, 0xF0, 0x48}
}
{
0x10, 0x00002720UL,
{
0xC0, 0x86, 0xF0, 0x46, 0x5C, 0x14, 0xC4, 0x54, 0x8C, 0x10, 0xE1, 0x1A,
0xE4, 0xA6, 0xCF, 0x10}
}
{
0x10, 0x00002720UL,
{
0xC0, 0x86, 0xF0, 0x46, 0x5C, 0x14, 0xC4, 0x54, 0x8C, 0x10, 0xE1, 0x1A,
0xE4, 0xA6, 0xCF, 0x10}
}
{
0x02, 0x00002730UL,
{
0xBF, 0x88}
}
{
0x02, 0x00002730UL,
{
0xBF, 0x88}
}
{
0x02, 0x00002732UL,
{
0xCB, 0x00}
}
{
0x02, 0x00002732UL,
{
0xCB, 0x00}
}
{
0x04, 0x00002734UL,
{
0xEC, 0xFD, 0xEC, 0xFE}
}
{
0x04, 0x00002734UL,
{
0xEC, 0xFD, 0xEC, 0xFE}
}
{
0x10, 0x00002738UL,
{
0xF2, 0xF5, 0x84, 0x10, 0xC2, 0xF4, 0xCE, 0x10, 0x04, 0xF4, 0x84, 0x10,
0xF0, 0x45, 0x52, 0xF4}
}
{
0x10, 0x00002738UL,
{
0xF2, 0xF5, 0x84, 0x10, 0xC2, 0xF4, 0xCE, 0x10, 0x04, 0xF4, 0x84, 0x10,
0xF0, 0x45, 0x52, 0xF4}
}
{
0x10, 0x00002748UL,
{
0x84, 0x10, 0xF0, 0x54, 0x62, 0xF5, 0x84, 0x10, 0xF0, 0x85, 0xCA, 0x00,
0x7C, 0x00, 0xC0, 0x88}
}
{
0x10, 0x00002748UL,
{
0x84, 0x10, 0xF0, 0x54, 0x62, 0xF5, 0x84, 0x10, 0xF0, 0x85, 0xCA, 0x00,
0x7C, 0x00, 0xC0, 0x88}
}
{
0x10, 0x00002758UL,
{
0xCA, 0x00, 0xD4, 0x16, 0x24, 0x8F, 0xCC, 0x10, 0xE0, 0x0D, 0xE6, 0xFE,
0xCF, 0x10, 0x0D, 0x02}
}
{
0x10, 0x00002758UL,
{
0xCA, 0x00, 0xD4, 0x16, 0x24, 0x8F, 0xCC, 0x10, 0xE0, 0x0D, 0xE6, 0xFE,
0xCF, 0x10, 0x0D, 0x02}
}
{
0x10, 0x00002768UL,
{
0x08, 0xD1, 0xF0, 0x4D, 0x99, 0x8E, 0x49, 0x81, 0x3D, 0xFB, 0xF0, 0x4D,
0x43, 0xF8, 0x5E, 0x11}
}
{
0x10, 0x00002768UL,
{
0x08, 0xD1, 0xF0, 0x4D, 0x99, 0x8E, 0x49, 0x81, 0x3D, 0xFB, 0xF0, 0x4D,
0x43, 0xF8, 0x5E, 0x11}
}
{
0x10, 0x00002778UL,
{
0x9D, 0x14, 0xF0, 0x4D, 0xC0, 0x84, 0x5C, 0x14, 0xD4, 0x44, 0x8C, 0x10,
0x42, 0xF4, 0xCC, 0x10}
}
{
0x10, 0x00002778UL,
{
0x9D, 0x14, 0xF0, 0x4D, 0xC0, 0x84, 0x5C, 0x14, 0xD4, 0x44, 0x8C, 0x10,
0x42, 0xF4, 0xCC, 0x10}
}
{
0x10, 0x00002788UL,
{
0x3D, 0x09, 0xE1, 0x0A, 0xF0, 0x4D, 0xC0, 0x84, 0xE4, 0xA4, 0xCF, 0x10,
0xF0, 0x4D, 0xC0, 0x88}
}
{
0x10, 0x00002788UL,
{
0x3D, 0x09, 0xE1, 0x0A, 0xF0, 0x4D, 0xC0, 0x84, 0xE4, 0xA4, 0xCF, 0x10,
0xF0, 0x4D, 0xC0, 0x88}
}
{
0x0A, 0x00002798UL,
{
0xCA, 0x00, 0x38, 0x23, 0x08, 0xD1, 0xF0, 0x4D, 0x0D, 0xE2}
}
{
0x0A, 0x00002798UL,
{
0xCA, 0x00, 0x38, 0x23, 0x08, 0xD1, 0xF0, 0x4D, 0x0D, 0xE2}
}
{
0x06, 0x000027A2UL,
{
0xFC, 0xFE, 0xFC, 0xFD, 0xCB, 0x00}
}
{
0x06, 0x000027A2UL,
{
0xFC, 0xFE, 0xFC, 0xFD, 0xCB, 0x00}
}
{
0x02, 0x00000084UL,
{
0xCB, 0x00}
}
{
0x02, 0x00000084UL,
{
0xCB, 0x00}
}
{
0x10, 0x000027A8UL,
{
0xE6, 0x8A, 0xAF, 0x04, 0xE6, 0x0D, 0x02, 0x20, 0xE6, 0x8B, 0xAF, 0x04,
0xE6, 0x0E, 0x40, 0x20}
}
{
0x10, 0x000027A8UL,
{
0xE6, 0x8A, 0xAF, 0x04, 0xE6, 0x0D, 0x02, 0x20, 0xE6, 0x8B, 0xAF, 0x04,
0xE6, 0x0E, 0x40, 0x20}
}
{
0x0E, 0x000027B8UL,
{
0xE6, 0x8C, 0x5F, 0x04, 0xE6, 0x0F, 0x08, 0x10, 0xE6, 0x8D, 0xAF, 0x04,
0xCB, 0x00}
}
{
0x0E, 0x000027B8UL,
{
0xE6, 0x8C, 0x5F, 0x04, 0xE6, 0x0F, 0x08, 0x10, 0xE6, 0x8D, 0xAF, 0x04,
0xCB, 0x00}
}
{
0x10, 0x000027C6UL,
{
0xD1, 0xA0, 0xE6, 0xCA, 0x44, 0x00, 0xE6, 0xC6, 0x48, 0x00, 0xE6, 0xC2,
0x4C, 0x00, 0xCB, 0x00}
}
{
0x10, 0x000027C6UL,
{
0xD1, 0xA0, 0xE6, 0xCA, 0x44, 0x00, 0xE6, 0xC6, 0x48, 0x00, 0xE6, 0xC2,
0x4C, 0x00, 0xCB, 0x00}
}
{
0x10, 0x000027D6UL,
{
0xE6, 0xA2, 0x80, 0x00, 0xF0, 0x48, 0xC0, 0x85, 0xE6, 0xF4, 0xC4, 0x09,
0x0B, 0x54, 0xF2, 0xF4}
}
{
0x10, 0x000027D6UL,
{
0xE6, 0xA2, 0x80, 0x00, 0xF0, 0x48, 0xC0, 0x85, 0xE6, 0xF4, 0xC4, 0x09,
0x0B, 0x54, 0xF2, 0xF4}
}
{
0x10, 0x000027E6UL,
{
0x0E, 0xFE, 0x28, 0x41, 0xF6, 0xF4, 0x10, 0xFD, 0xF2, 0x22, 0x10, 0xFD,
0xE6, 0xB2, 0x58, 0x00}
}
{
0x10, 0x000027E6UL,
{
0x0E, 0xFE, 0x28, 0x41, 0xF6, 0xF4, 0x10, 0xFD, 0xF2, 0x22, 0x10, 0xFD,
0xE6, 0xB2, 0x58, 0x00}
}
{
0x04, 0x000027F6UL,
{
0x6F, 0xA2, 0xCB, 0x00}
}
{
0x04, 0x000027F6UL,
{
0x6F, 0xA2, 0xCB, 0x00}
}
{
0x10, 0x000027FAUL,
{
0xE6, 0xA1, 0x80, 0x00, 0xE6, 0xA0, 0x27, 0x00, 0xF0, 0x48, 0xC0, 0x85,
0xE6, 0xF4, 0xC4, 0x09}
}
{
0x10, 0x000027FAUL,
{
0xE6, 0xA1, 0x80, 0x00, 0xE6, 0xA0, 0x27, 0x00, 0xF0, 0x48, 0xC0, 0x85,
0xE6, 0xF4, 0xC4, 0x09}
}
{
0x10, 0x0000280AUL,
{
0xF6, 0xF4, 0x0E, 0xFE, 0x4B, 0x55, 0xF2, 0xF4, 0x0E, 0xFE, 0x28, 0x41,
0xF6, 0xF4, 0x40, 0xFE}
}
{
0x10, 0x0000280AUL,
{
0xF6, 0xF4, 0x0E, 0xFE, 0x4B, 0x55, 0xF2, 0xF4, 0x0E, 0xFE, 0x28, 0x41,
0xF6, 0xF4, 0x40, 0xFE}
}
{
0x10, 0x0000281AUL,
{
0xE6, 0xB1, 0x70, 0x00, 0xF6, 0x8E, 0x0C, 0xFD, 0xF6, 0x8E, 0x0E, 0xFD,
0x6F, 0xA1, 0xCB, 0x00}
}
{
0x10, 0x0000281AUL,
{
0xE6, 0xB1, 0x70, 0x00, 0xF6, 0x8E, 0x0C, 0xFD, 0xF6, 0x8E, 0x0E, 0xFD,
0x6F, 0xA1, 0xCB, 0x00}
}
{
0x10, 0x0000282AUL,
{
0xBE, 0x88, 0xCC, 0x00, 0xF2, 0xF6, 0x0C, 0xFD, 0xF2, 0xF7, 0x0E, 0xFD,
0xBF, 0x88, 0xF0, 0x46}
}
{
0x10, 0x0000282AUL,
{
0xBE, 0x88, 0xCC, 0x00, 0xF2, 0xF6, 0x0C, 0xFD, 0xF2, 0xF7, 0x0E, 0xFD,
0xBF, 0x88, 0xF0, 0x46}
}
{
0x02, 0x0000283AUL,
{
0xF0, 0x57}
}
{
0x02, 0x0000283AUL,
{
0xF0, 0x57}
}
{
0x02, 0x0000283CUL,
{
0xCB, 0x00}
}
{
0x02, 0x0000283CUL,
{
0xCB, 0x00}
}
{
0x06, 0x0000283EUL,
{
0xF2, 0xF4, 0x0C, 0xFD, 0xCB, 0x00}
}
{
0x06, 0x0000283EUL,
{
0xF2, 0xF4, 0x0C, 0xFD, 0xCB, 0x00}
}
{
0x10, 0x00002844UL,
{
0xBE, 0x88, 0xCC, 0x00, 0xF6, 0xF8, 0x0C, 0xFD, 0xF6, 0xF9, 0x0E, 0xFD,
0xBF, 0x88, 0xCB, 0x00}
}
{
0x10, 0x00002844UL,
{
0xBE, 0x88, 0xCC, 0x00, 0xF6, 0xF8, 0x0C, 0xFD, 0xF6, 0xF9, 0x0E, 0xFD,
0xBF, 0x88, 0xCB, 0x00}
}
{
0x10, 0x00002854UL,
{
0xC6, 0x03, 0x03, 0x00, 0xCC, 0x00, 0xF6, 0xF0, 0x40, 0xFC, 0xC6, 0x08,
0x40, 0xFC, 0xCC, 0x00}
}
{
0x10, 0x00002854UL,
{
0xC6, 0x03, 0x03, 0x00, 0xCC, 0x00, 0xF6, 0xF0, 0x40, 0xFC, 0xC6, 0x08,
0x40, 0xFC, 0xCC, 0x00}
}
{
0x10, 0x00002864UL,
{
0xEC, 0x00, 0xC6, 0x87, 0x10, 0x00, 0xEC, 0x06, 0xEC, 0x07, 0xCA, 0x00,
0x08, 0x25, 0xFC, 0x07}
}
{
0x10, 0x00002864UL,
{
0xEC, 0x00, 0xC6, 0x87, 0x10, 0x00, 0xEC, 0x06, 0xEC, 0x07, 0xCA, 0x00,
0x08, 0x25, 0xFC, 0x07}
}
{
0x0C, 0x00002874UL,
{
0xFC, 0x06, 0xFC, 0x87, 0xFC, 0x00, 0xFC, 0x08, 0xFC, 0x03, 0xFB, 0x88}
}
{
0x0C, 0x00002874UL,
{
0xFC, 0x06, 0xFC, 0x87, 0xFC, 0x00, 0xFC, 0x08, 0xFC, 0x03, 0xFB, 0x88}
}
{
0x10, 0x00002880UL,
{
0xC6, 0x03, 0x03, 0x00, 0xCC, 0x00, 0xF6, 0xF0, 0x60, 0xFC, 0xC6, 0x08,
0x60, 0xFC, 0xCC, 0x00}
}
{
0x10, 0x00002880UL,
{
0xC6, 0x03, 0x03, 0x00, 0xCC, 0x00, 0xF6, 0xF0, 0x60, 0xFC, 0xC6, 0x08,
0x60, 0xFC, 0xCC, 0x00}
}
{
0x10, 0x00002890UL,
{
0xEC, 0x00, 0xC6, 0x87, 0x10, 0x00, 0xEC, 0x06, 0xEC, 0x07, 0xCA, 0x00,
0xE4, 0x24, 0xFC, 0x07}
}
{
0x10, 0x00002890UL,
{
0xEC, 0x00, 0xC6, 0x87, 0x10, 0x00, 0xEC, 0x06, 0xEC, 0x07, 0xCA, 0x00,
0xE4, 0x24, 0xFC, 0x07}
}
{
0x0C, 0x000028A0UL,
{
0xFC, 0x06, 0xFC, 0x87, 0xFC, 0x00, 0xFC, 0x08, 0xFC, 0x03, 0xFB, 0x88}
}
{
0x0C, 0x000028A0UL,
{
0xFC, 0x06, 0xFC, 0x87, 0xFC, 0x00, 0xFC, 0x08, 0xFC, 0x03, 0xFB, 0x88}
}
{
0x10, 0x000028ACUL,
{
0xC6, 0x03, 0x03, 0x00, 0xCC, 0x00, 0xF6, 0xF0, 0x80, 0xFC, 0xC6, 0x08,
0x80, 0xFC, 0xCC, 0x00}
}
{
0x10, 0x000028ACUL,
{
0xC6, 0x03, 0x03, 0x00, 0xCC, 0x00, 0xF6, 0xF0, 0x80, 0xFC, 0xC6, 0x08,
0x80, 0xFC, 0xCC, 0x00}
}
{
0x10, 0x000028BCUL,
{
0xEC, 0x00, 0xC6, 0x87, 0x10, 0x00, 0xEC, 0x06, 0xEC, 0x07, 0xCA, 0x00,
0xCE, 0x24, 0xFC, 0x07}
}
{
0x10, 0x000028BCUL,
{
0xEC, 0x00, 0xC6, 0x87, 0x10, 0x00, 0xEC, 0x06, 0xEC, 0x07, 0xCA, 0x00,
0xCE, 0x24, 0xFC, 0x07}
}
{
0x0C, 0x000028CCUL,
{
0xFC, 0x06, 0xFC, 0x87, 0xFC, 0x00, 0xFC, 0x08, 0xFC, 0x03, 0xFB, 0x88}
}
{
0x0C, 0x000028CCUL,
{
0xFC, 0x06, 0xFC, 0x87, 0xFC, 0x00, 0xFC, 0x08, 0xFC, 0x03, 0xFB, 0x88}
}
{
0x10, 0x000028D8UL,
{
0xC6, 0x03, 0x03, 0x00, 0xCC, 0x00, 0xF6, 0xF0, 0xA0, 0xFC, 0xC6, 0x08,
0xA0, 0xFC, 0xCC, 0x00}
}
{
0x10, 0x000028D8UL,
{
0xC6, 0x03, 0x03, 0x00, 0xCC, 0x00, 0xF6, 0xF0, 0xA0, 0xFC, 0xC6, 0x08,
0xA0, 0xFC, 0xCC, 0x00}
}
{
0x10, 0x000028E8UL,
{
0xEC, 0x00, 0xC6, 0x87, 0x10, 0x00, 0xEC, 0x06, 0xEC, 0x07, 0xD1, 0x00,
0x02, 0x22, 0x10, 0xFD}
}
{
0x10, 0x000028E8UL,
{
0xEC, 0x00, 0xC6, 0x87, 0x10, 0x00, 0xEC, 0x06, 0xEC, 0x07, 0xD1, 0x00,
0x02, 0x22, 0x10, 0xFD}
}
{
0x10, 0x000028F8UL,
{
0xCA, 0x00, 0x34, 0x27, 0xFC, 0x07, 0xFC, 0x06, 0xFC, 0x87, 0xFC, 0x00,
0xFC, 0x08, 0xFC, 0x03}
}
{
0x10, 0x000028F8UL,
{
0xCA, 0x00, 0x34, 0x27, 0xFC, 0x07, 0xFC, 0x06, 0xFC, 0x87, 0xFC, 0x00,
0xFC, 0x08, 0xFC, 0x03}
}
{
0x02, 0x00002908UL,
{
0xFB, 0x88}
}
{
0x02, 0x00002908UL,
{
0xFB, 0x88}
}
{
0x10, 0x0000290AUL,
{
0xC6, 0x03, 0x03, 0x00, 0x24, 0x8F, 0x0C, 0xFD, 0x34, 0x8F, 0x0E, 0xFD,
0xFC, 0x03, 0xFB, 0x88}
}
{
0x10, 0x0000290AUL,
{
0xC6, 0x03, 0x03, 0x00, 0x24, 0x8F, 0x0C, 0xFD, 0x34, 0x8F, 0x0E, 0xFD,
0xFC, 0x03, 0xFB, 0x88}
}
{
0x08, 0x0000007CUL,
{
0x2B, 0x88, 0xE0, 0xF4, 0x20, 0x48, 0xCB, 0x00}
}
{
0x08, 0x0000007CUL,
{
0x2B, 0x88, 0xE0, 0xF4, 0x20, 0x48, 0xCB, 0x00}
}
{
0x10, 0x00002BF2UL,
{
0xA5, 0x5A, 0xA5, 0xA5, 0x0A, 0x86, 0x3F, 0x2E, 0x1A, 0x86, 0x00, 0xD2,
0x1A, 0x89, 0x00, 0xFB}
}
{
0x10, 0x00002BF2UL,
{
0xA5, 0x5A, 0xA5, 0xA5, 0x0A, 0x86, 0x3F, 0x2E, 0x1A, 0x86, 0x00, 0xD2,
0x1A, 0x89, 0x00, 0xFB}
}
{
0x10, 0x00002C02UL,
{
0x0A, 0x89, 0x6F, 0x00, 0xE6, 0x0A, 0x0C, 0xFA, 0xE6, 0x00, 0x04, 0x00,
0xE6, 0x01, 0x05, 0x00}
}
{
0x10, 0x00002C02UL,
{
0x0A, 0x89, 0x6F, 0x00, 0xE6, 0x0A, 0x0C, 0xFA, 0xE6, 0x00, 0x04, 0x00,
0xE6, 0x01, 0x05, 0x00}
}
{
0x10, 0x00002C12UL,
{
0xE6, 0x02, 0x06, 0x00, 0xE6, 0x08, 0xC0, 0xFC, 0xB5, 0x4A, 0xB5, 0xB5,
0xE6, 0xF0, 0x00, 0x10}
}
{
0x10, 0x00002C12UL,
{
0xE6, 0x02, 0x06, 0x00, 0xE6, 0x08, 0xC0, 0xFC, 0xB5, 0x4A, 0xB5, 0xB5,
0xE6, 0xF0, 0x00, 0x10}
}
{
0x10, 0x00002C22UL,
{
0xE6, 0xF9, 0x00, 0x00, 0xE6, 0xF8, 0x10, 0x2D, 0xF0, 0x18, 0x70, 0x19,
0x2D, 0x29, 0xE0, 0x05}
}
{
0x10, 0x00002C22UL,
{
0xE6, 0xF9, 0x00, 0x00, 0xE6, 0xF8, 0x10, 0x2D, 0xF0, 0x18, 0x70, 0x19,
0x2D, 0x29, 0xE0, 0x05}
}
{
0x10, 0x00002C32UL,
{
0xDC, 0x09, 0x98, 0x28, 0x2D, 0x25, 0xF0, 0x32, 0xDC, 0x09, 0x98, 0x48,
0xAA, 0xF2, 0x1B, 0xE0}
}
{
0x10, 0x00002C32UL,
{
0xDC, 0x09, 0x98, 0x28, 0x2D, 0x25, 0xF0, 0x32, 0xDC, 0x09, 0x98, 0x48,
0xAA, 0xF2, 0x1B, 0xE0}
}
{
0x10, 0x00002C42UL,
{
0xAA, 0xF2, 0x0E, 0xF0, 0xF0, 0x34, 0x7C, 0x33, 0x0E, 0xF3, 0x06, 0xF3,
0x00, 0xFD, 0xE0, 0x15}
}
{
0x10, 0x00002C42UL,
{
0xAA, 0xF2, 0x0E, 0xF0, 0xF0, 0x34, 0x7C, 0x33, 0x0E, 0xF3, 0x06, 0xF3,
0x00, 0xFD, 0xE0, 0x15}
}
{
0x10, 0x00002C52UL,
{
0x4C, 0x54, 0x91, 0x50, 0x68, 0x5B, 0xB8, 0x53, 0x08, 0x41, 0x28, 0x21,
0x3D, 0xF3, 0x0D, 0xE7}
}
{
0x10, 0x00002C52UL,
{
0x4C, 0x54, 0x91, 0x50, 0x68, 0x5B, 0xB8, 0x53, 0x08, 0x41, 0x28, 0x21,
0x3D, 0xF3, 0x0D, 0xE7}
}
{
0x10, 0x00002C62UL,
{
0xDC, 0x09, 0x98, 0x38, 0xDC, 0x44, 0xB9, 0xA3, 0x08, 0x31, 0x18, 0x40,
0x76, 0xF3, 0x00, 0xC0}
}
{
0x10, 0x00002C62UL,
{
0xDC, 0x09, 0x98, 0x38, 0xDC, 0x44, 0xB9, 0xA3, 0x08, 0x31, 0x18, 0x40,
0x76, 0xF3, 0x00, 0xC0}
}
{
0x10, 0x00002C72UL,
{
0x28, 0x21, 0x7D, 0xF8, 0x0D, 0xDC, 0xB9, 0xA4, 0x08, 0x41, 0x28, 0x21,
0x7D, 0xFC, 0x0D, 0xD7}
}
{
0x10, 0x00002C72UL,
{
0x28, 0x21, 0x7D, 0xF8, 0x0D, 0xDC, 0xB9, 0xA4, 0x08, 0x41, 0x28, 0x21,
0x7D, 0xFC, 0x0D, 0xD7}
}
{
0x10, 0x00002C82UL,
{
0xE6, 0xF9, 0x00, 0x00, 0xE6, 0xF8, 0x00, 0x2B, 0xE6, 0x03, 0x03, 0x00,
0xDC, 0x09, 0xA8, 0x28}
}
{
0x10, 0x00002C82UL,
{
0xE6, 0xF9, 0x00, 0x00, 0xE6, 0xF8, 0x00, 0x2B, 0xE6, 0x03, 0x03, 0x00,
0xDC, 0x09, 0xA8, 0x28}
}
{
0x10, 0x00002C92UL,
{
0x2D, 0x3C, 0x08, 0x82, 0x18, 0x90, 0xAA, 0xF2, 0x29, 0xF0, 0xF0, 0x42,
0x66, 0xF2, 0xFF, 0x3F}
}
{
0x10, 0x00002C92UL,
{
0x2D, 0x3C, 0x08, 0x82, 0x18, 0x90, 0xAA, 0xF2, 0x29, 0xF0, 0xF0, 0x42,
0x66, 0xF2, 0xFF, 0x3F}
}
{
0x10, 0x00002CA2UL,
{
0x3D, 0x05, 0xE0, 0x04, 0xDC, 0x09, 0xA8, 0x28, 0x08, 0x82, 0x18, 0x90,
0xDC, 0x09, 0xA8, 0x38}
}
{
0x10, 0x00002CA2UL,
{
0x3D, 0x05, 0xE0, 0x04, 0xDC, 0x09, 0xA8, 0x28, 0x08, 0x82, 0x18, 0x90,
0xDC, 0x09, 0xA8, 0x38}
}
{
0x10, 0x00002CB2UL,
{
0x08, 0x82, 0x18, 0x90, 0x8A, 0xF4, 0x06, 0xE0, 0xF6, 0xF3, 0x06, 0xFE,
0xDC, 0x09, 0xA8, 0x38}
}
{
0x10, 0x00002CB2UL,
{
0x08, 0x82, 0x18, 0x90, 0x8A, 0xF4, 0x06, 0xE0, 0xF6, 0xF3, 0x06, 0xFE,
0xDC, 0x09, 0xA8, 0x38}
}
{
0x10, 0x00002CC2UL,
{
0x08, 0x82, 0x18, 0x90, 0xDC, 0x09, 0xA9, 0xA8, 0x08, 0x81, 0x18, 0x90,
0xB9, 0xA3, 0x08, 0x31}
}
{
0x10, 0x00002CC2UL,
{
0x08, 0x82, 0x18, 0x90, 0xDC, 0x09, 0xA9, 0xA8, 0x08, 0x81, 0x18, 0x90,
0xB9, 0xA3, 0x08, 0x31}
}
{
0x10, 0x00002CD2UL,
{
0x8A, 0xF4, 0x06, 0xE0, 0x8A, 0xF3, 0x04, 0xE0, 0x06, 0x03, 0x01, 0x00,
0x76, 0xF3, 0x00, 0xC0}
}
{
0x10, 0x00002CD2UL,
{
0x8A, 0xF4, 0x06, 0xE0, 0x8A, 0xF3, 0x04, 0xE0, 0x06, 0x03, 0x01, 0x00,
0x76, 0xF3, 0x00, 0xC0}
}
{
0x10, 0x00002CE2UL,
{
0x28, 0x21, 0x3D, 0xF0, 0x9A, 0xF8, 0xD0, 0x00, 0x08, 0x81, 0x0D, 0xCE,
0xC0, 0x43, 0x5C, 0x13}
}
{
0x10, 0x00002CE2UL,
{
0x28, 0x21, 0x3D, 0xF0, 0x9A, 0xF8, 0xD0, 0x00, 0x08, 0x81, 0x0D, 0xCE,
0xC0, 0x43, 0x5C, 0x13}
}
{
0x10, 0x00002CF2UL,
{
0x76, 0xF3, 0x00, 0xFD, 0xE0, 0x14, 0xF1, 0xA5, 0x4C, 0x45, 0x8A, 0xF2,
0x03, 0x70, 0x91, 0x40}
}
{
0x10, 0x00002CF2UL,
{
0x76, 0xF3, 0x00, 0xFD, 0xE0, 0x14, 0xF1, 0xA5, 0x4C, 0x45, 0x8A, 0xF2,
0x03, 0x70, 0x91, 0x40}
}
{
0x0E, 0x00002D02UL,
{
0x68, 0x4B, 0x0D, 0x01, 0x78, 0x4B, 0xB8, 0x43, 0x0D, 0xBF, 0xFA, 0x00,
0x44, 0x1D}
}
{
0x0E, 0x00002D02UL,
{
0x68, 0x4B, 0x0D, 0x01, 0x78, 0x4B, 0xB8, 0x43, 0x0D, 0xBF, 0xFA, 0x00,
0x44, 0x1D}
}
{
0x0E, 0x00000054UL,
{
0xDC, 0x03, 0xA8, 0x42, 0x08, 0x22, 0x18, 0x30, 0xDC, 0x03, 0xA8, 0x52,
0xCB, 0x00}
}
{
0x0E, 0x00000054UL,
{
0xDC, 0x03, 0xA8, 0x42, 0x08, 0x22, 0x18, 0x30, 0xDC, 0x03, 0xA8, 0x52,
0xCB, 0x00}
}
{
0x0E, 0x00000062UL,
{
0xDC, 0x03, 0xB8, 0x42, 0x08, 0x22, 0x18, 0x30, 0xDC, 0x03, 0xB8, 0x52,
0xCB, 0x00}
}
{
0x0E, 0x00000062UL,
{
0xDC, 0x03, 0xB8, 0x42, 0x08, 0x22, 0x18, 0x30, 0xDC, 0x03, 0xB8, 0x52,
0xCB, 0x00}
}
{
0x10, 0x00000094UL,
{
0xF0, 0x28, 0xF0, 0x39, 0x0D, 0x05, 0x28, 0xB1, 0xF0, 0x6A, 0xDC, 0x49,
0xB9, 0xC8, 0x08, 0x81}
}
{
0x10, 0x00000094UL,
{
0xF0, 0x28, 0xF0, 0x39, 0x0D, 0x05, 0x28, 0xB1, 0xF0, 0x6A, 0xDC, 0x49,
0xB9, 0xC8, 0x08, 0x81}
}
{
0x0A, 0x000000A4UL,
{
0x48, 0xB0, 0x3D, 0xF9, 0xF0, 0x42, 0xF0, 0x53, 0xCB, 0x00}
}
{
0x0A, 0x000000A4UL,
{
0x48, 0xB0, 0x3D, 0xF9, 0xF0, 0x42, 0xF0, 0x53, 0xCB, 0x00}
}
{
0x10, 0x00000036UL,
{
0xEC, 0xFD, 0xF0, 0xD8, 0x0D, 0x04, 0x99, 0x8D, 0xD0, 0x88, 0xCA, 0x00,
0x04, 0x00, 0xA9, 0x8D}
}
{
0x10, 0x00000036UL,
{
0xEC, 0xFD, 0xF0, 0xD8, 0x0D, 0x04, 0x99, 0x8D, 0xD0, 0x88, 0xCA, 0x00,
0x04, 0x00, 0xA9, 0x8D}
}
{
0x0E, 0x00000046UL,
{
0x3D, 0xFA, 0xE0, 0xA8, 0xCA, 0x00, 0x04, 0x00, 0xE0, 0x04, 0xFC, 0xFD,
0xCB, 0x00}
}
{
0x0E, 0x00000046UL,
{
0x3D, 0xFA, 0xE0, 0xA8, 0xCA, 0x00, 0x04, 0x00, 0xE0, 0x04, 0xFC, 0xFD,
0xCB, 0x00}
}
{
0x02, 0x00002BF0UL,
{
0x00, 0x00}
}
{
0x02, 0x00002BF0UL,
{
0x00, 0x00}
}
{
0x10, 0x00000004UL,
{
0x46, 0xF8, 0x0A, 0x00, 0x3D, 0x03, 0xE0, 0xD8, 0xBB, 0x01, 0xE0, 0xA8,
0x9A, 0xB7, 0x0A, 0x70}
}
{
0x10, 0x00000004UL,
{
0x46, 0xF8, 0x0A, 0x00, 0x3D, 0x03, 0xE0, 0xD8, 0xBB, 0x01, 0xE0, 0xA8,
0x9A, 0xB7, 0x0A, 0x70}
}
{
0x10, 0x00000014UL,
{
0x46, 0x59, 0x13, 0x00, 0x3D, 0x07, 0x7E, 0xB7, 0x9A, 0xB7, 0xFE, 0x70,
0x46, 0x59, 0x11, 0x00}
}
{
0x10, 0x00000014UL,
{
0x46, 0x59, 0x13, 0x00, 0x3D, 0x07, 0x7E, 0xB7, 0x9A, 0xB7, 0xFE, 0x70,
0x46, 0x59, 0x11, 0x00}
}
{
0x10, 0x00000024UL,
{
0x3D, 0xFA, 0x7E, 0xB7, 0x9A, 0xB6, 0xFE, 0x70, 0x7E, 0xB6, 0xF6, 0xF8,
0xB0, 0xFE, 0xF0, 0x48}
}
{
0x10, 0x00000024UL,
{
0x3D, 0xFA, 0x7E, 0xB7, 0x9A, 0xB6, 0xFE, 0x70, 0x7E, 0xB6, 0xF6, 0xF8,
0xB0, 0xFE, 0xF0, 0x48}
}
{
0x02, 0x00000034UL,
{
0xCB, 0x00}
}
{
0x02, 0x00000034UL,
{
0xCB, 0x00}
}
{
0x06, 0x00002D10UL,
{
0x82, 0x80, 0x04, 0x00, 0x00, 0xD0}
}
{
0x06, 0x00002D10UL,
{
0x82, 0x80, 0x04, 0x00, 0x00, 0xD0}
}
{
0x04, 0x00002D16UL,
{
0x03, 0x40, 0x12, 0xFD}
}
{
0x04, 0x00002D16UL,
{
0x03, 0x40, 0x12, 0xFD}
}
{
0x04, 0x00002D1AUL,
{
0x01, 0x00, 0x40, 0x00}
}
{
0x04, 0x00002D1AUL,
{
0x01, 0x00, 0x40, 0x00}
}
{
0x06, 0x00002D1EUL,
{
0x04, 0x80, 0x04, 0x00, 0x5A, 0xD1}
}
{
0x06, 0x00002D1EUL,
{
0x04, 0x80, 0x04, 0x00, 0x5A, 0xD1}
}
{
0x04, 0x00002D24UL,
{
0x07, 0x40, 0x00, 0xFD}
}
{
0x04, 0x00002D24UL,
{
0x07, 0x40, 0x00, 0xFD}
}
{
0x04, 0x00002D28UL,
{
0x0A, 0x00, 0x41, 0x00}
}
{
0x04, 0x00002D28UL,
{
0x0A, 0x00, 0x41, 0x00}
}
{
0x06, 0x00002D2CUL,
{
0x1F, 0x80, 0x04, 0x00, 0x32, 0xD1}
}
{
0x06, 0x00002D2CUL,
{
0x1F, 0x80, 0x04, 0x00, 0x32, 0xD1}
}
{
0x06, 0x00002D32UL,
{
0x3F, 0x80, 0x04, 0x00, 0xF2, 0xD0}
}
{
0x06, 0x00002D32UL,
{
0x3F, 0x80, 0x04, 0x00, 0xF2, 0xD0}
}
{
0x10, 0x00002D38UL,
{
0xFF, 0xBF, 0x08, 0x00, 0x00, 0xC0, 0xFF, 0xBF, 0x09, 0x00, 0x00, 0xC0,
0xFF, 0xBF, 0x0A, 0x00}
}
{
0x10, 0x00002D38UL,
{
0xFF, 0xBF, 0x08, 0x00, 0x00, 0xC0, 0xFF, 0xBF, 0x09, 0x00, 0x00, 0xC0,
0xFF, 0xBF, 0x0A, 0x00}
}
{
0x10, 0x00002D48UL,
{
0x00, 0xC0, 0xFF, 0xBF, 0x0B, 0x00, 0x00, 0xC0, 0xFF, 0xBF, 0x0C, 0x00,
0x00, 0xC0, 0xFF, 0xBF}
}
{
0x10, 0x00002D48UL,
{
0x00, 0xC0, 0xFF, 0xBF, 0x0B, 0x00, 0x00, 0xC0, 0xFF, 0xBF, 0x0C, 0x00,
0x00, 0xC0, 0xFF, 0xBF}
}
{
0x10, 0x00002D58UL,
{
0x0D, 0x00, 0x00, 0xC0, 0xFF, 0xBF, 0x0E, 0x00, 0x00, 0xC0, 0x3F, 0xBA,
0x0F, 0x00, 0x00, 0xC0}
}
{
0x10, 0x00002D58UL,
{
0x0D, 0x00, 0x00, 0xC0, 0xFF, 0xBF, 0x0E, 0x00, 0x00, 0xC0, 0x3F, 0xBA,
0x0F, 0x00, 0x00, 0xC0}
}
{
0x04, 0x00002D68UL,
{
0x14, 0x40, 0xE0, 0xFC}
}
{
0x04, 0x00002D68UL,
{
0x14, 0x40, 0xE0, 0xFC}
}
{
0x04, 0x00002D6CUL,
{
0x02, 0x00, 0x4B, 0x00}
}
{
0x04, 0x00002D6CUL,
{
0x02, 0x00, 0x4B, 0x00}
}
{
0x06, 0x00002D70UL,
{
0x07, 0x80, 0x04, 0x00, 0x52, 0xD1}
}
{
0x06, 0x00002D70UL,
{
0x07, 0x80, 0x04, 0x00, 0x52, 0xD1}
}
{
0x04, 0x00002D76UL,
{
0x09, 0x40, 0xF6, 0xFC}
}
{
0x04, 0x00002D76UL,
{
0x09, 0x40, 0xF6, 0xFC}
}
{
0x04, 0x00002D7AUL,
{
0x05, 0x00, 0x4D, 0x00}
}
{
0x04, 0x00002D7AUL,
{
0x05, 0x00, 0x4D, 0x00}
}
{
0x06, 0x00002D7EUL,
{
0x6C, 0x80, 0x04, 0x00, 0x84, 0xD0}
}
{
0x06, 0x00002D7EUL,
{
0x6C, 0x80, 0x04, 0x00, 0x84, 0xD0}
}
{
0x04, 0x00002D84UL,
{
0x05, 0x40, 0x0C, 0xFD}
}
{
0x04, 0x00002D84UL,
{
0x05, 0x40, 0x0C, 0xFD}
}
{
0x02, 0x00002D88UL,
{
0x00, 0x00}
}
{
0x02, 0x00002D88UL,
{
0x00, 0x00}
}
{
0x04, 0x00000000UL,
{
0xFA, 0x00, 0xF2, 0x2B}
}
{
0x04, 0x00000000UL,
{
0xFA, 0x00, 0xF2, 0x2B}
}
{
0x04, 0x00000070UL,
{
0xFA, 0x00, 0x94, 0x0D}
}
{
0x04, 0x00000070UL,
{
0xFA, 0x00, 0x94, 0x0D}
}
{
0x04, 0x00000074UL,
{
0xFA, 0x00, 0x6E, 0x0F}
}
{
0x04, 0x00000074UL,
{
0xFA, 0x00, 0x6E, 0x0F}
}
{
0x04, 0x00000078UL,
{
0xFA, 0x00, 0xE8, 0x21}
}
{
0x04, 0x00000078UL,
{
0xFA, 0x00, 0xE8, 0x21}
}
{
0x04, 0x0000008CUL,
{
0xFA, 0x00, 0x0A, 0x29}
}
{
0x04, 0x0000008CUL,
{
0xFA, 0x00, 0x0A, 0x29}
}
{
0x04, 0x00000090UL,
{
0xFA, 0x00, 0xD8, 0x28}
}
{
0x04, 0x00000090UL,
{
0xFA, 0x00, 0xD8, 0x28}
}
{
0x04, 0x00000110UL,
{
0xFA, 0x00, 0x54, 0x28}
}
{
0x04, 0x00000110UL,
{
0xFA, 0x00, 0x54, 0x28}
}
{
0x04, 0x00000114UL,
{
0xFA, 0x00, 0x80, 0x28}
}
{
0x04, 0x00000114UL,
{
0xFA, 0x00, 0x80, 0x28}
}
{
0x04, 0x00000118UL,
{
0xFA, 0x00, 0xAC, 0x28}
}
{
0x04, 0x00000118UL,
{
0xFA, 0x00, 0xAC, 0x28}
}
-You need to know the following:
-" RX1 is connected to ground.
-" TX1 is not connected.
-" CLKO is not connected.
-" Setting the OCR register to 0xDA is a good idea.
- This means normal output mode , push-pull and the correct polarity.
-" In the CDR register, you should set CBP to 1.
+You need to know the following:
+" RX1 is connected to ground.
+" TX1 is not connected.
+" CLKO is not connected.
+" Setting the OCR register to 0xDA is a good idea.
+ This means normal output mode , push-pull and the correct polarity.
+" In the CDR register, you should set CBP to 1.
You will probably also want to set the clock divider value to 0 (meaning divide-by-2),
the Pelican bit, and the clock-off bit (you have no need for CLKOUT anyway.)
You will probably also want to set the clock divider value to 0 (meaning divide-by-2),
the Pelican bit, and the clock-off bit (you have no need for CLKOUT anyway.)
error_io:
pci_release_region(candev->sysdevptr.pcidev, 0);
#endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
error_io:
pci_release_region(candev->sysdevptr.pcidev, 0);
#endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
void kv_pcican_write_register(unsigned data, can_ioptr_t address)
{
void kv_pcican_write_register(unsigned data, can_ioptr_t address)
{
- can_outb(data,address);
+ can_outb(data,address);
}
unsigned kv_pcican_read_register(can_ioptr_t address)
}
unsigned kv_pcican_read_register(can_ioptr_t address)
kv_pcican_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
kv_pcican_write_register(0, chip->chip_base_addr+SJAIER);
kv_pcican_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
kv_pcican_write_register(0, chip->chip_base_addr+SJAIER);
kv_pcican_read_register(chip->chip_base_addr+SJAIR);
}
kv_pcican_read_register(chip->chip_base_addr+SJAIR);
}
kv_pcican_connect_irq(candev);
return 0;
kv_pcican_connect_irq(candev);
return 0;
int kv_pcican_init_hw_data(struct candevice_t *candev)
{
int kv_pcican_init_hw_data(struct candevice_t *candev)
{
pcidev = can_pci_get_next_untaken_device(KV_PCICAN_PCICAN_VENDOR, KV_PCICAN_PCICAN_ID);
if(pcidev == NULL)
return -ENODEV;
pcidev = can_pci_get_next_untaken_device(KV_PCICAN_PCICAN_VENDOR, KV_PCICAN_PCICAN_ID);
if(pcidev == NULL)
return -ENODEV;
if (pci_enable_device (pcidev)){
printk(KERN_CRIT "Setup of PCICAN failed\n");
can_pci_dev_put(pcidev);
return -EIO;
}
candev->sysdevptr.pcidev=pcidev;
if (pci_enable_device (pcidev)){
printk(KERN_CRIT "Setup of PCICAN failed\n");
can_pci_dev_put(pcidev);
return -EIO;
}
candev->sysdevptr.pcidev=pcidev;
for(i=0;i<3;i++){
if(!(pci_resource_flags(pcidev,i)&IORESOURCE_IO)){
printk(KERN_CRIT "PCICAN region %d is not IO\n",i);
for(i=0;i<3;i++){
if(!(pci_resource_flags(pcidev,i)&IORESOURCE_IO)){
printk(KERN_CRIT "PCICAN region %d is not IO\n",i);
candev->dev_base_addr=pci_resource_start(pcidev,0); /*S5920*/
candev->io_addr=pci_resource_start(pcidev,1); /*IO window for SJA1000 chips*/
candev->res_addr=pci_resource_start(pcidev,2); /*XILINX board wide address*/
candev->dev_base_addr=pci_resource_start(pcidev,0); /*S5920*/
candev->io_addr=pci_resource_start(pcidev,1); /*IO window for SJA1000 chips*/
candev->res_addr=pci_resource_start(pcidev,2); /*XILINX board wide address*/
/*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/
if (!strcmp(candev->hwname,"pcican-s")) {
/*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/
if (!strcmp(candev->hwname,"pcican-s")) {
if(candev->sysdevptr.pcidev==NULL)
return -ENODEV;
if(candev->sysdevptr.pcidev==NULL)
return -ENODEV;
candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
sja1000p_fill_chipspecops(candev->chip[chipnr]);
candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
sja1000p_fill_chipspecops(candev->chip[chipnr]);
candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;
return 0;
candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;
return 0;
int kv_pcican_init_obj_data(struct canchip_t *chip, int objnr)
{
int kv_pcican_init_obj_data(struct canchip_t *chip, int objnr)
{
/*
* This driver has been designed to support "Memory (MEM)" mode.
/*
* This driver has been designed to support "Memory (MEM)" mode.
- * For example: Memory, MEM:0xD0000 => io=0xD0000.
+ * For example: Memory, MEM:0xD0000 => io=0xD0000.
* Configure the card with m437set.com provided by seco before loading driver.
* This software is released under the GPL-License.
*/
* Configure the card with m437set.com provided by seco before loading driver.
* This software is released under the GPL-License.
*/
*/
#if 0 /* Object reset method */
unsigned i;
*/
#if 0 /* Object reset method */
unsigned i;
/* disable IRQ generation */
m437_write_register(iCTL_CCE, candev->dev_base_addr+iCTL);
/* clear all message objects */
for (i=1; i<=15; i++) {
m437_write_register(
/* disable IRQ generation */
m437_write_register(iCTL_CCE, candev->dev_base_addr+iCTL);
/* clear all message objects */
for (i=1; i<=15; i++) {
m437_write_register(
- INTPD_RES |
- RXIE_RES |
- TXIE_RES |
- MVAL_RES,
+ INTPD_RES |
+ RXIE_RES |
+ TXIE_RES |
+ MVAL_RES,
candev->dev_base_addr+i*0x10+iMSGCTL0);
m437_write_register(
candev->dev_base_addr+i*0x10+iMSGCTL0);
m437_write_register(
- NEWD_RES |
- MLST_RES |
- CPUU_RES |
- TXRQ_RES |
- RMPD_RES,
+ NEWD_RES |
+ MLST_RES |
+ CPUU_RES |
+ TXRQ_RES |
+ RMPD_RES,
candev->dev_base_addr+i*0x10+iMSGCTL1);
}
candev->dev_base_addr+i*0x10+iMSGCTL1);
}
/* Select device by chipnr:
* first dev is @ 900
* second dev is @ 980
/* Select device by chipnr:
* first dev is @ 900
* second dev is @ 980
* There are only two devices on MPC5200 */
/* initialize internal address storage */
* There are only two devices on MPC5200 */
/* initialize internal address storage */
if (mpc5200_init_device_node(candev->chip[chipnr], dn))
return -ENODEV;
if (mpc5200_init_device_node(candev->chip[chipnr], dn))
return -ENODEV;
iounmap((void*)chips_addr[i]);
kfree(chips_addr);
iounmap((void*)chips_addr[i]);
kfree(chips_addr);
return 0;
}
int mpc5200_reset(struct candevice_t *candev)
{
return 0;
}
int mpc5200_reset(struct candevice_t *candev)
{
DEBUGMSG("Resetting MSCAN chips ...\n");
for (i = 0; i < candev->nr_all_chips; i++)
DEBUGMSG("Resetting MSCAN chips ...\n");
for (i = 0; i < candev->nr_all_chips; i++)
-int mpc5200_init_hw_data(struct candevice_t *candev)
+int mpc5200_init_hw_data(struct candevice_t *candev)
{
/* candev->res_addr = RESET_ADDR; */
candev->nr_82527_chips = NR_82527;
{
/* candev->res_addr = RESET_ADDR; */
candev->nr_82527_chips = NR_82527;
int mpc5200_program_irq(struct candevice_t *candev)
{
int mpc5200_program_irq(struct candevice_t *candev)
{
- /* we don't use programmable interrupt on MPC5200 */
+ /* we don't use programmable interrupt on MPC5200 */
}
DEBUGMSG("Bound to io-addr: 0x%08x IRQ: %d\n", (unsigned int)chip->chip_base_addr, chip->chip_irq);
}
DEBUGMSG("Bound to io-addr: 0x%08x IRQ: %d\n", (unsigned int)chip->chip_base_addr, chip->chip_irq);
mscan_get_flags(chip, 0xff, MSCAN_CTL1),
mscan_get_flags(chip, 0xff, MSCAN_BTR0),
mscan_get_flags(chip, 0xff, MSCAN_BTR1));
mscan_get_flags(chip, 0xff, MSCAN_CTL1),
mscan_get_flags(chip, 0xff, MSCAN_BTR0),
mscan_get_flags(chip, 0xff, MSCAN_BTR1));
CANMSG("RFLG 0x%02x\tRIER 0x%02x\tTFLG 0x%02x\tTIER 0x%02x\n",
mscan_get_flags(chip, 0xff, MSCAN_RFLG),
mscan_get_flags(chip, 0xff, MSCAN_RIER),
mscan_get_flags(chip, 0xff, MSCAN_TFLG),
mscan_get_flags(chip, 0xff, MSCAN_TIER));
CANMSG("RFLG 0x%02x\tRIER 0x%02x\tTFLG 0x%02x\tTIER 0x%02x\n",
mscan_get_flags(chip, 0xff, MSCAN_RFLG),
mscan_get_flags(chip, 0xff, MSCAN_RIER),
mscan_get_flags(chip, 0xff, MSCAN_TFLG),
mscan_get_flags(chip, 0xff, MSCAN_TIER));
CANMSG("TARQ 0x%02x\tTAAK 0x%02x\tTBSEL 0x%02x\tIDAC 0x%02x\n",
mscan_get_flags(chip, 0xff, MSCAN_TARQ),
mscan_get_flags(chip, 0xff, MSCAN_TAAK),
mscan_get_flags(chip, 0xff, MSCAN_TBSEL),
mscan_get_flags(chip, 0xff, MSCAN_IDAC));
CANMSG("TARQ 0x%02x\tTAAK 0x%02x\tTBSEL 0x%02x\tIDAC 0x%02x\n",
mscan_get_flags(chip, 0xff, MSCAN_TARQ),
mscan_get_flags(chip, 0xff, MSCAN_TAAK),
mscan_get_flags(chip, 0xff, MSCAN_TBSEL),
mscan_get_flags(chip, 0xff, MSCAN_IDAC));
CANMSG("RXERR 0x%02x\tTXERR 0x%02x\n",
mscan_get_flags(chip, 0xff, MSCAN_RXERR),
mscan_get_flags(chip, 0xff, MSCAN_TXERR));
CANMSG("RXERR 0x%02x\tTXERR 0x%02x\n",
mscan_get_flags(chip, 0xff, MSCAN_RXERR),
mscan_get_flags(chip, 0xff, MSCAN_TXERR));
static void dump_buff(struct canchip_t * chip, unsigned offset_addr)
{
volatile struct mscan_msg_buffer * buff = (struct mscan_msg_buffer *)(chip->chip_base_addr + offset_addr);
static void dump_buff(struct canchip_t * chip, unsigned offset_addr)
{
volatile struct mscan_msg_buffer * buff = (struct mscan_msg_buffer *)(chip->chip_base_addr + offset_addr);
CANMSG("MSCAN buffer dump\n");
CANMSG("MSCAN buffer dump\n");
/* structural access */
CANMSG("Data0 0x%02x Data1 0x%02x Data2 0x%02x Data3 0x%02x Data4 0x%02x Data5 0x%02x Data6 0x%02x Data7 0x%02x\n",
buff->data_0, buff->data_1, buff->data_2, buff->data_3, buff->data_4, buff->data_5, buff->data_6, buff->data_7);
/* structural access */
CANMSG("Data0 0x%02x Data1 0x%02x Data2 0x%02x Data3 0x%02x Data4 0x%02x Data5 0x%02x Data6 0x%02x Data7 0x%02x\n",
buff->data_0, buff->data_1, buff->data_2, buff->data_3, buff->data_4, buff->data_5, buff->data_6, buff->data_7);
buff->data_len, buff->local_prio);
CANMSG("IDR0 0x%02x\tIDR1 0x%02x\tIDR2 0x%02x\tIDR3 0x%02x\n",
buff->id_0, buff->id_1, buff->id_2, buff->id_3);
buff->data_len, buff->local_prio);
CANMSG("IDR0 0x%02x\tIDR1 0x%02x\tIDR2 0x%02x\tIDR3 0x%02x\n",
buff->id_0, buff->id_1, buff->id_2, buff->id_3);
}
static void dump_filter(struct canchip_t * chip)
}
static void dump_filter(struct canchip_t * chip)
/* macro for standardized CAN Bus Status change report */
/* macro for standardized CAN Bus Status change report */
-#define MSCAN_STAT_CHANGE(msg,idx) CANMSG("MSCAN chip %d %s\n", idx, msg)
+#define MSCAN_STAT_CHANGE(msg,idx) CANMSG("MSCAN chip %d %s\n", idx, msg)
/* Enable folowing IRQs
* MSCAN_TIER_TXE - Transmit Empty Interrupt - Set and Cleared during TX proccess not during init
/* Enable folowing IRQs
* MSCAN_TIER_TXE - Transmit Empty Interrupt - Set and Cleared during TX proccess not during init
* MSCAN_RIER_OVRIE - Overrun
* MSCAN_RIER_CSCIE - CAN Status Change
*/
* MSCAN_RIER_OVRIE - Overrun
* MSCAN_RIER_CSCIE - CAN Status Change
*/
-uint16_t mscan_IRQs = MSCAN_RIER_RXFIE |
+uint16_t mscan_IRQs = MSCAN_RIER_RXFIE |
MSCAN_RIER_RSTATE | MSCAN_RIER_TSTATE |
MSCAN_RIER_OVRIE | MSCAN_RIER_CSCIE; /* TX interrupt flag is held shifted */
/* 1 - enable interrupt, 0 - interrupt is masked */
MSCAN_RIER_RSTATE | MSCAN_RIER_TSTATE |
MSCAN_RIER_OVRIE | MSCAN_RIER_CSCIE; /* TX interrupt flag is held shifted */
/* 1 - enable interrupt, 0 - interrupt is masked */
int err;
DEBUGMSG("Configuring chip...\n");
int err;
DEBUGMSG("Configuring chip...\n");
if ((err = mscan_enable_configuration(chip)))
return err;
if ((err = mscan_enable_configuration(chip)))
return err;
/* Sleep mode - disable CAN activity after completing current operation */
/* if controler not synced to bus, skip sleep mode */
/* Sleep mode - disable CAN activity after completing current operation */
/* if controler not synced to bus, skip sleep mode */
- if (!mscan_sleep_mode_active(chip) &&
+ if (!mscan_sleep_mode_active(chip) &&
mscan_get_flags(chip, MSCAN_CTL0_SYNCH, MSCAN_CTL0))
if (mscan_enter_sleep_mode(chip))
{
mscan_get_flags(chip, MSCAN_CTL0_SYNCH, MSCAN_CTL0))
if (mscan_enter_sleep_mode(chip))
{
DUMPREGS(chip);
DEBUGMSG("Forcig INIT\n");
}
DUMPREGS(chip);
DEBUGMSG("Forcig INIT\n");
}
/* now we can enter Init mode */
if(mscan_enter_init_mode(chip))
/* now we can enter Init mode */
if(mscan_enter_init_mode(chip))
btr0 = (best_brp & MSCAN_BTR0_BRP) | ((sjw << 6) & MSCAN_BTR0_SJW);
btr1 = (tseg1 & MSCAN_BTR1_TSEG1) | ((tseg2 << 4) & MSCAN_BTR1_TSEG2);
btr0 = (best_brp & MSCAN_BTR0_BRP) | ((sjw << 6) & MSCAN_BTR0_SJW);
btr1 = (tseg1 & MSCAN_BTR1_TSEG1) | ((tseg2 << 4) & MSCAN_BTR1_TSEG2);
- mscan_set_btregs(chip, btr0, btr1);
+ mscan_set_btregs(chip, btr0, btr1);
mscan_disable_configuration(chip);
mscan_disable_configuration(chip);
{
/* DEBUGMSG("Seting BCR0 and BCR1.\n"); */
reg_t btr0, btr1;
{
/* DEBUGMSG("Seting BCR0 and BCR1.\n"); */
reg_t btr0, btr1;
btr0 = (reg_t)bcr0;
btr1 = (reg_t)bcr1;
btr1 &= ~MSCAN_BTR1_SAMP; /* use one-point sample, not three smaples per bit */
DEBUGMSG("BTR0 0x%02x BTR1 0x%02x\n", btr0, btr1);
btr0 = (reg_t)bcr0;
btr1 = (reg_t)bcr1;
btr1 &= ~MSCAN_BTR1_SAMP; /* use one-point sample, not three smaples per bit */
DEBUGMSG("BTR0 0x%02x BTR1 0x%02x\n", btr0, btr1);
can_write_reg(chip, btr0, MSCAN_BTR0);
can_write_reg(chip, btr1, MSCAN_BTR1);
can_write_reg(chip, btr0, MSCAN_BTR0);
can_write_reg(chip, btr1, MSCAN_BTR1);
/* DEBUGMSG("BCR0 and BCR1 successfully set.\n"); */
return 0;
}
/* DEBUGMSG("BCR0 and BCR1 successfully set.\n"); */
return 0;
}
/* Transmitt Abort Request Register (TARQ) is clean after INIT mode - no need to clear it explicitly */
/* Control Register 0 (CTL0) is clean after INIT too (excepts fro WUPE, SLRQ and INITRQ) */
/* Transmitt Abort Request Register (TARQ) is clean after INIT mode - no need to clear it explicitly */
/* Control Register 0 (CTL0) is clean after INIT too (excepts fro WUPE, SLRQ and INITRQ) */
-
- /* initialize chip by entering Sleep & Init mode */
+
+ /* initialize chip by entering Sleep & Init mode */
if (mscan_enable_configuration(chip))
return -ENODEV;
if (mscan_enable_configuration(chip))
return -ENODEV;
/* reset Control Register 1 (CTL1) */
ctl1 = MSCAN_CTL1_CANE |
(MPC5200_CLKSRC ? MSCAN_CTL1_CLKSRC : 0x00) ;
/* reset Control Register 1 (CTL1) */
ctl1 = MSCAN_CTL1_CANE |
(MPC5200_CLKSRC ? MSCAN_CTL1_CLKSRC : 0x00) ;
/* MSCAN_CTL1_WUPM | WakeUp mode not used */
/* MSCAN_CTL1_SLPAK | ReadOnly */
/* MSCAN_CTL1_INITAK | ReadOnly */
/* MSCAN_CTL1_WUPM | WakeUp mode not used */
/* MSCAN_CTL1_SLPAK | ReadOnly */
/* MSCAN_CTL1_INITAK | ReadOnly */
can_write_reg(chip, ctl1, MSCAN_CTL1);
can_write_reg(chip, ctl1, MSCAN_CTL1);
{
/* IRQ unmapped in lincan driver core */
can_disable_irq(chip->chip_irq);
{
/* IRQ unmapped in lincan driver core */
can_disable_irq(chip->chip_irq);
mscan_clear_objects(chip); /* Cannot be called in INIT mode */
mscan_clear_objects(chip); /* Cannot be called in INIT mode */
/* disable chip */
mscan_clear_flags(chip, MSCAN_CTL1_CANE, MSCAN_CTL1);
/* disable chip */
mscan_clear_flags(chip, MSCAN_CTL1_CANE, MSCAN_CTL1);
DEBUGMSG("Chip released [%02d]\n", chip->chip_idx);
return 0;
}
DEBUGMSG("Chip released [%02d]\n", chip->chip_idx);
return 0;
}
reg_t idr0, idr1, mr0, mr1; /* ID register 0,1, Mask register 0, 1 */
reg_t idr0, idr1, mr0, mr1; /* ID register 0,1, Mask register 0, 1 */
return mscan_extended_mask(chip, code, mask);
return mscan_extended_mask(chip, code, mask);
{
/* code - contains 11bit ID and as LSB the RTR flag */
/* code - contains 11bit mask and RTR mask as LSB */
{
/* code - contains 11bit ID and as LSB the RTR flag */
/* code - contains 11bit mask and RTR mask as LSB */
reg_t idr0, idr1, idr2, idr3; /* ID registers 0,1,2,3 */
reg_t mr0, mr1, mr2, mr3; /* Mask registers 0,1,2,3 */
reg_t idr0, idr1, idr2, idr3; /* ID registers 0,1,2,3 */
reg_t mr0, mr1, mr2, mr3; /* Mask registers 0,1,2,3 */
/* we use two 32-bit acceptance filters */
mscan_clear_flags(chip, MSCAN_IDAC_IDAM, MSCAN_IDAC);
/* we use two 32-bit acceptance filters */
mscan_clear_flags(chip, MSCAN_IDAC_IDAM, MSCAN_IDAC);
idr0 = (reg_t)((code & 0x7fa00000) >> 22); /* EXT_ID {29:21} */
idr0 = (reg_t)((code & 0x7fa00000) >> 22); /* EXT_ID {29:21} */
idr1 = (reg_t)((code & 0x00380000) >> 14); /* EXT_ID {20:18} */
idr1|= 0x18; /* SRR and IDE */
idr1|= (reg_t)((code & 0x00070000) >> 16); /* EXT_ID {17:15} */
idr1 = (reg_t)((code & 0x00380000) >> 14); /* EXT_ID {20:18} */
idr1|= 0x18; /* SRR and IDE */
idr1|= (reg_t)((code & 0x00070000) >> 16); /* EXT_ID {17:15} */
mr0 = (reg_t)((mask & 0x7fa00000) >> 22); /* EXT_ID {29:21} */
mr0 = (reg_t)((mask & 0x7fa00000) >> 22); /* EXT_ID {29:21} */
mr1 = (reg_t)((mask & 0x00380000) >> 14); /* EXT_ID {20:18} */
/* SRR=0 and IDE=0 - do not ignore */
mr1|= (reg_t)((mask & 0x00070000) >> 16); /* EXT_ID {17:15} */
mr1 = (reg_t)((mask & 0x00380000) >> 14); /* EXT_ID {20:18} */
/* SRR=0 and IDE=0 - do not ignore */
mr1|= (reg_t)((mask & 0x00070000) >> 16); /* EXT_ID {17:15} */
DEBUGMSG("Set extended_mask [id:0x%08x RTR=%lu, m:0x%08x RTR=%lu]\n", (uint32_t)(code >> 1), code & 0x00000001, (uint32_t)(mask >> 1), mask & 0x00000001);
DUMPFLT(chip);
DEBUGMSG("Set extended_mask [id:0x%08x RTR=%lu, m:0x%08x RTR=%lu]\n", (uint32_t)(code >> 1), code & 0x00000001, (uint32_t)(mask >> 1), mask & 0x00000001);
DUMPFLT(chip);
DEBUGRX("Pre read config\n");
/* MSCAN has only one buffer, which is already initialized */
DEBUGRX("Pre read config\n");
/* MSCAN has only one buffer, which is already initialized */
can_spin_lock(&mscan_prewr_lock);
can_preempt_disable();
DEBUGTX("Pre write config\n");
can_spin_lock(&mscan_prewr_lock);
can_preempt_disable();
DEBUGTX("Pre write config\n");
/* find free buffer */
txf = mscan_get_flags(chip, MSCAN_TFLG_TXE, MSCAN_TFLG);
for (buff_no = 0; buff_no < 3 && !(txf & (0x01 << buff_no)); buff_no++) { }
/* find free buffer */
txf = mscan_get_flags(chip, MSCAN_TFLG_TXE, MSCAN_TFLG);
for (buff_no = 0; buff_no < 3 && !(txf & (0x01 << buff_no)); buff_no++) { }
int mscan_send_msg(struct canchip_t *chip, struct msgobj_t *obj, struct canmsg_t *msg)
{
DEBUGTX("Send Message\n");
int mscan_send_msg(struct canchip_t *chip, struct msgobj_t *obj, struct canmsg_t *msg)
{
DEBUGTX("Send Message\n");
/* turn on IRQ for this buffer */
can_write_reg(chip, msg->cob, MSCAN_TIER);
/* clear TX Buffer Empty flag (by writing '1') to initiate trasmition */
can_write_reg(chip, msg->cob, MSCAN_TFLG);
/* turn on IRQ for this buffer */
can_write_reg(chip, msg->cob, MSCAN_TIER);
/* clear TX Buffer Empty flag (by writing '1') to initiate trasmition */
can_write_reg(chip, msg->cob, MSCAN_TFLG);
tx_irq = (MSCAN_TFLG_TXE << 8); /* to spare few tacts in IRQ loop */
irq_reg = mscan_get_irq_flags(chip);
tx_irq = (MSCAN_TFLG_TXE << 8); /* to spare few tacts in IRQ loop */
irq_reg = mscan_get_irq_flags(chip);
- DEBUGMSG("IRQ Handler chip %d (%d)\n", chip->chip_idx, irq);
+ DEBUGMSG("IRQ Handler chip %d (%d)\n", chip->chip_idx, irq);
goto irqhnd_exit_stuck;
DEBUGMSG("IRR: 0x%04x\n", irq_reg);
goto irqhnd_exit_stuck;
DEBUGMSG("IRR: 0x%04x\n", irq_reg);
mscan_set_flags(chip, MSCAN_RFLG_RXF, MSCAN_RFLG);
}
mscan_set_flags(chip, MSCAN_RFLG_RXF, MSCAN_RFLG);
}
/* Can Status change - due to RX/TX error counters */
if(irq_reg & MSCAN_RFLG_CSCIF)
{
/* Can Status change - due to RX/TX error counters */
if(irq_reg & MSCAN_RFLG_CSCIF)
{
MSCAN_STAT_CHANGE("RX: ERROR PASSIVE", chip->chip_idx);
/* Show warning only */
break;
MSCAN_STAT_CHANGE("RX: ERROR PASSIVE", chip->chip_idx);
/* Show warning only */
break;
case 1: /* bus - warning */
MSCAN_STAT_CHANGE("RX: Bus Warning", chip->chip_idx);
/* Show warning only */
case 1: /* bus - warning */
MSCAN_STAT_CHANGE("RX: Bus Warning", chip->chip_idx);
/* Show warning only */
}
rxstat = irq_rstat; /* update static RX status field */
}
}
rxstat = irq_rstat; /* update static RX status field */
}
/* Transmit bus off/error/warning */
if (irq_tstat ^ txstat)
{
/* Transmit bus off/error/warning */
if (irq_tstat ^ txstat)
{
MSCAN_STAT_CHANGE("TX: ERROR PASSIVE", chip->chip_idx);
/* Show warning only */
break;
MSCAN_STAT_CHANGE("TX: ERROR PASSIVE", chip->chip_idx);
/* Show warning only */
break;
case 1: /* bus - warning */
MSCAN_STAT_CHANGE("TX: Bus Warning", chip->chip_idx);
/* Show warning only */
case 1: /* bus - warning */
MSCAN_STAT_CHANGE("TX: Bus Warning", chip->chip_idx);
/* Show warning only */
/* Message Overrun/Overwritten */
if (irq_reg & MSCAN_RFLG_OVRIF)
/* Message Overrun/Overwritten */
if (irq_reg & MSCAN_RFLG_OVRIF)
CANMSG("Error: MESSAGE OVERRUN/OVERWRITTEN");
CANMSG("Error: MESSAGE OVERRUN/OVERWRITTEN");
/* notify only injured RXqueue-end */
mscan_notifyRXends(chip->msgobj[0], CANQUEUE_NOTIFY_ERROR);
/* notify only injured RXqueue-end */
mscan_notifyRXends(chip->msgobj[0], CANQUEUE_NOTIFY_ERROR);
can_spin_unlock(&mscan_prewr_lock);
can_spin_unlock(&mscan_prewr_lock);
mscan_wakeup_tx(chip, chip->msgobj[0]);
}
mscan_wakeup_tx(chip, chip->msgobj[0]);
}
/* omit RSTAT and TSTAT - they're used only in CSCIF handler */
} while(irq_reg &
/* omit RSTAT and TSTAT - they're used only in CSCIF handler */
} while(irq_reg &
~(MSCAN_RFLG_RSTAT | MSCAN_RFLG_TSTAT));
~(MSCAN_RFLG_RSTAT | MSCAN_RFLG_TSTAT));
/* clear TX buffers, need to set CANTBSEL register */
can_write_reg(chip, 0x01, MSCAN_TBSEL);
mscan_clear_buffer(chip, MSCAN_TXFG);
/* clear TX buffers, need to set CANTBSEL register */
can_write_reg(chip, 0x01, MSCAN_TBSEL);
mscan_clear_buffer(chip, MSCAN_TXFG);
can_write_reg(chip, 0x02, MSCAN_TBSEL);
mscan_clear_buffer(chip, MSCAN_TXFG);
can_write_reg(chip, 0x02, MSCAN_TBSEL);
mscan_clear_buffer(chip, MSCAN_TXFG);
can_write_reg(chip, 0x04, MSCAN_TBSEL);
mscan_clear_buffer(chip, MSCAN_TXFG);
can_write_reg(chip, 0x04, MSCAN_TBSEL);
mscan_clear_buffer(chip, MSCAN_TXFG);
{
can_preempt_disable();
DEBUGMSG("WakeUP TX\n");
{
can_preempt_disable();
DEBUGMSG("WakeUP TX\n");
can_msgobj_set_fl(obj, TX_REQUEST);
while(!can_msgobj_test_and_set_fl(obj, TX_LOCK)) {
can_msgobj_clear_fl(obj, TX_REQUEST);
can_msgobj_set_fl(obj, TX_REQUEST);
while(!can_msgobj_test_and_set_fl(obj, TX_LOCK)) {
can_msgobj_clear_fl(obj, TX_REQUEST);
/* MSCAN uses oposite logic (compared to IP) for LAFM: 1-ignore bit, 0-use bit as mask */
mask = (~filter.mask) << 1;
/* MSCAN uses oposite logic (compared to IP) for LAFM: 1-ignore bit, 0-use bit as mask */
mask = (~filter.mask) << 1;
/* RTR is LSB of mask */
if (filter.flags & MSG_RTR)
mask |= 0x00000001;
/* RTR is LSB of mask */
if (filter.flags & MSG_RTR)
mask |= 0x00000001;
if (filter.flags & MSG_EXT) /* Extended ID */
return mscan_extended_mask(chip, filter.id, mask);
else /* Standard ID */
if (filter.flags & MSG_EXT) /* Extended ID */
return mscan_extended_mask(chip, filter.id, mask);
else /* Standard ID */
}
mscan_msg_from_rxbuffer(chip, &(obj->rx_msg));
}
mscan_msg_from_rxbuffer(chip, &(obj->rx_msg));
/* fill CAN message timestamp */
can_filltimestamp(&obj->rx_msg.timestamp);
/* fill CAN message timestamp */
can_filltimestamp(&obj->rx_msg.timestamp);
chip->max_objects = 1;
chip->write_register = chip->hostdevice->hwspecops->write_register;
chip->read_register = chip->hostdevice->hwspecops->read_register;
chip->max_objects = 1;
chip->write_register = chip->hostdevice->hwspecops->write_register;
chip->read_register = chip->hostdevice->hwspecops->read_register;
/*
chip->flags;
chip->baudrate;
/*
chip->flags;
chip->baudrate;
* difference between tseg and tsegall is:
* tsegall = tseg + 1
*/
* difference between tseg and tsegall is:
* tsegall = tseg + 1
*/
*tseg2 = tseg + 1 - (sampl_pt * (tseg + 1)) / 1000;
if (*tseg2 < MSCAN_TSEG2_MIN)
*tseg2 = MSCAN_TSEG2_MIN;
*tseg2 = tseg + 1 - (sampl_pt * (tseg + 1)) / 1000;
if (*tseg2 < MSCAN_TSEG2_MIN)
*tseg2 = MSCAN_TSEG2_MIN;
static uint16_t mscan_get_irq_flags(struct canchip_t * chip)
{
/* Transmit Buffer Empty only if enabled */
static uint16_t mscan_get_irq_flags(struct canchip_t * chip)
{
/* Transmit Buffer Empty only if enabled */
- return ((mscan_get_flags(chip, MSCAN_TIER_TXE, MSCAN_TIER) &
+ return ((mscan_get_flags(chip, MSCAN_TIER_TXE, MSCAN_TIER) &
mscan_get_flags(chip, MSCAN_TFLG_TXE, MSCAN_TFLG)) << 8) |
(mscan_get_flags(chip, (reg_t)(mscan_IRQs & 0xff), MSCAN_RFLG));
}
mscan_get_flags(chip, MSCAN_TFLG_TXE, MSCAN_TFLG)) << 8) |
(mscan_get_flags(chip, (reg_t)(mscan_IRQs & 0xff), MSCAN_RFLG));
}
/* set TARQ - Transmitt Abort Request */
mscan_set_flags(chip, m, MSCAN_TARQ);
/* set TARQ - Transmitt Abort Request */
mscan_set_flags(chip, m, MSCAN_TARQ);
CANMSG("Unable to open port: 0x%lx\n",candev->io_addr);
return -ENODEV;
} else {
CANMSG("Unable to open port: 0x%lx\n",candev->io_addr);
return -ENODEV;
} else {
- DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr,
+ DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr,
candev->io_addr + IO_RANGE - 1);
}
return 0;
}
candev->io_addr + IO_RANGE - 1);
}
return 0;
}
-/* The function template_release_io is used to free the previously reserved
+/* The function template_release_io is used to free the previously reserved
* io-memory. In case you reserved more memory, don't forget to free it here.
*/
int msmcan_release_io(struct candevice_t *candev)
* io-memory. In case you reserved more memory, don't forget to free it here.
*/
int msmcan_release_io(struct candevice_t *candev)
if(0) {
int tic=jiffies;
int tac;
if(0) {
int tic=jiffies;
int tac;
msmcan_write_register(iCTL_INI, chip->chip_base_addr+iCTL);
/*CLKOUT stopped (iCPU_CEN=0) */
msmcan_write_register(iCPU_DSC, chip->chip_base_addr+iCPU);
msmcan_write_register(iCTL_INI, chip->chip_base_addr+iCTL);
/*CLKOUT stopped (iCPU_CEN=0) */
msmcan_write_register(iCPU_DSC, chip->chip_base_addr+iCPU);
}
can_disable_irq(chip->chip_irq);
}
can_disable_irq(chip->chip_irq);
#define NR_82527 1
#define NR_SJA1000 0
#define NR_82527 1
#define NR_SJA1000 0
-int msmcan_init_hw_data(struct candevice_t *candev)
+int msmcan_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=0;
candev->nr_82527_chips=1;
{
candev->res_addr=0;
candev->nr_82527_chips=1;
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
- * The entry obj_base_addr represents the first memory address of the message
+ * The entry obj_base_addr represents the first memory address of the message
* object. In case of the sja1000 obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* object. In case of the sja1000 obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
chip->msgobj[objnr]->obj_base_addr=
chip->chip_base_addr+(objnr+1)*0x10;
chip->msgobj[objnr]->obj_base_addr=
chip->chip_base_addr+(objnr+1)*0x10;
can_spin_lock_irqsave(&msmcan_port_lock,flags);
can_outb(addr & 0xff, (addr>>16)+1);
can_spin_lock_irqsave(&msmcan_port_lock,flags);
can_outb(addr & 0xff, (addr>>16)+1);
- can_outb(data, addr>>16);
+ can_outb(data, addr>>16);
can_spin_unlock_irqrestore(&msmcan_port_lock,flags);
}
can_spin_unlock_irqrestore(&msmcan_port_lock,flags);
}
unsigned msmcan_read_register(can_ioptr_t address)
{
/* this is the same thing that the function write_register.
unsigned msmcan_read_register(can_ioptr_t address)
{
/* this is the same thing that the function write_register.
- We use the two register, we write the address where we
+ We use the two register, we write the address where we
want to read in a first time. In a second time we read the
data */
unsigned char ret;
want to read in a first time. In a second time we read the
data */
unsigned char ret;
can_spin_lock_irqsave(&msmcan_port_lock,flags);
can_outb(addr & 0xff, (addr>>16)+1);
can_spin_lock_irqsave(&msmcan_port_lock,flags);
can_outb(addr & 0xff, (addr>>16)+1);
can_spin_unlock_irqrestore(&msmcan_port_lock,flags);
return ret;
}
can_spin_unlock_irqrestore(&msmcan_port_lock,flags);
return ret;
}
*/
int ns_dev_request_io(struct candevice_t *candev)
{
*/
int ns_dev_request_io(struct candevice_t *candev)
{
- /* Note hard-coded index for the chip number as this
+ /* Note hard-coded index for the chip number as this
* only supports a single instance of the C_CAN controller.
*/
DEBUGMSG("(c%d)ns_dev_request_io (...)\n", candev->chip[0]->chip_idx);
* only supports a single instance of the C_CAN controller.
*/
DEBUGMSG("(c%d)ns_dev_request_io (...)\n", candev->chip[0]->chip_idx);
*
* The function ns_dev_init_obj_data() is used to initialize the hardware
* structure containing information about the different message objects on the
*
* The function ns_dev_init_obj_data() is used to initialize the hardware
* structure containing information about the different message objects on the
- * CAN chip.
- * The entry @obj_base_addr represents the first memory address of the message
- * object.
+ * CAN chip.
+ * The entry @obj_base_addr represents the first memory address of the message
+ * object.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* Return Value: The function always returns zero
* File: src/template.c
* Unless the hardware uses a segmented memory map, flags can be set zero.
* Return Value: The function always returns zero
* File: src/template.c
* ns_dev_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
* ns_dev_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
- * The function ns_dev_program_irq() is used for hardware that uses
+ * The function ns_dev_program_irq() is used for hardware that uses
* programmable interrupts. If your hardware doesn't use programmable interrupts
* programmable interrupts. If your hardware doesn't use programmable interrupts
- * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
- * leave this function unedited. Again this function is hardware specific so
+ * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
+ * leave this function unedited. Again this function is hardware specific so
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
CANMSG("Unable to open port: 0x%lx\n",candev->io_addr);
return -ENODEV;
} else {
CANMSG("Unable to open port: 0x%lx\n",candev->io_addr);
return -ENODEV;
} else {
- DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr,
+ DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr,
candev->io_addr + IO_RANGE - 1);
}
return 0;
}
candev->io_addr + IO_RANGE - 1);
}
return 0;
}
-/* The function template_release_io is used to free the previously reserved
+/* The function template_release_io is used to free the previously reserved
* io-memory. In case you reserved more memory, don't forget to free it here.
*/
int nsi_release_io(struct candevice_t *candev)
* io-memory. In case you reserved more memory, don't forget to free it here.
*/
int nsi_release_io(struct candevice_t *candev)
*/
int nsi_reset(struct candevice_t *candev)
{
*/
int nsi_reset(struct candevice_t *candev)
{
DEBUGMSG("Resetting nsi hardware ...\n");
/* we don't use template_write_register because we don't use the two first
DEBUGMSG("Resetting nsi hardware ...\n");
/* we don't use template_write_register because we don't use the two first
can_outb (0, nsican_base + candev->res_addr);
for (i = 1; i < 1000; i++)
udelay (1000);
can_outb (0, nsican_base + candev->res_addr);
for (i = 1; i < 1000; i++)
udelay (1000);
-
-
- /* Check hardware reset status */
+
+
+ /* Check hardware reset status */
i=0;
while ( (nsi_read_register(nsican_base+iCPU) & iCPU_RST) && (i<=15)) {
udelay(20000);
i=0;
while ( (nsi_read_register(nsican_base+iCPU) & iCPU_RST) && (i<=15)) {
udelay(20000);
#define NR_82527 1
#define NR_SJA1000 0
#define NR_82527 1
#define NR_SJA1000 0
-int nsi_init_hw_data(struct candevice_t *candev)
+int nsi_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=1;
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=1;
candev->chip[chipnr]->chip_base_addr=
can_ioport2ioptr(candev->io_addr);
candev->chip[chipnr]->clock = 16000000;
candev->chip[chipnr]->chip_base_addr=
can_ioport2ioptr(candev->io_addr);
candev->chip[chipnr]->clock = 16000000;
- nsican_irq=candev->chip[chipnr]->chip_irq;
+ nsican_irq=candev->chip[chipnr]->chip_irq;
nsican_base=candev->chip[chipnr]->chip_base_addr;
candev->chip[chipnr]->int_cpu_reg = iCPU_DSC;
candev->chip[chipnr]->int_clk_reg = iCLK_SL1;
nsican_base=candev->chip[chipnr]->chip_base_addr;
candev->chip[chipnr]->int_cpu_reg = iCPU_DSC;
candev->chip[chipnr]->int_clk_reg = iCLK_SL1;
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
- * The entry obj_base_addr represents the first memory address of the message
+ * The entry obj_base_addr represents the first memory address of the message
* object. In case of the sja1000 obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* object. In case of the sja1000 obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
chip->msgobj[objnr]->obj_base_addr=
chip->chip_base_addr+(objnr+1)*0x10;
chip->msgobj[objnr]->obj_base_addr=
chip->chip_base_addr+(objnr+1)*0x10;
/* the nsi card has two registers, the address register at 0x0
and the data register at 0x01 */
/* the nsi card has two registers, the address register at 0x0
and the data register at 0x01 */
- /* write the relative address on the eight LSB bits
+ /* write the relative address on the eight LSB bits
and the data on the eight MSB bits in one time */
and the data on the eight MSB bits in one time */
- can_outw(address-nsican_base + (256 * data), nsican_base);
+ can_outw(address-nsican_base + (256 * data), nsican_base);
}
/* The function template_read_register is used to read from hardware registers
}
/* The function template_read_register is used to read from hardware registers
unsigned nsi_read_register(can_ioptr_t address)
{
/* this is the same thing that the function write_register.
unsigned nsi_read_register(can_ioptr_t address)
{
/* this is the same thing that the function write_register.
- We use the two register, we write the address where we
+ We use the two register, we write the address where we
want to read in a first time. In a second time we read the
data */
unsigned char ret;
can_spin_irqflags_t flags;
want to read in a first time. In a second time we read the
data */
unsigned char ret;
can_spin_irqflags_t flags;
can_spin_lock_irqsave(&nsican_port_lock,flags);
can_outb(address-nsican_base, nsican_base);
ret=can_inb(nsican_base+1);
can_spin_lock_irqsave(&nsican_port_lock,flags);
can_outb(address-nsican_base, nsican_base);
ret=can_inb(nsican_base+1);
int nsi_canpci_config_irqs(struct canchip_t *chip, short irqs)
{
int nsi_canpci_config_irqs(struct canchip_t *chip, short irqs)
{
unsigned long it_mask,it_reg;
struct candevice_t *candev;
it_mask=0;
unsigned long it_mask,it_reg;
struct candevice_t *candev;
it_mask=0;
{
can_write_reg(chip,chip->int_cpu_reg,iCPU); // Configure cpu interface
can_write_reg(chip,(iCTL_CCE|iCTL_INI),iCTL); // Enable configuration
{
can_write_reg(chip,chip->int_cpu_reg,iCPU); // Configure cpu interface
can_write_reg(chip,(iCTL_CCE|iCTL_INI),iCTL); // Enable configuration
- i82527_seg_write_reg(chip,chip->int_clk_reg,iCLK); // Set clock out slew rates
+ i82527_seg_write_reg(chip,chip->int_clk_reg,iCLK); // Set clock out slew rates
i82527_seg_write_reg(chip,chip->int_bus_reg,iBUS); /* Bus configuration */
i82527_seg_write_reg(chip,chip->int_bus_reg,iBUS); /* Bus configuration */
can_write_reg(chip,P2_2|P2_1,iP2C); // The pin P2_2,P2_1 of the 527 must be set as output
can_write_reg(chip,P2_2|P2_1,iP2O); // and P2_2 must be set to 1
can_write_reg(chip,P2_2|P2_1,iP2C); // The pin P2_2,P2_1 of the 527 must be set as output
can_write_reg(chip,P2_2|P2_1,iP2O); // and P2_2 must be set to 1
can_write_reg(chip,0x00,iSTAT); /* Clear error status register */
can_write_reg(chip,0x00,iSTAT); /* Clear error status register */
- /* Check if we can at least read back some arbitrary data from the
+ /* Check if we can at least read back some arbitrary data from the
* card. If we can not, the card is not properly configured!
*/
canobj_write_reg(chip,chip->msgobj[1],0x25,iMSGDAT1);
* card. If we can not, the card is not properly configured!
*/
canobj_write_reg(chip,chip->msgobj[1],0x25,iMSGDAT1);
CANMSG("Error clearing message objects\n");
return -ENODEV;
}
CANMSG("Error clearing message objects\n");
return -ENODEV;
}
if (nsi_canpci_config_irqs(chip,iCTL_IE|iCTL_EIE)) { /* has been 0x0a */
CANMSG("Error configuring interrupts\n");
return -ENODEV;
if (nsi_canpci_config_irqs(chip,iCTL_IE|iCTL_EIE)) { /* has been 0x0a */
CANMSG("Error configuring interrupts\n");
return -ENODEV;
rmb();
it_reg|=it_mask|0x40;
iowrite32(it_reg,(void*)(candev->io_addr+PLX_INTCSR));
rmb();
it_reg|=it_mask|0x40;
iowrite32(it_reg,(void*)(candev->io_addr+PLX_INTCSR));
i82527_start_chip(chip);
return 0;
}
i82527_start_chip(chip);
return 0;
}
rmb();
it_reg&=~it_mask;
iowrite32(it_reg,(void*)(candev->io_addr+PLX_INTCSR));
rmb();
it_reg&=~it_mask;
iowrite32(it_reg,(void*)(candev->io_addr+PLX_INTCSR));
i82527_stop_chip(chip);
return 0;
}
i82527_stop_chip(chip);
return 0;
}
{
retcode=CANCHIP_IRQ_HANDLED;
}
{
retcode=CANCHIP_IRQ_HANDLED;
}
}else
{
retcode=CANCHIP_IRQ_HANDLED;
}else
{
retcode=CANCHIP_IRQ_HANDLED;
{
(void)candev;
if(candev->dev_base_addr==0)
{
(void)candev;
if(candev->dev_base_addr==0)
-/* The function template_release_io is used to free the previously reserved
+/* The function template_release_io is used to free the previously reserved
* io-memory. In case you reserved more memory, don't forget to free it here.
*/
int nsi_canpci_release_io(struct candevice_t *candev)
* io-memory. In case you reserved more memory, don't forget to free it here.
*/
int nsi_canpci_release_io(struct candevice_t *candev)
unsigned long reg_reset;
struct pci_dev *pcidev = candev->sysdevptr.pcidev;
DEBUGMSG("Releasing board io\n");
unsigned long reg_reset;
struct pci_dev *pcidev = candev->sysdevptr.pcidev;
DEBUGMSG("Releasing board io\n");
nsi_canpci_disconnect_irq(candev);
// First, set RESET signal to 0
reg_reset = ioread32( (void*)(candev->io_addr+PLX_CNTRL));
nsi_canpci_disconnect_irq(candev);
// First, set RESET signal to 0
reg_reset = ioread32( (void*)(candev->io_addr+PLX_CNTRL));
kfree((void*)(candev->dev_base_addr));
pci_release_region(pcidev,0);
pci_release_region(pcidev,1);
kfree((void*)(candev->dev_base_addr));
pci_release_region(pcidev,0);
pci_release_region(pcidev,1);
- pci_release_region(pcidev,2);
- pci_release_region(pcidev,3);
+ pci_release_region(pcidev,2);
+ pci_release_region(pcidev,3);
int nsi_canpci_reset(struct candevice_t *candev)
{
unsigned long reg_reset;
int nsi_canpci_reset(struct candevice_t *candev)
{
unsigned long reg_reset;
DEBUGMSG("Board reset !!!\n");
DEBUGMSG("Board reset !!!\n");
- // Before reset disconnet interrupt to avoir freeze
+ // Before reset disconnet interrupt to avoir freeze
nsi_canpci_disconnect_irq(candev);
// First, set RESET signal to 0
reg_reset = ioread32( (void*)(candev->io_addr+PLX_CNTRL));
nsi_canpci_disconnect_irq(candev);
// First, set RESET signal to 0
reg_reset = ioread32( (void*)(candev->io_addr+PLX_CNTRL));
wmb();
udelay(2500); // Waiting for some additionnal time before writing in the 82527
DEBUGMSG("Reset done !!!\n");
wmb();
udelay(2500); // Waiting for some additionnal time before writing in the 82527
DEBUGMSG("Reset done !!!\n");
nsi_canpci_connect_irq(candev);
nsi_canpci_connect_irq(candev);
}
/* The function template_init_hw_data is used to initialize the hardware
}
/* The function template_init_hw_data is used to initialize the hardware
* the hardware uses programmable interrupts.
*/
* the hardware uses programmable interrupts.
*/
-int nsi_canpci_init_hw_data(struct candevice_t *candev)
+int nsi_canpci_init_hw_data(struct candevice_t *candev)
{
struct pci_dev *pcidev;
{
struct pci_dev *pcidev;
- CANMSG ("NSI CANPCI device found\n");
+ CANMSG ("NSI CANPCI device found\n");
/* enable it */
if (pci_enable_device (pcidev))
/* enable it */
if (pci_enable_device (pcidev))
candev->res_addr=0;
candev->nr_82527_chips=2;
candev->nr_sja1000_chips=0;
candev->res_addr=0;
candev->nr_82527_chips=2;
candev->nr_sja1000_chips=0;
- candev->nr_all_chips=2;
+ candev->nr_all_chips=2;
/* initialize device spinlock */
can_spin_lock_init(&candev->device_lock);
/* initialize device spinlock */
can_spin_lock_init(&candev->device_lock);
{
pci_release_region(pcidev,0);
pci_release_region(pcidev,1);
{
pci_release_region(pcidev,0);
pci_release_region(pcidev,1);
- pci_release_region(pcidev,2);
+ pci_release_region(pcidev,2);
pci_release_region(pcidev,0);
goto error_io;
}
pci_release_region(pcidev,0);
goto error_io;
}
- candev->dev_base_addr=(unsigned long)(kmalloc(sizeof(t_CardArray),GFP_ATOMIC));
-
+ candev->dev_base_addr=(unsigned long)(kmalloc(sizeof(t_CardArray),GFP_ATOMIC));
+
if((unsigned long)candev->dev_base_addr==0)
goto error_io;
if((unsigned long)candev->dev_base_addr==0)
goto error_io;
((t_CardArray*)(candev->dev_base_addr))->addr_BAR_remap[0]=ioremap(pci_resource_start(pcidev,0),pci_resource_len(pcidev,0) );
//PLX IO
((t_CardArray*)(candev->dev_base_addr))->addr_BAR_remap[1]=ioremap(pci_resource_start(pcidev,1),pci_resource_len(pcidev,1) );
((t_CardArray*)(candev->dev_base_addr))->addr_BAR_remap[0]=ioremap(pci_resource_start(pcidev,0),pci_resource_len(pcidev,0) );
//PLX IO
((t_CardArray*)(candev->dev_base_addr))->addr_BAR_remap[1]=ioremap(pci_resource_start(pcidev,1),pci_resource_len(pcidev,1) );
((t_CardArray*)(candev->dev_base_addr))->addr_BAR_remap[2]=ioremap(pci_resource_start(pcidev,2),pci_resource_len(pcidev,2) );
//Chip 1
((t_CardArray*)(candev->dev_base_addr))->addr_BAR_remap[3]=ioremap(pci_resource_start(pcidev,3),pci_resource_len(pcidev,3) );
((t_CardArray*)(candev->dev_base_addr))->addr_BAR_remap[2]=ioremap(pci_resource_start(pcidev,2),pci_resource_len(pcidev,2) );
//Chip 1
((t_CardArray*)(candev->dev_base_addr))->addr_BAR_remap[3]=ioremap(pci_resource_start(pcidev,3),pci_resource_len(pcidev,3) );
//Short acces to plx register
candev->io_addr=(unsigned long)(((t_CardArray*)(candev->dev_base_addr))->addr_BAR_remap[0]);
//Short acces to plx register
candev->io_addr=(unsigned long)(((t_CardArray*)(candev->dev_base_addr))->addr_BAR_remap[0]);
error_io:
can_pci_dev_put(pcidev);
error_io:
can_pci_dev_put(pcidev);
//u8 irq_line;
CANMSG ("NSI chip data init %d\n",chipnr);
i82527_fill_chipspecops(candev->chip[chipnr]);
//u8 irq_line;
CANMSG ("NSI chip data init %d\n",chipnr);
i82527_fill_chipspecops(candev->chip[chipnr]);
candev->chip[chipnr]->chipspecops->chip_config =nsi_canpci_i82527_chip_config;
candev->chip[chipnr]->chipspecops->start_chip=nsi_canpci_start_chip;
candev->chip[chipnr]->chipspecops->stop_chip=nsi_canpci_stop_chip;
candev->chip[chipnr]->chipspecops->config_irqs=nsi_canpci_config_irqs;
candev->chip[chipnr]->chipspecops->irq_handler=nsi_canpci_irq_handler;
/*candev->chip[chipnr]->chip_data = NULL;*/
candev->chip[chipnr]->chipspecops->chip_config =nsi_canpci_i82527_chip_config;
candev->chip[chipnr]->chipspecops->start_chip=nsi_canpci_start_chip;
candev->chip[chipnr]->chipspecops->stop_chip=nsi_canpci_stop_chip;
candev->chip[chipnr]->chipspecops->config_irqs=nsi_canpci_config_irqs;
candev->chip[chipnr]->chipspecops->irq_handler=nsi_canpci_irq_handler;
/*candev->chip[chipnr]->chip_data = NULL;*/
candev->chip[chipnr]->chip_base_addr= (unsigned long) (((t_CardArray*)(candev->dev_base_addr))->addr_BAR_remap[chipnr+2]);
candev->chip[chipnr]->clock = iCLOCK;
candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
candev->chip[chipnr]->chip_base_addr= (unsigned long) (((t_CardArray*)(candev->dev_base_addr))->addr_BAR_remap[chipnr+2]);
candev->chip[chipnr]->clock = iCLOCK;
candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
- * The entry obj_base_addr represents the first memory address of the message
+ * The entry obj_base_addr represents the first memory address of the message
* object. In case of the sja1000 obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* object. In case of the sja1000 obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
int nsi_canpci_init_obj_data(struct canchip_t *chip, int objnr)
{
int nsi_canpci_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=
chip->chip_base_addr+(objnr+1)*0x10;
chip->msgobj[objnr]->obj_base_addr=
chip->chip_base_addr+(objnr+1)*0x10;
can_spin_irqflags_t iflags;
char openflag; // Martin Petera: Object already opened
can_spin_irqflags_t iflags;
char openflag; // Martin Petera: Object already opened
- if ( ((obj=objects_p[MINOR_NR]) == NULL) ||
+ if ( ((obj=objects_p[MINOR_NR]) == NULL) ||
((chip=objects_p[MINOR_NR]->hostchip) == NULL) ) {
CANMSG("There is no hardware support for the device file with minor nr.: %d\n",MINOR_NR);
return -ENODEV;
((chip=objects_p[MINOR_NR]->hostchip) == NULL) ) {
CANMSG("There is no hardware support for the device file with minor nr.: %d\n",MINOR_NR);
return -ENODEV;
openflag = can_msgobj_test_fl(obj,OPENED); // Martin Petera: store previous status
can_msgobj_set_fl(obj,OPENED);
openflag = can_msgobj_test_fl(obj,OPENED); // Martin Petera: store previous status
can_msgobj_set_fl(obj,OPENED);
- if (chip->flags & CHIP_CONFIGURED)
+ if (chip->flags & CHIP_CONFIGURED)
DEBUGMSG("Device is already configured.\n");
else {
if (chip->chipspecops->chip_config(chip))
CANMSG("Error configuring chip.\n");
else
DEBUGMSG("Device is already configured.\n");
else {
if (chip->chipspecops->chip_config(chip))
CANMSG("Error configuring chip.\n");
else
- chip->flags |= CHIP_CONFIGURED;
+ chip->flags |= CHIP_CONFIGURED;
} /* End of chip configuration */
} /* End of chip configuration */
if(qends == NULL) goto no_qends;
canqueue_ends_init_kern(qends);
canuser->qends = qends;
if(qends == NULL) goto no_qends;
canqueue_ends_init_kern(qends);
canuser->qends = qends;
/*required to synchronize with RT-Linux context*/
can_spin_lock_irqsave(&canuser_manipulation_lock, iflags);
list_add(&canuser->peers, &obj->obj_users);
/*required to synchronize with RT-Linux context*/
can_spin_lock_irqsave(&canuser_manipulation_lock, iflags);
list_add(&canuser->peers, &obj->obj_users);
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,50))
MOD_INC_USE_COUNT;
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,50))
MOD_INC_USE_COUNT;
can_spin_irqflags_t iflags;
if(!obj) return -ENODEV;
can_spin_irqflags_t iflags;
if(!obj) return -ENODEV;
can_msgobj_set_fl(obj,OPENED);
can_msgobj_set_fl(obj,OPENED);
chip=obj->hostchip;
if (chip) {
if (!(chip->flags & CHIP_CONFIGURED)) {
if (chip->chipspecops->chip_config(chip))
CANMSG("Error configuring chip.\n");
else
chip=obj->hostchip;
if (chip) {
if (!(chip->flags & CHIP_CONFIGURED)) {
if (chip->chipspecops->chip_config(chip))
CANMSG("Error configuring chip.\n");
else
- chip->flags |= CHIP_CONFIGURED;
+ chip->flags |= CHIP_CONFIGURED;
if (chip->chipspecops->pre_read_config(chip,obj)<0)
CANMSG("Error initializing chip for receiving\n");
if (chip->chipspecops->pre_read_config(chip,obj)<0)
CANMSG("Error initializing chip for receiving\n");
/* mark memory as allocated from RTL memory pool */
qends->ends_flags|=CAN_ENDSF_MEM_RTL;
canuser->qends = qends;
/* mark memory as allocated from RTL memory pool */
qends->ends_flags|=CAN_ENDSF_MEM_RTL;
canuser->qends = qends;
can_spin_lock_irqsave(&canuser_manipulation_lock, iflags);
list_add(&canuser->peers, &obj->obj_users);
can_spin_unlock_irqrestore(&canuser_manipulation_lock, iflags);
can_spin_lock_irqsave(&canuser_manipulation_lock, iflags);
list_add(&canuser->peers, &obj->obj_users);
can_spin_unlock_irqrestore(&canuser_manipulation_lock, iflags);
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,50))
MOD_INC_USE_COUNT; /*is this enough for RT-Linux context ?*/
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,50))
MOD_INC_USE_COUNT; /*is this enough for RT-Linux context ?*/
no_rx_qedge:
canque_notify_bothends(edge, CANQUEUE_NOTIFY_DEAD_WANTED);
canque_edge_decref(edge);
no_rx_qedge:
canque_notify_bothends(edge, CANQUEUE_NOTIFY_DEAD_WANTED);
canque_edge_decref(edge);
struct canchip_t *chip;
struct canuser_t *canuser;
int minor_nr = RTL_MINOR_FROM_FILEPTR(fptr);
struct canchip_t *chip;
struct canuser_t *canuser;
int minor_nr = RTL_MINOR_FROM_FILEPTR(fptr);
if(minor_nr>=MAX_TOT_MSGOBJS)
return -ENODEV;
if(minor_nr>=MAX_TOT_MSGOBJS)
return -ENODEV;
- if ( ((obj=objects_p[minor_nr]) == NULL) ||
+ if ( ((obj=objects_p[minor_nr]) == NULL) ||
((chip=objects_p[minor_nr]->hostchip) == NULL) ) {
CANMSG("There is no hardware support for the device file with minor nr.: %d\n",minor_nr);
return -ENODEV;
((chip=objects_p[minor_nr]->hostchip) == NULL) ) {
CANMSG("There is no hardware support for the device file with minor nr.: %d\n",minor_nr);
return -ENODEV;
no_canuser:
atomic_dec(&obj->obj_used);
no_canuser:
atomic_dec(&obj->obj_used);
-int oscar_init_hw_data(struct candevice_t *candev)
+int oscar_init_hw_data(struct candevice_t *candev)
{
candev->res_addr = 0x0; // RESET address?
candev->nr_82527_chips = 0;
{
candev->res_addr = 0x0; // RESET address?
candev->nr_82527_chips = 0;
// i82527_fill_chipspecops(candev->chip[chipnr]);
// sja1000_fill_chipspecops(candev->chip[chipnr]);
sja1000p_fill_chipspecops(candev->chip[chipnr]);
// i82527_fill_chipspecops(candev->chip[chipnr]);
// sja1000_fill_chipspecops(candev->chip[chipnr]);
sja1000p_fill_chipspecops(candev->chip[chipnr]);
candev->chip[chipnr]->chip_base_addr = can_ioport2ioptr(candev->io_addr);
candev->chip[chipnr]->clock = 12000000;
candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP; // we use an external tranceiver
candev->chip[chipnr]->chip_base_addr = can_ioport2ioptr(candev->io_addr);
candev->chip[chipnr]->clock = 12000000;
candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP; // we use an external tranceiver
candev->chip[chipnr]->int_cpu_reg = 0;
candev->chip[chipnr]->int_clk_reg = 0;
candev->chip[chipnr]->int_bus_reg = 0;
candev->chip[chipnr]->int_cpu_reg = 0;
candev->chip[chipnr]->int_clk_reg = 0;
candev->chip[chipnr]->int_bus_reg = 0;
return 0;
}
int oscar_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr = chip->chip_base_addr;
return 0;
}
int oscar_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr = chip->chip_base_addr;
return 0;
}
int oscar_program_irq(struct candevice_t *candev)
{
// CAN_IRQ_L (active low) interrupt: PF2 / INT2 on our LH7A400 SoC
return 0;
}
int oscar_program_irq(struct candevice_t *candev)
{
// CAN_IRQ_L (active low) interrupt: PF2 / INT2 on our LH7A400 SoC
- // This IRQ is set up already by the kernel.
+ // This IRQ is set up already by the kernel.
* we need it global, else we have to change many internal functions.
* pc-i03_base_addr is initialized in pc-i03_init_chip_data().
*/
* we need it global, else we have to change many internal functions.
* pc-i03_base_addr is initialized in pc-i03_init_chip_data().
*/
-unsigned int pci03_base_addr;
+unsigned int pci03_base_addr;
/*
* IO_RANGE is the io-memory range that gets reserved, please adjust according
/*
* IO_RANGE is the io-memory range that gets reserved, please adjust according
*
* The function pci03_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
*
* The function pci03_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
- * will have to add the code to reserve this memory as well.
+ * will have to add the code to reserve this memory as well.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* pci03_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
* pci03_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
- * The function pci03_reset() is used to give a hardware reset. This is
- * rather hardware specific so I haven't included example code. Don't forget to
+ * The function pci03_reset() is used to give a hardware reset. This is
+ * rather hardware specific so I haven't included example code. Don't forget to
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/pc-i03.c
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/pc-i03.c
udelay(20000);
pci03_write_register(0x00, pci03_base_addr + SJACR);
udelay(20000);
pci03_write_register(0x00, pci03_base_addr + SJACR);
/* Check hardware reset status */
i=0;
while ( (pci03_read_register(pci03_base_addr + SJACR) & sjaCR_RR)
/* Check hardware reset status */
i=0;
while ( (pci03_read_register(pci03_base_addr + SJACR) & sjaCR_RR)
* Return Value: The function always returns zero
* File: src/pc-i03.c
*/
* Return Value: The function always returns zero
* File: src/pc-i03.c
*/
-int pci03_init_hw_data(struct candevice_t *candev)
+int pci03_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=NR_82527;
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=NR_82527;
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
- * The entry @int_bus_reg holds hardware specific options for the Bus
+ * The entry @int_bus_reg holds hardware specific options for the Bus
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* Return Value: The function always returns zero
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* Return Value: The function always returns zero
candev->chip[chipnr]->chip_base_addr=candev->io_addr;
candev->chip[chipnr]->clock = 16000000;
candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
candev->chip[chipnr]->chip_base_addr=candev->io_addr;
candev->chip[chipnr]->clock = 16000000;
candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
- candev->chip[chipnr]->sja_ocr_reg = sjaOCR_MODE_NORMAL |
+ candev->chip[chipnr]->sja_ocr_reg = sjaOCR_MODE_NORMAL |
sjaOCR_TX0_HL | sjaOCR_TX1_LZ;
return 0;
sjaOCR_TX0_HL | sjaOCR_TX1_LZ;
return 0;
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
- * The entry @obj_base_addr represents the first memory address of the message
+ * The entry @obj_base_addr represents the first memory address of the message
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
int pci03_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
int pci03_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
* pci03_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
* pci03_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
- * The function pci03_program_irq() is used for hardware that uses
+ * The function pci03_program_irq() is used for hardware that uses
* programmable interrupts. If your hardware doesn't use programmable interrupts
* programmable interrupts. If your hardware doesn't use programmable interrupts
- * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
- * leave this function unedited. Again this function is hardware specific so
+ * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
+ * leave this function unedited. Again this function is hardware specific so
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/pc-i03.c
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/pc-i03.c
struct parport *p;
DEBUGMSG("%s: pcan_dongle_probe() - PARPORT_SUBSYSTEM\n", DEVICE_NAME);
struct parport *p;
DEBUGMSG("%s: pcan_dongle_probe() - PARPORT_SUBSYSTEM\n", DEVICE_NAME);
// probe does not probe for the sja1000 device here - this is done at sja1000_open()
p = parport_find_base(dng->dwPort);
if (!p)
// probe does not probe for the sja1000 device here - this is done at sja1000_open()
p = parport_find_base(dng->dwPort);
if (!p)
- dng->pardev = parport_register_device(p, "can", NULL, NULL,
+ dng->pardev = parport_register_device(p, "can", NULL, NULL,
(PARPORT_IRQ_HANLDER)dng->chip->chipspecops->irq_handler,
0, (void *)dng->chip);
(PARPORT_IRQ_HANLDER)dng->chip->chipspecops->irq_handler,
0, (void *)dng->chip);
// DEBUGMSG("datos IRQ: irq_handler=0x%x p=0x%x dng->chip=0x%x dng->pardev->port->irq=0x%x irq_handler2=0x%x\n",
// dng->chip->chipspecops->irq_handler,
// p,dng->chip,dng->pardev->port->irq, &sja1000p_irq_handler);
// DEBUGMSG("datos IRQ: irq_handler=0x%x p=0x%x dng->chip=0x%x dng->pardev->port->irq=0x%x irq_handler2=0x%x\n",
// dng->chip->chipspecops->irq_handler,
// p,dng->chip,dng->pardev->port->irq, &sja1000p_irq_handler);
if (!dng->pardev)
{
DEBUGMSG("found no parport device\n");
if (!dng->pardev)
{
DEBUGMSG("found no parport device\n");
{
int result = 0;
u16 wPort;
{
int result = 0;
u16 wPort;
DEBUGMSG("%s: pcan_dongle_open()\n", DEVICE_NAME);
DEBUGMSG("%s: pcan_dongle_open()\n", DEVICE_NAME);
result = parport_claim(dng->pardev);
result = parport_claim(dng->pardev);
if (!result)
{
if (dng->pardev->port->irq == PARPORT_IRQ_NONE)
if (!result)
{
if (dng->pardev->port->irq == PARPORT_IRQ_NONE)
- DEBUGMSG(KERN_ERR "%s: can't claim parport.\n", DEVICE_NAME);
-
+ DEBUGMSG(KERN_ERR "%s: can't claim parport.\n", DEVICE_NAME);
+
// save port state
if (!result)
{
wPort = (u16)dng->dwPort;
// save port state
if (!result)
{
wPort = (u16)dng->dwPort;
// save old port contents
dng->ucOldDataContent = can_inb(wPort);
dng->ucOldControlContent = can_inb(wPort + 2);
// save old port contents
dng->ucOldDataContent = can_inb(wPort);
dng->ucOldControlContent = can_inb(wPort + 2);
// switch to epp mode if possible
if (dng->wType == HW_DONGLE_SJA_EPP)
// switch to epp mode if possible
if (dng->wType == HW_DONGLE_SJA_EPP)
// enable irqs
_parport_enable_irq(dng); // parport_enable_irq(dng->pardev->port); not working since 2.4.18
// enable irqs
_parport_enable_irq(dng); // parport_enable_irq(dng->pardev->port); not working since 2.4.18
u16 wPort = (u16)dng->dwPort;
DEBUGMSG("%s: pcan_dongle_release()\n", DEVICE_NAME);
u16 wPort = (u16)dng->dwPort;
DEBUGMSG("%s: pcan_dongle_release()\n", DEVICE_NAME);
// disable irqs
_parport_disable_irq(dng); // parport_disable_irq(dng->pardev->port); not working since 2.4.18
if (dng->wType == HW_DONGLE_SJA_EPP)
restoreECR(dng);
// disable irqs
_parport_disable_irq(dng); // parport_disable_irq(dng->pardev->port); not working since 2.4.18
if (dng->wType == HW_DONGLE_SJA_EPP)
restoreECR(dng);
// restore port state
can_outb(dng->ucOldDataContent, wPort);
can_outb(dng->ucOldControlContent, wPort + 2);
// restore port state
can_outb(dng->ucOldDataContent, wPort);
can_outb(dng->ucOldControlContent, wPort + 2);
parport_release(dng->pardev);
parport_release(dng->pardev);
return 0;
}
int pcan_dongle_init(struct DONGLE_PORT *dng, u32 dwPort, u16 wIrq, char *type)
{
int err;
return 0;
}
int pcan_dongle_init(struct DONGLE_PORT *dng, u32 dwPort, u16 wIrq, char *type)
{
int err;
DEBUGMSG("%s: pcan_dongle_init(), dng_devices = %d\n", DEVICE_NAME, dng_devices);
DEBUGMSG("%s: pcan_dongle_init(), dng_devices = %d\n", DEVICE_NAME, dng_devices);
dng->type = type;
dng->wType = (!strncmp(dongle_type, "sp", 4)) ? HW_DONGLE_SJA : HW_DONGLE_SJA_EPP;
dng->type = type;
dng->wType = (!strncmp(dongle_type, "sp", 4)) ? HW_DONGLE_SJA : HW_DONGLE_SJA_EPP;
-
- // set this before any instructions, fill struct pcandev, part 1
- dng->wInitStep = 0;
-
+
+ // set this before any instructions, fill struct pcandev, part 1
+ dng->wInitStep = 0;
+
// fill struct pcandev, 1st check if a default is set
if (!dwPort)
{
// there's no default available
if (dng_devices >= DNG_DEFAULT_COUNT)
return -ENODEV;
// fill struct pcandev, 1st check if a default is set
if (!dwPort)
{
// there's no default available
if (dng_devices >= DNG_DEFAULT_COUNT)
return -ENODEV;
dng->dwPort = dng_ports[dng_devices];
}
else
dng->dwPort = dwPort;
dng->dwPort = dng_ports[dng_devices];
}
else
dng->dwPort = dwPort;
if (!wIrq)
{
if (dng_devices >= DNG_DEFAULT_COUNT)
return -ENODEV;
if (!wIrq)
{
if (dng_devices >= DNG_DEFAULT_COUNT)
return -ENODEV;
-
- dng->wIrq = dng_irqs[dng_devices];
+
+ dng->wIrq = dng_irqs[dng_devices];
if (dng->wType == HW_DONGLE_SJA)
{
if (dng->wType == HW_DONGLE_SJA)
{
- dng->nMinor = PCAN_DNG_SP_MINOR_BASE + sp_devices;
+ dng->nMinor = PCAN_DNG_SP_MINOR_BASE + sp_devices;
dng->wEcr = 0; // set to anything
}
else
{
dng->wEcr = 0; // set to anything
}
else
{
- dng->nMinor = PCAN_DNG_EPP_MINOR_BASE + epp_devices;
+ dng->nMinor = PCAN_DNG_EPP_MINOR_BASE + epp_devices;
dng->wEcr = (u16)dng->dwPort + 0x402;
}
dng->wEcr = (u16)dng->dwPort + 0x402;
}
-
- // is the device really available?
+
+ // is the device really available?
if ((err = pcan_dongle_probe(dng)) < 0)
return err;
if ((err = pcan_dongle_probe(dng)) < 0)
return err;
if (dng->wType == HW_DONGLE_SJA)
sp_devices++;
else
epp_devices++;
if (dng->wType == HW_DONGLE_SJA)
sp_devices++;
else
epp_devices++;
dng_devices = sp_devices + epp_devices;
dng_devices = sp_devices + epp_devices;
- DEBUGMSG(KERN_INFO "%s: %s device minor %d prepared (io=0x%04x,irq=%d)\n", DEVICE_NAME,
+ DEBUGMSG(KERN_INFO "%s: %s device minor %d prepared (io=0x%04x,irq=%d)\n", DEVICE_NAME,
dng->type, dng->nMinor, dng->dwPort, dng->wIrq);
dng->type, dng->nMinor, dng->dwPort, dng->wIrq);
*
* The function template_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
*
* The function template_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
- * will have to add the code to reserve this memory as well.
+ * will have to add the code to reserve this memory as well.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
{
/* release I/O port */
pcan_dongle_release(&dongle_port);
{
/* release I/O port */
pcan_dongle_release(&dongle_port);
pcan_dongle_cleanup(&dongle_port);
return 0;
pcan_dongle_cleanup(&dongle_port);
return 0;
* template_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
* template_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
- * The function template_reset() is used to give a hardware reset. This is
- * rather hardware specific so I haven't included example code. Don't forget to
+ * The function template_reset() is used to give a hardware reset. This is
+ * rather hardware specific so I haven't included example code. Don't forget to
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
struct canchip_t *chip;
int chipnr;
unsigned cdr;
struct canchip_t *chip;
int chipnr;
unsigned cdr;
DEBUGMSG("Resetting pcan_dongle hardware ...\n");
for(chipnr=0;chipnr<candev->nr_sja1000_chips;chipnr++) {
chip=candev->chip[chipnr];
pcan_dongle_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
udelay(1000);
DEBUGMSG("Resetting pcan_dongle hardware ...\n");
for(chipnr=0;chipnr<candev->nr_sja1000_chips;chipnr++) {
chip=candev->chip[chipnr];
pcan_dongle_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
udelay(1000);
cdr=pcan_dongle_read_register(chip->chip_base_addr+SJACDR);
pcan_dongle_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
cdr=pcan_dongle_read_register(chip->chip_base_addr+SJACDR);
pcan_dongle_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
* Return Value: The function always returns zero
* File: src/template.c
*/
* Return Value: The function always returns zero
* File: src/template.c
*/
-int pcan_dongle_init_hw_data(struct candevice_t *candev)
+int pcan_dongle_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=NR_82527;
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=NR_82527;
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
- * The entry @int_bus_reg holds hardware specific options for the Bus
+ * The entry @int_bus_reg holds hardware specific options for the Bus
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* Return Value: The function always returns zero
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* Return Value: The function always returns zero
candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
candev->chip[chipnr]->sja_ocr_reg = sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH;
candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
candev->chip[chipnr]->sja_ocr_reg = sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH;
- candev->chip[chipnr]->flags |= CHIP_IRQ_CUSTOM; // I don't want setup call request_irq
- // I'm going to do it through parport_register_device
+ candev->chip[chipnr]->flags |= CHIP_IRQ_CUSTOM; // I don't want setup call request_irq
+ // I'm going to do it through parport_register_device
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
- * The entry @obj_base_addr represents the first memory address of the message
+ * The entry @obj_base_addr represents the first memory address of the message
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
chip->msgobj[objnr]->obj_flags=0;
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
chip->msgobj[objnr]->obj_flags=0;
* template_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
* template_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
- * The function template_program_irq() is used for hardware that uses
+ * The function template_program_irq() is used for hardware that uses
* programmable interrupts. If your hardware doesn't use programmable interrupts
* programmable interrupts. If your hardware doesn't use programmable interrupts
- * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
- * leave this function unedited. Again this function is hardware specific so
+ * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
+ * leave this function unedited. Again this function is hardware specific so
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
u8 val;
address -= dongle_port.chip->chip_base_addr; // it's in mutiplexed mode
u8 val;
address -= dongle_port.chip->chip_base_addr; // it's in mutiplexed mode
if (dongle_port.wType == HW_DONGLE_SJA)
val = pcan_dongle_sp_readreg(&dongle_port, (u8) address); // functions for SP port
if (dongle_port.wType == HW_DONGLE_SJA)
val = pcan_dongle_sp_readreg(&dongle_port, (u8) address); // functions for SP port
val = pcan_dongle_epp_readreg(&dongle_port, (u8) address); // functions for EPP port
// DEBUGMSG("Read Reg at: 0x%lx data 0x%x \n", address, val);
val = pcan_dongle_epp_readreg(&dongle_port, (u8) address); // functions for EPP port
// DEBUGMSG("Read Reg at: 0x%lx data 0x%x \n", address, val);
{
unsigned long io_addr;
int i;
{
unsigned long io_addr;
int i;
if (pccand_request_io(candev))
return -ENODEV;
if (pccand_request_io(candev))
return -ENODEV;
can_outb(0x00,candev->res_addr);
}
outb_p(0x01,candev->res_addr);
can_outb(0x00,candev->res_addr);
}
outb_p(0x01,candev->res_addr);
can_outb(0x00,candev->chip[2]->chip_base_addr+SJACR);
can_outb(0x00,candev->chip[3]->chip_base_addr+SJACR);
can_outb(0x00,candev->chip[2]->chip_base_addr+SJACR);
can_outb(0x00,candev->chip[3]->chip_base_addr+SJACR);
CANMSG("Please check your hardware.\n");
return -ENODEV;
}
CANMSG("Please check your hardware.\n");
return -ENODEV;
}
DEBUGMSG("Chip%d reset status ok.\n",chip_nr);
}
for (chip_nr=2; chip_nr<4; chip_nr++) {
DEBUGMSG("Chip%d reset status ok.\n",chip_nr);
}
for (chip_nr=2; chip_nr<4; chip_nr++) {
can_enable_irq(candev->chip[i]->chip_irq);
return 0;
can_enable_irq(candev->chip[i]->chip_irq);
return 0;
int pccan_init_hw_data(struct candevice_t *candev)
{
int pccan_init_hw_data(struct candevice_t *candev)
{
candev->chip[chipnr]->int_clk_reg=iCLK_SL1;
candev->chip[chipnr]->int_bus_reg=iBUS_CBY;
candev->chip[chipnr]->sja_cdr_reg = 0;
candev->chip[chipnr]->int_clk_reg=iCLK_SL1;
candev->chip[chipnr]->int_bus_reg=iBUS_CBY;
candev->chip[chipnr]->sja_cdr_reg = 0;
- candev->chip[chipnr]->sja_ocr_reg = 0;
+ candev->chip[chipnr]->sja_ocr_reg = 0;
}
else{
sja1000_fill_chipspecops(candev->chip[chipnr]);
}
else{
sja1000_fill_chipspecops(candev->chip[chipnr]);
candev->chip[chipnr]->int_bus_reg = 0;
candev->chip[chipnr]->sja_cdr_reg =
sjaCDR_CLK_OFF;
candev->chip[chipnr]->int_bus_reg = 0;
candev->chip[chipnr]->sja_cdr_reg =
sjaCDR_CLK_OFF;
- candev->chip[chipnr]->sja_ocr_reg =
- sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH;
+ candev->chip[chipnr]->sja_ocr_reg =
+ sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH;
}
candev->chip[chipnr]->chip_base_addr=can_ioport2ioptr(0x1000*chipnr+0x2000+candev->io_addr);
}
}
candev->chip[chipnr]->chip_base_addr=can_ioport2ioptr(0x1000*chipnr+0x2000+candev->io_addr);
}
candev->chip[chipnr]->int_clk_reg = 0;
candev->chip[chipnr]->int_bus_reg = 0;
candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CLK_OFF;
candev->chip[chipnr]->int_clk_reg = 0;
candev->chip[chipnr]->int_bus_reg = 0;
candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CLK_OFF;
- candev->chip[chipnr]->sja_ocr_reg =
- sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH;
+ candev->chip[chipnr]->sja_ocr_reg =
+ sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH;
}
candev->chip[chipnr]->clock = 16000000;
return 0;
}
candev->chip[chipnr]->clock = 16000000;
return 0;
int pccan_init_obj_data(struct canchip_t *chip, int objnr)
{
int pccan_init_obj_data(struct canchip_t *chip, int objnr)
{
inline void pccan_write_register(unsigned data, can_ioptr_t address)
{
inline void pccan_write_register(unsigned data, can_ioptr_t address)
{
- can_outb(data,address);
+ can_outb(data,address);
}
unsigned pccan_read_register(can_ioptr_t address)
}
unsigned pccan_read_register(can_ioptr_t address)
*
* The function pcccan_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
*
* The function pcccan_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
- * will have to add the code to reserve this memory as well.
+ * will have to add the code to reserve this memory as well.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* pcccan_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
* pcccan_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
- * The function pcccan_reset() is used to give a hardware reset. This is
- * rather hardware specific so I haven't included example code. Don't forget to
+ * The function pcccan_reset() is used to give a hardware reset. This is
+ * rather hardware specific so I haven't included example code. Don't forget to
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/pcccan.c
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/pcccan.c
DEBUGMSG("Chip reset status ok.\n");
return 0;
DEBUGMSG("Chip reset status ok.\n");
return 0;
#define NR_82527 1
#define NR_SJA1000 0
#define NR_82527 1
#define NR_SJA1000 0
* Return Value: The function always returns zero
* File: src/pcccan.c
*/
* Return Value: The function always returns zero
* File: src/pcccan.c
*/
-int pcccan_init_hw_data(struct candevice_t *candev)
+int pcccan_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=candev->io_addr;
candev->nr_82527_chips=NR_82527;
{
candev->res_addr=candev->io_addr;
candev->nr_82527_chips=NR_82527;
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
- * The entry @int_bus_reg holds hardware specific options for the Bus
+ * The entry @int_bus_reg holds hardware specific options for the Bus
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* The entry @int_cpu_reg holds hardware specific options for the cpu interface
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* The entry @int_cpu_reg holds hardware specific options for the cpu interface
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
- * The entry @obj_base_addr represents the first memory address of the message
+ * The entry @obj_base_addr represents the first memory address of the message
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
int pcccan_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=(objnr+1)*0x10;
int pcccan_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=(objnr+1)*0x10;
* pcccan_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
* pcccan_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
- * The function pcccan_program_irq() is used for hardware that uses
+ * The function pcccan_program_irq() is used for hardware that uses
* programmable interrupts. If your hardware doesn't use programmable interrupts
* programmable interrupts. If your hardware doesn't use programmable interrupts
- * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
- * leave this function unedited. Again this function is hardware specific so
+ * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
+ * leave this function unedited. Again this function is hardware specific so
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/pcccan.c
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/pcccan.c
*
* The function template_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
*
* The function template_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
- * will have to add the code to reserve this memory as well.
+ * will have to add the code to reserve this memory as well.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
can_release_mem_region(candev->io_addr,IO_RANGE);
return -ENODEV;
CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
can_release_mem_region(candev->io_addr,IO_RANGE);
return -ENODEV;
}
can_base_addr_fixup(candev, remap_addr);
DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
}
can_base_addr_fixup(candev, remap_addr);
DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
* template_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
* template_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
- * The function template_reset() is used to give a hardware reset. This is
- * rather hardware specific so I haven't included example code. Don't forget to
+ * The function template_reset() is used to give a hardware reset. This is
+ * rather hardware specific so I haven't included example code. Don't forget to
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
int i=0;
struct canchip_t *chip;
int chipnr;
int i=0;
struct canchip_t *chip;
int chipnr;
DEBUGMSG("Resetting pcm3680 hardware ...\n");
for(chipnr=0;chipnr<candev->nr_sja1000_chips;chipnr++) {
chip=candev->chip[chipnr];
DEBUGMSG("Resetting pcm3680 hardware ...\n");
for(chipnr=0;chipnr<candev->nr_sja1000_chips;chipnr++) {
chip=candev->chip[chipnr];
* Return Value: The function always returns zero
* File: src/template.c
*/
* Return Value: The function always returns zero
* File: src/template.c
*/
-int pcm3680_init_hw_data(struct candevice_t *candev)
+int pcm3680_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=NR_82527;
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=NR_82527;
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
- * The entry @int_bus_reg holds hardware specific options for the Bus
+ * The entry @int_bus_reg holds hardware specific options for the Bus
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* Return Value: The function always returns zero
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* Return Value: The function always returns zero
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
- * The entry @obj_base_addr represents the first memory address of the message
+ * The entry @obj_base_addr represents the first memory address of the message
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
int pcm3680_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
int pcm3680_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
* template_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
* template_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
- * The function template_program_irq() is used for hardware that uses
+ * The function template_program_irq() is used for hardware that uses
* programmable interrupts. If your hardware doesn't use programmable interrupts
* programmable interrupts. If your hardware doesn't use programmable interrupts
- * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
- * leave this function unedited. Again this function is hardware specific so
+ * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
+ * leave this function unedited. Again this function is hardware specific so
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
*
* The function pimx1_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
*
* The function pimx1_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
- * will have to add the code to reserve this memory as well.
+ * will have to add the code to reserve this memory as well.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
CANMSG("PiMX1 board hardware setup failure\n");
return -ENODEV;
}
CANMSG("PiMX1 board hardware setup failure\n");
return -ENODEV;
}
if (!can_request_mem_region(candev->io_addr,PIMX1_CAN_IO_RANGE,DEVICE_NAME " - pimx1")) {
CANMSG("Unable to request IO-memory: 0x%lx\n",candev->io_addr);
return -ENODEV;
if (!can_request_mem_region(candev->io_addr,PIMX1_CAN_IO_RANGE,DEVICE_NAME " - pimx1")) {
CANMSG("Unable to request IO-memory: 0x%lx\n",candev->io_addr);
return -ENODEV;
return -ENODEV;
}
can_base_addr_fixup(candev, remap_addr);
return -ENODEV;
}
can_base_addr_fixup(candev, remap_addr);
- CANMSG("Registered IO-memory: 0x%lx - 0x%lx (VMA 0x%lx)\n",
+ CANMSG("Registered IO-memory: 0x%lx - 0x%lx (VMA 0x%lx)\n",
candev->io_addr, candev->io_addr + PIMX1_CAN_IO_RANGE - 1, (long)remap_addr);
return 0;
}
candev->io_addr, candev->io_addr + PIMX1_CAN_IO_RANGE - 1, (long)remap_addr);
return 0;
}
* pimx1_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
* pimx1_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
- * The function pimx1_reset() is used to give a hardware reset. This is
- * rather hardware specific so I haven't included example code. Don't forget to
+ * The function pimx1_reset() is used to give a hardware reset. This is
+ * rather hardware specific so I haven't included example code. Don't forget to
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/pikronisa.c
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/pikronisa.c
int i;
struct canchip_t *chip=candev->chip[0];
unsigned cdr;
int i;
struct canchip_t *chip=candev->chip[0];
unsigned cdr;
pimx1_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
udelay(1000);
pimx1_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
udelay(1000);
cdr=pimx1_read_register(chip->chip_base_addr+SJACDR);
pimx1_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
cdr=pimx1_read_register(chip->chip_base_addr+SJACDR);
pimx1_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
pimx1_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
pimx1_write_register(0, chip->chip_base_addr+SJAIER);
pimx1_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
pimx1_write_register(0, chip->chip_base_addr+SJAIER);
* Return Value: The function always returns zero
* File: src/pikronisa.c
*/
* Return Value: The function always returns zero
* File: src/pikronisa.c
*/
-int pimx1_init_hw_data(struct candevice_t *candev)
+int pimx1_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=PIMX1_CAN_RESET_ADDR;
candev->io_addr=PIMX1_CAN_IO_ADDRESS;
{
candev->res_addr=PIMX1_CAN_RESET_ADDR;
candev->io_addr=PIMX1_CAN_IO_ADDRESS;
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
- * The entry @int_bus_reg holds hardware specific options for the Bus
+ * The entry @int_bus_reg holds hardware specific options for the Bus
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* The entry @int_cpu_reg holds hardware specific options for the cpu interface
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* The entry @int_cpu_reg holds hardware specific options for the cpu interface
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
- * The entry @obj_base_addr represents the first memory address of the message
+ * The entry @obj_base_addr represents the first memory address of the message
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* pimx1_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
* pimx1_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
- * The function pimx1_program_irq() is used for hardware that uses
+ * The function pimx1_program_irq() is used for hardware that uses
* programmable interrupts. If your hardware doesn't use programmable interrupts
* programmable interrupts. If your hardware doesn't use programmable interrupts
- * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
- * leave this function unedited. Again this function is hardware specific so
+ * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
+ * leave this function unedited. Again this function is hardware specific so
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/pikronisa.c
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/pikronisa.c
/* can_delete_procdir removes the entire CAN tree from the proc system */
int can_delete_procdir(void)
{
/* can_delete_procdir removes the entire CAN tree from the proc system */
int can_delete_procdir(void)
{
- if (remove_channel_from_procdir())
+ if (remove_channel_from_procdir())
return -ENODEV;
/* name: "can" */
return -ENODEV;
/* name: "can" */
- if (can_remove_proc_entry(base->can_proc_entry, CAN_PROC_ROOT))
+ if (can_remove_proc_entry(base->can_proc_entry, CAN_PROC_ROOT))
return -ENODEV;
return 0;
return -ENODEV;
return 0;
ret = copy_to_user(buffer, &slot->msg, sizeof(struct canmsg_t));
canque_free_outslot(qends, qedge, slot);
buffer += sizeof(struct canmsg_t);
bytes_to_copy = length-sizeof(struct canmsg_t);
if(ret) return -EFAULT;
ret = copy_to_user(buffer, &slot->msg, sizeof(struct canmsg_t));
canque_free_outslot(qends, qedge, slot);
buffer += sizeof(struct canmsg_t);
bytes_to_copy = length-sizeof(struct canmsg_t);
if(ret) return -EFAULT;
while (bytes_to_copy > 0) {
ret=canque_test_outslot(qends, &qedge, &slot);
if(ret<0)
while (bytes_to_copy > 0) {
ret=canque_test_outslot(qends, &qedge, &slot);
if(ret<0)
#include "../include/can_iortl.h"
/* This is the 'Normal' read handler for normal transmission messages */
#include "../include/can_iortl.h"
/* This is the 'Normal' read handler for normal transmission messages */
-static inline
-ssize_t can_std_read_rtl(struct canque_ends_t *qends, int nonblock_fl,
+static inline
+ssize_t can_std_read_rtl(struct canque_ends_t *qends, int nonblock_fl,
char *buffer, size_t length)
{
int ret;
char *buffer, size_t length)
{
int ret;
int bytes_to_copy;
struct canque_edge_t *qedge;
struct canque_slot_t *slot;
int bytes_to_copy;
struct canque_edge_t *qedge;
struct canque_slot_t *slot;
ret=canque_test_outslot(qends, &qedge, &slot);
if(ret<0){
if (nonblock_fl) {
ret=canque_test_outslot(qends, &qedge, &slot);
if(ret<0){
if (nonblock_fl) {
*(msg_buff++)=slot->msg;
canque_free_outslot(qends, qedge, slot);
bytes_to_copy = length-sizeof(struct canmsg_t);
*(msg_buff++)=slot->msg;
canque_free_outslot(qends, qedge, slot);
bytes_to_copy = length-sizeof(struct canmsg_t);
while (bytes_to_copy > 0) {
ret=canque_test_outslot(qends, &qedge, &slot);
if(ret<0)
while (bytes_to_copy > 0) {
ret=canque_test_outslot(qends, &qedge, &slot);
if(ret<0)
ssize_t can_read_rtl_posix(struct rtl_file *fptr, char *buffer,
size_t length, loff_t *ppos)
{
ssize_t can_read_rtl_posix(struct rtl_file *fptr, char *buffer,
size_t length, loff_t *ppos)
{
- struct canuser_t *canuser =
+ struct canuser_t *canuser =
(struct canuser_t *)can_get_rtl_file_private_data(fptr);
struct canque_ends_t *qends;
int ret;
(struct canuser_t *)can_get_rtl_file_private_data(fptr);
struct canque_ends_t *qends;
int ret;
CANMSG("can_close: bad canuser magic\n");
return -ENODEV;
}
CANMSG("can_close: bad canuser magic\n");
return -ENODEV;
}
obj = canuser->msgobj;
qends = canuser->qends;
obj = canuser->msgobj;
qends = canuser->qends;
int sh7760_reset(struct candevice_t *candev)
{
int sh7760_reset(struct candevice_t *candev)
{
DEBUGMSG("Resetting HCAN2 chips ...\n");
for (i = 0; i < candev->nr_all_chips; i++)
DEBUGMSG("Resetting HCAN2 chips ...\n");
for (i = 0; i < candev->nr_all_chips; i++)
-int sh7760_init_hw_data(struct candevice_t *candev)
+int sh7760_init_hw_data(struct candevice_t *candev)
{
/* candev->res_addr = RESET_ADDR; */
candev->nr_82527_chips = NR_82527;
{
/* candev->res_addr = RESET_ADDR; */
candev->nr_82527_chips = NR_82527;
int sh7760_program_irq(struct candevice_t *candev)
{
int sh7760_program_irq(struct candevice_t *candev)
{
- /* sh7760 doesn't use programmable interrupt */
+ /* sh7760 doesn't use programmable interrupt */
return -ENODEV;
/* Set mode, clock out, comparator */
return -ENODEV;
/* Set mode, clock out, comparator */
- can_write_reg(chip,chip->sja_cdr_reg,SJACDR);
+ can_write_reg(chip,chip->sja_cdr_reg,SJACDR);
/* Set driver output configuration */
/* Set driver output configuration */
- can_write_reg(chip,chip->sja_ocr_reg,SJAOCR);
+ can_write_reg(chip,chip->sja_ocr_reg,SJAOCR);
if (sja1000_standard_mask(chip,0x0000, 0xffff))
return -ENODEV;
if (sja1000_standard_mask(chip,0x0000, 0xffff))
return -ENODEV;
if (!chip->baudrate)
chip->baudrate=1000000;
if (sja1000_baud_rate(chip,chip->baudrate,chip->clock,0,75,0))
return -ENODEV;
/* Enable hardware interrupts */
if (!chip->baudrate)
chip->baudrate=1000000;
if (sja1000_baud_rate(chip,chip->baudrate,chip->clock,0,75,0))
return -ENODEV;
/* Enable hardware interrupts */
- can_write_reg(chip,(sjaCR_RIE|sjaCR_TIE|sjaCR_EIE|sjaCR_OIE),SJACR);
+ can_write_reg(chip,(sjaCR_RIE|sjaCR_TIE|sjaCR_EIE|sjaCR_OIE),SJACR);
sja1000_disable_configuration(chip);
sja1000_disable_configuration(chip);
if (sja1000_enable_configuration(chip))
return -ENODEV;
if (sja1000_enable_configuration(chip))
return -ENODEV;
- /* The acceptance code bits (SJAACR bits 0-7) and the eight most
+ /* The acceptance code bits (SJAACR bits 0-7) and the eight most
* significant bits of the message identifier (id.10 to id.3) must be
* significant bits of the message identifier (id.10 to id.3) must be
- * equal to those bit positions which are marked relevant by the
+ * equal to those bit positions which are marked relevant by the
* acceptance mask bits (SJAAMR bits 0-7).
* (id.10 to id.3) = (SJAACR.7 to SJAACR.0) v (SJAAMR.7 to SJAAMR.0)
* (Taken from Philips sja1000 Data Sheet)
*/
write_code = (unsigned char) code >> 3;
write_mask = (unsigned char) mask >> 3;
* acceptance mask bits (SJAAMR bits 0-7).
* (id.10 to id.3) = (SJAACR.7 to SJAACR.0) v (SJAAMR.7 to SJAAMR.0)
* (Taken from Philips sja1000 Data Sheet)
*/
write_code = (unsigned char) code >> 3;
write_mask = (unsigned char) mask >> 3;
can_write_reg(chip,write_code,SJAACR);
can_write_reg(chip,write_mask,SJAAMR);
can_write_reg(chip,write_code,SJAACR);
can_write_reg(chip,write_mask,SJAAMR);
int best_error = 1000000000, error;
int best_tseg=0, best_brp=0, best_rate=0, brp=0;
int tseg=0, tseg1=0, tseg2=0;
int best_error = 1000000000, error;
int best_tseg=0, best_brp=0, best_rate=0, brp=0;
int tseg=0, tseg1=0, tseg2=0;
if (sja1000_enable_configuration(chip))
return -ENODEV;
if (sja1000_enable_configuration(chip))
return -ENODEV;
int sja1000_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj)
{
int i;
int sja1000_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj)
{
int i;
i=can_read_reg(chip,SJASR);
i=can_read_reg(chip,SJASR);
if (!(i&sjaSR_RBS)) {
//Temp
for (i=0; i<0x20; i++)
if (!(i&sjaSR_RBS)) {
//Temp
for (i=0; i<0x20; i++)
sja1000_start_chip(chip);
// disable interrupts for a moment
sja1000_start_chip(chip);
// disable interrupts for a moment
- can_write_reg(chip, 0, SJACR);
+ can_write_reg(chip, 0, SJACR);
sja1000_irq_read_handler(chip, obj);
sja1000_irq_read_handler(chip, obj);
#define MAX_TRANSMIT_WAIT_LOOPS 10
#define MAX_TRANSMIT_WAIT_LOOPS 10
-int sja1000_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
+int sja1000_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
int i=0, id=0;
struct canmsg_t *msg)
{
int i=0, id=0;
sja1000_start_chip(chip); //sja1000 goes automatically into reset mode on errors
/* Wait until Transmit Buffer Status is released */
sja1000_start_chip(chip); //sja1000 goes automatically into reset mode on errors
/* Wait until Transmit Buffer Status is released */
- while ( !(can_read_reg(chip, SJASR) & sjaSR_TBS) &&
+ while ( !(can_read_reg(chip, SJASR) & sjaSR_TBS) &&
i++<MAX_TRANSMIT_WAIT_LOOPS) {
udelay(i);
}
i++<MAX_TRANSMIT_WAIT_LOOPS) {
udelay(i);
}
if (!(can_read_reg(chip, SJASR) & sjaSR_TBS)) {
CANMSG("Transmit timed out, cancelling\n");
can_write_reg(chip, sjaCMR_AT, SJACMR);
if (!(can_read_reg(chip, SJASR) & sjaSR_TBS)) {
CANMSG("Transmit timed out, cancelling\n");
can_write_reg(chip, sjaCMR_AT, SJACMR);
-int sja1000_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
+int sja1000_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
can_write_reg(chip, sjaCMR_TR, SJACMR);
struct canmsg_t *msg)
{
can_write_reg(chip, sjaCMR_TR, SJACMR);
-int sja1000_set_btregs(struct canchip_t *chip, unsigned short btr0,
+int sja1000_set_btregs(struct canchip_t *chip, unsigned short btr0,
unsigned short btr1)
{
if (sja1000_enable_configuration(chip))
unsigned short btr1)
{
if (sja1000_enable_configuration(chip))
return CANCHIP_IRQ_STUCK;
}
return CANCHIP_IRQ_STUCK;
}
- if ((irq_register & sjaIR_RI) != 0)
+ if ((irq_register & sjaIR_RI) != 0)
sja1000_irq_read_handler(chip, obj);
sja1000_irq_read_handler(chip, obj);
- if ((irq_register & sjaIR_TI) != 0) {
+ if ((irq_register & sjaIR_TI) != 0) {
can_msgobj_set_fl(obj,TX_REQUEST);
while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
can_msgobj_clear_fl(obj,TX_REQUEST);
can_msgobj_set_fl(obj,TX_REQUEST);
while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
can_msgobj_clear_fl(obj,TX_REQUEST);
- if ((irq_register & (sjaIR_EI|sjaIR_DOI)) != 0) {
+ if ((irq_register & (sjaIR_EI|sjaIR_DOI)) != 0) {
// Some error happened
// FIXME: chip should be brought to usable state. Transmission cancelled if in progress.
// Reset flag set to 0 if chip is already off the bus. Full state report
// Some error happened
// FIXME: chip should be brought to usable state. Transmission cancelled if in progress.
// Reset flag set to 0 if chip is already off the bus. Full state report
irq_register=can_read_reg(chip, SJAIR);
} while(irq_register & (sjaIR_WUI|sjaIR_DOI|sjaIR_EI|sjaIR_TI|sjaIR_RI));
irq_register=can_read_reg(chip, SJAIR);
} while(irq_register & (sjaIR_WUI|sjaIR_DOI|sjaIR_EI|sjaIR_TI|sjaIR_RI));
return CANCHIP_IRQ_HANDLED;
}
return CANCHIP_IRQ_HANDLED;
}
void sja1000_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
{
int cmd;
void sja1000_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
{
int cmd;
if(obj->tx_slot){
/* Do local transmitted message distribution if enabled */
if (processlocal){
/* fill CAN message timestamp */
can_filltimestamp(&obj->tx_slot->msg.timestamp);
if(obj->tx_slot){
/* Do local transmitted message distribution if enabled */
if (processlocal){
/* fill CAN message timestamp */
can_filltimestamp(&obj->tx_slot->msg.timestamp);
obj->tx_slot->msg.flags |= MSG_LOCAL;
canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
}
obj->tx_slot->msg.flags |= MSG_LOCAL;
canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
}
int sja1000_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
{
can_preempt_disable();
int sja1000_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
{
can_preempt_disable();
can_msgobj_set_fl(obj,TX_REQUEST);
while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
can_msgobj_clear_fl(obj,TX_REQUEST);
if (can_read_reg(chip, SJASR) & sjaSR_TBS)
sja1000_irq_write_handler(chip, obj);
can_msgobj_set_fl(obj,TX_REQUEST);
while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
can_msgobj_clear_fl(obj,TX_REQUEST);
if (can_read_reg(chip, SJASR) & sjaSR_TBS)
sja1000_irq_write_handler(chip, obj);
can_msgobj_clear_fl(obj,TX_LOCK);
if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
}
can_msgobj_clear_fl(obj,TX_LOCK);
if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
}
* This function configures chip and prepares it for message
* transmission and reception. The function resets chip,
* resets mask for acceptance of all messages by call to
* This function configures chip and prepares it for message
* transmission and reception. The function resets chip,
* resets mask for acceptance of all messages by call to
- * sja1000p_extended_mask() function and then
+ * sja1000p_extended_mask() function and then
* computes and sets baudrate with use of function sja1000p_baud_rate().
* Return Value: negative value reports error.
* File: src/sja1000p.c
* computes and sets baudrate with use of function sja1000p_baud_rate().
* Return Value: negative value reports error.
* File: src/sja1000p.c
{
int i;
unsigned char n, r;
{
int i;
unsigned char n, r;
if (sja1000p_enable_configuration(chip))
return -ENODEV;
/* Set mode, clock out, comparator */
if (sja1000p_enable_configuration(chip))
return -ENODEV;
/* Set mode, clock out, comparator */
- can_write_reg(chip,sjaCDR_PELICAN|chip->sja_cdr_reg,SJACDR);
+ can_write_reg(chip,sjaCDR_PELICAN|chip->sja_cdr_reg,SJACDR);
/* Ensure, that interrupts are disabled even on the chip level now */
can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER);
/* Set driver output configuration */
/* Ensure, that interrupts are disabled even on the chip level now */
can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER);
/* Set driver output configuration */
- can_write_reg(chip,chip->sja_ocr_reg,SJAOCR);
-
+ can_write_reg(chip,chip->sja_ocr_reg,SJAOCR);
+
/* Simple check for chip presence */
for (i=0, n=0x5a; i<8; i++, n+=0xf) {
can_write_reg(chip,n,SJAACR0+i);
/* Simple check for chip presence */
for (i=0, n=0x5a; i<8; i++, n+=0xf) {
can_write_reg(chip,n,SJAACR0+i);
if (sja1000p_extended_mask(chip,0x00000000, 0xffffffff))
return -ENODEV;
if (sja1000p_extended_mask(chip,0x00000000, 0xffffffff))
return -ENODEV;
if (!chip->baudrate)
chip->baudrate=1000000;
if (sja1000p_baud_rate(chip,chip->baudrate,chip->clock,0,75,0))
return -ENODEV;
/* Enable hardware interrupts */
if (!chip->baudrate)
chip->baudrate=1000000;
if (sja1000p_baud_rate(chip,chip->baudrate,chip->clock,0,75,0))
return -ENODEV;
/* Enable hardware interrupts */
- can_write_reg(chip, sjaENABLE_INTERRUPTS, SJAIER);
+ can_write_reg(chip, sjaENABLE_INTERRUPTS, SJAIER);
sja1000p_disable_configuration(chip);
sja1000p_disable_configuration(chip);
if (sja1000p_enable_configuration(chip))
return -ENODEV;
if (sja1000p_enable_configuration(chip))
return -ENODEV;
for(i=SJA_PeliCAN_AC_LEN; --i>=0;) {
can_write_reg(chip,code&0xff,SJAACR0+i);
can_write_reg(chip,mask&0xff,SJAAMR0+i);
for(i=SJA_PeliCAN_AC_LEN; --i>=0;) {
can_write_reg(chip,code&0xff,SJAACR0+i);
can_write_reg(chip,mask&0xff,SJAAMR0+i);
int best_error = 1000000000, error;
int best_tseg=0, best_brp=0, best_rate=0, brp=0;
int tseg=0, tseg1=0, tseg2=0;
int best_error = 1000000000, error;
int best_tseg=0, best_brp=0, best_rate=0, brp=0;
int tseg=0, tseg1=0, tseg2=0;
if (sja1000p_enable_configuration(chip))
return -ENODEV;
if (sja1000p_enable_configuration(chip))
return -ENODEV;
can_write_reg(chip, sjw<<6 | best_brp, SJABTR0);
can_write_reg(chip, sjw<<6 | best_brp, SJABTR0);
- can_write_reg(chip, ((flags & BTR1_SAM) != 0)<<7 | (tseg2<<4)
+ can_write_reg(chip, ((flags & BTR1_SAM) != 0)<<7 | (tseg2<<4)
| tseg1, SJABTR1);
sja1000p_disable_configuration(chip);
| tseg1, SJABTR1);
sja1000p_disable_configuration(chip);
{
int status;
status=can_read_reg(chip,SJASR);
{
int status;
status=can_read_reg(chip,SJASR);
if(status & sjaSR_BS) {
/* Try to recover from error condition */
DEBUGMSG("sja1000p_pre_read_config bus-off recover 0x%x\n",status);
if(status & sjaSR_BS) {
/* Try to recover from error condition */
DEBUGMSG("sja1000p_pre_read_config bus-off recover 0x%x\n",status);
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
-int sja1000p_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
+int sja1000p_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
unsigned int id;
int status;
int len;
/* Wait until Transmit Buffer Status is released */
unsigned int id;
int status;
int len;
/* Wait until Transmit Buffer Status is released */
- while ( !((status=can_read_reg(chip, SJASR)) & sjaSR_TBS) &&
+ while ( !((status=can_read_reg(chip, SJASR)) & sjaSR_TBS) &&
i++<MAX_TRANSMIT_WAIT_LOOPS) {
udelay(i);
}
i++<MAX_TRANSMIT_WAIT_LOOPS) {
udelay(i);
}
if(status & sjaSR_BS) {
/* Try to recover from error condition */
DEBUGMSG("sja1000p_pre_write_config bus-off recover 0x%x\n",status);
if(status & sjaSR_BS) {
/* Try to recover from error condition */
DEBUGMSG("sja1000p_pre_write_config bus-off recover 0x%x\n",status);
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
-int sja1000p_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
+int sja1000p_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
can_write_reg(chip, sjaCMR_TR, SJACMR);
struct canmsg_t *msg)
{
can_write_reg(chip, sjaCMR_TR, SJACMR);
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
* Return Value: negative value reports error.
* File: src/sja1000p.c
*/
-int sja1000p_set_btregs(struct canchip_t *chip, unsigned short btr0,
+int sja1000p_set_btregs(struct canchip_t *chip, unsigned short btr0,
unsigned short btr1)
{
if (sja1000p_enable_configuration(chip))
unsigned short btr1)
{
if (sja1000p_enable_configuration(chip))
void sja1000p_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
{
int cmd;
void sja1000p_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
{
int cmd;
if(obj->tx_slot){
/* Do local transmitted message distribution if enabled */
if (processlocal){
/* fill CAN message timestamp */
can_filltimestamp(&obj->tx_slot->msg.timestamp);
if(obj->tx_slot){
/* Do local transmitted message distribution if enabled */
if (processlocal){
/* fill CAN message timestamp */
can_filltimestamp(&obj->tx_slot->msg.timestamp);
obj->tx_slot->msg.flags |= MSG_LOCAL;
canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
}
obj->tx_slot->msg.flags |= MSG_LOCAL;
canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
}
canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
obj->tx_slot=NULL;
}
canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
obj->tx_slot=NULL;
}
can_msgobj_clear_fl(obj,TX_PENDING);
cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
if(cmd<0)
can_msgobj_clear_fl(obj,TX_PENDING);
cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
if(cmd<0)
* sja1000p_irq_handler: - interrupt service routine
* @irq: interrupt vector number, this value is system specific
* @chip: pointer to chip state structure
* sja1000p_irq_handler: - interrupt service routine
* @irq: interrupt vector number, this value is system specific
* @chip: pointer to chip state structure
* Interrupt handler is activated when state of CAN controller chip changes,
* there is message to be read or there is more space for new messages or
* error occurs. The receive events results in reading of the message from
* Interrupt handler is activated when state of CAN controller chip changes,
* there is message to be read or there is more space for new messages or
* error occurs. The receive events results in reading of the message from
DEBUGMSG("TX looping in sja1000_irq_handler\n");
}
}
DEBUGMSG("TX looping in sja1000_irq_handler\n");
}
}
- if ((irq_register & (sjaIR_EI|sjaIR_BEI|sjaIR_EPI|sjaIR_DOI)) != 0) {
+ if ((irq_register & (sjaIR_EI|sjaIR_BEI|sjaIR_EPI|sjaIR_DOI)) != 0) {
// Some error happened
error_code=can_read_reg(chip,SJAECC);
sja1000_report_error(chip, status, irq_register, error_code);
// FIXME: chip should be brought to usable state. Transmission cancelled if in progress.
// Reset flag set to 0 if chip is already off the bus. Full state report
obj->ret=-1;
// Some error happened
error_code=can_read_reg(chip,SJAECC);
sja1000_report_error(chip, status, irq_register, error_code);
// FIXME: chip should be brought to usable state. Transmission cancelled if in progress.
// Reset flag set to 0 if chip is already off the bus. Full state report
obj->ret=-1;
if(error_code == 0xd9) {
obj->ret= -ENXIO;
/* no such device or address - no ACK received */
if(error_code == 0xd9) {
obj->ret= -ENXIO;
/* no such device or address - no ACK received */
*/
int sja1000p_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
{
*/
int sja1000p_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
{
can_msgobj_set_fl(obj,TX_PENDING);
can_msgobj_set_fl(obj,TX_REQUEST);
while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
can_msgobj_set_fl(obj,TX_PENDING);
can_msgobj_set_fl(obj,TX_REQUEST);
while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
obj->tx_retry_cnt=0;
sja1000p_irq_write_handler(chip, obj);
}
obj->tx_retry_cnt=0;
sja1000p_irq_write_handler(chip, obj);
}
can_msgobj_clear_fl(obj,TX_LOCK);
if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
DEBUGMSG("TX looping in sja1000p_wakeup_tx\n");
can_msgobj_clear_fl(obj,TX_LOCK);
if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
DEBUGMSG("TX looping in sja1000p_wakeup_tx\n");
i++;
can_outb(0x01,candev->res_addr);
}
i++;
can_outb(0x01,candev->res_addr);
}
- can_outb(0x00,candev->res_addr);
+ can_outb(0x00,candev->res_addr);
/* Check hardware reset status */
i=0;
/* Check hardware reset status */
i=0;
DEBUGMSG("Chip0 reset status ok.\n");
return 0;
DEBUGMSG("Chip0 reset status ok.\n");
return 0;
int smartcan_init_hw_data(struct candevice_t *candev)
{
int smartcan_init_hw_data(struct candevice_t *candev)
{
candev->nr_82527_chips=1;
candev->nr_sja1000_chips=0;
candev->nr_all_chips=1;
candev->nr_82527_chips=1;
candev->nr_sja1000_chips=0;
candev->nr_all_chips=1;
CANMSG("Unable to open port: 0x%lx\n",candev->io_addr);
return -ENODEV;
} else {
CANMSG("Unable to open port: 0x%lx\n",candev->io_addr);
return -ENODEV;
} else {
- DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr,
+ DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr,
candev->io_addr + IO_RANGE - 1);
}
return 0;
}
candev->io_addr + IO_RANGE - 1);
}
return 0;
}
-/* The function template_release_io is used to free the previously reserved
+/* The function template_release_io is used to free the previously reserved
* io-memory. In case you reserved more memory, don't forget to free it here.
*/
int ssv_release_io(struct candevice_t *candev)
* io-memory. In case you reserved more memory, don't forget to free it here.
*/
int ssv_release_io(struct candevice_t *candev)
*/
int ssv_reset(struct candevice_t *candev)
{
*/
int ssv_reset(struct candevice_t *candev)
{
DEBUGMSG("Resetting ssv hardware ...\n");
ssv_write_register(1,ssvcan_base+iCPU);
DEBUGMSG("Resetting ssv hardware ...\n");
ssv_write_register(1,ssvcan_base+iCPU);
for (i = 1; i < 1000; i++)
udelay (1000);
for (i = 1; i < 1000; i++)
udelay (1000);
- /* Check hardware reset status */
+ /* Check hardware reset status */
i=0;
while ( (ssv_read_register(ssvcan_base+iCPU) & iCPU_RST) && (i<=15)) {
udelay(20000);
i=0;
while ( (ssv_read_register(ssvcan_base+iCPU) & iCPU_RST) && (i<=15)) {
udelay(20000);
else
DEBUGMSG("Chip0 reset status ok.\n");
else
DEBUGMSG("Chip0 reset status ok.\n");
- /* Check hardware reset status */
+ /* Check hardware reset status */
i=0;
while ( (ssv_read_register(ssvcan_base+0x100+iCPU) & iCPU_RST) && (i<=15)) {
udelay(20000);
i=0;
while ( (ssv_read_register(ssvcan_base+0x100+iCPU) & iCPU_RST) && (i<=15)) {
udelay(20000);
#define NR_82527 2
#define NR_SJA1000 0
#define NR_82527 2
#define NR_SJA1000 0
-int ssv_init_hw_data(struct candevice_t *candev)
+int ssv_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=NR_82527;
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=NR_82527;
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
- * The entry obj_base_addr represents the first memory address of the message
+ * The entry obj_base_addr represents the first memory address of the message
* object. In case of the sja1000 obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* object. In case of the sja1000 obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
chip->msgobj[objnr]->obj_base_addr=
chip->chip_base_addr+(objnr+1)*0x10;
chip->msgobj[objnr]->obj_base_addr=
chip->chip_base_addr+(objnr+1)*0x10;
/* the ssv card has two registers, the address register at 0x0
and the data register at 0x01 */
/* the ssv card has two registers, the address register at 0x0
and the data register at 0x01 */
- /* write the relative address on the eight LSB bits
+ /* write the relative address on the eight LSB bits
and the data on the eight MSB bits in one time */
if((address-ssvcan_base)<0x100)
can_outw(address-ssvcan_base + (256 * data), ssvcan_base);
and the data on the eight MSB bits in one time */
if((address-ssvcan_base)<0x100)
can_outw(address-ssvcan_base + (256 * data), ssvcan_base);
unsigned ssv_read_register(can_ioptr_t address)
{
/* this is the same thing that the function write_register.
unsigned ssv_read_register(can_ioptr_t address)
{
/* this is the same thing that the function write_register.
- We use the two register, we write the address where we
+ We use the two register, we write the address where we
want to read in a first time. In a second time we read the
data */
unsigned char ret;
can_spin_irqflags_t flags;
want to read in a first time. In a second time we read the
data */
unsigned char ret;
can_spin_irqflags_t flags;
if((address-ssvcan_base)<0x100)
{
if((address-ssvcan_base)<0x100)
{
*
* The function is used in the driver initialization phase to catch possible memory
* leaks for future driver finalization or case, that driver initialization fail.
*
* The function is used in the driver initialization phase to catch possible memory
* leaks for future driver finalization or case, that driver initialization fail.
* Return Value: pointer to the allocated memory or NULL in the case of fail
*/
void *can_checked_malloc(size_t size)
{
struct mem_addr *mem_new;
void *address_p;
* Return Value: pointer to the allocated memory or NULL in the case of fail
*/
void *can_checked_malloc(size_t size)
{
struct mem_addr *mem_new;
void *address_p;
address_p=kmalloc(size,GFP_KERNEL);
if(address_p == NULL) {
CANMSG("can_checked_malloc: out of the memory\n");
address_p=kmalloc(size,GFP_KERNEL);
if(address_p == NULL) {
CANMSG("can_checked_malloc: out of the memory\n");
kfree(address_p);
return 0;
}
kfree(address_p);
return 0;
}
CANMSG("can_checked_free: address %p not found on the mem list\n", address_p);
CANMSG("can_checked_free: address %p not found on the mem list\n", address_p);
kfree(address_p);
return -1;
}
kfree(address_p);
return -1;
}
kfree(mem->address);
kfree(mem);
}
kfree(mem->address);
kfree(mem);
}
* The CAN driver uses this pointer to store relationship of interrupt
* to chip state structure - @struct canchip_t
* @regs: system dependent value pointing to registers stored in exception frame
* The CAN driver uses this pointer to store relationship of interrupt
* to chip state structure - @struct canchip_t
* @regs: system dependent value pointing to registers stored in exception frame
* File: src/setup.c
*/
can_irqreturn_t can_default_irq_dispatch(CAN_IRQ_HANDLER_ARGS(irq_number, dev_id))
* File: src/setup.c
*/
can_irqreturn_t can_default_irq_dispatch(CAN_IRQ_HANDLER_ARGS(irq_number, dev_id))
return 0;
if(chip->flags & CHIP_IRQ_CUSTOM)
return 1;
return 0;
if(chip->flags & CHIP_IRQ_CUSTOM)
return 1;
if ((chip->flags & CHIP_IRQ_VME) == 0) {
if (request_irq(chip->chip_irq,can_default_irq_dispatch,IRQF_SHARED,DEVICE_NAME,chip))
return -1;
if ((chip->flags & CHIP_IRQ_VME) == 0) {
if (request_irq(chip->chip_irq,can_default_irq_dispatch,IRQF_SHARED,DEVICE_NAME,chip))
return -1;
CANMSG("Bad irq parameter. (1 <= irq <= 255).\n");
return -EINVAL;
}
CANMSG("Bad irq parameter. (1 <= irq <= 255).\n");
return -EINVAL;
}
request_vmeirq(chip->chip_irq, can_default_irq_dispatch, chip);
DEBUGMSG("Registered VME interrupt vector %d\n",chip->chip_irq);
chip->flags |= CHIP_IRQ_SETUP;
request_vmeirq(chip->chip_irq, can_default_irq_dispatch, chip);
DEBUGMSG("Registered VME interrupt vector %d\n",chip->chip_irq);
chip->flags |= CHIP_IRQ_SETUP;
if ((chip->flags & CHIP_IRQ_VME) == 0)
free_irq(chip->chip_irq, chip);
if ((chip->flags & CHIP_IRQ_VME) == 0)
free_irq(chip->chip_irq, chip);
#ifdef CAN_ENABLE_VME_SUPPORT
free_vmeirq(chip->chip_irq);
#endif
#ifdef CAN_ENABLE_VME_SUPPORT
free_vmeirq(chip->chip_irq);
#endif
*
* The function template_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
*
* The function template_request_io() is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
- * will have to add the code to reserve this memory as well.
+ * will have to add the code to reserve this memory as well.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* %IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
* template_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
* template_reset - hardware reset routine
* @candev: Pointer to candevice/board structure
*
- * The function template_reset() is used to give a hardware reset. This is
- * rather hardware specific so I haven't included example code. Don't forget to
+ * The function template_reset() is used to give a hardware reset. This is
+ * rather hardware specific so I haven't included example code. Don't forget to
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
* check the reset status of the chip before returning.
* Return Value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
* Return Value: The function always returns zero
* File: src/template.c
*/
* Return Value: The function always returns zero
* File: src/template.c
*/
-int template_init_hw_data(struct candevice_t *candev)
+int template_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=NR_82527;
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=NR_82527;
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
- * The entry @int_bus_reg holds hardware specific options for the Bus
+ * The entry @int_bus_reg holds hardware specific options for the Bus
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* The entry @int_cpu_reg holds hardware specific options for the cpu interface
* Configuration register. Options defined in the %i82527.h file:
* %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
* The entry @int_cpu_reg holds hardware specific options for the cpu interface
i82527_fill_chipspecops(candev->chip[chipnr]);
/*sja1000_fill_chipspecops(candev->chip[chipnr]);*/
/*sja1000p_fill_chipspecops(candev->chip[chipnr]);*/
i82527_fill_chipspecops(candev->chip[chipnr]);
/*sja1000_fill_chipspecops(candev->chip[chipnr]);*/
/*sja1000p_fill_chipspecops(candev->chip[chipnr]);*/
candev->chip[chipnr]->chip_base_addr=can_ioport2ioptr(candev->io_addr);
candev->chip[chipnr]->clock = 16000000;
candev->chip[chipnr]->int_cpu_reg = iCPU_DSC;
candev->chip[chipnr]->chip_base_addr=can_ioport2ioptr(candev->io_addr);
candev->chip[chipnr]->clock = 16000000;
candev->chip[chipnr]->int_cpu_reg = iCPU_DSC;
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
- * The entry @obj_base_addr represents the first memory address of the message
+ * The entry @obj_base_addr represents the first memory address of the message
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
* object. In case of the sja1000 @obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
int template_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr+(objnr+1)*0x10;
int template_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr+(objnr+1)*0x10;
* template_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
* template_program_irq - program interrupts
* @candev: Pointer to candevice/board structure
*
- * The function template_program_irq() is used for hardware that uses
+ * The function template_program_irq() is used for hardware that uses
* programmable interrupts. If your hardware doesn't use programmable interrupts
* programmable interrupts. If your hardware doesn't use programmable interrupts
- * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
- * leave this function unedited. Again this function is hardware specific so
+ * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
+ * leave this function unedited. Again this function is hardware specific so
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
* there's no example code.
* Return value: The function returns zero on success or %-ENODEV on failure
* File: src/template.c
can_ioptr_t base = can_ulong2ioptr(addr & ~0x1f);
unsigned char nwin = 0x10;
unsigned char savewin;
can_ioptr_t base = can_ulong2ioptr(addr & ~0x1f);
unsigned char nwin = 0x10;
unsigned char savewin;
can_spin_irqflags_t flags;
if((addr&0x1f) > 0x1d) {
can_spin_irqflags_t flags;
if((addr&0x1f) > 0x1d) {
unsigned char nwin = 0x10;
unsigned char savewin;
unsigned val;
unsigned char nwin = 0x10;
unsigned char savewin;
unsigned val;
can_spin_irqflags_t flags;
if((addr&0x1f) > 0x1d) {
can_spin_irqflags_t flags;
if((addr&0x1f) > 0x1d) {
candev->chip[chipnr]->int_bus_reg = 0x0;
candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
candev->chip[chipnr]->sja_ocr_reg = sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH;
candev->chip[chipnr]->int_bus_reg = 0x0;
candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
candev->chip[chipnr]->sja_ocr_reg = sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH;
* The address is assigned during tscan1_request_io()
* according to found free ranges or tscanio option
*/
* The address is assigned during tscan1_request_io()
* according to found free ranges or tscanio option
*/
sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
unican_delay(10);
sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
unican_delay(10);
/* disable all card interrupts */
ret = cl2_int_mode(chipext, INT_MODE_ALL*0);
if(ret != CL2_OK) {
/* disable all card interrupts */
ret = cl2_int_mode(chipext, INT_MODE_ALL*0);
if(ret != CL2_OK) {
if (chip->baudrate == 0)
chip->baudrate=1000000;
if (chip->baudrate == 0)
chip->baudrate=1000000;
ret = chip->chipspecops->baud_rate(chip,chip->baudrate,chip->clock,0,75,0);
if(ret < 0){
CANMSG("can not set baudrate\n");
return ret;
}
ret = chip->chipspecops->baud_rate(chip,chip->baudrate,chip->clock,0,75,0);
if(ret < 0){
CANMSG("can not set baudrate\n");
return ret;
}
unican_delay(2);
/* set interrupt inhibit time to 1 ms */
ret = cl2_set_iit(chipext, 10);
unican_delay(2);
/* set interrupt inhibit time to 1 ms */
ret = cl2_set_iit(chipext, 10);
return -ENODEV;
}
unican_delay(1);
return -ENODEV;
}
unican_delay(1);
/* enable all card interrupts */
ret = cl2_int_mode(chipext, INT_MODE_ALL);
if(ret != CL2_OK) {
/* enable all card interrupts */
ret = cl2_int_mode(chipext, INT_MODE_ALL);
if(ret != CL2_OK) {
case 1000000:bt_val = CL2_BITRATE_1M; break;
default: return -EINVAL;
}
case 1000000:bt_val = CL2_BITRATE_1M; break;
default: return -EINVAL;
}
ret=cl2_set_bitrate(chipext,bt_val);
if(ret == CL2_COMMAND_BUSY) return -EBUSY;
if(ret != CL2_OK) return -EINVAL;
unican_delay(2);
ret=cl2_set_bitrate(chipext,bt_val);
if(ret == CL2_COMMAND_BUSY) return -EBUSY;
if(ret != CL2_OK) return -EINVAL;
unican_delay(2);
- /*if ( !(u & (CL2_REMOTE_FRAME<<8)) )
+ /*if ( !(u & (CL2_REMOTE_FRAME<<8)) )
obj->rx_msg.flags |= MSG_RTR;*/
obj->rx_msg.length = ( (u >> 4) & 0x000F );
obj->rx_msg.flags |= MSG_RTR;*/
obj->rx_msg.length = ( (u >> 4) & 0x000F );
#else /* CAN_MSG_VERSION_2 */
obj->rx_msg.timestamp = timestamp;
#endif /* CAN_MSG_VERSION_2 */
#else /* CAN_MSG_VERSION_2 */
obj->rx_msg.timestamp = timestamp;
#endif /* CAN_MSG_VERSION_2 */
/* increment rx-buffer pointer */
if ( (chipext->rxBufBase + chipext->rxBufSize*16 ) <= (chipext->rxBufPtr += 16) ) {
chipext->rxBufPtr = chipext->rxBufBase;
/* increment rx-buffer pointer */
if ( (chipext->rxBufBase + chipext->rxBufSize*16 ) <= (chipext->rxBufPtr += 16) ) {
chipext->rxBufPtr = chipext->rxBufBase;
* Return Value: negative value reports error.
* File: src/unican.c
*/
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
+int unican_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
return 0;
struct canmsg_t *msg)
{
return 0;
* Return Value: negative value reports error.
* File: src/unican.c
*/
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
+int unican_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
return 0;
struct canmsg_t *msg)
{
return 0;
* Return Value: negative value reports error.
* File: src/unican.c
*/
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_set_btregs(struct canchip_t *chip, unsigned short btr0,
+int unican_set_btregs(struct canchip_t *chip, unsigned short btr0,
unsigned short btr1)
{
int ret;
unsigned short btr1)
{
int ret;
cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
if(cmd<0)
return; /* No more messages to send */
cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
if(cmd<0)
return; /* No more messages to send */
cobid = obj->tx_slot->msg.id;
cobid = obj->tx_slot->msg.id;
if ( (obj->tx_slot->msg.flags & MSG_EXT) ) { /* 2.0B frame */
cobid <<= 3;
} else { /* 2.0A frame */
if ( (obj->tx_slot->msg.flags & MSG_EXT) ) { /* 2.0B frame */
cobid <<= 3;
} else { /* 2.0A frame */
if(len > CAN_MSG_LENGTH)
len = CAN_MSG_LENGTH;
u = (len << 12) | (cobid & 0x00FF);
if(len > CAN_MSG_LENGTH)
len = CAN_MSG_LENGTH;
u = (len << 12) | (cobid & 0x00FF);
-
- if ( !(obj->tx_slot->msg.flags & MSG_RTR) )
+
+ if ( !(obj->tx_slot->msg.flags & MSG_RTR) )
u |= CL2_REMOTE_FRAME<<8;
u |= CL2_REMOTE_FRAME<<8;
- if ( obj->tx_slot->msg.flags & MSG_EXT )
+ if ( obj->tx_slot->msg.flags & MSG_EXT )
u |= CL2_EXT_FRAME<<8;
unican_writew(u,ptr16++);
u |= CL2_EXT_FRAME<<8;
unican_writew(u,ptr16++);
u = ((cobid>>16) & 0xFF00) | CL2_MESSAGE_VALID;
unican_writew(u,(__u16*)chipext->asyncTxBufPtr);
u = ((cobid>>16) & 0xFF00) | CL2_MESSAGE_VALID;
unican_writew(u,(__u16*)chipext->asyncTxBufPtr);
- if ( (chipext->asyncTxBufBase + chipext->asyncTxBufSize*16) <=
+ if ( (chipext->asyncTxBufBase + chipext->asyncTxBufSize*16) <=
(chipext->asyncTxBufPtr += 16) ) {
chipext->asyncTxBufPtr = chipext->asyncTxBufBase;
}
(chipext->asyncTxBufPtr += 16) ) {
chipext->asyncTxBufPtr = chipext->asyncTxBufBase;
}
/* Free transmitted slot */
canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
obj->tx_slot=NULL;
/* Free transmitted slot */
canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
obj->tx_slot=NULL;
* unican_irq_handler: - interrupt service routine
* @irq: interrupt vector number, this value is system specific
* @chip: pointer to chip state structure
* unican_irq_handler: - interrupt service routine
* @irq: interrupt vector number, this value is system specific
* @chip: pointer to chip state structure
* Interrupt handler is activated when state of CAN controller chip changes,
* there is message to be read or there is more space for new messages or
* error occurs. The receive events results in reading of the message from
* Interrupt handler is activated when state of CAN controller chip changes,
* there is message to be read or there is more space for new messages or
* error occurs. The receive events results in reading of the message from
}
if (cl2_get_status(chipext, &status) == CL2_NO_REQUEST) {
}
if (cl2_get_status(chipext, &status) == CL2_NO_REQUEST) {
- /* Reenable interrupts generation, this has to be even there,
+ /* Reenable interrupts generation, this has to be even there,
* because irq_accept disables interrupts
*/
cl2_gen_interrupt(chipext);
* because irq_accept disables interrupts
*/
cl2_gen_interrupt(chipext);
* unican_irq_accept: - fast irq accept routine, blocks further interrupts
* @irq: interrupt vector number, this value is system specific
* @chip: pointer to chip state structure
* unican_irq_accept: - fast irq accept routine, blocks further interrupts
* @irq: interrupt vector number, this value is system specific
* @chip: pointer to chip state structure
* This routine only accepts interrupt reception and stops further
* incoming interrupts, but does not handle situation causing interrupt.
* File: src/unican.c
* This routine only accepts interrupt reception and stops further
* incoming interrupts, but does not handle situation causing interrupt.
* File: src/unican.c
/*void unican_do_tx_timeout(unsigned long data)
{
struct msgobj_t *obj=(struct msgobj_t *)data;
/*void unican_do_tx_timeout(unsigned long data)
{
struct msgobj_t *obj=(struct msgobj_t *)data;
CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
can_release_mem_region(candev->io_addr,IO_RANGE);
return -ENODEV;
CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
can_release_mem_region(candev->io_addr,IO_RANGE);
return -ENODEV;
}
can_base_addr_fixup(candev, remap_addr);
DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
}
can_base_addr_fixup(candev, remap_addr);
DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
int i;
struct canchip_t *chip = candev->chip[0];
sCAN_CARD *chipext;
int i;
struct canchip_t *chip = candev->chip[0];
sCAN_CARD *chipext;
if(chip->chip_data == NULL) {
chip->chip_data = can_checked_malloc(sizeof(sCAN_CARD));
if(chip->chip_data == NULL) {
chip->chip_data = can_checked_malloc(sizeof(sCAN_CARD));
chipext = (sCAN_CARD *)chip->chip_data;
chipext = (sCAN_CARD *)chip->chip_data;
i = 0;
/* reset and test whether the card is present */
do {
i = 0;
/* reset and test whether the card is present */
do {
CANMSG("card check failed %d\n",ret);
return -ENODEV;
}
CANMSG("card check failed %d\n",ret);
return -ENODEV;
}
/* start card firmware */
ret = cl2_start_firmware(chipext);
if(ret != CL2_OK){
CANMSG("cl2_start_firmware returned %d\n",ret);
return -ENODEV;
}
/* start card firmware */
ret = cl2_start_firmware(chipext);
if(ret != CL2_OK){
CANMSG("cl2_start_firmware returned %d\n",ret);
return -ENODEV;
}
unican_delay(100);
return 0;
unican_delay(100);
return 0;
* Return Value: The function always returns zero
* File: src/unican.c
*/
* Return Value: The function always returns zero
* File: src/unican.c
*/
-int unican_init_hw_data(struct candevice_t *candev)
+int unican_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=0;
candev->nr_82527_chips=0;
{
candev->res_addr=0;
candev->nr_82527_chips=0;
chip->int_bus_reg = 0x0;
chip->max_objects = 1;
chip->chip_base_addr=candev->dev_base_addr;
chip->int_bus_reg = 0x0;
chip->max_objects = 1;
chip->chip_base_addr=candev->dev_base_addr;
CANMSG("initializing unican chip operations\n");
chip->chipspecops->chip_config=unican_chip_config;
chip->chipspecops->baud_rate=unican_baud_rate;
CANMSG("initializing unican chip operations\n");
chip->chipspecops->chip_config=unican_chip_config;
chip->chipspecops->baud_rate=unican_baud_rate;
pci_release_regions(candev->sysdevptr.pcidev);
#endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
return -ENODEV;
pci_release_regions(candev->sysdevptr.pcidev);
#endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
return -ENODEV;
}
can_base_addr_fixup(candev, remap_addr);
DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
}
can_base_addr_fixup(candev, remap_addr);
DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
- DEBUGMSG("VMA: dev_base_addr: 0x%lx chip_base_addr: 0x%lx\n",
+ DEBUGMSG("VMA: dev_base_addr: 0x%lx chip_base_addr: 0x%lx\n",
can_ioptr2ulong(candev->dev_base_addr),
can_ioptr2ulong(candev->chip[0]->chip_base_addr));
can_ioptr2ulong(candev->dev_base_addr),
can_ioptr2ulong(candev->chip[0]->chip_base_addr));
return -EIO;
}
candev->sysdevptr.pcidev=pcidev;
return -EIO;
}
candev->sysdevptr.pcidev=pcidev;
if(!(pci_resource_flags(pcidev,0)&IORESOURCE_MEM)){
printk(KERN_CRIT "Unican PCI region 0 is not MEM\n");
can_pci_dev_put(pcidev);
if(!(pci_resource_flags(pcidev,0)&IORESOURCE_MEM)){
printk(KERN_CRIT "Unican PCI region 0 is not MEM\n");
can_pci_dev_put(pcidev);
candev->io_addr=pci_resource_start(pcidev,0);
candev->res_addr=candev->io_addr;
candev->dev_base_addr=NULL;
candev->io_addr=pci_resource_start(pcidev,0);
candev->res_addr=candev->io_addr;
candev->dev_base_addr=NULL;
/*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/
candev->nr_82527_chips=0;
/*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/
candev->nr_82527_chips=0;
ret = unican_reset(candev);
/* Setup VME interrupt vector */
ret = unican_reset(candev);
/* Setup VME interrupt vector */
unican_writew(chip->chip_irq, chip->chip_base_addr+CL2_VME_INT_VECTOR);
return ret;
unican_writew(chip->chip_irq, chip->chip_base_addr+CL2_VME_INT_VECTOR);
return ret;
-int unican_vme_init_hw_data(struct candevice_t *candev)
+int unican_vme_init_hw_data(struct candevice_t *candev)
{
unican_init_hw_data(candev);
candev->flags |= CANDEV_PROGRAMMABLE_IRQ;
{
unican_init_hw_data(candev);
candev->flags |= CANDEV_PROGRAMMABLE_IRQ;
* Return Value: negative value reports error.
* File: src/virtual.c
*/
* Return Value: negative value reports error.
* File: src/virtual.c
*/
-int virtual_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
+int virtual_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
return 0;
struct canmsg_t *msg)
{
return 0;
* Return Value: negative value reports error.
* File: src/virtual.c
*/
* Return Value: negative value reports error.
* File: src/virtual.c
*/
-int virtual_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
+int virtual_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
return 0;
struct canmsg_t *msg)
{
return 0;
* Return Value: negative value reports error.
* File: src/virtual.c
*/
* Return Value: negative value reports error.
* File: src/virtual.c
*/
-int virtual_set_btregs(struct canchip_t *chip, unsigned short btr0,
+int virtual_set_btregs(struct canchip_t *chip, unsigned short btr0,
unsigned short btr1)
{
return 0;
unsigned short btr1)
{
return 0;
* The CAN driver uses this pointer to store relationship of interrupt
* to chip state structure - @struct canchip_t
* @regs: system dependent value pointing to registers stored in exception frame
* The CAN driver uses this pointer to store relationship of interrupt
* to chip state structure - @struct canchip_t
* @regs: system dependent value pointing to registers stored in exception frame
* Interrupt handler is activated when state of CAN controller chip changes,
* there is message to be read or there is more space for new messages or
* error occurs. The receive events results in reading of the message from
* Interrupt handler is activated when state of CAN controller chip changes,
* there is message to be read or there is more space for new messages or
* error occurs. The receive events results in reading of the message from
can_preempt_disable();
can_msgobj_set_fl(obj,TX_REQUEST);
can_preempt_disable();
can_msgobj_set_fl(obj,TX_REQUEST);
while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
can_msgobj_clear_fl(obj,TX_REQUEST);
while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
can_msgobj_clear_fl(obj,TX_REQUEST);
cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
if(cmd>=0) {
mod_timer(&obj->tx_timeout,
jiffies+virtual_bus_latency(obj));
DEBUGMSG("virtual: scheduled delivery\n");
cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
if(cmd>=0) {
mod_timer(&obj->tx_timeout,
jiffies+virtual_bus_latency(obj));
DEBUGMSG("virtual: scheduled delivery\n");
can_msgobj_clear_fl(obj,TX_LOCK);
can_msgobj_clear_fl(obj,TX_LOCK);
if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
DEBUGMSG("TX looping in virtual_schedule_next\n");
}
if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
DEBUGMSG("TX looping in virtual_schedule_next\n");
}
void virtual_do_tx_timeout(unsigned long data)
{
struct msgobj_t *obj=(struct msgobj_t *)data;
void virtual_do_tx_timeout(unsigned long data)
{
struct msgobj_t *obj=(struct msgobj_t *)data;
if(obj->tx_slot) {
/* fill CAN message timestamp */
can_filltimestamp(&obj->tx_slot->msg.timestamp);
if(obj->tx_slot) {
/* fill CAN message timestamp */
can_filltimestamp(&obj->tx_slot->msg.timestamp);
int virtual_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
{
/* can_msgobj_set_fl(obj,TX_REQUEST); */
int virtual_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
{
/* can_msgobj_set_fl(obj,TX_REQUEST); */
struct canque_edge_t *qedge;
struct canque_slot_t *slot;
int cmd;
struct canque_edge_t *qedge;
struct canque_slot_t *slot;
int cmd;
if(cmd==0) {
/* fill CAN message timestamp */
can_filltimestamp(&slot->msg.timestamp);
if(cmd==0) {
/* fill CAN message timestamp */
can_filltimestamp(&slot->msg.timestamp);
canque_filter_msg2edges(obj->qends, &slot->msg);
DEBUGMSG("virtual: direct delivery\n");
}
canque_filter_msg2edges(obj->qends, &slot->msg);
DEBUGMSG("virtual: direct delivery\n");
}
* Return Value: The function always returns zero
* File: src/virtual.c
*/
* Return Value: The function always returns zero
* File: src/virtual.c
*/
-int virtual_init_hw_data(struct candevice_t *candev)
+int virtual_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=0;
candev->nr_82527_chips=0;
{
candev->res_addr=0;
candev->nr_82527_chips=0;
CANMSG("The number of bytes requested to be written is not a multiple of\n");
CANMSG("'sizeof(struct canmsg_t)', currently this is not allowed.\n");
return -1;
CANMSG("The number of bytes requested to be written is not a multiple of\n");
CANMSG("'sizeof(struct canmsg_t)', currently this is not allowed.\n");
return -1;
/* Initialize hardware pointers */
obj = canuser->msgobj;
/* Initialize hardware pointers */
obj = canuser->msgobj;
/* If the output buffer is full, return immediately in case O_NONBLOCK
* has been specified or loop until space becomes available.
*/
/* If the output buffer is full, return immediately in case O_NONBLOCK
* has been specified or loop until space becomes available.
*/
- if ((ret=canque_get_inslot4id(qends, &qedge, &slot,
+ if ((ret=canque_get_inslot4id(qends, &qedge, &slot,
0, msg_buff.id, 0))<0){
DEBUGMSG("Buffer is full\n");
if(ret < -1)
0, msg_buff.id, 0))<0){
DEBUGMSG("Buffer is full\n");
if(ret < -1)
if (file->f_flags & O_NONBLOCK)
return -EAGAIN;
if (file->f_flags & O_NONBLOCK)
return -EAGAIN;
- ret=canque_get_inslot4id_wait_kern(qends, &qedge, &slot,
+ ret=canque_get_inslot4id_wait_kern(qends, &qedge, &slot,
0, msg_buff.id, 0);
if(ret<0) {
if (signal_pending(current))
0, msg_buff.id, 0);
if(ret<0) {
if (signal_pending(current))
buffer += sizeof(struct canmsg_t);
bytes_to_copy = length-sizeof(struct canmsg_t);
buffer += sizeof(struct canmsg_t);
bytes_to_copy = length-sizeof(struct canmsg_t);
* Try to send more messages
*/
while (bytes_to_copy >= sizeof(struct canmsg_t)) {
* Try to send more messages
*/
while (bytes_to_copy >= sizeof(struct canmsg_t)) {
/* has been dependent on "extended" option */
/* Get slot */
/* has been dependent on "extended" option */
/* Get slot */
- if(canque_get_inslot4id(qends, &qedge, &slot,
+ if(canque_get_inslot4id(qends, &qedge, &slot,
0, msg_buff.id, 0) < 0) break;
slot->msg=msg_buff;
canque_put_inslot(qends, qedge, slot);
0, msg_buff.id, 0) < 0) break;
slot->msg=msg_buff;
canque_put_inslot(qends, qedge, slot);
canque_sync_wait_kern(qends, qedge);
}
return length-bytes_to_copy;
canque_sync_wait_kern(qends, qedge);
}
return length-bytes_to_copy;
/* If the output buffer is full, return immediately in case O_NONBLOCK
* has been specified or loop until space becomes available.
*/
/* If the output buffer is full, return immediately in case O_NONBLOCK
* has been specified or loop until space becomes available.
*/
- if ((ret=canque_get_inslot4id(qends, &qedge, &slot,
+ if ((ret=canque_get_inslot4id(qends, &qedge, &slot,
0, msg_buff->id, 0))<0){
DEBUGMSG("Buffer is full\n");
if(ret < -1)
0, msg_buff->id, 0))<0){
DEBUGMSG("Buffer is full\n");
if(ret < -1)
if (fptr->f_flags & O_NONBLOCK)
return -EAGAIN;
if (fptr->f_flags & O_NONBLOCK)
return -EAGAIN;
- ret=canque_get_inslot4id_wait_rtl(qends, &qedge, &slot,
+ ret=canque_get_inslot4id_wait_rtl(qends, &qedge, &slot,
0, msg_buff->id, 0);
if (ret == -1)
return -EINTR;
0, msg_buff->id, 0);
if (ret == -1)
return -EINTR;
if(ret<0) {
return -EIO;
}
if(ret<0) {
return -EIO;
}
canque_put_inslot(qends, qedge, slot);
bytes_to_copy = length-sizeof(struct canmsg_t);
canque_put_inslot(qends, qedge, slot);
bytes_to_copy = length-sizeof(struct canmsg_t);
* Try to send more messages
*/
while (bytes_to_copy >= sizeof(struct canmsg_t)) {
* Try to send more messages
*/
while (bytes_to_copy >= sizeof(struct canmsg_t)) {
/* has been dependent on "extended" option */
/* Get slot */
/* has been dependent on "extended" option */
/* Get slot */
- if(canque_get_inslot4id(qends, &qedge, &slot,
+ if(canque_get_inslot4id(qends, &qedge, &slot,
0, msg_buff->id, 0) < 0) break;
slot->msg=*(msg_buff++);
slot->msg.flags=msg_flags;
0, msg_buff->id, 0) < 0) break;
slot->msg=*(msg_buff++);
slot->msg.flags=msg_flags;
canque_sync_wait_rtl(qends, qedge);
}
return length-bytes_to_copy;
canque_sync_wait_rtl(qends, qedge);
}
return length-bytes_to_copy;