X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/dd8f5100e766813dca62a82c6b99ebf3648f2448..a4c9ead4b64bd4de307f375c2ff313a7a07a06e0:/lincan/include/main.h diff --git a/lincan/include/main.h b/lincan/include/main.h index 2fa81ce..4ef2b3e 100644 --- a/lincan/include/main.h +++ b/lincan/include/main.h @@ -4,7 +4,7 @@ * Rewritten for new CAN queues by Pavel Pisa - OCERA team member * email:pisa@cmp.felk.cvut.cz * This software is released under the GPL-License. - * Version lincan-0.2 9 Jul 2003 + * Version lincan-0.3 17 Jun 2004 */ #include "./can.h" @@ -87,6 +87,7 @@ struct candevice_t { struct canhardware_t *hosthardware_p; union { + void *anydev; #ifdef CAN_ENABLE_PCI_SUPPORT struct pci_dev *pcidev; #endif /*CAN_ENABLE_PCI_SUPPORT*/ @@ -104,8 +105,9 @@ struct candevice_t { * %CHIP_SEGMENTED .. access to the chip is segmented (mainly for i82527 chips) * @clock: chip base clock frequency in Hz * @baudrate: selected chip baudrate in Hz - * @write_register: write chip register function copy - + * @write_register: write chip register function copy * @read_register: read chip register function copy + * @chip_data: pointer for optional chip specific data extension * @sja_cdr_reg: SJA specific register - * holds hardware specific options for the Clock Divider * register. Options defined in the sja1000.h file: @@ -156,9 +158,11 @@ struct chip_t { long clock; /* Chip clock in Hz */ long baudrate; - void (*write_register)(unsigned char data,unsigned long address); + void (*write_register)(unsigned data,unsigned long address); unsigned (*read_register)(unsigned long address); - + + void *chip_data; + unsigned short sja_cdr_reg; /* sja1000 only! */ unsigned short sja_ocr_reg; /* sja1000 only! */ unsigned short int_cpu_reg; /* intel 82527 only! */ @@ -205,6 +209,8 @@ struct chip_t { * %MSGOBJ_TX_REQUEST .. the message object requests TX activation * %MSGOBJ_TX_LOCK .. some IRQ routine or callback on some CPU * is running inside TX activation processing code + * @rx_preconfig_id: place to store RX message identifier for some chip types + * that reuse same object for TX */ struct msgobj_t { unsigned long obj_base_addr; @@ -223,6 +229,8 @@ struct msgobj_t { struct canmsg_t rx_msg; struct chip_t *hostchip; + + unsigned long rx_preconfig_id; atomic_t obj_used; struct list_head obj_users; @@ -289,7 +297,7 @@ struct hwspecops_t { int (*init_chip_data)(struct candevice_t *candev, int chipnr); int (*init_obj_data)(struct chip_t *chip, int objnr); int (*program_irq)(struct candevice_t *candev); - void (*write_register)(unsigned char data,unsigned long address); + void (*write_register)(unsigned data,unsigned long address); unsigned (*read_register)(unsigned long address); }; @@ -308,6 +316,7 @@ struct hwspecops_t { * @remote_request: configures message object and asks for RTR message * @check_tx_stat: checks state of transmission engine * @wakeup_tx: wakeup TX processing + * @filtch_rq: optional routine for propagation of outgoing edges filters to HW * @enable_configuration: enable chip configuration mode * @disable_configuration: disable chip configuration mode * @set_btregs: configures bitrate registers @@ -335,6 +344,7 @@ struct chipspecops_t { int (*remote_request)(struct chip_t *chip, struct msgobj_t *obj); int (*check_tx_stat)(struct chip_t *chip); int (*wakeup_tx)(struct chip_t *chip, struct msgobj_t *obj); + int (*filtch_rq)(struct chip_t *chip, struct msgobj_t *obj); int (*enable_configuration)(struct chip_t *chip); int (*disable_configuration)(struct chip_t *chip); int (*set_btregs)(struct chip_t *chip, unsigned short btr0, @@ -373,6 +383,52 @@ extern struct msgobj_t *objects_p[MAX_TOT_MSGOBJS]; extern struct mem_addr *mem_head; + +#if defined(CONFIG_OC_LINCAN_PORTIO_ONLY) +extern inline void can_write_reg(const struct chip_t *chip, unsigned char data, unsigned address) +{ + outb(data, chip->chip_base_addr+address); +} +extern inline unsigned can_read_reg(const struct chip_t *chip, unsigned address) +{ + return inb(chip->chip_base_addr+address); +} +extern inline void canobj_write_reg(const struct chip_t *chip, const struct msgobj_t *obj, + unsigned char data, unsigned address) +{ + outb(data, obj->obj_base_addr+address); +} +extern inline unsigned canobj_read_reg(const struct chip_t *chip, const struct msgobj_t *obj, + unsigned address) +{ + return inb(obj->obj_base_addr+address); +} + +#elif defined(CONFIG_OC_LINCAN_MEMIO_ONLY) +extern inline void can_write_reg(const struct chip_t *chip, unsigned char data, unsigned address) +{ + writeb(data, chip->chip_base_addr+address); +} +extern inline unsigned can_read_reg(const struct chip_t *chip, unsigned address) +{ + return readb(chip->chip_base_addr+address); +} +extern inline void canobj_write_reg(const struct chip_t *chip, const struct msgobj_t *obj, + unsigned char data, unsigned address) +{ + writeb(data, obj->obj_base_addr+address); +} +extern inline unsigned canobj_read_reg(const struct chip_t *chip, const struct msgobj_t *obj, + unsigned address) +{ + return readb(obj->obj_base_addr+address); +} + +#else /*CONFIG_OC_LINCAN_DYNAMICIO*/ +#ifndef CONFIG_OC_LINCAN_DYNAMICIO +#define CONFIG_OC_LINCAN_DYNAMICIO +#endif + /* Inline function to write to the hardware registers. The argument address is * relative to the memory map of the chip and not the absolute memory address. */ @@ -406,6 +462,8 @@ extern inline unsigned canobj_read_reg(const struct chip_t *chip, const struct m return chip->read_register(address_to_read); } +#endif /*CONFIG_OC_LINCAN_DYNAMICIO*/ + int can_base_addr_fixup(struct candevice_t *candev, unsigned long new_base); int can_request_io_region(unsigned long start, unsigned long n, const char *name); void can_release_io_region(unsigned long start, unsigned long n); @@ -420,6 +478,8 @@ struct boardtype_t { const struct boardtype_t* boardtype_find(const char *str); +int can_check_dev_taken(void *anydev); + #ifdef CAN_WITH_RTL extern int can_rtl_priority; #endif /*CAN_WITH_RTL*/