X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/d8365e7fd56ca15c05502848338017013e628a9d..831ccb1f14f7472962fc2d185f32e18105209bd7:/lincan/include/main.h diff --git a/lincan/include/main.h b/lincan/include/main.h index b4a0b32..f360dcf 100644 --- a/lincan/include/main.h +++ b/lincan/include/main.h @@ -4,7 +4,7 @@ * Rewritten for new CAN queues by Pavel Pisa - OCERA team member * email:pisa@cmp.felk.cvut.cz * This software is released under the GPL-License. - * Version lincan-0.2 9 Jul 2003 + * Version lincan-0.3 17 Jun 2004 */ #include "./can.h" @@ -13,13 +13,13 @@ #include "./can_queue.h" #ifdef CAN_DEBUG - #define DEBUGMSG(fmt,args...) can_printk(KERN_ERR "can.o (debug): " fmt,\ + #define DEBUGMSG(fmt,args...) can_printk(KERN_ERR "lincan (debug): " fmt,\ ##args) #else #define DEBUGMSG(fmt,args...) #endif -#define CANMSG(fmt,args...) can_printk(KERN_ERR "can.o: " fmt,##args) +#define CANMSG(fmt,args...) can_printk(KERN_ERR "lincan: " fmt,##args) extern can_spinlock_t canuser_manipulation_lock; @@ -48,11 +48,13 @@ struct canhardware_t { * @flags: board flags: %PROGRAMMABLE_IRQ .. interrupt number * can be programmed into board * @nr_all_chips: number of chips present on the board - * @nr_82527_chips: number of Intel 8257 chips + * @nr_82527_chips: number of Intel 8257 chips * @nr_sja1000_chips: number of Philips SJA100 chips * @chip: array of pointers to the chip structures * @hwspecops: pointer to board specific operations * @hosthardware_p: pointer to the root hardware structure + * @sysdevptr: union reserved for pointer to bus specific + * device structure (case @pcidev is used for PCI devices) * * The structure represent configuration and state of associated board. * The driver infrastructure prepares this structure and calls @@ -72,19 +74,22 @@ struct candevice_t { char *hwname; /* text board type */ int candev_idx; /* board index in canhardware_t.candevice[] */ unsigned long io_addr; /* IO/physical MEM address */ - unsigned long res_addr; /* optional seset register port */ - unsigned long dev_base_addr; /* CPU translated IO/virtual MEM address */ + unsigned long res_addr; /* optional reset register port */ + can_ioptr_t dev_base_addr; /* CPU translated IO/virtual MEM address */ + can_ioptr_t aux_base_addr; /* CPU translated IO/virtual MEM address */ unsigned int flags; int nr_all_chips; int nr_82527_chips; int nr_sja1000_chips; - struct chip_t *chip[MAX_HW_CHIPS]; + can_spinlock_t device_lock; + struct canchip_t *chip[MAX_HW_CHIPS]; struct hwspecops_t *hwspecops; struct canhardware_t *hosthardware_p; - + union { + void *anydev; #ifdef CAN_ENABLE_PCI_SUPPORT struct pci_dev *pcidev; #endif /*CAN_ENABLE_PCI_SUPPORT*/ @@ -93,7 +98,7 @@ struct candevice_t { }; /** - * struct chip_t - CAN chip state and type information + * struct canchip_t - CAN chip state and type information * @chip_type: text string describing chip type * @chip_idx: index of the chip in candevice_t.chip[] array * @chip_irq: chip interrupt number if any @@ -102,8 +107,9 @@ struct candevice_t { * %CHIP_SEGMENTED .. access to the chip is segmented (mainly for i82527 chips) * @clock: chip base clock frequency in Hz * @baudrate: selected chip baudrate in Hz - * @write_register: write chip register function copy - + * @write_register: write chip register function copy * @read_register: read chip register function copy + * @chip_data: pointer for optional chip specific data extension * @sja_cdr_reg: SJA specific register - * holds hardware specific options for the Clock Divider * register. Options defined in the sja1000.h file: @@ -129,24 +135,35 @@ struct candevice_t { * @chipspecops: pointer to the set of chip specific object filled by init_chip_data() function * @hostdevice: pointer to chip hosting board * @max_objects: maximal number of communication objects connected to this chip + * @chip_lock: reserved for synchronization of the chip supporting routines + * (not used in the current driver version) + * @worker_thread: chip worker thread ID (RT-Linux specific field) + * @pend_flags: holds information about pending interrupt and tx_wake() operations + * (RT-Linux specific field). Masks values: + * %MSGOBJ_TX_REQUEST .. some of the message objects requires tx_wake() call, + * %MSGOBJ_IRQ_REQUEST .. chip interrupt processing required + * %MSGOBJ_WORKER_WAKE .. marks, that worker thread should be waked + * for some of above reasons * * The fields @write_register and @read_register are copied from * corresponding fields from @hwspecops structure - * (chip->hostdevice->hwspecops->write_register and + * (chip->hostdevice->hwspecops->write_register and * chip->hostdevice->hwspecops->read_register) * to speedup can_write_reg() and can_read_reg() functions. */ -struct chip_t { +struct canchip_t { char *chip_type; int chip_idx; /* chip index in candevice_t.chip[] */ int chip_irq; - unsigned long chip_base_addr; + can_ioptr_t chip_base_addr; unsigned int flags; long clock; /* Chip clock in Hz */ long baudrate; - void (*write_register)(unsigned char data,unsigned long address); - unsigned (*read_register)(unsigned long address); + void (*write_register)(unsigned data, can_ioptr_t address); + unsigned (*read_register)(can_ioptr_t address); + + void *chip_data; unsigned short sja_cdr_reg; /* sja1000 only! */ unsigned short sja_ocr_reg; /* sja1000 only! */ @@ -159,7 +176,7 @@ struct chip_t { struct chipspecops_t *chipspecops; struct candevice_t *hostdevice; - + int max_objects; /* 1 for sja1000, 15 for i82527 */ can_spinlock_t chip_lock; @@ -172,9 +189,9 @@ struct chip_t { /** * struct msgobj_t - structure holding communication object state - * @obj_base_addr: + * @obj_base_addr: * @minor: associated device minor number - * @object: object number in chip_t structure +1 + * @object: object number in canchip_t structure +1 * @flags: message object flags * @ret: field holding status of the last Tx operation * @qends: pointer to message object corresponding ends structure @@ -186,16 +203,22 @@ struct chip_t { * @tx_timeout: can be used by chip driver to check for the transmission timeout * @rx_msg: temporary storage to hold received messages before * calling to canque_filter_msg2edges() - * @hostchip: pointer to the &chip_t structure this object belongs to + * @hostchip: pointer to the &canchip_t structure this object belongs to * @obj_used: counter of users (associated file structures for Linux * userspace clients) of this object * @obj_users: list of user structures of type &canuser_t. + * @obj_flags: message object specific flags. Masks values: + * %MSGOBJ_TX_REQUEST .. the message object requests TX activation + * %MSGOBJ_TX_LOCK .. some IRQ routine or callback on some CPU + * is running inside TX activation processing code + * @rx_preconfig_id: place to store RX message identifier for some chip types + * that reuse same object for TX */ struct msgobj_t { - unsigned long obj_base_addr; + can_ioptr_t obj_base_addr; unsigned int minor; /* associated device minor number */ - unsigned int object; /* object number in chip_t +1 for debug printk */ - unsigned long obj_flags; + unsigned int object; /* object number in canchip_t +1 for debug printk */ + unsigned long obj_flags; int ret; struct canque_ends_t *qends; @@ -204,10 +227,12 @@ struct msgobj_t { struct canque_slot_t *tx_slot; int tx_retry_cnt; struct timer_list tx_timeout; - + struct canmsg_t rx_msg; - struct chip_t *hostchip; + struct canchip_t *hostchip; + + unsigned long rx_preconfig_id; atomic_t obj_used; struct list_head obj_users; @@ -252,17 +277,17 @@ struct canuser_t { * @request_io: reserve io or memory range for can board * @release_io: free reserved io memory range * @reset: hardware reset routine - * @init_hw_data: called to initialize &candevice_t structure, mainly + * @init_hw_data: called to initialize &candevice_t structure, mainly * @res_add, @nr_all_chips, @nr_82527_chips, @nr_sja1000_chips * and @flags fields - * @init_chip_data: called initialize each &chip_t structure, mainly + * @init_chip_data: called initialize each &canchip_t structure, mainly * @chip_type, @chip_base_addr, @clock and chip specific registers. - * It is responsible to setup &chip_t->@chipspecops functions + * It is responsible to setup &canchip_t->@chipspecops functions * for non-standard chip types (type other than "i82527", "sja1000" or "sja1000p") * @init_obj_data: called initialize each &msgobj_t structure, * mainly @obj_base_addr field. * @program_irq: program interrupt generation hardware of the board - * if flag %PROGRAMMABLE_IRQ is present for specified device/board + * if flag %PROGRAMMABLE_IRQ is present for specified device/board * @write_register: low level write register routine * @read_register: low level read register routine */ @@ -272,10 +297,10 @@ struct hwspecops_t { int (*reset)(struct candevice_t *candev); int (*init_hw_data)(struct candevice_t *candev); int (*init_chip_data)(struct candevice_t *candev, int chipnr); - int (*init_obj_data)(struct chip_t *chip, int objnr); + int (*init_obj_data)(struct canchip_t *chip, int objnr); int (*program_irq)(struct candevice_t *candev); - void (*write_register)(unsigned char data,unsigned long address); - unsigned (*read_register)(unsigned long address); + void (*write_register)(unsigned data, can_ioptr_t address); + unsigned (*read_register)(can_ioptr_t address); }; /** @@ -293,40 +318,48 @@ struct hwspecops_t { * @remote_request: configures message object and asks for RTR message * @check_tx_stat: checks state of transmission engine * @wakeup_tx: wakeup TX processing + * @filtch_rq: optional routine for propagation of outgoing edges filters to HW * @enable_configuration: enable chip configuration mode * @disable_configuration: disable chip configuration mode * @set_btregs: configures bitrate registers + * @attach_to_chip: attaches to the chip, setups registers and possibly state informations + * @release_chip: called before chip structure removal if %CHIP_ATTACHED is set * @start_chip: starts chip message processing * @stop_chip: stops chip message processing * @irq_handler: interrupt service routine + * @irq_accept: optional fast irq accept routine responsible for blocking further interrupts */ struct chipspecops_t { - int (*chip_config)(struct chip_t *chip); - int (*baud_rate)(struct chip_t *chip, int rate, int clock, int sjw, + int (*chip_config)(struct canchip_t *chip); + int (*baud_rate)(struct canchip_t *chip, int rate, int clock, int sjw, int sampl_pt, int flags); - int (*standard_mask)(struct chip_t *chip, unsigned short code, + int (*standard_mask)(struct canchip_t *chip, unsigned short code, unsigned short mask); - int (*extended_mask)(struct chip_t *chip, unsigned long code, + int (*extended_mask)(struct canchip_t *chip, unsigned long code, unsigned long mask); - int (*message15_mask)(struct chip_t *chip, unsigned long code, + int (*message15_mask)(struct canchip_t *chip, unsigned long code, unsigned long mask); - int (*clear_objects)(struct chip_t *chip); - int (*config_irqs)(struct chip_t *chip, short irqs); - int (*pre_read_config)(struct chip_t *chip, struct msgobj_t *obj); - int (*pre_write_config)(struct chip_t *chip, struct msgobj_t *obj, + int (*clear_objects)(struct canchip_t *chip); + int (*config_irqs)(struct canchip_t *chip, short irqs); + int (*pre_read_config)(struct canchip_t *chip, struct msgobj_t *obj); + int (*pre_write_config)(struct canchip_t *chip, struct msgobj_t *obj, struct canmsg_t *msg); - int (*send_msg)(struct chip_t *chip, struct msgobj_t *obj, + int (*send_msg)(struct canchip_t *chip, struct msgobj_t *obj, struct canmsg_t *msg); - int (*remote_request)(struct chip_t *chip, struct msgobj_t *obj); - int (*check_tx_stat)(struct chip_t *chip); - int (*wakeup_tx)(struct chip_t *chip, struct msgobj_t *obj); - int (*enable_configuration)(struct chip_t *chip); - int (*disable_configuration)(struct chip_t *chip); - int (*set_btregs)(struct chip_t *chip, unsigned short btr0, + int (*remote_request)(struct canchip_t *chip, struct msgobj_t *obj); + int (*check_tx_stat)(struct canchip_t *chip); + int (*wakeup_tx)(struct canchip_t *chip, struct msgobj_t *obj); + int (*filtch_rq)(struct canchip_t *chip, struct msgobj_t *obj); + int (*enable_configuration)(struct canchip_t *chip); + int (*disable_configuration)(struct canchip_t *chip); + int (*set_btregs)(struct canchip_t *chip, unsigned short btr0, unsigned short btr1); - int (*start_chip)(struct chip_t *chip); - int (*stop_chip)(struct chip_t *chip); - can_irqreturn_t (*irq_handler)(int irq, void *dev_id, struct pt_regs *regs); + int (*attach_to_chip)(struct canchip_t *chip); + int (*release_chip)(struct canchip_t *chip); + int (*start_chip)(struct canchip_t *chip); + int (*stop_chip)(struct canchip_t *chip); + int (*irq_handler)(int irq, struct canchip_t *chip); + int (*irq_accept)(int irq, struct canchip_t *chip); }; struct mem_addr { @@ -347,51 +380,100 @@ extern int major; extern int minor[MAX_TOT_CHIPS]; extern int extended; extern int baudrate[MAX_TOT_CHIPS]; -extern char *hw[MAX_HW_CARDS]; extern int irq[MAX_IRQ]; +extern char *hw[MAX_HW_CARDS]; extern unsigned long io[MAX_HW_CARDS]; +extern long clockfreq[MAX_HW_CARDS]; extern int processlocal; extern struct canhardware_t *hardware_p; -extern struct chip_t *chips_p[MAX_TOT_CHIPS]; +extern struct canchip_t *chips_p[MAX_TOT_CHIPS]; extern struct msgobj_t *objects_p[MAX_TOT_MSGOBJS]; extern struct mem_addr *mem_head; -/* Inline function to write to the hardware registers. The argument address is - * relative to the memory map of the chip and not the absolute memory address. + +#if defined(CONFIG_OC_LINCAN_PORTIO_ONLY) +extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned reg_offs) +{ + can_outb(data, chip->chip_base_addr+reg_offs); +} +extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs) +{ + return can_inb(chip->chip_base_addr+reg_offs); +} +extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj, + unsigned char data, unsigned reg_offs) +{ + can_outb(data, obj->obj_base_addr+reg_offs); +} +extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj, + unsigned reg_offs) +{ + return can_inb(obj->obj_base_addr+reg_offs); +} + +#elif defined(CONFIG_OC_LINCAN_MEMIO_ONLY) +extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned reg_offs) +{ + can_writeb(data, chip->chip_base_addr+reg_offs); +} +extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs) +{ + return can_readb(chip->chip_base_addr+reg_offs); +} +extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj, + unsigned char data, unsigned reg_offs) +{ + can_writeb(data, obj->obj_base_addr+reg_offs); +} +extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj, + unsigned reg_offs) +{ + return can_readb(obj->obj_base_addr+reg_offs); +} + +#else /*CONFIG_OC_LINCAN_DYNAMICIO*/ +#ifndef CONFIG_OC_LINCAN_DYNAMICIO +#define CONFIG_OC_LINCAN_DYNAMICIO +#endif + +/* Inline function to write to the hardware registers. The argument reg_offs is + * relative to the memory map of the chip and not the absolute memory reg_offs. */ -extern inline void can_write_reg(const struct chip_t *chip, unsigned char data, unsigned address) +extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned reg_offs) { - unsigned long address_to_write; - address_to_write = chip->chip_base_addr+address; + can_ioptr_t address_to_write; + address_to_write = chip->chip_base_addr+reg_offs; chip->write_register(data, address_to_write); } -extern inline unsigned can_read_reg(const struct chip_t *chip, unsigned address) +extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs) { - unsigned long address_to_read; - address_to_read = chip->chip_base_addr+address; + can_ioptr_t address_to_read; + address_to_read = chip->chip_base_addr+reg_offs; return chip->read_register(address_to_read); } -extern inline void canobj_write_reg(const struct chip_t *chip, const struct msgobj_t *obj, - unsigned char data, unsigned address) +extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj, + unsigned char data, unsigned reg_offs) { - unsigned long address_to_write; - address_to_write = obj->obj_base_addr+address; + can_ioptr_t address_to_write; + address_to_write = obj->obj_base_addr+reg_offs; chip->write_register(data, address_to_write); } -extern inline unsigned canobj_read_reg(const struct chip_t *chip, const struct msgobj_t *obj, - unsigned address) +extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj, + unsigned reg_offs) { - unsigned long address_to_read; - address_to_read = obj->obj_base_addr+address; + can_ioptr_t address_to_read; + address_to_read = obj->obj_base_addr+reg_offs; return chip->read_register(address_to_read); } -int can_base_addr_fixup(struct candevice_t *candev, unsigned long new_base); +#endif /*CONFIG_OC_LINCAN_DYNAMICIO*/ + +int can_base_addr_fixup(struct candevice_t *candev, can_ioptr_t new_base); int can_request_io_region(unsigned long start, unsigned long n, const char *name); void can_release_io_region(unsigned long start, unsigned long n); int can_request_mem_region(unsigned long start, unsigned long n, const char *name); @@ -405,6 +487,31 @@ struct boardtype_t { const struct boardtype_t* boardtype_find(const char *str); +int can_check_dev_taken(void *anydev); + +#if defined(can_gettimeofday) && defined(CAN_MSG_VERSION_2) && 1 +static inline +void can_filltimestamp(canmsg_tstamp_t *ptimestamp) +{ + can_gettimeofday(ptimestamp); +} +#else /* No timestamp support, set field to zero */ +static inline +void can_filltimestamp(canmsg_tstamp_t *ptimestamp) +{ + #ifdef CAN_MSG_VERSION_2 + ptimestamp->tv_sec = 0; + ptimestamp->tv_usec = 0; + #else /* CAN_MSG_VERSION_2 */ + *ptimestamp = 0; + #endif /* CAN_MSG_VERSION_2 */ + +} +#endif /* End of timestamp source selection */ + #ifdef CAN_WITH_RTL extern int can_rtl_priority; #endif /*CAN_WITH_RTL*/ + +extern struct candevice_t* register_usbdev(const char *hwname,void *devdata,void (*chipdataregfnc)(struct canchip_t *chip,void *data)); +extern void cleanup_usbdev(struct candevice_t *dev);