X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/cfabb1cb554e19976ed4ecd60c3d7eb9de24a43f..c759ac4ffabb78a8863d9bced695980077eeb319:/lincan/src/msmcan.c

diff --git a/lincan/src/msmcan.c b/lincan/src/msmcan.c
index 1d6fb51..42513ad 100644
--- a/lincan/src/msmcan.c
+++ b/lincan/src/msmcan.c
@@ -4,7 +4,7 @@
  * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
  * email:pisa@cmp.felk.cvut.cz
  * This software is released under the GPL-License.
- * Version lincan-0.2  9 Jul 2003
+ * Version lincan-0.3  17 Jun 2004
  */ 
 
 #include "../include/can.h"
@@ -122,11 +122,10 @@ int msmcan_init_hw_data(struct candevice_t *candev)
  * argument supplied at module loading time.
  * The clock argument holds the chip clock value in Hz.
  */
-#define CHIP_TYPE "i82527"
 
 int msmcan_init_chip_data(struct candevice_t *candev, int chipnr)
 {
-	candev->chip[chipnr]->chip_type=CHIP_TYPE;
+	i82527_fill_chipspecops(candev->chip[chipnr]);
 	/* device uses indexed access */
 	candev->chip[chipnr]->chip_base_addr=
 	    candev->io_addr << 16;
@@ -173,7 +172,7 @@ int msmcan_program_irq(struct candevice_t *candev)
  * on the CAN chip. You should only have to edit this function if your hardware
  * uses some specific write process.
  */
-void msmcan_write_register(unsigned char data, unsigned long address)
+void msmcan_write_register(unsigned data, unsigned long address)
 {
 	/* address is combination of base address shifted left by 16 and index */
 	can_spin_irqflags_t flags;