X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/cb551cc1582f3b51cf17e80730bee3c2f0701c3f..95c031e101c74ae6472a7e538f3128f67a490082:/lincan/include/c_can.h diff --git a/lincan/include/c_can.h b/lincan/include/c_can.h index 4955d86..1c3bb8f 100644 --- a/lincan/include/c_can.h +++ b/lincan/include/c_can.h @@ -6,84 +6,73 @@ * Rewritten for new CAN queues by Pavel Pisa - OCERA team member * email:pisa@cmp.felk.cvut.cz * This software is released under the GPL-License. - * Version lincan-0.2 9 Jul 2003 + * Version lincan-0.3 17 Jun 2004 */ -void hms30c7202_write_reg_w(const struct chip_t *pchip, u16 data, unsigned reg); - -u16 hms30c7202_read_reg_w(const struct chip_t *pchip, unsigned reg); - -#ifndef CONFIG_OC_LINCAN_DYNAMICIO /* * optimized inline version, may it be, that it can be too fast for the chip */ -extern inline void c_can_write_reg_w(const struct chip_t *pchip, u16 data, unsigned reg) +extern inline void c_can_write_reg_w(const struct canchip_t *pchip, u16 data, unsigned reg) { u32 address = pchip->chip_base_addr + reg; + #ifndef CONFIG_OC_LINCAN_DYNAMICIO writew(data,address); + #else /*CONFIG_OC_LINCAN_DYNAMICIO*/ + pchip->write_register(data, address); + #endif /*CONFIG_OC_LINCAN_DYNAMICIO*/ } -extern inline u16 c_can_read_reg_w(const struct chip_t *pchip, unsigned reg) +extern inline u16 c_can_read_reg_w(const struct canchip_t *pchip, unsigned reg) { u32 address = pchip->chip_base_addr + reg; + #ifndef CONFIG_OC_LINCAN_DYNAMICIO return readw(address); + #else /*CONFIG_OC_LINCAN_DYNAMICIO*/ + return pchip->read_register(address); + #endif /*CONFIG_OC_LINCAN_DYNAMICIO*/ } -#else /*CONFIG_OC_LINCAN_DYNAMICIO*/ -/* - * the standard routines for register access cannot be used, - * because they work only with 8-bit peripherals - */ - -extern inline void c_can_write_reg_w(const struct chip_t *pchip, u16 data, unsigned reg) -{ - hms30c7202_write_reg_w(pchip, data, reg); -} - -extern inline u16 c_can_read_reg_w(const struct chip_t *pchip, unsigned reg) -{ - return hms30c7202_read_reg_w(pchip, reg); -} -#endif /*CONFIG_OC_LINCAN_DYNAMICIO*/ extern can_spinlock_t c_can_spwlock; // Spin lock for write operations extern can_spinlock_t c_can_sprlock; // Spin lock for read operations extern can_spinlock_t c_can_if1lock; // spin lock for the if1 register extern can_spinlock_t c_can_if2lock; // spin lcok for the if2 register -int c_can_if1_busycheck(struct chip_t *pchip); -int c_can_if2_busycheck(struct chip_t *pchip); +int c_can_if1_busycheck(struct canchip_t *pchip); +int c_can_if2_busycheck(struct canchip_t *pchip); -int c_can_enable_configuration(struct chip_t *pchip); -int c_can_disable_configuration(struct chip_t *pchip); -int c_can_chip_config(struct chip_t *pchip); -int c_can_baud_rate(struct chip_t *chip, int rate, int clock, +int c_can_enable_configuration(struct canchip_t *pchip); +int c_can_disable_configuration(struct canchip_t *pchip); +int c_can_chip_config(struct canchip_t *pchip); +int c_can_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw, int sampl_pt, int flags); int c_can_mask(struct msgobj_t *pmsgobj, u32 mask, u16 usedirbit); int c_can_use_mask(struct msgobj_t *pmsgobj, u16 useflag); -int c_can_clear_objects(struct chip_t *pchip); -int c_can_config_irqs(struct chip_t *pchip, +int c_can_clear_objects(struct canchip_t *pchip); +int c_can_config_irqs(struct canchip_t *pchip, u16 irqs); -int c_can_pre_read_config(struct chip_t *chip, struct msgobj_t *obj); -int c_can_send_msg(struct chip_t *pchip, struct msgobj_t *pmsgobj, +int c_can_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj); +int c_can_send_msg(struct canchip_t *pchip, struct msgobj_t *pmsgobj, struct canmsg_t *pmsg); -int c_can_remote_request(struct chip_t *pchip, struct msgobj_t *pmsgobj ); -int c_can_set_btregs(struct chip_t *chip, +int c_can_remote_request(struct canchip_t *pchip, struct msgobj_t *pmsgobj ); +int c_can_set_btregs(struct canchip_t *chip, u16 btr0, u16 btr1); -int c_can_start_chip(struct chip_t *pchip); -int c_can_stop_chip(struct chip_t *pchip); -int c_can_check_tx_stat(struct chip_t *pchip); +int c_can_start_chip(struct canchip_t *pchip); +int c_can_stop_chip(struct canchip_t *pchip); +int c_can_check_tx_stat(struct canchip_t *pchip); int c_can_register(struct chipspecops_t *chipspecops); -void c_can_registerdump(struct chip_t *pchip); +void c_can_registerdump(struct canchip_t *pchip); + +void c_can_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj); -void c_can_irq_sync_activities(struct chip_t *chip, struct msgobj_t *obj); +int c_can_irq_handler(int irq, struct canchip_t *chip); -can_irqreturn_t c_can_irq_handler(int irq, void *dev_id, struct pt_regs *regs); +int c_can_fill_chipspecops(struct canchip_t *chip); /* BasicCAN mode address map */ #define CCCR 0x0000 /* Control Register */