X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/ca4ad65fe791cd40f1dcec6d0398fd74b31051cd..9c8ab08d7e8fca3916a7f91a3c001d151989137c:/lincan/src/pcccan.c diff --git a/lincan/src/pcccan.c b/lincan/src/pcccan.c index ebf315c..cbb4dbb 100644 --- a/lincan/src/pcccan.c +++ b/lincan/src/pcccan.c @@ -1,11 +1,36 @@ -/* pcccan.c - * Linux CAN-bus device driver. - * Written by Arnaud Westenberg email:arnaud@wanadoo.nl - * Rewritten for new CAN queues by Pavel Pisa - OCERA team member - * email:pisa@cmp.felk.cvut.cz - * This software is released under the GPL-License. - * Version lincan-0.2 9 Jul 2003 - */ +/**************************************************************************/ +/* File: pcccan.c - PCCCAN board support */ +/* */ +/* LinCAN - (Not only) Linux CAN bus driver */ +/* Copyright (C) 2002-2009 DCE FEE CTU Prague */ +/* Copyright (C) 2002-2009 Pavel Pisa */ +/* Funded by OCERA and FRESCOR IST projects */ +/* Based on CAN driver code by Arnaud Westenberg */ +/* */ +/* LinCAN is free software; you can redistribute it and/or modify it */ +/* under terms of the GNU General Public License as published by the */ +/* Free Software Foundation; either version 2, or (at your option) any */ +/* later version. LinCAN is distributed in the hope that it will be */ +/* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */ +/* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */ +/* General Public License for more details. You should have received a */ +/* copy of the GNU General Public License along with LinCAN; see file */ +/* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */ +/* Cambridge, MA 02139, USA. */ +/* */ +/* To allow use of LinCAN in the compact embedded systems firmware */ +/* and RT-executives (RTEMS for example), main authors agree with next */ +/* special exception: */ +/* */ +/* Including LinCAN header files in a file, instantiating LinCAN generics */ +/* or templates, or linking other files with LinCAN objects to produce */ +/* an application image/executable, does not by itself cause the */ +/* resulting application image/executable to be covered by */ +/* the GNU General Public License. */ +/* This exception does not however invalidate any other reasons */ +/* why the executable file might be covered by the GNU Public License. */ +/* Publication of enhanced or derived LinCAN files is required although. */ +/**************************************************************************/ /* This file contains the low level functions for the pcccan-1 card from Gespac. * You can probably find more information at http://www.gespac.com @@ -20,7 +45,7 @@ int pcccan_irq=-1; unsigned long pcccan_base=0x0; -static can_spinlock_t pcccan_port_lock=SPIN_LOCK_UNLOCKED; +static CAN_DEFINE_SPINLOCK(pcccan_port_lock); /* * IO_RANGE is the io-memory range that gets reserved, please adjust according @@ -103,13 +128,13 @@ int pcccan_reset(struct candevice_t *candev) DEBUGMSG("Resetting pcccan-1 hardware ...\n"); while (i < 1000000) { i++; - outb(0x0,candev->res_addr); + can_outb(0x0,candev->res_addr); } /* Check hardware reset status */ i=0; - outb(iCPU,candev->io_addr+0x1); - while ( (inb(candev->io_addr+0x2)&0x80) && (i<=15) ) { + can_outb(iCPU,candev->io_addr+0x1); + while ( (can_inb(candev->io_addr+0x2)&0x80) && (i<=15) ) { udelay(20000); i++; } @@ -152,7 +177,6 @@ int pcccan_init_hw_data(struct candevice_t *candev) return 0; } -#define CHIP_TYPE "i82527" /** * pcccan_init_chip_data - Initialize chips * @candev: Pointer to candevice/board structure @@ -168,11 +192,11 @@ int pcccan_init_hw_data(struct candevice_t *candev) * The @clock entry holds the chip clock value in Hz. * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider * register. Options defined in the %sja1000.h file: - * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN + * %sjaCDR_CLKOUT_MASK, %sjaCDR_CLK_OFF, %sjaCDR_RXINPEN, %sjaCDR_CBP, %sjaCDR_PELICAN * The entry @sja_ocr_reg holds hardware specific options for the Output Control * register. Options defined in the %sja1000.h file: - * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK, - * %OCR_TX0_LH, %OCR_TX1_ZZ. + * %sjaOCR_MODE_BIPHASE, %sjaOCR_MODE_TEST, %sjaOCR_MODE_NORMAL, %sjaOCR_MODE_CLOCK, + * %sjaOCR_TX0_LH, %sjaOCR_TX1_ZZ. * The entry @int_clk_reg holds hardware specific options for the Clock Out * register. Options defined in the %i82527.h file: * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1. @@ -187,8 +211,8 @@ int pcccan_init_hw_data(struct candevice_t *candev) */ int pcccan_init_chip_data(struct candevice_t *candev, int chipnr) { - candev->chip[chipnr]->chip_type=CHIP_TYPE; - candev->chip[chipnr]->chip_base_addr=candev->io_addr; + i82527_fill_chipspecops(candev->chip[chipnr]); + candev->chip[chipnr]->chip_base_addr=can_ioport2ioptr(candev->io_addr); candev->chip[chipnr]->clock = 16000000; candev->chip[chipnr]->int_cpu_reg = iCPU_DSC | iCPU_DMC; candev->chip[chipnr]->int_clk_reg = iCLK_SL1 | iCLK_CD0; @@ -218,7 +242,7 @@ int pcccan_init_chip_data(struct candevice_t *candev, int chipnr) * Return Value: The function always returns zero * File: src/pcccan.c */ -int pcccan_init_obj_data(struct chip_t *chip, int objnr) +int pcccan_init_obj_data(struct canchip_t *chip, int objnr) { chip->msgobj[objnr]->obj_base_addr=(objnr+1)*0x10; @@ -253,12 +277,12 @@ int pcccan_program_irq(struct candevice_t *candev) * Return Value: The function does not return a value * File: src/pcccan.c */ -void pcccan_write_register(unsigned char data, unsigned long address) +void pcccan_write_register(unsigned data, can_ioptr_t address) { can_spin_irqflags_t flags; can_spin_lock_irqsave(&pcccan_port_lock,flags); - outb(address - pcccan_base, pcccan_base+1); - outb(data, pcccan_base+6); + can_outb(address - pcccan_base, pcccan_base+1); + can_outb(data, pcccan_base+6); can_spin_unlock_irqrestore(&pcccan_port_lock,flags); } @@ -272,13 +296,13 @@ void pcccan_write_register(unsigned char data, unsigned long address) * Return Value: The function returns the value stored in @address * File: src/pcccan.c */ -unsigned pcccan_read_register(unsigned long address) +unsigned pcccan_read_register(can_ioptr_t address) { unsigned ret; can_spin_irqflags_t flags; can_spin_lock_irqsave(&pcccan_port_lock,flags); - outb(address - pcccan_base, pcccan_base+1); - ret=inb(pcccan_base+2); + can_outb(address - pcccan_base, pcccan_base+1); + ret=can_inb(pcccan_base+2); can_spin_unlock_irqrestore(&pcccan_port_lock,flags); return ret;