X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/c6d6f58c34e1b6a4c03d1e86d1abf48eeb6f5624..a4c9ead4b64bd4de307f375c2ff313a7a07a06e0:/lincan/src/template.c

diff --git a/lincan/src/template.c b/lincan/src/template.c
index 9b72902..d8ceaa4 100644
--- a/lincan/src/template.c
+++ b/lincan/src/template.c
@@ -4,7 +4,7 @@
  * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
  * email:pisa@cmp.felk.cvut.cz
  * This software is released under the GPL-License.
- * Version lincan-0.2  9 Jul 2003
+ * Version lincan-0.3  17 Jun 2004
  */ 
 
 /* This file is intended as a template file for currently unsupported hardware.
@@ -130,11 +130,11 @@ int template_init_hw_data(struct candevice_t *candev)
  * The @clock entry holds the chip clock value in Hz.
  * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider
  * register. Options defined in the %sja1000.h file:
- * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
+ * %sjaCDR_CLKOUT_MASK, %sjaCDR_CLK_OFF, %sjaCDR_RXINPEN, %sjaCDR_CBP, %sjaCDR_PELICAN
  * The entry @sja_ocr_reg holds hardware specific options for the Output Control
  * register. Options defined in the %sja1000.h file:
- * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
- * %OCR_TX0_LH, %OCR_TX1_ZZ.
+ * %sjaOCR_MODE_BIPHASE, %sjaOCR_MODE_TEST, %sjaOCR_MODE_NORMAL, %sjaOCR_MODE_CLOCK,
+ * %sjaOCR_TX0_LH, %sjaOCR_TX1_ZZ.
  * The entry @int_clk_reg holds hardware specific options for the Clock Out
  * register. Options defined in the %i82527.h file:
  * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
@@ -155,9 +155,9 @@ int template_init_chip_data(struct candevice_t *candev, int chipnr)
 	candev->chip[chipnr]->int_cpu_reg = iCPU_DSC;
 	candev->chip[chipnr]->int_clk_reg = iCLK_SL1;
 	candev->chip[chipnr]->int_bus_reg = iBUS_CBY;
-	candev->chip[chipnr]->sja_cdr_reg = CDR_CBP | CDR_CLK_OFF;
-	candev->chip[chipnr]->sja_ocr_reg = OCR_MODE_NORMAL |
-								OCR_TX0_LH;
+	candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
+	candev->chip[chipnr]->sja_ocr_reg = sjaOCR_MODE_NORMAL |
+								sjaOCR_TX0_LH;
 
 	return 0;
 }
@@ -182,7 +182,6 @@ int template_init_chip_data(struct candevice_t *candev, int chipnr)
 int template_init_obj_data(struct chip_t *chip, int objnr)
 {
 	chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr+(objnr+1)*0x10;
-	chip->msgobj[objnr]->flags=0;
 	
 	return 0;
 }
@@ -215,7 +214,7 @@ int template_program_irq(struct candevice_t *candev)
  * Return Value: The function does not return a value
  * File: src/template.c
  */
-void template_write_register(unsigned char data, unsigned long address)
+void template_write_register(unsigned data, unsigned long address)
 {
 	outb(data,address);
 }