X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/c6d6f58c34e1b6a4c03d1e86d1abf48eeb6f5624..6234a9dc385e5a9258a84227b2eab09bbb099c27:/lincan/src/pikronisa.c diff --git a/lincan/src/pikronisa.c b/lincan/src/pikronisa.c index 117560c..2a4fd22 100644 --- a/lincan/src/pikronisa.c +++ b/lincan/src/pikronisa.c @@ -4,14 +4,13 @@ * Rewritten for new CAN queues by Pavel Pisa - OCERA team member * email:pisa@cmp.felk.cvut.cz * This software is released under the GPL-License. - * Version lincan-0.2 9 Jul 2003 + * Version lincan-0.3 17 Jun 2004 */ #include "../include/can.h" #include "../include/can_sysdep.h" #include "../include/main.h" #include "../include/pikronisa.h" -#include "../include/i82527.h" #include "../include/sja1000p.h" /* @@ -37,13 +36,13 @@ */ int pikronisa_request_io(struct candevice_t *candev) { - int remap_addr; + can_ioptr_t remap_addr; if (!can_request_mem_region(candev->io_addr,IO_RANGE,DEVICE_NAME " - pikronisa")) { CANMSG("Unable to request IO-memory: 0x%lx\n",candev->io_addr); return -ENODEV; } - if ( !( remap_addr = (long) ioremap( candev->io_addr, IO_RANGE ) ) ) { + if ( !( remap_addr = ioremap( candev->io_addr, IO_RANGE ) ) ) { CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr); can_release_mem_region(candev->io_addr,IO_RANGE); return -ENODEV; @@ -69,7 +68,7 @@ int pikronisa_request_io(struct candevice_t *candev) int pikronisa_release_io(struct candevice_t *candev) { /* release I/O memory mapping */ - iounmap((void*)candev->dev_base_addr); + iounmap(candev->dev_base_addr); can_release_mem_region(candev->io_addr,IO_RANGE); return 0; @@ -88,27 +87,27 @@ int pikronisa_release_io(struct candevice_t *candev) int pikronisa_reset(struct candevice_t *candev) { int i; - struct chip_t *chip=candev->chip[0]; + struct canchip_t *chip=candev->chip[0]; unsigned cdr; - pikronisa_write_register(MOD_RM, chip->chip_base_addr+SJAMOD); + pikronisa_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD); udelay(1000); cdr=pikronisa_read_register(chip->chip_base_addr+SJACDR); - pikronisa_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR); + pikronisa_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR); pikronisa_write_register(0, chip->chip_base_addr+SJAIER); i=20; pikronisa_write_register(0, chip->chip_base_addr+SJAMOD); - while (pikronisa_read_register(chip->chip_base_addr+SJAMOD)&MOD_RM){ + while (pikronisa_read_register(chip->chip_base_addr+SJAMOD)&sjaMOD_RM){ if(!i--) return -ENODEV; udelay(1000); pikronisa_write_register(0, chip->chip_base_addr+SJAMOD); } cdr=pikronisa_read_register(chip->chip_base_addr+SJACDR); - pikronisa_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR); + pikronisa_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR); pikronisa_write_register(0, chip->chip_base_addr+SJAIER); @@ -144,9 +143,6 @@ int pikronisa_init_hw_data(struct candevice_t *candev) return 0; } -#define CHIP_TYPE "sja1000p" -/* #define CHIP_TYPE "sja1000" */ - /** * pikronisa_init_chip_data - Initialize chips * @candev: Pointer to candevice/board structure @@ -162,11 +158,11 @@ int pikronisa_init_hw_data(struct candevice_t *candev) * The @clock entry holds the chip clock value in Hz. * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider * register. Options defined in the %sja1000.h file: - * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN + * %sjaCDR_CLKOUT_MASK, %sjaCDR_CLK_OFF, %sjaCDR_RXINPEN, %sjaCDR_CBP, %sjaCDR_PELICAN * The entry @sja_ocr_reg holds hardware specific options for the Output Control * register. Options defined in the %sja1000.h file: - * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK, - * %OCR_TX0_LH, %OCR_TX1_ZZ. + * %sjaOCR_MODE_BIPHASE, %sjaOCR_MODE_TEST, %sjaOCR_MODE_NORMAL, %sjaOCR_MODE_CLOCK, + * %sjaOCR_TX0_LH, %sjaOCR_TX1_ZZ. * The entry @int_clk_reg holds hardware specific options for the Clock Out * register. Options defined in the %i82527.h file: * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1. @@ -181,13 +177,15 @@ int pikronisa_init_hw_data(struct candevice_t *candev) */ int pikronisa_init_chip_data(struct candevice_t *candev, int chipnr) { - candev->chip[chipnr]->chip_type=CHIP_TYPE; - candev->chip[chipnr]->chip_base_addr=candev->io_addr; + /*sja1000_fill_chipspecops(candev->chip[chipnr]);*/ + sja1000p_fill_chipspecops(candev->chip[chipnr]); + + candev->chip[chipnr]->chip_base_addr=candev->dev_base_addr; candev->chip[chipnr]->clock = 24000000; candev->chip[chipnr]->int_clk_reg = 0x0; candev->chip[chipnr]->int_bus_reg = 0x0; - candev->chip[chipnr]->sja_cdr_reg = CDR_CBP | CDR_CLK_OFF; - candev->chip[chipnr]->sja_ocr_reg = OCR_MODE_NORMAL | OCR_TX0_LH; + candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF; + candev->chip[chipnr]->sja_ocr_reg = sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH; return 0; } @@ -209,10 +207,9 @@ int pikronisa_init_chip_data(struct candevice_t *candev, int chipnr) * Return Value: The function always returns zero * File: src/pikronisa.c */ -int pikronisa_init_obj_data(struct chip_t *chip, int objnr) +int pikronisa_init_obj_data(struct canchip_t *chip, int objnr) { chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr; - chip->msgobj[objnr]->flags=0; return 0; } @@ -244,11 +241,11 @@ int pikronisa_program_irq(struct candevice_t *candev) * Return Value: The function does not return a value * File: src/pikronisa.c */ -void pikronisa_write_register(unsigned char data, unsigned long address) +void pikronisa_write_register(unsigned data, can_ioptr_t address) { /*DEBUGMSG("pikronisa_write_register: addr=0x%lx data=0x%x", address,data);*/ - writeb(data,address); + can_writeb(data,address); } /** @@ -261,9 +258,9 @@ void pikronisa_write_register(unsigned char data, unsigned long address) * Return Value: The function returns the value stored in @address * File: src/pikronisa.c */ -unsigned pikronisa_read_register(unsigned long address) +unsigned pikronisa_read_register(can_ioptr_t address) { - return readb(address); + return can_readb(address); } /* !!! Don't change this function !!! */