X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/c6d6f58c34e1b6a4c03d1e86d1abf48eeb6f5624..2827b727d2910a3b48f9de7d67b3a67f59e256c7:/lincan/src/nsi.c

diff --git a/lincan/src/nsi.c b/lincan/src/nsi.c
index aeef392..03ba230 100644
--- a/lincan/src/nsi.c
+++ b/lincan/src/nsi.c
@@ -16,6 +16,8 @@
 int nsican_irq=-1;
 unsigned long nsican_base=0x0;
 
+static can_spinlock_t nsican_port_lock=SPIN_LOCK_UNLOCKED;
+
 /* IO_RANGE is the io-memory range that gets reserved, please adjust according
  * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
  * #define IO_RANGE 0x20 for sja1000 chips.
@@ -149,7 +151,6 @@ int nsi_init_obj_data(struct chip_t *chip, int objnr)
 
 	chip->msgobj[objnr]->obj_base_addr=
 	    chip->chip_base_addr+(objnr+1)*0x10;
-	chip->msgobj[objnr]->flags=0;
 	
 	return 0;
 }
@@ -191,13 +192,14 @@ unsigned nsi_read_register(unsigned long address)
        We use the two register, we write the address where we 
        want to read in a first time. In a second time we read the
        data */
-    unsigned char ret;
+	unsigned char ret;
+	can_spin_irqflags_t flags;
     
-    disable_irq(nsican_irq); 
-    outb(address-nsican_base, nsican_base);
-    ret=inb(nsican_base+1);
-    enable_irq(nsican_irq); 
-    return ret;
+	can_spin_lock_irqsave(&nsican_port_lock,flags);
+	outb(address-nsican_base, nsican_base);
+	ret=inb(nsican_base+1);
+	can_spin_unlock_irqrestore(&nsican_port_lock,flags);
+	return ret;
 }