X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/c6d6f58c34e1b6a4c03d1e86d1abf48eeb6f5624..04ac67cc3cac14cd601daacd0592121ec0b84012:/lincan/src/pccan.c diff --git a/lincan/src/pccan.c b/lincan/src/pccan.c index 8745404..7086151 100644 --- a/lincan/src/pccan.c +++ b/lincan/src/pccan.c @@ -1,11 +1,36 @@ -/* pccan.c - * Linux CAN-bus device driver. - * Written by Arnaud Westenberg email:arnaud@wanadoo.nl - * Rewritten for new CAN queues by Pavel Pisa - OCERA team member - * email:pisa@cmp.felk.cvut.cz - * This software is released under the GPL-License. - * Version lincan-0.2 9 Jul 2003 - */ +/**************************************************************************/ +/* File: pccan.c - PCcan-Q/F/S/D ISA card by KVASER */ +/* */ +/* LinCAN - (Not only) Linux CAN bus driver */ +/* Copyright (C) 2002-2009 DCE FEE CTU Prague */ +/* Copyright (C) 2002-2009 Pavel Pisa */ +/* Funded by OCERA and FRESCOR IST projects */ +/* Based on CAN driver code by Arnaud Westenberg */ +/* */ +/* LinCAN is free software; you can redistribute it and/or modify it */ +/* under terms of the GNU General Public License as published by the */ +/* Free Software Foundation; either version 2, or (at your option) any */ +/* later version. LinCAN is distributed in the hope that it will be */ +/* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */ +/* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */ +/* General Public License for more details. You should have received a */ +/* copy of the GNU General Public License along with LinCAN; see file */ +/* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */ +/* Cambridge, MA 02139, USA. */ +/* */ +/* To allow use of LinCAN in the compact embedded systems firmware */ +/* and RT-executives (RTEMS for example), main authors agree with next */ +/* special exception: */ +/* */ +/* Including LinCAN header files in a file, instantiating LinCAN generics */ +/* or templates, or linking other files with LinCAN objects to produce */ +/* an application image/executable, does not by itself cause the */ +/* resulting application image/executable to be covered by */ +/* the GNU General Public License. */ +/* This exception does not however invalidate any other reasons */ +/* why the executable file might be covered by the GNU Public License. */ +/* Publication of enhanced or derived LinCAN files is required although. */ +/**************************************************************************/ #include "../include/can.h" #include "../include/can_sysdep.h" @@ -52,7 +77,7 @@ int pccanq_request_io(struct candevice_t *candev) { unsigned long io_addr; int i; - + if (pccand_request_io(candev)) return -ENODEV; @@ -108,14 +133,14 @@ int pccanf_reset(struct candevice_t *candev) DEBUGMSG("Resetting pccanf/s hardware ...\n"); while (i < 1000000) { i++; - outb(0x00,candev->res_addr); + can_outb(0x00,candev->res_addr); } - outb(0x01,candev->res_addr); - outb(0x00,candev->chip[0]->chip_base_addr+SJACR); + can_outb(0x01,candev->res_addr); + can_outb(0x00,candev->chip[0]->chip_base_addr+SJACR); /* Check hardware reset status */ i=0; - while ( (inb(candev->chip[0]->chip_base_addr+SJACR) & CR_RR) + while ( (can_inb(candev->chip[0]->chip_base_addr+SJACR) & sjaCR_RR) && (i<=15) ) { udelay(20000); i++; @@ -138,18 +163,18 @@ int pccand_reset(struct candevice_t *candev) DEBUGMSG("Resetting pccan-d hardware ...\n"); while (i < 1000000) { i++; - outb(0x00,candev->res_addr); + can_outb(0x00,candev->res_addr); } - outb(0x01,candev->res_addr); - outb(0x00,candev->chip[0]->chip_base_addr+SJACR); - outb(0x00,candev->chip[1]->chip_base_addr+SJACR); + can_outb(0x01,candev->res_addr); + can_outb(0x00,candev->chip[0]->chip_base_addr+SJACR); + can_outb(0x00,candev->chip[1]->chip_base_addr+SJACR); /* Check hardware reset status */ i=0; for (chip_nr=0; chip_nr<2; chip_nr++) { i=0; - while ( (inb(candev->chip[chip_nr]->chip_base_addr + - SJACR) & CR_RR) && (i<=15) ) { + while ( (can_inb(candev->chip[chip_nr]->chip_base_addr + + SJACR) & sjaCR_RR) && (i<=15) ) { udelay(20000); i++; } @@ -169,22 +194,22 @@ int pccanq_reset(struct candevice_t *candev) int i=0,chip_nr=0; for (i=0; i<4; i++) - disable_irq(candev->chip[i]->chip_irq); + can_disable_irq(candev->chip[i]->chip_irq); DEBUGMSG("Resetting pccan-q hardware ...\n"); while (i < 100000) { i++; - outb(0x00,candev->res_addr); + can_outb(0x00,candev->res_addr); } outb_p(0x01,candev->res_addr); - - outb(0x00,candev->chip[2]->chip_base_addr+SJACR); - outb(0x00,candev->chip[3]->chip_base_addr+SJACR); + + can_outb(0x00,candev->chip[2]->chip_base_addr+SJACR); + can_outb(0x00,candev->chip[3]->chip_base_addr+SJACR); /* Check hardware reset status */ for (chip_nr=0; chip_nr<2; chip_nr++) { i=0; - while( (inb(candev->chip[chip_nr]->chip_base_addr + + while( (can_inb(candev->chip[chip_nr]->chip_base_addr + iCPU) & iCPU_RST) && (i<=15) ) { udelay(20000); i++; @@ -194,13 +219,13 @@ int pccanq_reset(struct candevice_t *candev) CANMSG("Please check your hardware.\n"); return -ENODEV; } - else + else DEBUGMSG("Chip%d reset status ok.\n",chip_nr); } for (chip_nr=2; chip_nr<4; chip_nr++) { i=0; - while( (inb(candev->chip[chip_nr]->chip_base_addr + - SJACR) & CR_RR) && (i<=15) ) { + while( (can_inb(candev->chip[chip_nr]->chip_base_addr + + SJACR) & sjaCR_RR) && (i<=15) ) { udelay(20000); i++; } @@ -214,10 +239,10 @@ int pccanq_reset(struct candevice_t *candev) } for (i=0; i<4; i++) - enable_irq(candev->chip[i]->chip_irq); + can_enable_irq(candev->chip[i]->chip_irq); return 0; -} +} int pccan_init_hw_data(struct candevice_t *candev) { @@ -248,54 +273,52 @@ int pccan_init_chip_data(struct candevice_t *candev, int chipnr) { if (!strcmp(candev->hwname,"pccan-q")) { if (chipnr<2) { - candev->chip[chipnr]->chip_type="i82527"; + i82527_fill_chipspecops(candev->chip[chipnr]); candev->chip[chipnr]->flags = CHIP_SEGMENTED; candev->chip[chipnr]->int_cpu_reg=iCPU_DSC; candev->chip[chipnr]->int_clk_reg=iCLK_SL1; candev->chip[chipnr]->int_bus_reg=iBUS_CBY; candev->chip[chipnr]->sja_cdr_reg = 0; - candev->chip[chipnr]->sja_ocr_reg = 0; + candev->chip[chipnr]->sja_ocr_reg = 0; } else{ - candev->chip[chipnr]->chip_type="sja1000"; + sja1000_fill_chipspecops(candev->chip[chipnr]); candev->chip[chipnr]->flags = 0; candev->chip[chipnr]->int_cpu_reg = 0; candev->chip[chipnr]->int_clk_reg = 0; candev->chip[chipnr]->int_bus_reg = 0; candev->chip[chipnr]->sja_cdr_reg = - CDR_CLK_OFF; - candev->chip[chipnr]->sja_ocr_reg = - OCR_MODE_NORMAL | OCR_TX0_LH; + sjaCDR_CLK_OFF; + candev->chip[chipnr]->sja_ocr_reg = + sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH; } - candev->chip[chipnr]->chip_base_addr=0x1000*chipnr+0x2000+candev->io_addr; + candev->chip[chipnr]->chip_base_addr=can_ioport2ioptr(0x1000*chipnr+0x2000+candev->io_addr); } else { - candev->chip[chipnr]->chip_type="sja1000"; - candev->chip[chipnr]->chip_base_addr=0x1000*chipnr+0x4000+candev->io_addr; + sja1000_fill_chipspecops(candev->chip[chipnr]); + candev->chip[chipnr]->chip_base_addr=can_ioport2ioptr(0x1000*chipnr+0x4000+candev->io_addr); candev->chip[chipnr]->flags = 0; candev->chip[chipnr]->int_cpu_reg = 0; candev->chip[chipnr]->int_clk_reg = 0; candev->chip[chipnr]->int_bus_reg = 0; - candev->chip[chipnr]->sja_cdr_reg = CDR_CLK_OFF; - candev->chip[chipnr]->sja_ocr_reg = - OCR_MODE_NORMAL | OCR_TX0_LH; + candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CLK_OFF; + candev->chip[chipnr]->sja_ocr_reg = + sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH; } candev->chip[chipnr]->clock = 16000000; return 0; -} +} -int pccan_init_obj_data(struct chip_t *chip, int objnr) +int pccan_init_obj_data(struct canchip_t *chip, int objnr) { if (!strcmp(chip->chip_type,"sja1000")) { chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr; - chip->msgobj[objnr]->flags=0; - } + } else { /* The spacing for this card is 0x3c0 */ chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr+(objnr+1)*0x10+(int)((objnr+1)/4)*0x3c0; - chip->msgobj[objnr]->flags=0; - } + } return 0; } @@ -332,22 +355,22 @@ int pccan_program_irq(struct candevice_t *candev) } } } - outb(irq_reg_value,0x6000+candev->io_addr); + can_outb(irq_reg_value,0x6000+candev->io_addr); DEBUGMSG("Configured pccan hardware interrupts\n"); - outb(0x80,0x6000+candev->io_addr+0x02); + can_outb(0x80,0x6000+candev->io_addr+0x02); DEBUGMSG("Selected pccan on-board 16 MHz oscillator\n"); return 0; } -inline void pccan_write_register(unsigned char data, unsigned long address) +inline void pccan_write_register(unsigned data, can_ioptr_t address) { - outb(data,address); + can_outb(data,address); } -unsigned pccan_read_register(unsigned long address) +unsigned pccan_read_register(can_ioptr_t address) { - return inb(address); + return can_inb(address); } int pccanf_register(struct hwspecops_t *hwspecops)