X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/c61a955168179d9b11a8f420979eed5cc24869c0..a6d355f1cf48f39eecb2f1bdead51817d1fd5989:/lincan/src/msmcan.c diff --git a/lincan/src/msmcan.c b/lincan/src/msmcan.c index 0cdb07d..9851b5f 100644 --- a/lincan/src/msmcan.c +++ b/lincan/src/msmcan.c @@ -4,7 +4,7 @@ * Rewritten for new CAN queues by Pavel Pisa - OCERA team member * email:pisa@cmp.felk.cvut.cz * This software is released under the GPL-License. - * Version lincan-0.2 9 Jul 2003 + * Version lincan-0.3 17 Jun 2004 */ #include "../include/can.h" @@ -13,7 +13,7 @@ #include "../include/msmcan.h" #include "../include/i82527.h" -static can_spinlock_t msmcan_port_lock=SPIN_LOCK_UNLOCKED; +static CAN_DEFINE_SPINLOCK(msmcan_port_lock); /* IO_RANGE is the io-memory range that gets reserved, please adjust according * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or @@ -56,7 +56,7 @@ int msmcan_release_io(struct candevice_t *candev) */ int msmcan_reset(struct candevice_t *candev) { - struct chip_t *chip=candev->chip[0]; + struct canchip_t *chip=candev->chip[0]; DEBUGMSG("Resetting msmcan hardware ...\n"); /* we don't use template_write_register because we don't use the two first @@ -122,11 +122,10 @@ int msmcan_init_hw_data(struct candevice_t *candev) * argument supplied at module loading time. * The clock argument holds the chip clock value in Hz. */ -#define CHIP_TYPE "i82527" int msmcan_init_chip_data(struct candevice_t *candev, int chipnr) { - candev->chip[chipnr]->chip_type=CHIP_TYPE; + i82527_fill_chipspecops(candev->chip[chipnr]); /* device uses indexed access */ candev->chip[chipnr]->chip_base_addr= candev->io_addr << 16; @@ -149,7 +148,7 @@ int msmcan_init_chip_data(struct candevice_t *candev, int chipnr) * base address. * Unless the hardware uses a segmented memory map, flags can be set zero. */ -int msmcan_init_obj_data(struct chip_t *chip, int objnr) +int msmcan_init_obj_data(struct canchip_t *chip, int objnr) { chip->msgobj[objnr]->obj_base_addr=