X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/c6162f4f8d268b7ba1d613459dd1519f587a698e..78bcd4f474077b9c45ba5f8aad2801c93df4fde8:/lincan/include/mpc5200.h

diff --git a/lincan/include/mpc5200.h b/lincan/include/mpc5200.h
index d63ffbd..79dbc30 100644
--- a/lincan/include/mpc5200.h
+++ b/lincan/include/mpc5200.h
@@ -33,36 +33,64 @@
 /* Publication of enhanced or derived LinCAN files is required although.  */
 /**************************************************************************/
 
+#ifndef LINCAN_MPC5200_H
+#define LINCAN_MPC5200_H
+
+/* Change this to distinguish between original MIDAM board and CTU daughterboard aka RYU */
+#define MSCAN_MIDAM	2
+
+
+/* MPC5200 has two CAN controlers
+ * however MIDAM board uses only one controler
+ * RYU board uses both
+ */
+#ifdef MSCAN_MIDAM
+	#define NR_MSCAN	1
+#else
+	#ifdef MSCAN_RYU
+		#define NR_MSCAN	2
+	#else
+		#define NR_MSCAN	0
+	#endif /* MSCAN_RYU */
+#endif /* MSCAN_MIDAM */
+
+
 #define NR_82527	0
 #define NR_SJA1000	0
-#define NR_MSCAN	2				/* this isnt used in Lincan core */
-#define NR_ALL		2
+#define NR_ALL		(NR_82527 + NR_SJA1000 + NR_MSCAN)
 
-#define MPC5200_CAN_IRQ 		17 		/* IRQ 17, 18 according to shark.dts */
-#define MPC5200_CAN_CHIP_OFFSET		0x80
 
+/* IRQ is read from OpenFirmware nodes */
+
+#define MPC5200_CAN_CHIP_OFFSET		0x80
 #define IO_RANGE 			0x80
 
 
 /* Clock frequency - used for baudrate */
-// TODO: zjistit frekvence IPB a SYS_XTAL
-#define MPC5200_SHARK_SYS_XTAL_FREQ	32768000	/* 32768k xtal */
-#define MPC5200_SHARK_IPB_FREQ		3300000		/* derived from XTAL by dividing */
+#define MPC5200_SHARK_SYS_XTAL_FREQ	396000000	/* 396 MHz */
+#define MPC5200_SHARK_IPB_FREQ		132000000	/* derived from XTAL by dividing: 132 MHz */
+/* got from /proc/device-tree/cpus/PowerPC,5200@0/ bus-frequency and system-frequency */
 
 /* Determine which clock source to use */
 /* 0 - use IP Bus clock                */
 /* 1 - use SYS_XTAL_IN frequency       */
-#define MPC5200_CLKSRC		1		
+#define MPC5200_CLKSRC		1
 
-#ifndef MPC5200_CLKSRC
-	#define MPC5200_CLK_FREQ	MPC5200_SHARK_SYS_XTAL_FREQ
+#if MPC5200_CLKSRC
+	#define MPC5200_CLK_FREQ	(MPC5200_SHARK_SYS_XTAL_FREQ/12)	/* 33MHz */
 #else
-	#define MPC5200_CLK_FREQ	MPC5200_SHARK_IPB_FREQ
+	#define MPC5200_CLK_FREQ	(MPC5200_SHARK_IPB_FREQ/4)		/* 33MHz */
 #endif
 
+/* ----------- Debugging options for MPC5200 ----------- */
+
+#define MPC5200_DBG 0
 
+#if MPC5200_DBG
+	/* standard LinCAN core debug - used only for MPC5200 driver part */
+	#define DEBUGMSG(fmt,args...) can_printk(KERN_ERR "lincan (debug): " fmt,##args)
+#endif	/* MPC5200_DBG */
 
-/* static CAN_DEFINE_SPINLOCK(mpc5200_port_lock); */
 
 int mpc5200_request_io(struct candevice_t *candev);
 int mpc5200_release_io(struct candevice_t *candev);
@@ -74,3 +102,4 @@ int mpc5200_program_irq(struct candevice_t *candev);
 void mpc5200_write_register(unsigned data, can_ioptr_t address);
 unsigned mpc5200_read_register(can_ioptr_t address);
 
+#endif /* LINCAN_MPC5200_H */