X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/c3adf4f9af7ee68df8bb65fafa4dbcbdcc4895ba..32115f5fda63ffe8b582a10d2f55ae765fec4f41:/lincan/include/omap2_spican.h

diff --git a/lincan/include/omap2_spican.h b/lincan/include/omap2_spican.h
new file mode 100644
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--- /dev/null
+++ b/lincan/include/omap2_spican.h
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+/* spican.h
+ * Header file for the Linux CAN-bus driver - LinCAN.
+ * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
+ * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
+ * email:pisa@cmp.felk.cvut.cz
+ * Adapted for spican by Jan Kriz
+ * email:devel@jojen.net
+ * This software is released under the GPL-License.
+ * Version lincan-0.3.4-r1  20 Aug 2010
+ */
+
+#define OMAP2_SPICAN_NCHIPS 1 // Since the device is initiated from SPI, it's applies to 1 chip (and 1 irq) at a time
+
+int spican_request_io(struct candevice_t *candev);
+int spican_release_io(struct candevice_t *candev);
+int spican_reset(struct candevice_t *candev); 
+int spican_init_hw_data(struct candevice_t *candev);
+int spican_init_chip_data(struct candevice_t *candev, int chipnr);
+int spican_init_obj_data(struct canchip_t *chip, int objnr);
+void spican_write_register(unsigned data, can_ioptr_t address);
+unsigned spican_read_register(can_ioptr_t address);
+int spican_program_irq(struct candevice_t *candev);
+
+#define OMAP2_SPICAN_TRIG_IRQ	(1<<0)
+#define OMAP2_SPICAN_TRIG_GPT	(1<<1)
+#define OMAP2_SPICAN_TRIG_SYS	(1<<2)
+
+#define OMAP2_SPICAN_MCP_CLK (20000000)
+#define OMAP2_SPICAN_BAUDRATE (1000000)
+
+#define OMAP2_SPICAN_CS_CHANGE (1)
+#define OMAP2_SPICAN_DELAY_USECS (0)
+#define OMAP2_SPICAN_SPEED_HZ (10000000)
+
+struct omap2_spican_platform_data {
+	uint32_t mcp2515_clk; /* Clock frequency of MCP2515 */
+	uint32_t baudrate; /* Requested can communication speed */
+	
+	unsigned cs_change; /* Cycle ~CS between transmissions? */
+	u16 delay_usecs; /* Time gap between transmissions */
+	u32 speed_hz; /* Speed of SPI communication */
+
+	const char *chiptype;
+	
+	/* Following options are set at runtime */
+	struct spi_device *spi; /* SPI device */
+	u8	trigger;
+	u32 irq;
+#ifdef CONFIG_OMAP_DM_TIMER	
+	struct omap_dm_timer *timer_ptr; // timer object
+	int32_t timer_irq; // the IRQ # for our gp timer
+#endif /* CONFIG_OMAP_DM_TIMER */
+	spinlock_t spi_lock;
+};
+
+int omap2_spican_init(void);
+void omap2_spican_exit(void);