X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/b34a548a5dfd2f0b068fd835a4cd51680d851068..831ccb1f14f7472962fc2d185f32e18105209bd7:/lincan/src/smartcan.c

diff --git a/lincan/src/smartcan.c b/lincan/src/smartcan.c
index abbbe1a..f83d8d9 100644
--- a/lincan/src/smartcan.c
+++ b/lincan/src/smartcan.c
@@ -4,7 +4,7 @@
  * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
  * email:pisa@cmp.felk.cvut.cz
  * This software is released under the GPL-License.
- * Version lincan-0.2  9 Jul 2003
+ * Version lincan-0.3  17 Jun 2004
  */ 
 
 #include "../include/can.h"
@@ -16,6 +16,8 @@
 int smartcan_irq=-1;
 unsigned long smartcan_base=0x0;
 
+static CAN_DEFINE_SPINLOCK(smartcan_port_lock);
+
 int smartcan_request_io(struct candevice_t *candev)
 {
 	if (!can_request_io_region(candev->io_addr,0x04,DEVICE_NAME)) {
@@ -39,17 +41,17 @@ int smartcan_reset(struct candevice_t *candev)
 	int i=0;
 
 	DEBUGMSG("Resetting smartcan hardware ...\n");
-	outb(0x00,candev->res_addr);
+	can_outb(0x00,candev->res_addr);
 	while (i < 1000000) {
 		i++;
-		outb(0x01,candev->res_addr);
+		can_outb(0x01,candev->res_addr);
 	}
-	outb(0x00,candev->res_addr); 
+	can_outb(0x00,candev->res_addr); 
 
 	/* Check hardware reset status */
 	i=0;
-	outb(candev->io_addr+iCPU,candev->io_addr);
-	while ( (inb(candev->io_addr+1)&0x80) && (i<=15) ) {
+	can_outb(candev->io_addr+iCPU,candev->io_addr);
+	while ( (can_inb(candev->io_addr+1)&0x80) && (i<=15) ) {
 		udelay(20000);
 		i++;
 	}
@@ -76,8 +78,8 @@ int smartcan_init_hw_data(struct candevice_t *candev)
 
 int smartcan_init_chip_data(struct candevice_t *candev, int chipnr)
 {
-	candev->chip[chipnr]->chip_type="i82527";
-	candev->chip[chipnr]->chip_base_addr=candev->io_addr;
+	i82527_fill_chipspecops(candev->chip[chipnr]);
+	candev->chip[chipnr]->chip_base_addr=can_ioport2ioptr(candev->io_addr);
 	candev->chip[chipnr]->clock = 16000000;
 	candev->chip[chipnr]->int_cpu_reg = iCPU_DSC;
 	candev->chip[chipnr]->int_clk_reg = iCLK_SL1;
@@ -90,7 +92,7 @@ int smartcan_init_chip_data(struct candevice_t *candev, int chipnr)
 	return 0;
 }
 
-int smartcan_init_obj_data(struct chip_t *chip, int objnr)
+int smartcan_init_obj_data(struct canchip_t *chip, int objnr)
 {
 	chip->msgobj[objnr]->obj_base_addr=(objnr+1)*0x10;
 
@@ -98,21 +100,23 @@ int smartcan_init_obj_data(struct chip_t *chip, int objnr)
 }
 
 
-void smartcan_write_register(unsigned char data, unsigned long address)
+void smartcan_write_register(unsigned data, can_ioptr_t address)
 {
-	can_disable_irq(smartcan_irq);
-	outb(address-smartcan_base,smartcan_base);
-	outb(data,smartcan_base+1);
-	can_enable_irq(smartcan_irq);
+	can_spin_irqflags_t flags;
+	can_spin_lock_irqsave(&smartcan_port_lock,flags);
+	can_outb(address-smartcan_base,smartcan_base);
+	can_outb(data,smartcan_base+1);
+	can_spin_unlock_irqrestore(&smartcan_port_lock,flags);
 }
 
-unsigned smartcan_read_register(unsigned long address)
+unsigned smartcan_read_register(can_ioptr_t address)
 {
 	unsigned ret;
-	can_disable_irq(smartcan_irq);
-	outb(address-smartcan_base,smartcan_base);
-	ret=inb(smartcan_base+1);
-	can_enable_irq(smartcan_irq);
+	can_spin_irqflags_t flags;
+	can_spin_lock_irqsave(&smartcan_port_lock,flags);
+	can_outb(address-smartcan_base,smartcan_base);
+	ret=can_inb(smartcan_base+1);
+	can_spin_unlock_irqrestore(&smartcan_port_lock,flags);
 	return ret;
 }