X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/b34a548a5dfd2f0b068fd835a4cd51680d851068..831ccb1f14f7472962fc2d185f32e18105209bd7:/lincan/src/pccan.c

diff --git a/lincan/src/pccan.c b/lincan/src/pccan.c
index 6e32610..289fa84 100644
--- a/lincan/src/pccan.c
+++ b/lincan/src/pccan.c
@@ -4,7 +4,7 @@
  * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
  * email:pisa@cmp.felk.cvut.cz
  * This software is released under the GPL-License.
- * Version lincan-0.2  9 Jul 2003
+ * Version lincan-0.3  17 Jun 2004
  */ 
 
 #include "../include/can.h"
@@ -108,14 +108,14 @@ int pccanf_reset(struct candevice_t *candev)
 	DEBUGMSG("Resetting pccanf/s hardware ...\n");
 	while (i < 1000000) {
 		i++;
-		outb(0x00,candev->res_addr);
+		can_outb(0x00,candev->res_addr);
 	}
-	outb(0x01,candev->res_addr);
-	outb(0x00,candev->chip[0]->chip_base_addr+SJACR);
+	can_outb(0x01,candev->res_addr);
+	can_outb(0x00,candev->chip[0]->chip_base_addr+SJACR);
 
 	/* Check hardware reset status */
 	i=0;
-	while ( (inb(candev->chip[0]->chip_base_addr+SJACR) & CR_RR)
+	while ( (can_inb(candev->chip[0]->chip_base_addr+SJACR) & sjaCR_RR)
 								 && (i<=15) ) {
 		udelay(20000);
 		i++;
@@ -138,18 +138,18 @@ int pccand_reset(struct candevice_t *candev)
 	DEBUGMSG("Resetting pccan-d hardware ...\n");
 	while (i < 1000000) {
 		i++;
-		outb(0x00,candev->res_addr);
+		can_outb(0x00,candev->res_addr);
 	}
-	outb(0x01,candev->res_addr);
-	outb(0x00,candev->chip[0]->chip_base_addr+SJACR);
-	outb(0x00,candev->chip[1]->chip_base_addr+SJACR);
+	can_outb(0x01,candev->res_addr);
+	can_outb(0x00,candev->chip[0]->chip_base_addr+SJACR);
+	can_outb(0x00,candev->chip[1]->chip_base_addr+SJACR);
 
 	/* Check hardware reset status */
 	i=0;
 	for (chip_nr=0; chip_nr<2; chip_nr++) {
 		i=0;
-		while ( (inb(candev->chip[chip_nr]->chip_base_addr +
-						SJACR) & CR_RR) && (i<=15) ) {
+		while ( (can_inb(candev->chip[chip_nr]->chip_base_addr +
+						SJACR) & sjaCR_RR) && (i<=15) ) {
 			udelay(20000);
 			i++;
 		}
@@ -174,17 +174,17 @@ int pccanq_reset(struct candevice_t *candev)
 	DEBUGMSG("Resetting pccan-q hardware ...\n");
 	while (i < 100000) {
 		i++;
-		outb(0x00,candev->res_addr);
+		can_outb(0x00,candev->res_addr);
 	}
 	outb_p(0x01,candev->res_addr);
 		
-	outb(0x00,candev->chip[2]->chip_base_addr+SJACR);
-	outb(0x00,candev->chip[3]->chip_base_addr+SJACR);
+	can_outb(0x00,candev->chip[2]->chip_base_addr+SJACR);
+	can_outb(0x00,candev->chip[3]->chip_base_addr+SJACR);
 
 	/* Check hardware reset status */
 	for (chip_nr=0; chip_nr<2; chip_nr++) {
 		i=0;
-		while( (inb(candev->chip[chip_nr]->chip_base_addr +
+		while( (can_inb(candev->chip[chip_nr]->chip_base_addr +
 						iCPU) & iCPU_RST) && (i<=15) ) {
 			udelay(20000);
 			i++;
@@ -199,8 +199,8 @@ int pccanq_reset(struct candevice_t *candev)
 	}
 	for (chip_nr=2; chip_nr<4; chip_nr++) {
 		i=0;
-		while( (inb(candev->chip[chip_nr]->chip_base_addr +
-						SJACR) & CR_RR) && (i<=15) ) {
+		while( (can_inb(candev->chip[chip_nr]->chip_base_addr +
+						SJACR) & sjaCR_RR) && (i<=15) ) {
 			udelay(20000);
 			i++;
 		}
@@ -248,7 +248,7 @@ int pccan_init_chip_data(struct candevice_t *candev, int chipnr)
 {
 	if (!strcmp(candev->hwname,"pccan-q")) {
 		if (chipnr<2) {
-			candev->chip[chipnr]->chip_type="i82527";
+			i82527_fill_chipspecops(candev->chip[chipnr]);
 			candev->chip[chipnr]->flags = CHIP_SEGMENTED;
 			candev->chip[chipnr]->int_cpu_reg=iCPU_DSC;
 			candev->chip[chipnr]->int_clk_reg=iCLK_SL1;
@@ -257,28 +257,28 @@ int pccan_init_chip_data(struct candevice_t *candev, int chipnr)
 			candev->chip[chipnr]->sja_ocr_reg = 0;	
 		}
 		else{
-			candev->chip[chipnr]->chip_type="sja1000";
+			sja1000_fill_chipspecops(candev->chip[chipnr]);
 			candev->chip[chipnr]->flags = 0;
 			candev->chip[chipnr]->int_cpu_reg = 0;
 			candev->chip[chipnr]->int_clk_reg = 0;
 			candev->chip[chipnr]->int_bus_reg = 0;
 			candev->chip[chipnr]->sja_cdr_reg =
-								CDR_CLK_OFF;
+								sjaCDR_CLK_OFF;
 			candev->chip[chipnr]->sja_ocr_reg = 
-						OCR_MODE_NORMAL | OCR_TX0_LH;	
+						sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH;	
 		}
-		candev->chip[chipnr]->chip_base_addr=0x1000*chipnr+0x2000+candev->io_addr;
+		candev->chip[chipnr]->chip_base_addr=can_ioport2ioptr(0x1000*chipnr+0x2000+candev->io_addr);
 	}
 	else {
-		candev->chip[chipnr]->chip_type="sja1000";
-		candev->chip[chipnr]->chip_base_addr=0x1000*chipnr+0x4000+candev->io_addr;
+		sja1000_fill_chipspecops(candev->chip[chipnr]);
+		candev->chip[chipnr]->chip_base_addr=can_ioport2ioptr(0x1000*chipnr+0x4000+candev->io_addr);
 		candev->chip[chipnr]->flags = 0;
 		candev->chip[chipnr]->int_cpu_reg = 0;
 		candev->chip[chipnr]->int_clk_reg = 0;
 		candev->chip[chipnr]->int_bus_reg = 0;
-		candev->chip[chipnr]->sja_cdr_reg = CDR_CLK_OFF;
+		candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CLK_OFF;
 		candev->chip[chipnr]->sja_ocr_reg = 
-						OCR_MODE_NORMAL | OCR_TX0_LH;	
+						sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH;	
 	}
 
 	candev->chip[chipnr]->clock = 16000000;
@@ -286,7 +286,7 @@ int pccan_init_chip_data(struct candevice_t *candev, int chipnr)
 	return 0;
 }	
 
-int pccan_init_obj_data(struct chip_t *chip, int objnr)
+int pccan_init_obj_data(struct canchip_t *chip, int objnr)
 {
 	if (!strcmp(chip->chip_type,"sja1000")) {
 		chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
@@ -330,22 +330,22 @@ int pccan_program_irq(struct candevice_t *candev)
 			}
 		}
 	}
-	outb(irq_reg_value,0x6000+candev->io_addr);
+	can_outb(irq_reg_value,0x6000+candev->io_addr);
 	DEBUGMSG("Configured pccan hardware interrupts\n");
-	outb(0x80,0x6000+candev->io_addr+0x02);
+	can_outb(0x80,0x6000+candev->io_addr+0x02);
 	DEBUGMSG("Selected pccan on-board 16 MHz oscillator\n");
 
 	return 0;
 }
 
-inline void pccan_write_register(unsigned char data, unsigned long address)
+inline void pccan_write_register(unsigned data, can_ioptr_t address)
 {
-	outb(data,address); 
+	can_outb(data,address); 
 }
 
-unsigned pccan_read_register(unsigned long address)
+unsigned pccan_read_register(can_ioptr_t address)
 {
-	return inb(address);
+	return can_inb(address);
 }
 
 int pccanf_register(struct hwspecops_t *hwspecops)