X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/b34a548a5dfd2f0b068fd835a4cd51680d851068..32cde89b361c7afb67125976c3816e12633b1d4a:/lincan/src/nsi.c diff --git a/lincan/src/nsi.c b/lincan/src/nsi.c index 9f6bdef..ce9c591 100644 --- a/lincan/src/nsi.c +++ b/lincan/src/nsi.c @@ -4,7 +4,7 @@ * Rewritten for new CAN queues by Pavel Pisa - OCERA team member * email:pisa@cmp.felk.cvut.cz * This software is released under the GPL-License. - * Version lincan-0.2 9 Jul 2003 + * Version lincan-0.3 17 Jun 2004 */ #include "../include/can.h" @@ -16,6 +16,8 @@ int nsican_irq=-1; unsigned long nsican_base=0x0; +static CAN_DEFINE_SPINLOCK(nsican_port_lock); + /* IO_RANGE is the io-memory range that gets reserved, please adjust according * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or * #define IO_RANGE 0x20 for sja1000 chips. @@ -117,11 +119,10 @@ int nsi_init_hw_data(struct candevice_t *candev) * argument supplied at module loading time. * The clock argument holds the chip clock value in Hz. */ -#define CHIP_TYPE "i82527" int nsi_init_chip_data(struct candevice_t *candev, int chipnr) { - candev->chip[chipnr]->chip_type=CHIP_TYPE; + i82527_fill_chipspecops(candev->chip[chipnr]); candev->chip[chipnr]->chip_base_addr= candev->io_addr; candev->chip[chipnr]->clock = 16000000; @@ -144,7 +145,7 @@ int nsi_init_chip_data(struct candevice_t *candev, int chipnr) * base address. * Unless the hardware uses a segmented memory map, flags can be set zero. */ -int nsi_init_obj_data(struct chip_t *chip, int objnr) +int nsi_init_obj_data(struct canchip_t *chip, int objnr) { chip->msgobj[objnr]->obj_base_addr= @@ -168,7 +169,7 @@ int nsi_program_irq(struct candevice_t *candev) * on the CAN chip. You should only have to edit this function if your hardware * uses some specific write process. */ -void nsi_write_register(unsigned char data, unsigned long address) +void nsi_write_register(unsigned data, unsigned long address) { /* address is an absolute address */ @@ -190,13 +191,14 @@ unsigned nsi_read_register(unsigned long address) We use the two register, we write the address where we want to read in a first time. In a second time we read the data */ - unsigned char ret; + unsigned char ret; + can_spin_irqflags_t flags; - can_disable_irq(nsican_irq); - outb(address-nsican_base, nsican_base); - ret=inb(nsican_base+1); - can_enable_irq(nsican_irq); - return ret; + can_spin_lock_irqsave(&nsican_port_lock,flags); + outb(address-nsican_base, nsican_base); + ret=inb(nsican_base+1); + can_spin_unlock_irqrestore(&nsican_port_lock,flags); + return ret; }