X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/b34a548a5dfd2f0b068fd835a4cd51680d851068..2a4663dd0b20d96d1ffe20993dd0c63ed2ca9f20:/lincan/src/aim104.c

diff --git a/lincan/src/aim104.c b/lincan/src/aim104.c
index cc24806..d406f76 100644
--- a/lincan/src/aim104.c
+++ b/lincan/src/aim104.c
@@ -4,7 +4,7 @@
  * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
  * email:pisa@cmp.felk.cvut.cz
  * This software is released under the GPL-License.
- * Version lincan-0.2  9 Jul 2003
+ * Version lincan-0.3  17 Jun 2004
  */ 
 
 #include "../include/can.h"
@@ -85,7 +85,7 @@ int aim104_reset(struct candevice_t *candev)
 	/* Check hardware reset status chip 0 */
 	i=0;
 	while ( (aim104_read_register(candev->io_addr + SJACR) 
-							& CR_RR) && (i<=15) ) {
+							& sjaCR_RR) && (i<=15) ) {
 		udelay(20000);
 		i++;
 	}
@@ -129,7 +129,6 @@ int aim104_init_hw_data(struct candevice_t *candev)
 	return 0;
 }
 
-#define CHIP_TYPE "sja1000"
 /**
  * template_init_chip_data - Initialize chips
  * @candev: Pointer to candevice/board structure
@@ -145,11 +144,11 @@ int aim104_init_hw_data(struct candevice_t *candev)
  * The @clock entry holds the chip clock value in Hz.
  * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider
  * register. Options defined in the %sja1000.h file:
- * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
+ * %sjaCDR_CLKOUT_MASK, %sjaCDR_CLK_OFF, %sjaCDR_RXINPEN, %sjaCDR_CBP, %sjaCDR_PELICAN
  * The entry @sja_ocr_reg holds hardware specific options for the Output Control
  * register. Options defined in the %sja1000.h file:
- * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
- * %OCR_TX0_LH, %OCR_TX1_ZZ.
+ * %sjaOCR_MODE_BIPHASE, %sjaOCR_MODE_TEST, %sjaOCR_MODE_NORMAL, %sjaOCR_MODE_CLOCK,
+ * %sjaOCR_TX0_LH, %sjaOCR_TX1_ZZ.
  * The entry @int_clk_reg holds hardware specific options for the Clock Out
  * register. Options defined in the %i82527.h file:
  * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
@@ -161,7 +160,7 @@ int aim104_init_hw_data(struct candevice_t *candev)
  */
 int aim104_init_chip_data(struct candevice_t *candev, int chipnr)
 {
-	candev->chip[chipnr]->chip_type=CHIP_TYPE;
+	sja1000_fill_chipspecops(candev->chip[chipnr]);
 	candev->chip[chipnr]->chip_base_addr=candev->io_addr;
 	candev->chip[chipnr]->clock = 16000000;
 	candev->chip[chipnr]->flags = 0;
@@ -224,7 +223,7 @@ int aim104_program_irq(struct candevice_t *candev)
  * Return Value: The function does not return a value
  * File: src/template.c
  */
-void aim104_write_register(unsigned char data, unsigned long address)
+void aim104_write_register(unsigned data, unsigned long address)
 {
 	outb(data,address);
 }