X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/95c031e101c74ae6472a7e538f3128f67a490082..a2eb4407e9772cf1057e7ea093250d5d38245c1d:/lincan/src/sja1000p.c diff --git a/lincan/src/sja1000p.c b/lincan/src/sja1000p.c index dd9d696..ffadb6c 100644 --- a/lincan/src/sja1000p.c +++ b/lincan/src/sja1000p.c @@ -14,6 +14,93 @@ #include "../include/main.h" #include "../include/sja1000p.h" +#ifdef CONFIG_OC_LINCAN_DETAILED_ERRORS + +static const char *sja1000_ecc_errc_str[]={ + "bit error", + "form error", + "stuff error", + "other type of error" +}; + +static const char *sja1000_ecc_seg_str[]={ + "?0?", + "?1?", + "ID.28 to ID.21", + "start of frame", + "bit SRTR", + "bit IDE", + "ID.20 to ID.18", + "ID.17 to ID.13", + "CRC sequence", + "reserved bit 0", + "data field", + "data length code", + "bit RTR", + "reserved bit 1", + "ID.4 to ID.0", + "ID.12 to ID.5", + "?16?" + "active error flag", + "intermission", + "tolerate dominant bits", + "?20?", + "?21?", + "passive error flag", + "error delimiter", + "CRC delimiter", + "acknowledge slot", + "end of frame", + "acknowledge delimiter", + "overload flag", + "?29?", + "?30?", + "?31?" +}; + +#endif /*CONFIG_OC_LINCAN_DETAILED_ERRORS*/ + +static int sja1000_report_error_limit_counter; + +static void sja1000_report_error(struct canchip_t *chip, + unsigned sr, unsigned ir, unsigned ecc) +{ + if(sja1000_report_error_limit_counter>=100) + return; + + CANMSG("Error: status register: 0x%x irq_register: 0x%02x error: 0x%02x\n", + sr, ir, ecc); + + sja1000_report_error_limit_counter+=10; + + if(sja1000_report_error_limit_counter>=100){ + sja1000_report_error_limit_counter+=10; + CANMSG("Error: too many errors, reporting disabled\n"); + return; + } + +#ifdef CONFIG_OC_LINCAN_DETAILED_ERRORS + CANMSG("SR: BS=%c ES=%c TS=%c RS=%c TCS=%c TBS=%c DOS=%c RBS=%c\n", + sr&sjaSR_BS?'1':'0',sr&sjaSR_ES?'1':'0', + sr&sjaSR_TS?'1':'0',sr&sjaSR_RS?'1':'0', + sr&sjaSR_TCS?'1':'0',sr&sjaSR_TBS?'1':'0', + sr&sjaSR_DOS?'1':'0',sr&sjaSR_RBS?'1':'0'); + CANMSG("IR: BEI=%c ALI=%c EPI=%c WUI=%c DOI=%c EI=%c TI=%c RI=%c\n", + sr&sjaIR_BEI?'1':'0',sr&sjaIR_ALI?'1':'0', + sr&sjaIR_EPI?'1':'0',sr&sjaIR_WUI?'1':'0', + sr&sjaIR_DOI?'1':'0',sr&sjaIR_EI?'1':'0', + sr&sjaIR_TI?'1':'0',sr&sjaIR_RI?'1':'0'); + if((sr&sjaIR_EI) || 1){ + CANMSG("EI: %s %s %s\n", + sja1000_ecc_errc_str[(ecc&(sjaECC_ERCC1|sjaECC_ERCC0))/sjaECC_ERCC0], + ecc&sjaECC_DIR?"RX":"TX", + sja1000_ecc_seg_str[ecc&sjaECC_SEG_M] + ); + } +#endif /*CONFIG_OC_LINCAN_DETAILED_ERRORS*/ +} + + /** * sja1000p_enable_configuration - enable chip configuration mode * @chip: pointer to chip state structure @@ -96,6 +183,10 @@ int sja1000p_chip_config(struct canchip_t *chip) /* Set mode, clock out, comparator */ can_write_reg(chip,sjaCDR_PELICAN|chip->sja_cdr_reg,SJACDR); + + /* Ensure, that interrupts are disabled even on the chip level now */ + can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER); + /* Set driver output configuration */ can_write_reg(chip,chip->sja_ocr_reg,SJAOCR); @@ -466,6 +557,8 @@ int sja1000p_start_chip(struct canchip_t *chip) flags = can_read_reg(chip, SJAMOD) & (sjaMOD_LOM|sjaMOD_STM|sjaMOD_AFM|sjaMOD_SM); can_write_reg(chip, flags, SJAMOD); + sja1000_report_error_limit_counter=0; + return 0; } @@ -486,6 +579,32 @@ int sja1000p_stop_chip(struct canchip_t *chip) return 0; } +/** + * sja1000p_attach_to_chip: - attaches to the chip, setups registers and state + * @chip: pointer to chip state structure + * + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_attach_to_chip(struct canchip_t *chip) +{ + return 0; +} + +/** + * sja1000p_release_chip: - called before chip structure removal if %CHIP_ATTACHED is set + * @chip: pointer to chip state structure + * + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_release_chip(struct canchip_t *chip) +{ + sja1000p_stop_chip(chip); + can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER); + + return 0; +} /** * sja1000p_remote_request: - configures message object and asks for RTR message @@ -573,9 +692,11 @@ void sja1000p_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj) obj->tx_slot=NULL; } + can_msgobj_clear_fl(obj,TX_PENDING); cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot); if(cmd<0) return; + can_msgobj_set_fl(obj,TX_PENDING); if (chip->chipspecops->pre_write_config(chip, obj, &obj->tx_slot->msg)) { obj->ret = -1; @@ -599,10 +720,7 @@ void sja1000p_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj) /** * sja1000p_irq_handler: - interrupt service routine * @irq: interrupt vector number, this value is system specific - * @dev_id: driver private pointer registered at time of request_irq() call. - * The CAN driver uses this pointer to store relationship of interrupt - * to chip state structure - @struct canchip_t - * @regs: system dependent value pointing to registers stored in exception frame + * @chip: pointer to chip state structure * * Interrupt handler is activated when state of CAN controller chip changes, * there is message to be read or there is more space for new messages or @@ -615,6 +733,7 @@ int sja1000p_irq_handler(int irq, struct canchip_t *chip) { int irq_register, status, error_code; struct msgobj_t *obj=chip->msgobj[0]; + int loop_cnt=CHIP_MAX_IRQLOOP; irq_register=can_read_reg(chip,SJAIR); // DEBUGMSG("sja1000_irq_handler: SJAIR:%02x\n",irq_register); @@ -629,58 +748,85 @@ int sja1000p_irq_handler(int irq, struct canchip_t *chip) return CANCHIP_IRQ_NONE; } - if ((irq_register & sjaIR_RI) != 0) { - DEBUGMSG("sja1000_irq_handler: RI\n"); - sja1000p_read(chip,obj); - obj->ret = 0; - } - if ((irq_register & sjaIR_TI) != 0) { - DEBUGMSG("sja1000_irq_handler: TI\n"); - obj->ret = 0; - can_msgobj_set_fl(obj,TX_REQUEST); - while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){ - can_msgobj_clear_fl(obj,TX_REQUEST); - - if (can_read_reg(chip, SJASR) & sjaSR_TBS) - sja1000p_irq_write_handler(chip, obj); - - can_msgobj_clear_fl(obj,TX_LOCK); - if(!can_msgobj_test_fl(obj,TX_REQUEST)) break; - DEBUGMSG("TX looping in sja1000_irq_handler\n"); - } - } - if ((irq_register & (sjaIR_EI|sjaIR_BEI|sjaIR_EPI|sjaIR_DOI)) != 0) { - // Some error happened - status=can_read_reg(chip,SJASR); - error_code=can_read_reg(chip,SJAECC); - CANMSG("Error: status register: 0x%x irq_register: 0x%02x error: 0x%02x\n", - status, irq_register, error_code); -// FIXME: chip should be brought to usable state. Transmission cancelled if in progress. -// Reset flag set to 0 if chip is already off the bus. Full state report - obj->ret=-1; - - if(error_code == 0xd9) { - obj->ret= -ENXIO; - /* no such device or address - no ACK received */ + status=can_read_reg(chip,SJASR); + + do { + + if(!loop_cnt--) { + CANMSG("sja1000p_irq_handler IRQ %d stuck\n",irq); + return CANCHIP_IRQ_STUCK; } - if(obj->tx_retry_cnt++>MAX_RETR) { - can_write_reg(chip, sjaCMR_AT, SJACMR); // cancel any transmition - obj->tx_retry_cnt = 0; + + /* (irq_register & sjaIR_RI) */ + /* old variant using SJAIR, collides with intended use with irq_accept */ + if (status & sjaSR_RBS) { + DEBUGMSG("sja1000_irq_handler: RI or RBS\n"); + sja1000p_read(chip,obj); + obj->ret = 0; } - if(status&sjaSR_BS) { - CANMSG("bus-off, resetting sja1000p\n"); - can_write_reg(chip, 0, SJAMOD); + + /* (irq_register & sjaIR_TI) */ + /* old variant using SJAIR, collides with intended use with irq_accept */ + if (((status & sjaSR_TBS) && can_msgobj_test_fl(obj,TX_PENDING))|| + (can_msgobj_test_fl(obj,TX_REQUEST))) { + DEBUGMSG("sja1000_irq_handler: TI or TX_PENDING and TBS\n"); + obj->ret = 0; + can_msgobj_set_fl(obj,TX_REQUEST); + while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){ + can_msgobj_clear_fl(obj,TX_REQUEST); + + if (can_read_reg(chip, SJASR) & sjaSR_TBS) + sja1000p_irq_write_handler(chip, obj); + + can_msgobj_clear_fl(obj,TX_LOCK); + if(!can_msgobj_test_fl(obj,TX_REQUEST)) break; + DEBUGMSG("TX looping in sja1000_irq_handler\n"); + } } + if ((irq_register & (sjaIR_EI|sjaIR_BEI|sjaIR_EPI|sjaIR_DOI)) != 0) { + // Some error happened + error_code=can_read_reg(chip,SJAECC); + sja1000_report_error(chip, status, irq_register, error_code); +// FIXME: chip should be brought to usable state. Transmission cancelled if in progress. +// Reset flag set to 0 if chip is already off the bus. Full state report + obj->ret=-1; - if(obj->tx_slot){ - canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_BUS); - /*canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot); - obj->tx_slot=NULL;*/ + if(error_code == 0xd9) { + obj->ret= -ENXIO; + /* no such device or address - no ACK received */ + } + if(obj->tx_retry_cnt++>MAX_RETR) { + can_write_reg(chip, sjaCMR_AT, SJACMR); // cancel any transmition + obj->tx_retry_cnt = 0; + } + if(status&sjaSR_BS) { + CANMSG("bus-off, resetting sja1000p\n"); + can_write_reg(chip, 0, SJAMOD); + } + + if(obj->tx_slot){ + canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_BUS); + /*canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot); + obj->tx_slot=NULL;*/ + } + + } else { + if(sja1000_report_error_limit_counter) + sja1000_report_error_limit_counter--; + obj->tx_retry_cnt=0; } - } else { - obj->tx_retry_cnt=0; - } + irq_register=can_read_reg(chip,SJAIR); + + status=can_read_reg(chip,SJASR); + + if(((status & sjaSR_TBS) && can_msgobj_test_fl(obj,TX_PENDING)) || + (irq_register & sjaIR_TI)) + can_msgobj_set_fl(obj,TX_REQUEST); + + } while((irq_register & (sjaIR_BEI|sjaIR_EPI|sjaIR_DOI|sjaIR_EI|sjaIR_RI)) || + (can_msgobj_test_fl(obj,TX_REQUEST) && !can_msgobj_test_fl(obj,TX_LOCK)) || + (status & sjaSR_RBS)); return CANCHIP_IRQ_HANDLED; } @@ -701,6 +847,7 @@ int sja1000p_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj) can_preempt_disable(); + can_msgobj_set_fl(obj,TX_PENDING); can_msgobj_set_fl(obj,TX_REQUEST); while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){ can_msgobj_clear_fl(obj,TX_REQUEST); @@ -737,10 +884,13 @@ int sja1000p_register(struct chipspecops_t *chipspecops) chipspecops->remote_request=sja1000p_remote_request; chipspecops->enable_configuration=sja1000p_enable_configuration; chipspecops->disable_configuration=sja1000p_disable_configuration; + chipspecops->attach_to_chip=sja1000p_attach_to_chip; + chipspecops->release_chip=sja1000p_release_chip; chipspecops->set_btregs=sja1000p_set_btregs; chipspecops->start_chip=sja1000p_start_chip; chipspecops->stop_chip=sja1000p_stop_chip; chipspecops->irq_handler=sja1000p_irq_handler; + chipspecops->irq_accept=NULL; return 0; }