X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/786c7d54e8d820e89997e507c29ea716c0d55fd9..75d77a3d5177ad90a0e319102c776852df2bccb7:/lincan/src/sja1000p.c diff --git a/lincan/src/sja1000p.c b/lincan/src/sja1000p.c index deb1c89..59fa68d 100644 --- a/lincan/src/sja1000p.c +++ b/lincan/src/sja1000p.c @@ -1,66 +1,65 @@ /* sja1000.c * Linux CAN-bus device driver. * Written by Arnaud Westenberg email:arnaud@wanadoo.nl - * This software is released under the GPL-License. - * Version 0.6 18 Sept 2000 * Changed for PeliCan mode SJA1000 by Tomasz Motylewski (BFAD GmbH) * T.Motylewski@bfad.de + * Rewritten for new CAN queues by Pavel Pisa - OCERA team member + * email:pisa@cmp.felk.cvut.cz + * This software is released under the GPL-License. + * Version lincan-0.3 17 Jun 2004 */ -#include -#if defined (CONFIG_MODVERSIONS) && !defined (MODVERSIONS) -#define MODVERSIONS -#endif - -#if defined (MODVERSIONS) -#include -#endif - -#include -#include -#include - +#include "../include/can.h" +#include "../include/can_sysdep.h" #include "../include/main.h" #include "../include/sja1000p.h" -int sja1000p_enable_configuration(struct chip_t *chip) +/** + * sja1000p_enable_configuration - enable chip configuration mode + * @chip: pointer to chip state structure + */ +int sja1000p_enable_configuration(struct canchip_t *chip) { int i=0; enum sja1000_PeliCAN_MOD flags; - disable_irq(chip->chip_irq); + can_disable_irq(chip->chip_irq); flags=can_read_reg(chip,SJAMOD); - while ((!(flags & MOD_RM)) && (i<=10)) { - can_write_reg(chip, MOD_RM, SJAMOD); -// TODO: configurable MOD_AFM (32/16 bit acceptance filter) -// config MOD_LOM (listen only) + while ((!(flags & sjaMOD_RM)) && (i<=10)) { + can_write_reg(chip, sjaMOD_RM, SJAMOD); +// TODO: configurable sjaMOD_AFM (32/16 bit acceptance filter) +// config sjaMOD_LOM (listen only) udelay(100); i++; flags=can_read_reg(chip, SJAMOD); } if (i>=10) { CANMSG("Reset error\n"); - enable_irq(chip->chip_irq); + can_enable_irq(chip->chip_irq); return -ENODEV; } return 0; } -int sja1000p_disable_configuration(struct chip_t *chip) +/** + * sja1000p_disable_configuration - disable chip configuration mode + * @chip: pointer to chip state structure + */ +int sja1000p_disable_configuration(struct canchip_t *chip) { int i=0; enum sja1000_PeliCAN_MOD flags; flags=can_read_reg(chip,SJAMOD); - while ( (flags & MOD_RM) && (i<=50) ) { + while ( (flags & sjaMOD_RM) && (i<=50) ) { // could be as long as 11*128 bit times after buss-off can_write_reg(chip, 0, SJAMOD); -// TODO: configurable MOD_AFM (32/16 bit acceptance filter) -// config MOD_LOM (listen only) +// TODO: configurable sjaMOD_AFM (32/16 bit acceptance filter) +// config sjaMOD_LOM (listen only) udelay(100); i++; flags=can_read_reg(chip, SJAMOD); @@ -70,38 +69,80 @@ int sja1000p_disable_configuration(struct chip_t *chip) return -ENODEV; } - enable_irq(chip->chip_irq); + can_enable_irq(chip->chip_irq); return 0; } -int sja1000p_chip_config(struct chip_t *chip) +/** + * sja1000p_chip_config: - can chip configuration + * @chip: pointer to chip state structure + * + * This function configures chip and prepares it for message + * transmission and reception. The function resets chip, + * resets mask for acceptance of all messages by call to + * sja1000p_extended_mask() function and then + * computes and sets baudrate with use of function sja1000p_baud_rate(). + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_chip_config(struct canchip_t *chip) { + int i; + unsigned char n, r; + if (sja1000p_enable_configuration(chip)) return -ENODEV; /* Set mode, clock out, comparator */ - can_write_reg(chip,CDR_PELICAN|chip->sja_cdr_reg,SJACDR); + can_write_reg(chip,sjaCDR_PELICAN|chip->sja_cdr_reg,SJACDR); + + /* Ensure, that interrupts are disabled even on the chip level now */ + can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER); + /* Set driver output configuration */ can_write_reg(chip,chip->sja_ocr_reg,SJAOCR); + + /* Simple check for chip presence */ + for (i=0, n=0x5a; i<8; i++, n+=0xf) { + can_write_reg(chip,n,SJAACR0+i); + } + for (i=0, n=0x5a; i<8; i++, n+=0xf) { + r = n^can_read_reg(chip,SJAACR0+i); + if (r) { + CANMSG("sja1000p_chip_config: chip connection broken," + " readback differ 0x%02x\n", r); + return -ENODEV; + } + } + if (sja1000p_extended_mask(chip,0x00000000, 0xffffffff)) return -ENODEV; - if (!baudrate) - baudrate=1000; - if (sja1000p_baud_rate(chip,1000*baudrate,chip->clock,0,75,0)) + if (!chip->baudrate) + chip->baudrate=1000000; + if (sja1000p_baud_rate(chip,chip->baudrate,chip->clock,0,75,0)) return -ENODEV; /* Enable hardware interrupts */ - can_write_reg(chip, ENABLE_INTERRUPTS, SJAIER); + can_write_reg(chip, sjaENABLE_INTERRUPTS, SJAIER); sja1000p_disable_configuration(chip); return 0; } -int sja1000p_extended_mask(struct chip_t *chip, unsigned long code, unsigned long mask) +/** + * sja1000p_extended_mask: - setup of extended mask for message filtering + * @chip: pointer to chip state structure + * @code: can message acceptance code + * @mask: can message acceptance mask + * + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_extended_mask(struct canchip_t *chip, unsigned long code, unsigned long mask) { int i; @@ -124,14 +165,19 @@ int sja1000p_extended_mask(struct chip_t *chip, unsigned long code, unsigned lo return 0; } -/* Set communication parameters. - * param rate baud rate in Hz - * param clock frequency of sja1000 clock in Hz (ISA osc is 14318000) - * param sjw synchronization jump width (0-3) prescaled clock cycles - * param sampl_pt sample point in % (0-100) sets (TSEG1+1)/(TSEG1+TSEG2+2) ratio - * param flags fields BTR1_SAM, OCMODE, OCPOL, OCTP, OCTN, CLK_OFF, CBP +/** + * sja1000p_baud_rate: - set communication parameters. + * @chip: pointer to chip state structure + * @rate: baud rate in Hz + * @clock: frequency of sja1000 clock in Hz (ISA osc is 14318000) + * @sjw: synchronization jump width (0-3) prescaled clock cycles + * @sampl_pt: sample point in % (0-100) sets (TSEG1+1)/(TSEG1+TSEG2+2) ratio + * @flags: fields %BTR1_SAM, %OCMODE, %OCPOL, %OCTP, %OCTN, %CLK_OFF, %CBP + * + * Return Value: negative value reports error. + * File: src/sja1000p.c */ -int sja1000p_baud_rate(struct chip_t *chip, int rate, int clock, int sjw, +int sja1000p_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw, int sampl_pt, int flags) { int best_error = 1000000000, error; @@ -144,7 +190,7 @@ int sja1000p_baud_rate(struct chip_t *chip, int rate, int clock, int sjw, clock /=2; /* tseg even = round down, odd = round up */ - for (tseg=(0+0+2)*2; tseg<=(MAX_TSEG2+MAX_TSEG1+2)*2+1; tseg++) { + for (tseg=(0+0+2)*2; tseg<=(sjaMAX_TSEG2+sjaMAX_TSEG1+2)*2+1; tseg++) { brp = clock/((1+tseg/2)*rate)+tseg%2; if (brp == 0 || brp > 64) continue; @@ -168,11 +214,11 @@ int sja1000p_baud_rate(struct chip_t *chip, int rate, int clock, int sjw, tseg2 = best_tseg-(sampl_pt*(best_tseg+1))/100; if (tseg2 < 0) tseg2 = 0; - if (tseg2 > MAX_TSEG2) - tseg2 = MAX_TSEG2; + if (tseg2 > sjaMAX_TSEG2) + tseg2 = sjaMAX_TSEG2; tseg1 = best_tseg-tseg2-2; - if (tseg1>MAX_TSEG1) { - tseg1 = MAX_TSEG1; + if (tseg1>sjaMAX_TSEG1) { + tseg1 = sjaMAX_TSEG1; tseg2 = best_tseg-tseg1-2; } @@ -191,48 +237,65 @@ int sja1000p_baud_rate(struct chip_t *chip, int rate, int clock, int sjw, return 0; } -void sja1000p_read(struct chip_t *chip, struct canfifo_t *fifo) { +/** + * sja1000p_read: - reads and distributes one or more received messages + * @chip: pointer to chip state structure + * @obj: pinter to CAN message queue information + * + * File: src/sja1000p.c + */ +void sja1000p_read(struct canchip_t *chip, struct msgobj_t *obj) { int i, flags, len, datastart; do { flags = can_read_reg(chip,SJAFRM); - if(flags&FRM_FF) { - fifo->rx_writep->id = + if(flags&sjaFRM_FF) { + obj->rx_msg.id = (can_read_reg(chip,SJAID0)<<21) + (can_read_reg(chip,SJAID1)<<13) + (can_read_reg(chip,SJAID2)<<5) + (can_read_reg(chip,SJAID3)>>3); datastart = SJADATE; } else { - fifo->rx_writep->id = + obj->rx_msg.id = (can_read_reg(chip,SJAID0)<<3) + (can_read_reg(chip,SJAID1)>>5); datastart = SJADATS; } - fifo->rx_writep->flags = - ((flags & FRM_RTR) ? MSG_RTR : 0) | - ((flags & FRM_FF) ? MSG_EXT : 0); - len = flags & FRM_DLC_M; + obj->rx_msg.flags = + ((flags & sjaFRM_RTR) ? MSG_RTR : 0) | + ((flags & sjaFRM_FF) ? MSG_EXT : 0); + len = flags & sjaFRM_DLC_M; + obj->rx_msg.length = len; + if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH; for(i=0; i< len; i++) { - fifo->rx_writep->data[i]=can_read_reg(chip,datastart+i); + obj->rx_msg.data[i]=can_read_reg(chip,datastart+i); } - fifo->rx_writep->length = len; - fifo->rx_writep++; - if (fifo->rx_writep >= fifo->buf_rx_entry + MAX_BUF_LENGTH) - fifo->rx_writep = fifo->buf_rx_entry; + /* fill CAN message timestamp */ + can_filltimestamp(&obj->rx_msg.timestamp); + + canque_filter_msg2edges(obj->qends, &obj->rx_msg); -// FIXME: what if fifo->rx_writep == fifo->rx_readp again ? + can_write_reg(chip, sjaCMR_RRB, SJACMR); - can_write_reg(chip, CMR_RRB, SJACMR); - } while (can_read_reg(chip, SJASR) & SR_RBS); + } while (can_read_reg(chip, SJASR) & sjaSR_RBS); } -int sja1000p_pre_read_config(struct chip_t *chip, struct msgobj_t *obj) +/** + * sja1000p_pre_read_config: - prepares message object for message reception + * @chip: pointer to chip state structure + * @obj: pointer to message object state structure + * + * Return Value: negative value reports error. + * Positive value indicates immediate reception of message. + * File: src/sja1000p.c + */ +int sja1000p_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj) { int status; status=can_read_reg(chip,SJASR); - if(status & SR_BS) { + if(status & sjaSR_BS) { /* Try to recover from error condition */ DEBUGMSG("sja1000p_pre_read_config bus-off recover 0x%x\n",status); sja1000p_enable_configuration(chip); @@ -242,31 +305,45 @@ int sja1000p_pre_read_config(struct chip_t *chip, struct msgobj_t *obj) sja1000p_disable_configuration(chip); } - if (!(status&SR_RBS)) { + if (!(status&sjaSR_RBS)) { return 0; } - can_write_reg(chip, DISABLE_INTERRUPTS, SJAIER); //disable interrupts for a moment - sja1000p_read(chip, obj->fifo); - can_write_reg(chip, ENABLE_INTERRUPTS, SJAIER); //enable interrupts + can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER); //disable interrupts for a moment + sja1000p_read(chip, obj); + can_write_reg(chip, sjaENABLE_INTERRUPTS, SJAIER); //enable interrupts return 1; } -#define MAX_TRANSMIT_WAIT_LOOPS 200 -int sja1000p_pre_write_config(struct chip_t *chip, struct msgobj_t *obj, +#define MAX_TRANSMIT_WAIT_LOOPS 10 +/** + * sja1000p_pre_write_config: - prepares message object for message transmission + * @chip: pointer to chip state structure + * @obj: pointer to message object state structure + * @msg: pointer to CAN message + * + * This function prepares selected message object for future initiation + * of message transmission by sja1000p_send_msg() function. + * The CAN message data and message ID are transfered from @msg slot + * into chip buffer in this function. + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj, struct canmsg_t *msg) { int i=0; unsigned int id; int status; + int len; /* Wait until Transmit Buffer Status is released */ - while ( !((status=can_read_reg(chip, SJASR)) & SR_TBS) && + while ( !((status=can_read_reg(chip, SJASR)) & sjaSR_TBS) && i++length &= FRM_DLC_M; - can_write_reg(chip, ((msg->flags&MSG_EXT)?FRM_FF:0) | - ((msg->flags & MSG_RTR) ? FRM_RTR : 0) | - msg->length, SJAFRM); + len = msg->length; + if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH; + /* len &= sjaFRM_DLC_M; ensured by above condition already */ + can_write_reg(chip, ((msg->flags&MSG_EXT)?sjaFRM_FF:0) | + ((msg->flags & MSG_RTR) ? sjaFRM_RTR : 0) | len, SJAFRM); if(msg->flags&MSG_EXT) { id=msg->id<<3; can_write_reg(chip, id & 0xff, SJAID3); @@ -305,37 +383,66 @@ int sja1000p_pre_write_config(struct chip_t *chip, struct msgobj_t *obj, can_write_reg(chip, id & 0xff, SJAID1); id >>= 8; can_write_reg(chip, id, SJAID0); - for(i=0; i < msg->length; i++) { + for(i=0; i < len; i++) { can_write_reg(chip, msg->data[i], SJADATE+i); } } else { id=msg->id<<5; can_write_reg(chip, (id >> 8) & 0xff, SJAID0); can_write_reg(chip, id & 0xff, SJAID1); - for(i=0; i < msg->length; i++) { + for(i=0; i < len; i++) { can_write_reg(chip, msg->data[i], SJADATS+i); } } return 0; } -int sja1000p_send_msg(struct chip_t *chip, struct msgobj_t *obj, +/** + * sja1000p_send_msg: - initiate message transmission + * @chip: pointer to chip state structure + * @obj: pointer to message object state structure + * @msg: pointer to CAN message + * + * This function is called after sja1000p_pre_write_config() function, + * which prepares data in chip buffer. + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_send_msg(struct canchip_t *chip, struct msgobj_t *obj, struct canmsg_t *msg) { - can_write_reg(chip, CMR_TR, SJACMR); + can_write_reg(chip, sjaCMR_TR, SJACMR); return 0; } -int sja1000p_check_tx_stat(struct chip_t *chip) +/** + * sja1000p_check_tx_stat: - checks state of transmission engine + * @chip: pointer to chip state structure + * + * Return Value: negative value reports error. + * Positive return value indicates transmission under way status. + * Zero value indicates finishing of all issued transmission requests. + * File: src/sja1000p.c + */ +int sja1000p_check_tx_stat(struct canchip_t *chip) { - if (can_read_reg(chip,SJASR) & SR_TCS) + if (can_read_reg(chip,SJASR) & sjaSR_TCS) return 0; else return 1; } -int sja1000p_set_btregs(struct chip_t *chip, unsigned short btr0, +/** + * sja1000p_set_btregs: - configures bitrate registers + * @chip: pointer to chip state structure + * @btr0: bitrate register 0 + * @btr1: bitrate register 1 + * + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_set_btregs(struct canchip_t *chip, unsigned short btr0, unsigned short btr1) { if (sja1000p_enable_configuration(chip)) @@ -349,149 +456,319 @@ int sja1000p_set_btregs(struct chip_t *chip, unsigned short btr0, return 0; } -int sja1000p_start_chip(struct chip_t *chip) +/** + * sja1000p_start_chip: - starts chip message processing + * @chip: pointer to chip state structure + * + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_start_chip(struct canchip_t *chip) { enum sja1000_PeliCAN_MOD flags; - flags = can_read_reg(chip, SJAMOD) & (MOD_LOM|MOD_STM|MOD_AFM|MOD_SM); + flags = can_read_reg(chip, SJAMOD) & (sjaMOD_LOM|sjaMOD_STM|sjaMOD_AFM|sjaMOD_SM); can_write_reg(chip, flags, SJAMOD); return 0; } -int sja1000p_stop_chip(struct chip_t *chip) +/** + * sja1000p_stop_chip: - stops chip message processing + * @chip: pointer to chip state structure + * + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_stop_chip(struct canchip_t *chip) { enum sja1000_PeliCAN_MOD flags; - flags = can_read_reg(chip, SJAMOD) & (MOD_LOM|MOD_STM|MOD_AFM|MOD_SM); - can_write_reg(chip, flags|MOD_RM, SJAMOD); + flags = can_read_reg(chip, SJAMOD) & (sjaMOD_LOM|sjaMOD_STM|sjaMOD_AFM|sjaMOD_SM); + can_write_reg(chip, flags|sjaMOD_RM, SJAMOD); return 0; } +/** + * sja1000p_attach_to_chip: - attaches to the chip, setups registers and state + * @chip: pointer to chip state structure + * + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_attach_to_chip(struct canchip_t *chip) +{ + return 0; +} + +/** + * sja1000p_release_chip: - called before chip structure removal if %CHIP_ATTACHED is set + * @chip: pointer to chip state structure + * + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_release_chip(struct canchip_t *chip) +{ + sja1000p_stop_chip(chip); + can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER); + + return 0; +} -int sja1000p_remote_request(struct chip_t *chip, struct msgobj_t *obj) +/** + * sja1000p_remote_request: - configures message object and asks for RTR message + * @chip: pointer to chip state structure + * @obj: pointer to message object structure + * + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_remote_request(struct canchip_t *chip, struct msgobj_t *obj) { CANMSG("sja1000p_remote_request not implemented\n"); return -ENOSYS; } -int sja1000p_standard_mask(struct chip_t *chip, unsigned short code, +/** + * sja1000p_standard_mask: - setup of mask for message filtering + * @chip: pointer to chip state structure + * @code: can message acceptance code + * @mask: can message acceptance mask + * + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_standard_mask(struct canchip_t *chip, unsigned short code, unsigned short mask) { CANMSG("sja1000p_standard_mask not implemented\n"); return -ENOSYS; } -int sja1000p_clear_objects(struct chip_t *chip) +/** + * sja1000p_clear_objects: - clears state of all message object residing in chip + * @chip: pointer to chip state structure + * + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_clear_objects(struct canchip_t *chip) { CANMSG("sja1000p_clear_objects not implemented\n"); return -ENOSYS; } -int sja1000p_config_irqs(struct chip_t *chip, short irqs) +/** + * sja1000p_config_irqs: - tunes chip hardware interrupt delivery + * @chip: pointer to chip state structure + * @irqs: requested chip IRQ configuration + * + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_config_irqs(struct canchip_t *chip, short irqs) { CANMSG("sja1000p_config_irqs not implemented\n"); return -ENOSYS; } -void sja1000p_irq_write_handler(struct chip_t *chip, struct canfifo_t *fifo) +/** + * sja1000p_irq_write_handler: - part of ISR code responsible for transmit events + * @chip: pointer to chip state structure + * @obj: pointer to attached queue description + * + * The main purpose of this function is to read message from attached queues + * and transfer message contents into CAN controller chip. + * This subroutine is called by + * sja1000p_irq_write_handler() for transmit events. + * File: src/sja1000p.c + */ +void sja1000p_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj) { - fifo->tx_readp++; - if (fifo->tx_readp >= fifo->buf_tx_entry + MAX_BUF_LENGTH) - fifo->tx_readp = fifo->buf_tx_entry; - if (fifo->tx_readp == fifo->tx_writep) { // Output buffer is empty - fifo->tx_in_progress = 0; - if (waitqueue_active(&fifo->writeq)) { - chip->msgobj[0]->ret = 0; //CHECKME or 26? - wake_up_interruptible(&fifo->writeq); + int cmd; + + if(obj->tx_slot){ + /* Do local transmitted message distribution if enabled */ + if (processlocal){ + /* fill CAN message timestamp */ + can_filltimestamp(&obj->tx_slot->msg.timestamp); + + obj->tx_slot->msg.flags |= MSG_LOCAL; + canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg); } - return; + /* Free transmitted slot */ + canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot); + obj->tx_slot=NULL; } - if (chip->chipspecops->pre_write_config(chip, chip->msgobj[0], - fifo->tx_readp)) { - if (waitqueue_active(&fifo->writeq)) { - chip->msgobj[0]->ret = -1; - wake_up_interruptible(&fifo->writeq); - return; - } + + can_msgobj_clear_fl(obj,TX_PENDING); + cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot); + if(cmd<0) + return; + can_msgobj_set_fl(obj,TX_PENDING); + + if (chip->chipspecops->pre_write_config(chip, obj, &obj->tx_slot->msg)) { + obj->ret = -1; + canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_PREP); + canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot); + obj->tx_slot=NULL; + return; } - if (chip->chipspecops->send_msg(chip, chip->msgobj[0], - fifo->tx_readp)) { - if (waitqueue_active(&fifo->writeq)) { - chip->msgobj[0]->ret = -1; - wake_up_interruptible(&fifo->writeq); - return; - } + if (chip->chipspecops->send_msg(chip, obj, &obj->tx_slot->msg)) { + obj->ret = -1; + canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_SEND); + canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot); + obj->tx_slot=NULL; + return; } } #define MAX_RETR 10 -void sja1000p_irq_handler(int irq, void *dev_id, struct pt_regs *regs) +/** + * sja1000p_irq_handler: - interrupt service routine + * @irq: interrupt vector number, this value is system specific + * @chip: pointer to chip state structure + * + * Interrupt handler is activated when state of CAN controller chip changes, + * there is message to be read or there is more space for new messages or + * error occurs. The receive events results in reading of the message from + * CAN controller chip and distribution of message through attached + * message queues. + * File: src/sja1000p.c + */ +int sja1000p_irq_handler(int irq, struct canchip_t *chip) { int irq_register, status, error_code; - int static retransmitted=0; /* FIXME - should go into chip struct */ - struct chip_t *chip=(struct chip_t *)dev_id; - struct canfifo_t *fifo; + struct msgobj_t *obj=chip->msgobj[0]; + int loop_cnt=CHIP_MAX_IRQLOOP; irq_register=can_read_reg(chip,SJAIR); // DEBUGMSG("sja1000_irq_handler: SJAIR:%02x\n",irq_register); // DEBUGMSG("sja1000_irq_handler: SJASR:%02x\n", // can_read_reg(chip,SJASR)); - if ((irq_register & (IR_BEI|IR_EPI|IR_DOI|IR_EI|IR_TI|IR_RI)) == 0) - return; + if ((irq_register & (sjaIR_BEI|sjaIR_EPI|sjaIR_DOI|sjaIR_EI|sjaIR_TI|sjaIR_RI)) == 0) + return CANCHIP_IRQ_NONE; - if(!chip->msgobj[0]->flags & BUFFERS_ALLOCATED) { - CANMSG("sja1000p_irq_handler: called with device closed, irq_register 0x%02x\n", irq_register); - return; + if(!(chip->flags&CHIP_CONFIGURED)) { + CANMSG("sja1000p_irq_handler: called for non-configured device, irq_register 0x%02x\n", irq_register); + return CANCHIP_IRQ_NONE; } - fifo=chip->msgobj[0]->fifo; - if ((irq_register & IR_RI) != 0) { - sja1000p_read(chip,fifo); - chip->msgobj[0]->ret = 0; - if (waitqueue_active(&fifo->readq)) - wake_up_interruptible(&fifo->readq); - } - if ((irq_register & IR_TI) != 0) { - chip->msgobj[0]->ret = 0; - sja1000p_irq_write_handler(chip,fifo); - } - if ((irq_register & (IR_EI|IR_BEI|IR_EPI|IR_DOI)) != 0) { - // Some error happened - status=can_read_reg(chip,SJASR); - error_code=can_read_reg(chip,SJAECC); - CANMSG("Error: status register: 0x%x irq_register: 0x%02x error: 0x%02x\n", - status, irq_register, error_code); + status=can_read_reg(chip,SJASR); + + do { + + if(!loop_cnt--) { + CANMSG("sja1000p_irq_handler IRQ %d stuck\n",irq); + return CANCHIP_IRQ_STUCK; + } + + /* (irq_register & sjaIR_RI) */ + /* old variant using SJAIR, collides with intended use with irq_accept */ + if (status & sjaSR_RBS) { + DEBUGMSG("sja1000_irq_handler: RI or RBS\n"); + sja1000p_read(chip,obj); + obj->ret = 0; + } + + /* (irq_register & sjaIR_TI) */ + /* old variant using SJAIR, collides with intended use with irq_accept */ + if ((status & sjaSR_TBS) && can_msgobj_test_fl(obj,TX_PENDING)) { + DEBUGMSG("sja1000_irq_handler: TI or TX_PENDING and TBS\n"); + obj->ret = 0; + can_msgobj_set_fl(obj,TX_REQUEST); + while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){ + can_msgobj_clear_fl(obj,TX_REQUEST); + + if (can_read_reg(chip, SJASR) & sjaSR_TBS) + sja1000p_irq_write_handler(chip, obj); + + can_msgobj_clear_fl(obj,TX_LOCK); + if(!can_msgobj_test_fl(obj,TX_REQUEST)) break; + DEBUGMSG("TX looping in sja1000_irq_handler\n"); + } + } + if ((irq_register & (sjaIR_EI|sjaIR_BEI|sjaIR_EPI|sjaIR_DOI)) != 0) { + // Some error happened + error_code=can_read_reg(chip,SJAECC); + CANMSG("Error: status register: 0x%x irq_register: 0x%02x error: 0x%02x\n", + status, irq_register, error_code); // FIXME: chip should be brought to usable state. Transmission cancelled if in progress. // Reset flag set to 0 if chip is already off the bus. Full state report - chip->msgobj[0]->ret=-1; + obj->ret=-1; - if(error_code == 0xd9) { - chip->msgobj[0]->ret= -ENXIO; - /* no such device or address - no ACK received */ - } - if(retransmitted++>MAX_RETR) { - can_write_reg(chip, CMR_AT, SJACMR); // cancel any transmition - retransmitted = 0; + if(error_code == 0xd9) { + obj->ret= -ENXIO; + /* no such device or address - no ACK received */ + } + if(obj->tx_retry_cnt++>MAX_RETR) { + can_write_reg(chip, sjaCMR_AT, SJACMR); // cancel any transmition + obj->tx_retry_cnt = 0; + } + if(status&sjaSR_BS) { + CANMSG("bus-off, resetting sja1000p\n"); + can_write_reg(chip, 0, SJAMOD); + } + + if(obj->tx_slot){ + canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_BUS); + /*canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot); + obj->tx_slot=NULL;*/ + } + + } else { + obj->tx_retry_cnt=0; } - if(status&SR_BS) { - CANMSG("bus-off, resetting sja1000p\n"); - can_write_reg(chip, 0, SJAMOD); + + irq_register=can_read_reg(chip,SJAIR); + + status=can_read_reg(chip,SJASR); + + } while((irq_register & (sjaIR_BEI|sjaIR_EPI|sjaIR_DOI|sjaIR_EI|sjaIR_TI|sjaIR_RI)) || + ((status & sjaSR_TBS) && can_msgobj_test_fl(obj,TX_PENDING)) || + (status & sjaSR_RBS)); + + return CANCHIP_IRQ_HANDLED; +} + +/** + * sja1000p_wakeup_tx: - wakeups TX processing + * @chip: pointer to chip state structure + * @obj: pointer to message object structure + * + * Function is responsible for initiating message transmition. + * It is responsible for clearing of object TX_REQUEST flag + * + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj) +{ + + can_preempt_disable(); + + can_msgobj_set_fl(obj,TX_PENDING); + can_msgobj_set_fl(obj,TX_REQUEST); + while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){ + can_msgobj_clear_fl(obj,TX_REQUEST); + + if (can_read_reg(chip, SJASR) & sjaSR_TBS){ + obj->tx_retry_cnt=0; + sja1000p_irq_write_handler(chip, obj); } - - if (waitqueue_active(&fifo->writeq)) - wake_up_interruptible(&fifo->writeq); - if (waitqueue_active(&fifo->readq)) - wake_up_interruptible(&fifo->readq); - } else { - retransmitted=0; + + can_msgobj_clear_fl(obj,TX_LOCK); + if(!can_msgobj_test_fl(obj,TX_REQUEST)) break; + DEBUGMSG("TX looping in sja1000p_wakeup_tx\n"); } - return; + can_preempt_enable(); + return 0; } int sja1000p_register(struct chipspecops_t *chipspecops) @@ -508,12 +785,32 @@ int sja1000p_register(struct chipspecops_t *chipspecops) chipspecops->pre_write_config=sja1000p_pre_write_config; chipspecops->send_msg=sja1000p_send_msg; chipspecops->check_tx_stat=sja1000p_check_tx_stat; + chipspecops->wakeup_tx=sja1000p_wakeup_tx; chipspecops->remote_request=sja1000p_remote_request; chipspecops->enable_configuration=sja1000p_enable_configuration; chipspecops->disable_configuration=sja1000p_disable_configuration; + chipspecops->attach_to_chip=sja1000p_attach_to_chip; + chipspecops->release_chip=sja1000p_release_chip; chipspecops->set_btregs=sja1000p_set_btregs; chipspecops->start_chip=sja1000p_start_chip; chipspecops->stop_chip=sja1000p_stop_chip; chipspecops->irq_handler=sja1000p_irq_handler; + chipspecops->irq_accept=NULL; + return 0; +} + +/** + * sja1000p_fill_chipspecops - fills chip specific operations + * @chip: pointer to chip representation structure + * + * The function fills chip specific operations for sja1000 (PeliCAN) chip. + * + * Return Value: returns negative number in the case of fail + */ +int sja1000p_fill_chipspecops(struct canchip_t *chip) +{ + chip->chip_type="sja1000p"; + chip->max_objects=1; + sja1000p_register(chip->chipspecops); return 0; }