X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/6728e464dbd9929725b8394ca423690873677d9c..e372a22696a079ea7f3bb00aa46e8a8281f1c49f:/embedded/app/usbcan/lpc17xx_can.c diff --git a/embedded/app/usbcan/lpc17xx_can.c b/embedded/app/usbcan/lpc17xx_can.c index fd09804..0d42658 100644 --- a/embedded/app/usbcan/lpc17xx_can.c +++ b/embedded/app/usbcan/lpc17xx_can.c @@ -1,10 +1,6 @@ #include "can/lpc17xx_can.h" static void CAN_configPin(); -static void CAN_setBusTiming(struct canchip_t *chip); - -//--------------------------------------------------------------------------------- -//--------------------------------------------------------------------------------- // board can-lmc1 specific functions: @@ -36,8 +32,13 @@ int can_lmc1_init_hw_data(struct candevice_t *candev){ int can_lmc1_init_chip_data(struct candevice_t *candev, int chipnr){ + struct can_bittiming_const *btc; + struct can_lmc1_chip_data *chip_data; + // used CAN1 peripherial -> CAN1 registers base candev->chip[chipnr]->chip_base_addr = CAN1_REGS_BASE; + // clock for CAN + candev->chip[chipnr]->clock = system_frequency / 4; lpc17xx_fill_chipspecops(candev->chip[chipnr]); @@ -45,6 +46,21 @@ int can_lmc1_init_chip_data(struct candevice_t *candev, int chipnr){ if (candev->chip[chipnr]->chip_data==NULL) return -ENOMEM; + + chip_data = (struct can_lmc1_chip_data*) candev->chip[chipnr]->chip_data; + + btc = &chip_data->btc; + + // set bittiming constants + btc->tseg1_min = 1; + btc->tseg1_max = 16; + btc->tseg2_min = 1; + btc->tseg2_max = 8; + btc->sjw_max = 4; + btc->brp_min = 1; + btc->brp_max = 1024; + btc->brp_inc = 1; + return 0; } @@ -82,18 +98,100 @@ int can_lmc1_program_irq(struct candevice_t *candev) // lpc17xx can chip specific functions: +/* + * lpc17xx_baud_rate: - set communication parameters. + * @chip: pointer to chip state structure + * @rate: baud rate in Hz + * @clock: frequency of CAN clock in Hz + * @sjw: synchronization jump width (0-3) prescaled clock cycles + * @sampl_pt: sample point in % (0-100) sets (TSEG1+1)/(TSEG1+TSEG2+2) ratio + */ +int lpc17xx_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw, + int sampl_pt, int flags) +{ + int best_error = 1000000000, error; + int best_tseg=0, best_brp=0, best_rate=0, brp=0; + int tseg=0, tseg1=0, tseg2=0; + + struct can_lmc1_chip_data *chip_data = (struct can_lmc1_chip_data*) chip->chip_data; + + struct can_bittiming_const *btc = &chip_data->btc; + + /* tseg even = round down, odd = round up */ + for (tseg=(0+0+2)*2; tseg<=(btc->tseg2_max+btc->tseg1_max+2)*2+1; tseg++) { + brp = clock/((1+tseg/2)*rate)+tseg%2; + if (brp == 0 || brp > 64) + continue; + error = rate - clock/(brp*(1+tseg/2)); + if (error < 0) + error = -error; + if (error <= best_error) { + best_error = error; + best_tseg = tseg/2; + best_brp = brp-1; + best_rate = clock/(brp*(1+tseg/2)); + } + } + if (best_error && (rate/best_error < 10)) { + CANMSG("baud rate %d is not possible with %d Hz clock\n", + rate, clock); + CANMSG("%d bps. brp=%d, best_tseg=%d, tseg1=%d, tseg2=%d\n", + best_rate, best_brp, best_tseg, tseg1, tseg2); + return -EINVAL; + } + tseg2 = best_tseg-(sampl_pt*(best_tseg+1))/100; + if (tseg2 < 0) + tseg2 = 0; + if (tseg2 > btc->tseg2_max) + tseg2 = btc->tseg2_max; + tseg1 = best_tseg-tseg2-2; + if (tseg1>btc->tseg1_max) { + tseg1 = btc->tseg1_max; + tseg2 = best_tseg-tseg1-2; + } + + DEBUGMSG("Setting %d bps.\n", best_rate); + DEBUGMSG("brp=%d, best_tseg=%d, tseg1=%d, tseg2=%d, sampl_pt=%d\n", + best_brp, best_tseg, tseg1, tseg2, + (100*(best_tseg-tseg2)/(best_tseg+1))); + + + if(chip->chipspecops->set_bittiming(chip, ++best_brp, ++sjw, ++tseg1, ++tseg2) < 0) + return -EINVAL; + + return 0; +} + + int lpc17xx_chip_config(struct canchip_t *chip){ CAN_init(chip); + if (!chip->baudrate) + chip->baudrate=1000000; + + if (lpc17xx_baud_rate(chip,chip->baudrate,chip->clock,0,75,0)) + return -ENODEV; + return 0; } int lpc17xx_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj, struct canmsg_t *msg) { + uint32_t i=0; + // check status of TB1 + while (!(can_read_reg(chip, CAN_SR_o) & CAN_SR_TBS1)){ + if(i++msgobj[0]; - i = can_read_reg(chip, CAN_ICR_o); @@ -186,6 +296,7 @@ void lpc17xx_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj) { int cmd; + if(obj->tx_slot){ /* Do local transmitted message distribution if enabled */ if (processlocal){ @@ -238,6 +349,42 @@ void lpc17xx_read(struct canchip_t *chip, struct msgobj_t *obj) { } +int lpc17xx_set_bittiming(struct canchip_t *chip, int brp, int sjw, int tseg1, int tseg2){ + + uint8_t SAM = 0; // 0 = the bus is sampled once + + if((--brp)<0) + return -EINVAL; + + if((--sjw)<0) + return -EINVAL; + + if((--tseg1)<0) + return -EINVAL; + + if((--tseg2)<0) + return -EINVAL; + + + //debug print + CANMSG("BRP: %d, SJW: %d, TSEG1: %d, TSEG2: %d \n", brp+1, sjw+1, tseg1+1, tseg2+1); + + can_disable_irq(chip->chip_irq); + + // enter reset mode + can_write_reg(chip, 1, CAN_MOD_o); + + // set bittiming register + can_write_reg(chip, ((SAM<<23)|(tseg2<<20)|(tseg1<<16)|(sjw<<14)|(brp<<0)), CAN_BTR_o); + + // return to normal operating + can_write_reg(chip, 0, CAN_MOD_o); + + can_enable_irq(chip->chip_irq); + + return 0; +} + int lpc17xx_fill_chipspecops(struct canchip_t *chip){ chip->max_objects=1; @@ -260,6 +407,8 @@ int lpc17xx_register(struct chipspecops_t *chipspecops){ chipspecops->wakeup_tx = lpc17xx_wakeup_tx; chipspecops->irq_handler = lpc17xx_irq_handler; + chipspecops->set_bittiming = lpc17xx_set_bittiming; + return 0; } @@ -357,14 +506,12 @@ void CAN_recv(struct canchip_t *chip, canmsg_t* msg){ } + void CAN_send(struct canchip_t *chip, canmsg_t* msg){ volatile uint32_t data; volatile uint32_t can_tfi1; - uint32_t i; - - // check status of TB1 - while (!(can_read_reg(chip, CAN_SR_o) & CAN_SR_TBS1)){} + uint32_t i=0; can_tfi1 = can_read_reg(chip, CAN_TFI1_o); @@ -406,108 +553,12 @@ void CAN_send(struct canchip_t *chip, canmsg_t* msg){ } -void CAN_set_bittiming(struct canchip_t *chip, uint32_t brp, uint32_t sjw, uint32_t tseg1, uint32_t tseg2){ - - uint8_t SAM = 0; // 0 = the bus is sampled once - - brp--; - sjw--; - tseg1--; - tseg2--; - - can_disable_irq(chip->chip_irq); - // enter reset mode - can_write_reg(chip, 1, CAN_MOD_o); - - - can_write_reg(chip, ((SAM<<23)|(tseg2<<20)|(tseg1<<16)|(sjw<<14)|(brp<<0)), CAN_BTR_o); - - - // return to normal operating - can_write_reg(chip, 0, CAN_MOD_o); - - can_enable_irq(chip->chip_irq); -} - -void CAN_setBusTiming(struct canchip_t *chip){ - - uint32_t PCLK_CAN; - uint32_t res; - - uint8_t tq_numb; // number of time quantum - uint8_t TSEG1, TSEG2; - uint8_t BRP; - uint8_t SJW; - uint8_t SAM; - uint8_t div; - - TSEG1 = TSEG2 = BRP = 0; - - // 0 = the bus is sampled once - SAM = 0; - - // the Synchronization Jump Width (this value plus one) - SJW = 3; - - // get clock divide for CAN1 - div = __mfld2val(PCLK_CAN1_MASK, SC->PCLKSEL0); - switch(div){ - case 0: - div = 4; - break; - case 1: - div = 1; - break; - case 2: - div = 2; - break; - case 3: - // only for CAN, for other peripherials '11' value means div=8 - div = 6; - break; - } - - - PCLK_CAN = system_frequency / div; - - res = PCLK_CAN / (chip->baudrate); - - - // calculation of tq_numb - number of time quantum (must be in <8,25>) - // tq_numb = TSEG1 + TSEG2 + 3 - - for(tq_numb=25; tq_numb>=8; tq_numb--){ - - if ((res%tq_numb)==0){ - - // Baud Rate Prescaler. The PCLK clock is divided by (this value plus one) to produce the CAN clock. - BRP = (res / tq_numb) - 1; - - // sync. segment allways 1 tq - tq_numb--; - - // number of tq from the sample point to the next nominal Sync. point (this value plus one) - TSEG2 = (tq_numb/3) - 1; - - // number of tq from Sync. point to the sample point (this value plus one) - TSEG1 = tq_numb - (tq_numb/3) - 1; - - break; - } - } - - can_write_reg(chip, ((SAM<<23)|(TSEG2<<20)|(TSEG1<<16)|(SJW<<14)|(BRP<<0)), CAN_BTR_o); - -} - void CAN_init(struct canchip_t *chip){ uint32_t tmp; uint32_t pclksel0; uint32_t val; uint32_t i; - - printf("CAN INIT, baudrate: %d\n", (int) chip->baudrate); // configure CAN1 pins CAN_configPin(); @@ -542,9 +593,6 @@ void CAN_init(struct canchip_t *chip){ // read to clear interrupt pending in Interrupt Capture Register tmp = can_read_reg(chip, CAN_ICR_o); - // set bus timing - CAN_setBusTiming(chip); - // return to normal operating can_write_reg(chip, 0, CAN_MOD_o);