X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/659b098309c2bca57ac60a35a1b9900d6f28e74d..2827b727d2910a3b48f9de7d67b3a67f59e256c7:/lincan/src/sja1000.c

diff --git a/lincan/src/sja1000.c b/lincan/src/sja1000.c
index 46033f2..79ae139 100644
--- a/lincan/src/sja1000.c
+++ b/lincan/src/sja1000.c
@@ -7,12 +7,8 @@
  * Version lincan-0.2  9 Jul 2003
  */
 
-#include <linux/autoconf.h>
-
-#include <linux/sched.h>
-#include <linux/delay.h>
-#include <asm/irq.h>
-
+#include "../include/can.h"
+#include "../include/can_sysdep.h"
 #include "../include/main.h"
 #include "../include/sja1000.h"
 
@@ -24,7 +20,7 @@ int sja1000_enable_configuration(struct chip_t *chip)
 	int i=0;
 	unsigned flags;
 
-	disable_irq(chip->chip_irq);
+	can_disable_irq(chip->chip_irq);
 
 	flags=can_read_reg(chip,SJACR);
 
@@ -36,7 +32,7 @@ int sja1000_enable_configuration(struct chip_t *chip)
 	}
 	if (i>=10) {
 		CANMSG("Reset error\n");
-		enable_irq(chip->chip_irq);
+		can_enable_irq(chip->chip_irq);
 		return -ENODEV;
 	}
 
@@ -61,7 +57,7 @@ int sja1000_disable_configuration(struct chip_t *chip)
 		return -ENODEV;
 	}
 
-	enable_irq(chip->chip_irq);
+	can_enable_irq(chip->chip_irq);
 
 	return 0;
 }
@@ -79,9 +75,9 @@ int sja1000_chip_config(struct chip_t *chip)
 	if (sja1000_standard_mask(chip,0x0000, 0xffff))
 		return -ENODEV;
 	
-	if (!baudrate)
-		baudrate=1000;
-	if (sja1000_baud_rate(chip,1000*baudrate,chip->clock,0,75,0))
+	if (!chip->baudrate)
+		chip->baudrate=1000000;
+	if (sja1000_baud_rate(chip,chip->baudrate,chip->clock,0,75,0))
 		return -ENODEV;
 
 	/* Enable hardware interrupts */
@@ -335,7 +331,7 @@ int sja1000_config_irqs(struct chip_t *chip, short irqs)
 }
 
 
-irqreturn_t sja1000_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
+can_irqreturn_t sja1000_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
 {
 	unsigned irq_register;
 	struct chip_t *chip=(struct chip_t *)dev_id;
@@ -347,21 +343,21 @@ irqreturn_t sja1000_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
 //					can_read_reg(chip, SJASR));
 
 	if ((irq_register & (IR_WUI|IR_DOI|IR_EI|IR_TI|IR_RI)) == 0)
-		return IRQ_NONE;
+		return CAN_IRQ_NONE;
 
 	if ((irq_register & IR_RI) != 0) 
 		sja1000_irq_read_handler(chip, obj);
 
 	if ((irq_register & IR_TI) != 0) { 
-		set_bit(OBJ_TX_REQUEST,&obj->flags);
-		while(!test_and_set_bit(OBJ_TX_LOCK,&obj->flags)){
-			clear_bit(OBJ_TX_REQUEST,&obj->flags);
+		can_msgobj_set_fl(obj,TX_REQUEST);
+		while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
+			can_msgobj_clear_fl(obj,TX_REQUEST);
 
 			if (can_read_reg(chip, SJASR) & SR_TBS)
 				sja1000_irq_write_handler(chip, obj);
 
-			clear_bit(OBJ_TX_LOCK,&obj->flags);
-			if(!test_bit(OBJ_TX_REQUEST,&obj->flags)) break;
+			can_msgobj_clear_fl(obj,TX_LOCK);
+			if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
 		}
 	}
 
@@ -380,7 +376,7 @@ irqreturn_t sja1000_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
 		}
 	}
 
-	return IRQ_HANDLED;
+	return CAN_IRQ_HANDLED;
 }
 
 void sja1000_irq_read_handler(struct chip_t *chip, struct msgobj_t *obj)
@@ -391,7 +387,12 @@ void sja1000_irq_read_handler(struct chip_t *chip, struct msgobj_t *obj)
 		id = can_read_reg(chip, SJARXID0) | (can_read_reg(chip, SJARXID1)<<8);
 		obj->rx_msg.length = len = id & 0x0f;
 		obj->rx_msg.flags = id&ID0_RTR ? MSG_RTR : 0;
+               #ifdef CAN_MSG_VERSION_2
+		obj->rx_msg.timestamp.tv_sec = 0;
+		obj->rx_msg.timestamp.tv_usec = 0;
+               #else /* CAN_MSG_VERSION_2 */
 		obj->rx_msg.timestamp = 0;
+               #endif /* CAN_MSG_VERSION_2 */
 		obj->rx_msg.cob = 0;
 		obj->rx_msg.id = id>>5;
 
@@ -450,26 +451,20 @@ void sja1000_irq_write_handler(struct chip_t *chip, struct msgobj_t *obj)
  */
 int sja1000_wakeup_tx(struct chip_t *chip, struct msgobj_t *obj)
 {
-	 /* dummy lock to prevent preemption fully portable way */
-	spinlock_t dummy_lock;
-	
-	/*  preempt_disable() */
-	spin_lock_init(&dummy_lock);
-	spin_lock(&dummy_lock);
+	can_preempt_disable();
 	
-	set_bit(OBJ_TX_REQUEST,&obj->flags);
-	while(!test_and_set_bit(OBJ_TX_LOCK,&obj->flags)){
-		clear_bit(OBJ_TX_REQUEST,&obj->flags);
+	can_msgobj_set_fl(obj,TX_REQUEST);
+	while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
+		can_msgobj_clear_fl(obj,TX_REQUEST);
 
 		if (can_read_reg(chip, SJASR) & SR_TBS)
 			sja1000_irq_write_handler(chip, obj);
 	
-		clear_bit(OBJ_TX_LOCK,&obj->flags);
-		if(!test_bit(OBJ_TX_REQUEST,&obj->flags)) break;
+		can_msgobj_clear_fl(obj,TX_LOCK);
+		if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
 	}
 
-	/* preempt_enable(); */
-	spin_unlock(&dummy_lock);
+	can_preempt_enable();
 	return 0;
 }