X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/6250b3805fb7e368adf1e3f7ca39c8cc617bccff..6234a9dc385e5a9258a84227b2eab09bbb099c27:/lincan/src/nsi.c

diff --git a/lincan/src/nsi.c b/lincan/src/nsi.c
index ce9c591..06d38e1 100644
--- a/lincan/src/nsi.c
+++ b/lincan/src/nsi.c
@@ -64,8 +64,8 @@ int nsi_reset(struct candevice_t *candev)
     DEBUGMSG("Resetting nsi hardware ...\n");
     /* we don't use template_write_register because we don't use the two first
        register of the card but the third in order to make a hard reset */
-    outb (1, nsican_base + candev->res_addr);
-    outb (0, nsican_base + candev->res_addr);
+    can_outb (1, nsican_base + candev->res_addr);
+    can_outb (0, nsican_base + candev->res_addr);
     for (i = 1; i < 1000; i++)
 	udelay (1000);
     
@@ -124,7 +124,7 @@ int nsi_init_chip_data(struct candevice_t *candev, int chipnr)
 {
 	i82527_fill_chipspecops(candev->chip[chipnr]);
 	candev->chip[chipnr]->chip_base_addr=
-	    candev->io_addr;
+	    can_ioport2ioptr(candev->io_addr);
 	candev->chip[chipnr]->clock = 16000000;
 	nsican_irq=candev->chip[chipnr]->chip_irq;	
         nsican_base=candev->chip[chipnr]->chip_base_addr;
@@ -169,7 +169,7 @@ int nsi_program_irq(struct candevice_t *candev)
  * on the CAN chip. You should only have to edit this function if your hardware
  * uses some specific write process.
  */
-void nsi_write_register(unsigned data, unsigned long address)
+void nsi_write_register(unsigned data, can_ioptr_t address)
 {
     /* address is an absolute address */
 
@@ -178,14 +178,14 @@ void nsi_write_register(unsigned data, unsigned long address)
 
     /* write the relative address on the eight LSB bits 
        and the data on the eight MSB bits in one time */
-    outw(address-nsican_base + (256 * data), nsican_base); 
+    can_outw(address-nsican_base + (256 * data), nsican_base); 
 }
 
 /* The function template_read_register is used to read from hardware registers
  * on the CAN chip. You should only have to edit this function if your hardware
  * uses some specific read process.
  */
-unsigned nsi_read_register(unsigned long address)
+unsigned nsi_read_register(can_ioptr_t address)
 {
     /* this is the same thing that the function write_register.
        We use the two register, we write the address where we 
@@ -195,8 +195,8 @@ unsigned nsi_read_register(unsigned long address)
 	can_spin_irqflags_t flags;
     
 	can_spin_lock_irqsave(&nsican_port_lock,flags);
-	outb(address-nsican_base, nsican_base);
-	ret=inb(nsican_base+1);
+	can_outb(address-nsican_base, nsican_base);
+	ret=can_inb(nsican_base+1);
 	can_spin_unlock_irqrestore(&nsican_port_lock,flags);
 	return ret;
 }