X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/542ecdc96eda5b8ab56ad87bafbe612b4f5204f2..9c8ab08d7e8fca3916a7f91a3c001d151989137c:/lincan/src/i82527.c diff --git a/lincan/src/i82527.c b/lincan/src/i82527.c index 4ffad17..caed3d9 100644 --- a/lincan/src/i82527.c +++ b/lincan/src/i82527.c @@ -1,11 +1,36 @@ -/* i82527.c - * Linux CAN-bus device driver. - * Written by Arnaud Westenberg email:arnaud@wanadoo.nl - * Rewritten for new CAN queues by Pavel Pisa - OCERA team member - * email:pisa@cmp.felk.cvut.cz - * This software is released under the GPL-License. - * Version lincan-0.3 17 Jun 2004 - */ +/**************************************************************************/ +/* File: i82527.c - Intel i82527 CAN controller support */ +/* */ +/* LinCAN - (Not only) Linux CAN bus driver */ +/* Copyright (C) 2002-2009 DCE FEE CTU Prague */ +/* Copyright (C) 2002-2009 Pavel Pisa */ +/* Funded by OCERA and FRESCOR IST projects */ +/* Based on CAN driver code by Arnaud Westenberg */ +/* */ +/* LinCAN is free software; you can redistribute it and/or modify it */ +/* under terms of the GNU General Public License as published by the */ +/* Free Software Foundation; either version 2, or (at your option) any */ +/* later version. LinCAN is distributed in the hope that it will be */ +/* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */ +/* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */ +/* General Public License for more details. You should have received a */ +/* copy of the GNU General Public License along with LinCAN; see file */ +/* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */ +/* Cambridge, MA 02139, USA. */ +/* */ +/* To allow use of LinCAN in the compact embedded systems firmware */ +/* and RT-executives (RTEMS for example), main authors agree with next */ +/* special exception: */ +/* */ +/* Including LinCAN header files in a file, instantiating LinCAN generics */ +/* or templates, or linking other files with LinCAN objects to produce */ +/* an application image/executable, does not by itself cause the */ +/* resulting application image/executable to be covered by */ +/* the GNU General Public License. */ +/* This exception does not however invalidate any other reasons */ +/* why the executable file might be covered by the GNU Public License. */ +/* Publication of enhanced or derived LinCAN files is required although. */ +/**************************************************************************/ #include "../include/can.h" #include "../include/can_sysdep.h" @@ -131,7 +156,8 @@ int i82527_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw, if (i82527_enable_configuration(chip)) return -ENODEV; - clock /=2; + if(chip->int_cpu_reg & iCPU_DSC) + clock /=2; /* tseg even = round down, odd = round up */ for (tseg=(0+0+2)*2; tseg<=(MAX_TSEG2+MAX_TSEG1+2)*2+1; tseg++) { @@ -247,7 +273,7 @@ int i82527_clear_objects(struct canchip_t *chip) DEBUGMSG("Cleared all message objects on chip\n"); - for (i=1; i<=15; i++) { + for (i=0; imax_objects; i++) { obj=chip->msgobj[i]; canobj_write_reg(chip,obj,(INTPD_RES|RXIE_RES|TXIE_RES|MVAL_RES),iMSGCTL0); canobj_write_reg(chip,obj,(NEWD_RES|MLST_RES|TXRQ_RES|RMPD_RES), iMSGCTL1); @@ -415,6 +441,19 @@ int i82527_stop_chip(struct canchip_t *chip) return 0; } +int i82527_attach_to_chip(struct canchip_t *chip) +{ + return 0; +} + +int i82527_release_chip(struct canchip_t *chip) +{ + i82527_stop_chip(chip); + can_write_reg(chip, (iCTL_CCE|iCTL_INI), iCTL); + + return 0; +} + static inline void i82527_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj) { @@ -582,13 +621,16 @@ void i82527_irq_update_filter(struct canchip_t *chip, struct msgobj_t *obj) i82527_pre_read_config(chip, obj); - CANMSG("i82527_irq_update_filter: obj at 0x%08lx\n",obj->obj_base_addr); + CANMSG("i82527_irq_update_filter: obj at 0x%08lx\n", + can_ioptr2ulong(obj->obj_base_addr)); } } -void i82527_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj) +int i82527_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj) { + int job_done=0; + while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)) { if(can_msgobj_test_and_clear_fl(obj,TX_REQUEST)) { @@ -602,6 +644,10 @@ void i82527_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj) } } + job_done=1; + + mb(); + can_msgobj_clear_fl(obj,TX_LOCK); if(can_msgobj_test_fl(obj,TX_REQUEST)) continue; @@ -609,6 +655,8 @@ void i82527_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj) continue; break; } + + return job_done; } int i82527_irq_handler(int irq, struct canchip_t *chip) @@ -616,6 +664,7 @@ int i82527_irq_handler(int irq, struct canchip_t *chip) unsigned char msgcfg; unsigned irq_register; + unsigned status_register; unsigned object; struct msgobj_t *obj; int loop_cnt=CHIP_MAX_IRQLOOP; @@ -642,14 +691,15 @@ int i82527_irq_handler(int irq, struct canchip_t *chip) DEBUGMSG("i82527: iIRQ 0x%02x\n",irq_register); if (irq_register == 0x01) { - DEBUGMSG("Status register: 0x%x\n",can_read_reg(chip, iSTAT)); + status_register=can_read_reg(chip, iSTAT); + CANMSG("Status register: 0x%x\n",status_register); continue; /*return CANCHIP_IRQ_NONE;*/ } if (irq_register == 0x02) object = 14; - else if(irq_register < 14) + else if(irq_register <= 13+3) object = irq_register-3; else return CANCHIP_IRQ_NONE; @@ -661,16 +711,24 @@ int i82527_irq_handler(int irq, struct canchip_t *chip) can_msgobj_set_fl(obj,TX_REQUEST); /* calls i82527_irq_write_handler synchronized with other invocations */ - i82527_irq_sync_activities(chip, obj); + if(i82527_irq_sync_activities(chip, obj)<=0){ + /* The interrupt has to be cleared anyway */ + canobj_write_reg(chip,obj,(MVAL_UNC|TXIE_UNC|RXIE_UNC|INTPD_RES),iMSGCTL0); + + /* + * Rerun for case, that parallel activity on SMP or fully-preemptive + * kernel result in preparation and finished sending of message + * between above if and canobj_write_reg. + */ + i82527_irq_sync_activities(chip, obj); + } } else { i82527_irq_read_handler(chip, obj, object); } - irq_register=i82527_seg_read_reg(chip, iIRQ); - - } while(irq_register != 0); + } while((irq_register=i82527_seg_read_reg(chip, iIRQ)) != 0); return CANCHIP_IRQ_HANDLED; } @@ -753,9 +811,12 @@ int i82527_register(struct chipspecops_t *chipspecops) chipspecops->enable_configuration = i82527_enable_configuration; chipspecops->disable_configuration = i82527_disable_configuration; chipspecops->set_btregs = i82527_set_btregs; + chipspecops->attach_to_chip = i82527_attach_to_chip; + chipspecops->release_chip = i82527_release_chip; chipspecops->start_chip = i82527_start_chip; chipspecops->stop_chip = i82527_stop_chip; chipspecops->irq_handler = i82527_irq_handler; + chipspecops->irq_accept = NULL; return 0; }